| Entries |
| Document | Title | Date |
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| 20080204035 | FAULT DETECTION CIRCUIT FOR PRINTERS WITH MULTIPLE PRINT HEADS - A fault detector apparatus for a printer having a first print head and a second print head with a plurality of print head elements in each print head is disclosed. The apparatus includes a test circuit in signal communication with all the print heads to test the plurality of print head elements. The test circuit includes a test power supply for generating a test voltage, a first resistor, a second resistor, and an analog to digital converter in signal communication with the second resistor. The first resistor is in series connection between the test power supply and the plurality of elements in the first print head. The second resistor in series connection with the test power supply, the first resistor, and the plurality of elements in the second print head. The fault detector apparatus will also work for a printer with only one print head. | 08-28-2008 |
| 20080204036 | Pulse-generating apparatus and a method for adjusting levels of pulses outputted from pulse-generating apparatus - A pulse-generating apparatus, comprising a pulse source, an output terminal to which pulses from the pulse source are supplied, and a measuring device for measuring the level of a pulse that will be output from the output terminal at a pre-determined time position; a pulse-generating apparatus, further comprising a device for adjusting the level of the pulse that will be output at the pre-determined time position, based on at least the measured pulse level and the reference pulse level at the pre-determined time position; and a pulse-generating apparatus, wherein the pulse source generates pulses based on at least one parameter, and the adjusting device adjusts the level of the pulse that will be output by updating the parameter, changing the amount of amplification of the amplifier of the pulse source, or changing the amount of attenuation of the attenuator of the pulse source. The parameter may include at least one of the load impedance and the pulse level. | 08-28-2008 |
| 20080204037 | Multilayer wiring board and method for testing the same - A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. The ceramic substrate has an internal conductor layer, which is connected to a test pad. The first conductor layer is formed, and then an electric capacitance is measured between the test pad and a wiring pattern of the first conductor layer. On the other hand, an electrical capacitance is calculated under the normal wiring pattern condition. The measured value is compared to the calculated value to determine whether the wiring pattern is good or bad. Similar measurements and comparisons are carried out for each of the second through fifth conductor layers to determine whether a three-dimensional wiring path is good or bad. As the ceramic substrate has an internal conductor layer, the electric capacitance of the wiring can be measured without an overall grounded layer in the multilayer wiring section, which is a characteristic part different from others among a variety of the multilayer wiring boards. | 08-28-2008 |
| 20080204038 | Multilayer wiring board and method for testing the same - A multilayer wiring board has a ceramic substrate, on which a multilayer wiring section is formed. One of the conductor layers has a grounded pattern. Each of the conductor layers has a reference pattern, which is usable as a standard in calculation of an electric capacitance. An electric capacitance is measured between the grounded pattern and the three-dimensional wiring path. On the other hand, a theoretical electrical capacitance is calculated on the basis of a reference value of electric capacitance which has been measured between the reference pattern and the grounded pattern. The measured value for the wiring path is compared to the calculated value to determine whether the three-dimensional wiring path is good or bad. As the multilayer wiring section has the reference patterns, the electric capacitance for the normal wiring path can be obtained by calculation without preparing the normal acceptable product. | 08-28-2008 |
| 20080211512 | Test circuit arrangement and testing method for testing of a circuit section - The invention relates to a testing method and to a test circuit arrangement for testing a circuit section of a circuit, having a connection section connected to the circuit section used to conduct a current from or to the circuit section, and having a detector circuit; wherein a first tapping point is arranged on the connection section at a distance from a transition to the circuit section, a second tapping point is arranged at the connection section that is closer to the circuit section than the first tapping point, and wherein the detector circuit samples a voltageor a voltage-equivalent value between the first and the second tapping point for testing of the circuit section. | 09-04-2008 |
| 20080218173 | METHODS AND APPARATUS FOR TESTING A CIRCUIT - In one embodiment, when a test program for testing a circuit specifies the application of a DC voltage to a particular node of the circuit, i) an operational amplifier of a circuit test system is configured to respond to remote feedback, wherein the remote feedback is responsive to a load on a circuit test system test pin that is coupled to the particular node, and ii) the DC voltage is applied to the particular node via the operational amplifier. When the test program specifies the application of a high-voltage waveform to the particular node, i) the operational amplifier is configured to respond to local feedback, wherein the local feedback is not responsive to the load on the test pin, and ii) at least a high-voltage portion of the high-voltage waveform is applied to the particular node via the operational amplifier. Other embodiments are also disclosed. | 09-11-2008 |
| 20080258736 | Magnetic flowmeter output verification - A magnetic flowmeter transmitter includes a flowtube and measurement circuitry which provides an output related to flow through the flowtube. Output circuitry, such as analog and pulse output circuitry, provides transmitter output(s) related to flow through the flowtube. Output verification circuitry of the transmitter is coupled to the output circuitry and provides verification of proper operation of the output circuitry by analyzing the output signals. | 10-23-2008 |
| 20080265905 | SYSTEM AND METHOD FOR DETECTION OF ENVIRONMENTALLY-INDUCED DAMAGE OF CONDUCTIVE ELEMENTS IN A CIRCUIT BOARD - A system and method for detection of environmentally-induced damage of conductive elements in a circuit board are disclosed. A system may include a test module and a detection module operably connected to the test module. The test module may comprise at least one conductive element. The detection module may be operable to detect a change in at least one electrical property associated with the at least one of conductive element, wherein the change occurs at least in part as a result of environmentally-induced damage to the at least one conductive element. | 10-30-2008 |
| 20080265906 | Ic Testing Methods and Apparatus - A method and apparatus for testing an integrated circuit core or circuitry external to an integrated circuit core using a testing circuit passes a test vector from a parallel input of the testing circuit along a shift register circuit. The shift register circuit is configured to bypass one or more cores not being tested and to provide the test vector to a core scan chain of the core being tested. The bypassed cores are configured such that the associated shift register circuit portion is driven to a hold mode in which storage elements of the shift register circuit portion have their outputs coupled to their inputs. This method provides holding of the shift register stages when a core is bypassed and in a test mode, and this means the shift register stages are less prone to errors resulting from changes in clock signals applied to the shift register stages. | 10-30-2008 |
| 20080284448 | TEST APPARATUS AND PIN ELECTRONICS CARD - Provided is a test apparatus that tests a DUT, which includes a driver that outputs a test signal to the DUT, a first transmission path that electrically connects the driver and the DUT, a first FET switch provided on the first transmission path to connect or disconnect the driver and the DUT to or from each other, and a capacitance compensator that detects an output signal from the DUT, and charges or discharges a capacitive component of the first FET switch based on the detected output signal. | 11-20-2008 |
| 20080290878 | Ic Testing Methods and Apparatus - A testing circuit has a shift register circuit ( | 11-27-2008 |
| 20080297164 | WIRING ANALYZER ADAPTER - An adapter for connecting a wiring cable to be tested to a wiring analyzer. The adapter includes a body; a first set of contacts positioned on a first side of the body for electrically connecting with the wiring analyzer; and a second set of contacts positioned on a second side of the body and electrically connected to the first set of contacts for connecting with a connector on the cable to be tested. The first and second sides of the body are less than 4 inches apart so that the first set of contacts is positioned less than 4 inches from the second set of contacts. The body may include hanging structure for hanging the adapter on an interface of the wiring analyzer and a latch for securing the adapter to the interface. | 12-04-2008 |
| 20080297165 | TEST APPARATUS - A driver for supplying a test signal to a device under test is shared by a plurality of terminals. In this way, the cost and time required for the test of the device under test can be reduced. | 12-04-2008 |
| 20080297166 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device determining connection status between an output terminal connected to an output buffer and an external device, the semiconductor device including a test voltage generating circuit to generate test voltage for changing voltage of the output terminal, a connection detection determining circuit to compare voltage of the output terminal with reference voltage and to determine connection status of the external device based on the comparing result, and a compensation circuit generating simulation current where leak current generated at the output buffer is reproduced in a simulatory manner and compensating voltage change of the output terminal by the simulation current. | 12-04-2008 |
| 20080297167 | Functional parametric tester and emulator of electronic modules and PCB's - New electro-electronic equipment Functional Parametric Tester and Emulator of Electronic Modules and PCB's. The Functional Parametric Tester and Emulator of Electronic Modules and PCB's is an equipment that allows performance of functional and parametric testing in a great variety of electronic circuits, electronic modules or electronic systems. The equipment's main characteristic is the programming ease and flexibility due to the embedded software with Electronic Circuit Library, which is a set of electronic circuits that allows the emulation of a great variety of electronic systems and execution of various functional automated tests. | 12-04-2008 |
| 20080303532 | COMBUSTIBLE-GAS SENSOR, FUEL CELL SYSTEM, ABNORMALITY DETECTING METHOD, AND FUEL CELL SYSTEM CONTROL METHOD - A combustible-gas sensor includes a detecting circuit having a bridge comprising a compensator for compensating for a change in external environment and a detector for detecting a concentration of combustible gas. The detecting circuit includes a device for measuring a current passing through the detecting circuit. | 12-11-2008 |
| 20080309348 | INTEGRATED CHIP CLAMP ADJUSTMENT ASSEMBLY AND METHOD - Disclosed herein is an apparatus that relates to a device useful in integrated chip (IC) testing apparatus. More particularly, the device is an adjustable clamp assembly which allows a variety of different sized IC's to be used with a single piece of test equipment. The clamp assembly includes a frame, a base and a plurality of clamps. Each clamp is movably connected to the base to allow movement in the x-y directions and each of the clamps includes an z-direction adjustment mechanism. Additionally, the device according to this invention also includes an adapter having opposed adapters which are designed for compatible mating with a mechanized handlers. In an exemplary embodiment, the adapter has a suspension system designed for quiet mechanized handling of the IC while being held by the clamp assembly. | 12-18-2008 |
| 20080309349 | Flexible interposer system - A system for detecting communication signals between two processing devices may include an interposer unit that comprises an active signal conditioning module to condition and convey portions of signals (e.g., 5 GHz or above) to a receiver, such as a measurement instrument. In an illustrative example, the interposer unit may convey high speed signals between a device under test (DUT) and a motherboard designed to operate with the DUT. A measurement instrument, such as a protocol analyzer, for example, may monitor signals on the interposer unit through a flexible transmission line (e.g., flex circuit) extending between the measurement instrument and the interposer unit. In various embodiments, active signal conditioning on the flexible transmission line may substantially mitigate degradation of the portion of the signals conveyed from the interposer unit to the instrument. | 12-18-2008 |
| 20080309350 | ELECTRO-OPTIC DISPLAYS, AND MATERIALS AND METHODS FOR PRODUCTION THEREOF - A first sub-assembly useful in an electro-optic display is produced by: providing an electro-optic sub-assembly comprising a layer of electro-optic medium; providing an adhesive sub-assembly comprising an adhesive layer, the adhesive layer being larger than the layer of electro-optic medium and having one or more apertures; adhering the adhesive sub-assembly to the electro-optic sub-assembly so that a part of the adhesive layer adheres to the layer of electro-optic medium but the aperture(s) are spaced from the layer of electro-optic medium. A second sub-assembly comprises a conductive layer and a layer of electro-optic medium. The conductive layer has a main section covered by the electro-optic medium, an exposed section free from the electro-optic medium, and a weak section connecting the main section and the exposed section, so that the exposed section can be manipulated to rupture the weak section, thus separating the exposed section from the main section without substantial damage. | 12-18-2008 |
| 20080315892 | Methods and apparatus using one or more supernodes when testing for shorts between nodes of a circuit assembly - A method of testing for shorts between nodes of a circuit assembly includes parsing circuit design data to identify positional data for nodes of a circuit assembly, and using the positional data to classify ones of the nodes as members of a supernode, where each member of the supernode is unlikely to be shorted to any other member of the supernode. Tests for shorts in a set of nodes that includes the supernode and a plurality of other nodes of the circuit assembly are then conducted, by iteratively i) stimulating a particular one of the set of nodes, and ii) while stimulating the particular node, grounding at least one other node in the set of nodes and monitoring a current flow through the particular node. When stimulating or grounding a supernode, all of the nodes that are members of the supernode are stimulated or grounded. If a current flow is detected through one of the stimulated nodes, the circuit assembly is indicated to be defective. Other embodiments are also disclosed. | 12-25-2008 |
| 20080315893 | Contact and connecting apparatus - A contact and a connecting apparatus are provided to enable miniaturization and shortening and cost reduction in response to further miniaturization and finer pitch of inspection objects. The contact is one electrically for contacting a terminal of a wire and includes a one-side plunger portion, an other-side plunger portion, and an elastic deformation portion provided between the plunger portions. The elastic deformation portion is made of an annular and conductive elastic member integrally connected to the one-side plunger portion and the other-side plunger portion. The plurally arranged elastic deformation portions are disposed in a zigzag shape in the up-down direction with their adjacent heights different from each other. The connecting apparatus includes the plurality of contacts electrically contacting terminals disposed on an inspection object and a contact plate for integrally supporting the respective contacts to make the contacts contact with the respective terminals of the inspection object. | 12-25-2008 |
| 20090009182 | CIRCUIT TO PROVIDE TESTABILITY TO A SELF-TIMED CIRCUIT - The present invention enables asynchronous circuits to be tested in the same manner and using the same equipment and test strategies as with synchronous circuits. The feedback path of an asynchronous element, for example a Muller C element, includes a test structure which may be invoked for the purpose of providing the means for synchronous testing. When configured for testing, the test structure provides a clocked latching and selecting function which, by virtue of breaking the feedback path of the self-timing device, prevents the device being tested from switching states until desired. When the element is not in test mode, the test structure is configured to pass through the data that normally flows through the feedback path unchanged. The result is an ability to test an asynchronous device or subsystem of a device in the same manner as and/or intermixed with a synchronous device. | 01-08-2009 |
| 20090009183 | SYSTEM AND METHOD FOR PREDICTIVE MAINTENANCE OF A BATTERY ASSEMBLY USING TEMPORAL SIGNAL PROCESSING - A technique of monitoring a battery assembly may include monitoring a parameter associated with the battery assembly to obtain a number of monitored parameter samples. A temporal sequence of monotonically increasing values may be generated from the monitored parameter samples. The temporal sequence may be analyzed for an indication of a trend in the monitored parameter toward one of an upper operational boundary or a lower operational boundary to predict a fault condition of the battery assembly. | 01-08-2009 |
| 20090009184 | Test circuit and test method - In a test circuit, a first N-channel transistor with an open drain is connected to a receiver in a test target integrated circuit and is configured to generate a first amplitude voltage signal in response to a first voltage drive signal. A second N-channel transistor with an open drain is connected to the receiver in the test target integrated circuit and is configured to generate a second amplitude voltage signal in response to a second voltage drive signal complimentary to the first voltage drive signal. | 01-08-2009 |
| 20090021264 | METHOD AND APPARATUS FOR REPEATABLE DRIVE STRENGTH ASSESSMENTS OF HIGH SPEED MEMORY DIMMS - The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided. | 01-22-2009 |
| 20090027059 | Techniques for Detecting Open Integrated Circuit Pins - A technique of detecting an open integrated circuit (IC) pin includes selectably coupling a first open detect circuit, which includes a first inverter having a first threshold, to the IC pin. Next, a first logic state at an output of the first inverter is determined. Then, based upon the first logic state, it is determined whether the IC pin is open or whether it is indeterminate as to whether the IC pin is open. When it is indeterminate as to whether the IC pin is open, based on the first logic state, a second open detect circuit is selectably coupled to the IC pin. The second open detect circuit includes a second inverter having a second threshold (the first threshold is greater than the second threshold). A second logic state at an output of the second inverter is then determined. Finally, based upon the first and second logic states, it is determined whether the IC pin is open. | 01-29-2009 |
| 20090027060 | ADAPTER AND INTERFACE AND ELECTRONIC DEVICE TEST APPARATUS PROVIDED WITH ADAPTER - An adapter able to reduce the costs of an electronic device test apparatus, the adapter having a frame member interposed, between an opening formed at a handler and a HIFIX attached to a test head and inserted in the opening for adapting the shape of the HIFIX to the shape of the opening. | 01-29-2009 |
| 20090033334 | Contact configuration for undertaking tests on circuit board - An electronic structure (for example a reliability board or a cycling control module) has a body including a body portion insertable into a connector. A plurality of contact structures are provided on a side of the body portion, each contact structure comprising a first contact and a second contact spaced from the first contact, with the first and second contacts of each contact structure being aligned in the direction of insertion of the body portion into the connector. A corresponding second plurality of contact structures is provided on a side of the body portion opposite the first-mentioned side. These contacts connect with respective corresponding contacts of the connector. | 02-05-2009 |
| 20090033335 | METHOD OF DIGITAL EXTRACTION FOR ACCURATE FAILURE DIAGNOSIS - A method for testing VLSI circuits comprises a two-pass diagnostic method for testing a circuit wherein a first pass comprises a conventional test flow wherein an ATPG tool generates a set of test patterns and identifies possible faulty nets within the circuit. A second pass focuses on a designated critical subset of the circuit extracted using a method for extracting a subset for failure diagnosis of the tested circuit. A second pass utilizes an extraction algorithm which extracts one or more critical subsets of the circuit in order to obtain more accurate failure diagnosis. | 02-05-2009 |
| 20090033336 | WIRELESS REMOTE DETECTOR SYSTEMS AND METHODS - A device for associating a circuit breaker with a circuit may have one or more sensors for remotely sensing that a circuit is active. When a sensor senses that a circuit is active, a transmitter may transmit a signal to a receiver that alerts a user. In this manner, the user may determine which of a plurality of different circuit breakers is associated with a particular circuit. This device mitigates the contemporary need to repeatedly turn off circuit breakers, go to the room in which the circuit is being monitored, and check to see if the circuit is active. | 02-05-2009 |
| 20090039896 | EXTRUSION FAILURE MONITOR STRUCTURES - A structure and method for monitoring extrusion failures. The structure includes: a test wire having first and second ends; first and second vias contacting first and second ends of the test wire; a first monitor structure electrically isolated from the test wire and surrounding a periphery of the test wire; and a second monitor structure over the test wire, the second monitor structure electrically isolated from the test wire, the second monitor structure extending over at least the first end of the test wire. | 02-12-2009 |
| 20090039897 | Systems and Methods for Scan Chain Testing Using Analog Signals - Systems and methods for utilizing analog signals for scan chain testing of a device are disclosed. At least one embodiment includes a method for utilizing an analog signal for scan chain testing of a device comprising: passing digital input signals from a test module into a signal disassembler configured to divide the digital input signals into bits corresponding to each of the digital input signals, passing the bits into a digital-to-analog converter configured to generate an analog input signal, passing the analog input signal to an analog-to-digital converter within the device under test to obtain bits corresponding to each of the digital input signals, passing the bits as inputs to scan chains within the device under test, and utilizing the bits to test the device under test by the scan chains. | 02-12-2009 |
| 20090051366 | TEST SYSTEM AND DAUGHTER UNIT - Provided is a test system that tests a device under test, the test system including: a test head that includes a test module that generates a test signal to be supplied to the device under test; a performance board that is mounted above the test head and conveys the test signal generated by the test module; and a daughter unit that is detachably mounted to the performance board, and conveys the test signal from the performance board to the device under test, where the daughter unit includes: a socket to which the device under test is mounted; a daughter board to which the socket is mounted; and an enclosure that accommodates therein the socket and the daughter board, and includes a daughter-unit shield that cuts off noise from outside with respect to the socket and the daughter board. | 02-26-2009 |
| 20090051367 | METHOD OF DETECTING DISCONNECTION AND POWER DISCONTINUITY OF I/O UNIT CONNECTED TO NUMERICAL CONTROLLER - A power discontinuity occurring in any one of a plurality of I/O units connected to a numerical controller is detected. When the power discontinuity occurs in any one of the I/O units, the I/O unit detects the power discontinuity, and transmits the detection of the power discontinuity to an I/O unit in front of the I/O unit, at a timing different from a timing of an ordinary communication, in the form of a communication packet having a data pattern different from an ordinary data pattern. When the front I/O unit receives the communication packet, the communication packet is stored in a memory as power discontinuity detection information. | 02-26-2009 |
| 20090058425 | METHOD AND APPARATUS TO TEST ELECTRICAL CONTINUITY AND REDUCE LOADING PARASITICS ON HIGH-SPEED SIGNALS - An apparatus for testing electrical continuity of a surface mounted (SMT) electrical board includes: a printed wiring board having a first surface and an opposite second surface; a conductive signal line disposed on each of the first and second surfaces of the printed wiring board; an electrical component disposed on and electrically connected to the conductive signal line on the first surface; and a through hole extending through the printed wiring board and the conductive signal line on the second surface of the printed wiring board exposing a surface side of the conductive signal line facing the first surface of the printed wiring board. The through hole is unplated in an inside bore defining the through hole and the through hole allows direct access to the conductive signal line on the first surface to test continuity of the conductive signal line on the first surface connected to the electrical component from the second surface of the printed wiring board. | 03-05-2009 |
| 20090066340 | TEST APPARATUS AND CONNECTING APPARATUS - Provided is a test apparatus that tests a device under test, including a test head that generates a test signal for testing the device under test; a socket board onto which is mounted the device under test, that transmits signals between the test head and the device under test; a plurality of actuators that are disposed on a lower surface of the socket board to correspond one-to-one with support positions thereof, and that each have a state thereof changed according to a control signal supplied thereto to independently move the corresponding support position in a direction vertical to the lower surface of the socket board; and a connection control section that supplies a first control signal to each actuator to set each actuator to be in the same state, and thereafter supplies commonly to each actuator a second control signal that gradually decreases an apparatus separation distance between the socket board and the test head. | 03-12-2009 |
| 20090066341 | MEDICAL DEVICE AND TEST METHOD FOR MEDICAL DEVICE - A medical device of the present invention is a medical device having a plurality of wiring boards disposed in a housing, each of which has a board terminal for testing the wiring board, comprising: one or more external terminals provided on the outer surface of the housing and connected to one or more of the board terminals; and one or more block portions provided between the respective board terminals, and the respective external terminals and blocking writing of data to the wiring boards. | 03-12-2009 |
| 20090072838 | Multi-port switching apparatus, device testing system and method of testing therefor - A multi-port switching apparatus ( | 03-19-2009 |
| 20090085577 | SYSTEM FOR TERMINATING HIGH SPEED INPUT/OUTPUT BUFFERS IN AN AUTOMATIC TEST EQUIPMENT ENVIRONMENT TO ENABLE EXTERNAL LOOPBACK TESTING - An apparatus comprising a test termination card having a first set of connections and a second set of connections. The first set of connections may be configured to connect to a specific pinout of a device under test. The second set of connections may be configured to connect to a general pinout of a tester load board. The termination card may toggle between (a) connecting the first set of connectors to the second set of connectors to implement a first test type and (b) disconnecting the first set of connectors from the second set of connectors to implement a second test type. | 04-02-2009 |
| 20090085578 | INTEGRATED CIRCUITS WITH PROGRAMMABLE WELL BIASING - An integrated circuit includes a substrate, a storage device formed in the substrate to hold bias settings, and operational blocks formed in the substrate, each operational block including an operational circuit and a charge pump to provide well bias voltages to the operational circuit in response to one or more of the bias settings. A method for testing an integrated circuit having two or more operational blocks includes: (a) determining a maximum operating speed of each of the blocks at a minimum supply voltage; (b) selecting a block that has a slow operating speed; (c) selecting a well bias to speed up the selected block; (d) selecting a supply voltage to meet a target operating frequency at the selected well bias and measuring power; (e) repeating acts (b)-(d) while the measured power is less than a baseline power; and (f) saving the selected well bias and supply voltage settings for operation of the integrated circuit. | 04-02-2009 |
| 20090091330 | Device and method for actuator monitoring of a safety-related load circuit connected with two channels - The invention relates to a method and to devices for monitoring actuators arranged in the load circuit of an output circuit for switching the load circuit, wherein a number of actuators ( | 04-09-2009 |
| 20090091331 | CIRCUIT BOARD AND METHOD FOR AUTOMATIC TESTING - A circuit board (CB) and method for automatic testing of an electronic device under test (DUT). The circuit board (CB) has a first terminal (T | 04-09-2009 |
| 20090091332 | Vehicle power supply device - A vehicle power supply device comprises a lithium battery module that includes a plurality of lithium battery cells, first control devices, voltage detection harnesses via which terminal voltages at individual lithium battery cells are input to the first control devices, a second control device and a signal transmission path through which signals are transmitted. The first control device comprises a selection circuit that selects terminal voltages at individual lithium battery cells, a voltage measurement circuit that measures the selected terminal voltages, balancing switches used to discharge individual lithium battery cells, a balancing switch control circuit that controls open/close of the balancing switches, and a diagnosis circuit for detecting an electrically abnormal connection in the detection harnesses. | 04-09-2009 |
| 20090115426 | Faulted circuit indicator apparatus with transmission line state display and method of use thereof - The invention provides a faulted circuit indicator apparatus with transmission line state display, as well as methods for using the apparatus. The faulted circuit indicator has a sensor that can be electrically coupled to an electrical conductor for collecting data relating to a state of the electrical conductor. The faulted circuit indicator also has a controller that is logically coupled to the sensor for receiving data and determining whether a fault condition has occurred on the electrical conductor. The faulted circuit indicator also has one or more indicators that are logically coupled to the controller for indicating whether a fault condition has occurred as well as the state of the electrical conductor. The state of the conductor may be the voltage, the temperature, or the vibration present on the conductor. | 05-07-2009 |
| 20090121725 | TEST APPARATUS AND MEASUREMENT APPARATUS - There is provided a test apparatus for testing a device under test, which includes a voltage supplying section which supplies a voltage to the device under test through a wire, a first capacitor which is arranged between the wire and a common potential in series, a current detecting section which detects a current flowing through the wire at a location closer to the device under test than the first capacitor is, an integrating section which outputs an integration value obtained by integrating a difference between the current detected by the current detecting section and a predetermined reference current, and a judging section which judges whether the device under test is a pass or a failure based on the integration value. | 05-14-2009 |
| 20090121726 | TEST APPARATUS AND MEASUREMENT APPARATUS - There is provided a test apparatus for testing a device under test, which includes a voltage supplying section that supplies a voltage to the device under test through a wire, a first capacitor that is arranged between the wire and a common potential in series, a current detecting section that detects a current flowing through the wire at a location closer to the device under test than the first capacitor is, an integrating section that outputs an integration value obtained by integrating a difference between the current detected by the current detecting section and a predetermined reference current, and a judging section that judges whether the device under test is a pass or a failure based on the integration value. | 05-14-2009 |
| 20090128160 | DUAL SENSOR SYSTEM HAVING FAULT DETECTION CAPABILITY - A sensor system ( | 05-21-2009 |
| 20090134880 | TEST CIRCUITS AND CURRENT PULSE GENERATOR FOR SIMULATING AN ELECTOSTATIC DISCHARGE - This invention is an electrostatic discharge testing circuit that can deliver current pulses to a component under test (CUT) with a custom amplitude versus time profile shape. Pulse generation with customized shapes is accomplished by discharging an energy storage network comprised of capacitor(s), transmission line(s) and other passive components. Current pulses compliant to the European International Electrotechnical Commission IEC 61000-4-2 standard can be so produced. These current pulses are delivered to the CUT with low distortion through a constant impedance electrical path, such as a combination of cables and controlled impedance conductors of printed wiring boards compatible with packaged IC devices, assemblies, and wafer probes. The current pulses can be delivered with various impedances, and measurements made that allow the CUT currents and voltages to be calculated. | 05-28-2009 |
| 20090140746 | TESTING CIRCUIT BOARD - A testing circuit board used in a testing system with a tester and a handler is disclosed. The testing circuit board is used for transmitting a plurality of testing signals provided by the tester to test at least two devices under test located on the handler. The testing circuit board includes a connecting board, a load board and at least two connecting interfaces. The connecting board coupled to the handler has at least two connecting sockets for respectively connecting to the devices under testing. The load board coupled to the tester has two joining sockets located corresponding to the connecting sockets. The at least two connecting interfaces are coupled between the connecting sockets and the joining sockets for transmitting the testing signals for testing the devices under testing. | 06-04-2009 |
| 20090140747 | Detection of faults in an injector arrangement - A method and apparatus for detecting faults in an injector arrangement is described. The injector arrangement comprises a plurality of piezoelectric injectors that are located in parallel branches of an injector bank circuit of an injector drive circuit. Each branch of the injector bank circuit comprises a high side isolation switch. The high side isolation switches are each operable to enable an associated piezoelectric injector in the injector bank circuit when closed, and disable the associated piezoelectric injector in the injector bank circuit when open. The fault detection method comprises the steps of operating the high side isolation switches so as to enable one of the piezoelectric injectors and disable the other piezoelectric injector(s), and performing diagnostics to detect the presence or absence of faults on the enabled piezoelectric injector. | 06-04-2009 |
| 20090146667 | Testing of a photovoltaic panel - A method for testing a photovoltaic panel connected to an electronic module. The electronic module has at least one input attached to the photovoltaic panel and at least one power output. The method of testing the photovoltaic panel begins with activating a bypass of the electronic module. The bypass is preferably activated by applying a magnetic or an electromagnetic field. The bypass provides a low impedance path between the input and output of the electronic module. | 06-11-2009 |
| 20090153145 | Method and Device for Checking Current Converters by Means of High-Current Pulses - In order to check the functionality of a conventional current converter at low cost, a device for checking a current converter is provided. The current converter includes a test current conductor and a test pulse circuit. The latter has an energy storage device, a charging device for charging the energy storage device and a switching element for discharging the energy storage device via the test current conductor. As a result, a discharge current can be generated in the test current conductor, wherein an evaluation unit for detecting a current converter signal caused by the discharge current is provided. | 06-18-2009 |
| 20090153146 | APPARATUS FOR INSPECTING CIRCUIT BOARD AND METHOD OF INSPECTING CIRCUIT BOARD - An apparatus and method for inspecting a circuit board is described which can well absorb a variation in a height of an electrode to be inspected and can maintain an insulating property between adjacent inspection electrodes even if the electrode to be inspected is arranged at a fine pitch. | 06-18-2009 |
| 20090160456 | DEVICE FOR INSPECTING SOLDERING SPOTS IN A STORAGE BATTERY - A device for inspecting a soldering spot in a storage battery includes a power supply unit and an inspecting unit. The power supply unit outputs a test power signal to be applied to the soldering spot. The inspecting unit includes first and second inspecting terminals, and a control module. The first and second inspecting terminals are adapted to be connected electrically to the soldering spot so as to detect response of the soldering spot to application of the test power signal by the power supply unit. The control module determines if a detected response of the soldering spot as detected through the first and second inspecting terminals falls within a predetermined range configured in the control module, generates an indication signal if the detected response falls outside the predetermined range, and generates an inspection result corresponding to the detected response. | 06-25-2009 |
| 20090160457 | CIRCUIT FOR THE DETECTION OF SOLDER-JOINT FAILURES IN A DIGITAL ELECTRONIC PACKAGE - The solder-joint integrity of digital electronic packages, such as FPGAs or microcontrollers that have internally connected input/output buffers, is evaluated by applying a time-varying voltage through one or more solder-joint networks to charge a charge-storage component. Each network includes an I/O buffer on the die in the package and a solder-joint connection, typically one or more such connections inside the package and between the package and a board. The time constant for charging the component is proportional to the resistance of the solder-joint network, hence the voltage across the charge-storage component is a measurement of the integrity of the solder-joint network. | 06-25-2009 |
| 20090167316 | MOTHERBOARD TESTING APPARATUS - A motherboard testing apparatus for automatically turning on or off a motherboard includes a pulse signal generating circuit for outputting a pulse signal, a first control circuit for outputting a first control signal to an I/O controller on the motherboard according to the pulse signal, and a second control circuit. The first control circuit outputs a low level first control signal when it receives a low level pulse signal, the I/O controller turns the motherboard on when it receives the low level first control signal. The second control circuit outputs a second control signal to the first control circuit which controls the motherboard to turn on again when the first control circuit receives the low level pulse signal a next time. | 07-02-2009 |
| 20090167317 | Apparatus And Method For Test, Characterization, And Calibration Of Microprocessor-Based And Digital Signal Processor-Based Integrated Circuit Digital Delay Lines - A circuit board with a processing unit and a delay line with a controllable number of delay elements fabricated thereon includes apparatus for testing and calibrating the delay line elements. In the test mode, a calibrated pulse is delayed by the delay line while determining the logic state of pulse at two times, the interval between the two times being the same as the pulse width. By adding delay elements, the period of the calibrated pulse as a function of number of delay elements can determine the delay of each delay element. In the calibration mode, the delay line is configured as a ring oscillator and the frequency of the ring oscillator as a function of number of delay elements provides the time delay for the individual elements. | 07-02-2009 |
| 20090179653 | NOISE-REDUCTION METHOD FOR PROCESSING A TEST PORT - A noise-reduction method for processing a port is applied to a test target for testing or being burned in with software. At least one zero-Ohm resistor is provided with a first end thereof electrically connected to a device under test (DUT) of the test target and a second end thereof connected to a test port. Moreover, at least one grounding zero-Ohm resistor is provided with one end connected to ground and the other end is a floating end. After the test target is finished debugging or burned in with software, the connection of the first end and the DUT is disabled, and the second end is connected to ground through the floating end to reduce noise generation and improve a flexibility in circuit layout. | 07-16-2009 |
| 20090179654 | TEST APPARATUS OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD USING THE SAME - A test apparatus includes a test fuse unit for generating a test fuse signal in response to a test mode signal during a test time and generating a test fuse signals according to a fuse cutting after a termination of the test time, a combination signal generating unit for storing a test signal and inactivating a combination signal when the test mode signal is inactivate and for outputting the stored test signal as the combination signal when the test mode signal is activate, and a code signal generating unit for activating a test code signal when one of the test fuse signal and the combination signal is activated. | 07-16-2009 |
| 20090179655 | SYSTEM AND METHOD FOR FAULT ISOLATION AND LEAKAGE CURRENT DETECTION - An inverter system for a vehicle comprising a housing, a primary stage, a secondary stage and a fault detection circuit is provided. The primary stage is configured to receive a first voltage signal from an energy power source to generate a second voltage signal. The secondary stage is configured to generate a third voltage signal in response to the second voltage signal. At least one of the primary and the secondary stages define at least one resistance point for discharging leakage current responsive to generating the third voltage signal. The fault detection circuit is configured to electrically couple the primary stage and the secondary stage to provide the second voltage signal to the secondary stage and to measure a portion of the third voltage signal to determine whether the leakage current being discharged through the at least one resistance point is within a predetermined current range. | 07-16-2009 |
| 20090184719 | IC TESTING ENVIRONMENT INVESTIGATIVE DEVICE AND METHOD - A device and method for investigating the IC (integrated circuit) testing environment is disclosed herein. The investigative device comprises a loadboard, a socket and an antenna. The loadboard is disposed in the bottom of the investigative device. The socket is disposed over the loadboard. The socket is used to fasten the element under test (such as IC) and the element under test is electrically connected to the loadboard. The antenna is also disposed in a position over the loadboard and closed to the socket. The purpose to dispose the antenna is to receive the wireless signal and monitor the testing environment if there is too much noise around the testing environment to jam the IC testing. | 07-23-2009 |
| 20090189615 | Method and Apparatus For Testing AFCI Device for Series ARC Detection - A method and apparatus for testing an AFCI device. In one embodiment, the method comprises the steps of providing an AFCI device to be tested and a load, wherein the AFCI device and the load form an electrical circuit, applying AC power to the AFCI device, generating a high frequency broadband noise signal, amplifying the high frequency broadband noise signal to provide an amplified high-frequency noise signal, modulating the amplified high frequency noise signal with a signal synchronized to the load current or load voltage to provide synchronized high frequency broadband noise bursts, coupling the synchronized high frequency broadband noise bursts into the electrical circuit to simulate series arcing signals, determining if the AFCI device opens the electrical circuit within a predetermined amount of time, indicating the AFCI device has passed the test if the AFCI opens the electrical circuit within the predetermined amount of time, and indicating the AFCI device has failed the test if the AFCI device fails to open the electrical circuit within the predetermined amount of time. | 07-30-2009 |
| 20090195256 | Input Channel Diagnostics - This invention relates to input channel diagnostics for an industrial process control system. The invention provides improved apparatus and methods relating to fault containment, overload protection and input channel diagnostics. | 08-06-2009 |
| 20090206842 | METHOD AND APPARATUS FOR DETERMINING WHETHER A COOLING DEVICE IN A COMPUTER SYSTEM IS RESPONSIVE TO CONTROL SIGNALS - Some embodiments of the present invention provide a system that determines whether a cooling device in a computer system is responsive to control signals. During operation of the computer system, a control signal is sent to the cooling device. Next, a response of the computer system to the control signal is measured, wherein the response includes a temperature profile. The frequency content of the control signal is then compared to the frequency content of the temperature profile to determine whether the cooling device is responsive to the control signal. | 08-20-2009 |
| 20090243625 | TEST STRUCTURE TO MONITOR THE RELEASE STEP IN A MICROMACHINING PROCESS - Electrical and visual test structures monitor the degree of removal of conductive sacrificial layers used in micromachining processes that fabricate micro-electromechanical systems (MEMS). | 10-01-2009 |
| 20090243626 | AMPLIFICATION APPARATUS AND AMPLIFIER FAILURE DETECTING METHOD - An amplification apparatus including a plurality of amplifiers includes a carrier amplifier, a peak amplifier including a gate bias circuit including a resistor for supplying a gate bias voltage, a comparator for outputting a resultant signal determined by comparison of a predetermined threshold voltage with a voltage across the resistor included within the gate bias circuit, and a failure detecting circuit for detecting whether a failure in the plurality of amplifiers is caused or not based on the resultant signal. | 10-01-2009 |
| 20090243627 | SEMICONDUCTOR DEVICE AND OPERATION MONITORING METHOD FOR SEMICONDUCTOR DEVICE - A semiconductor device includes a monitor including a first element coupled between a first power supply line and a second power supply line, and a load for increasing a load value between the first element and the first power supply line or the second power supply line, and a determination unit which determines an operating state of the first element based on an output of the monitor. | 10-01-2009 |
| 20090251153 | MIMO TESTER - A multiple input multiple output (MIMO) tester tests various communication parameters of a MIMO device. The MIMO tester includes a first attenuation circuit, a switch circuit, a controlling circuit, and a divider circuit. The first attenuation circuit adjusts an equivalent resistance of the MIMO tester, wherein the first attenuation circuit is electronically connected to the MIMO device. The switch circuit comprises a plurality of switch elements, wherein each switch element comprises an input end, a first output end and a second output end, wherein the switch circuit is electronically connected to the first attenuation circuit. The controlling circuit controls operation of the switch circuit, wherein the controlling circuit is electronically connected to the switch circuit. The divider circuit electronically connected to the switch circuit receives electronic signals from the MIMO device, divides each electronic signal into a plurality of sub-signals, and sends the sub-signals to at least one test device. | 10-08-2009 |
| 20090261841 | TEST APPARATUS AND PERFORMANCE BOARD - Provided is a test apparatus for testing a device under test, including: a plurality of signal supply sections that output test signals at different timing from each other; and a connection section that connects lines of wiring transmitting the test signals respectively outputted from the signal supply sections with each other, connects the lines of wiring to an input terminal of the device under test, and inputs the test signals to the input terminal after superposing the test signals. The connection section may include a performance board to which the device under test is mounted, where the lines of wiring are connected with each other on the performance board. | 10-22-2009 |
| 20090267612 | ANTENNA CABLE BREAK DETECTOR FOR CONSTRUCTION MACHINE WIRELESS COMMUNICATION APPARATUS AND CONSTRUCTION MACHINE WIRELESS COMMUNICATION APPARATUS - An antenna cable break detector used with a construction machine wireless communication apparatus to detect a break in an antenna cable. The antenna cable | 10-29-2009 |
| 20090273351 | Electronic element testing and supporting apparatus - An electronic element testing and supporting apparatus includes a circuit board, an outer frame, an inner frame, a plate and two locking devices. The outer frame is assembled on a second surface of the circuit board and has a plurality of outer frame. Two opposing outer frame rims are provided respectively with a slot having an accommodating opening and an accommodating hole. The inner frame is lodged in the outer frame. The plate is inserted into the slots via the accommodating openings of the two opposing outer frame rims. The locking device includes an elastic element disposed in the accommodating hole of the outer frame rim and a stopper. The elastic element abuts against the stopper, so that the stopper can be movably extended into the corresponding slot to stop the plate. Via this arrangement, the present invention avoids using screws to lock the plate and the inner frame. | 11-05-2009 |
| 20090278549 | DELAY CIRCUIT AND RELATED METHOD - A delay circuit includes a first delay module, a delay measurement unit and a fault judge unit. The first delay module has a first delay circuit with at least one delay stage. The delay measurement unit is used for measuring a first delay amount and a second delay amount of the first delay chain respectively corresponding to a first number and a second number of delay stages. The fault judge unit is used for determining if the first delay chain has delay faults or not according to the first and second delay amounts. | 11-12-2009 |
| 20090278550 | Method for the Adjustment of a Device Under Test - A method for the adjustment an output signal that is produced by a device under test and that is dependent on an input variable comprises the following steps: a) positioning the device under test at a first test device, in which a physical disturbance variable has a predetermined disturbance variable value and the input variable has a known input variable value, b) acquiring at least one measured value for the output signal, c) changing the adjustment state, d) acquiring at least one further measured value for the output signal, e) positioning the device under test at a further test device, at which the disturbance variable has a predetermined further disturbance variable value and the input variable has the input variable value, f) acquiring a further measured value for the output signal, g) changing the adjustment state, h) acquiring a further measured value for the output signal, i) for each adjustment state, comparing the measured values acquired at the test devices for this adjustment state and determining a first adjustment state in which the correlation between the measured values is larger than in a second adjustment state, k) adjusting the first adjustment state. | 11-12-2009 |
| 20090284266 | Test method and device for land grid array components - A test method for Land Grid Array components includes the steps of: providing a test board with a plurality of test points; providing a secondary test board which has a plurality of conductors extending therethrough from a top surface to a bottom surface and forms a drop thereon, placing the secondary test board on the test board and contacting the conductors with the test points correspondingly; disposing a conducting spacer on the secondary test board, which is contacted with the conductors of the secondary test board correspondingly; and placing a test object on the conducting spacer, which has a plurality of conducting terminals contacted with the conducting spacer, and pressing the test object downwards so that the conducting terminals, the conducting spacer, the conductors and the test points are electrically connected for testing the test object. A test device for Land Grid Array components also is provided. | 11-19-2009 |
| 20090284267 | INTEGRATED CIRCUIT HAVING ELECTRICALLY ISOLATABLE TEST CIRCUITRY - Special test circuitry in an IC for wafer level testing selectively connects the specialized test circuitry to the functional circuitry during wafer test. Following wafer test the special test circuitry is electrically isolated from the functional circuitry and power supplies such that it does not load functional circuit signals nor consume power. | 11-19-2009 |
| 20090295402 | VOLTAGE ISLAND PERFORMANCE/LEAKAGE SCREEN MONITOR FOR IP CHARACTERIZATION - A method is provided for characterizing performance of a chip having at least one voltage island and at least one performance screen ring oscillator (PSRO). An on-chip performance monitor (OCPM) is incorporated on the voltage island. Performance measurements of the voltage island are generated with only the voltage island under power. Performance measurements of the performance screen ring oscillator (PSRO) are generated with only the voltage island under power. Performance measurements of the performance screen ring oscillator (PSRO) is compared to the performance measurements of the on-chip performance monitor (OCPM) to determine a systematic offset due to the voltage island. Performance models are adjusted using the systematic offset due to the voltage island. | 12-03-2009 |
| 20090295403 | INTER-DEVICE CONNECTION TEST CIRCUIT GENERATING METHOD, GENERATION APPARATUS, AND ITS STORAGE MEDIUM - A test circuit can use a simple test pattern data without customization for each substrate and considerably reduce a test preparation process. A connection test circuit is generated by receiving the input of the data of the connection relation indicating the devices mutually line-connected among a plurality of devices, the number of connection lines corresponding to the respective connection relations, and the device outputting a test result, sequentially searching for a connection destination device from the output terminal of an output device, and embedding a test circuit module in a test route. | 12-03-2009 |
| 20090302859 | METHOD FOR TESTING A PASSIVE INFRARED SENSOR - The method for testing a passive infrared sensor, the sensor comprising a housing in which an infrared sensor element with two terminal pins and a circuitry connected to the terminal pins of the infrared sensor element are arranged, the method comprises the steps of repeatedly generating and applying individual known electric charges to one of the terminal pins ( | 12-10-2009 |
| 20090302860 | OPERATING CHARACTERISTIC MEASUREMENT DEVICE AND METHODS THEREOF - A device includes an integrated circuit device having a sensor to measure an operating characteristic of the device. The sensor provides information based on the measured operating characteristic to a trigger module. In response to the information indicating the measured operating characteristic meets a threshold associated with a device failure, the trigger module provides an indication to a storage element, which stores information indicating the threshold has been met. In the event of a failure of the integrated circuit device, the storage element can be accessed by a device analyzer to retrieve the stored information to determine the cause of the device failure. | 12-10-2009 |
| 20090302861 | CIRCUIT TEST APPARATUS - A circuit testing apparatus for testing a device under test is disclosed. The device under test includes a first terminal end and second terminal end for generating a first output signal and a second output signal, respectively. The circuit testing apparatus determines whether the device under test has passed the test according to the first and second output signals. | 12-10-2009 |
| 20090309609 | TESTABLE INTEGRATED CIRCUIT, SYSTEM IN PACKAGE AND TEST INSTRUCTION SET - An integrated circuit die comprises a plurality of interconnects including a first test data input ( | 12-17-2009 |
| 20090309610 | ELECTRICAL SAFETY DEVICES - A device for detecting the presence or absence of a potential difference across two conductive elements, including means to provide an indication of a potential difference between said two conductive elements, the means having a test connection between the two elements comprising two spaced conductive lines in parallel, each line having self testing means including detecting means connected across said two lines and means to apply a test voltage through said two lines to test the integrity of the lines and their connection to the conductive elements with indicator means to provide an alarm signal should the detector indicate an abnormal response in said test voltage indicative of a fault in the line connections and/or one or other of the lines. | 12-17-2009 |
| 20090309611 | CABLE DETECTOR - A cable detector includes one or more peak detectors that detect when a termination impedance is missing from the output of a line driver. A peak detection signal is asserted when signals on a transmission line exceed a threshold level. A fault condition is asserted when the peak detection signal is asserted for a sufficient length of time to indicate that an actual fault is detected. The time period required for detecting a lost or missing line termination is longer than the time periods for any one of the pathological conditions to avoid a false positive detection. After the peak detection signal is de-asserted, the fault condition will be maintained until another sufficient length of time has expired without a peak detection. | 12-17-2009 |
| 20090322344 | METHOD AND APPARATUS FOR TESTING ELECTRONIC DEVICE - An electronic device test method incorporating a stress application step that is effective in screening out infant mortality failures of an electronic device. More specifically, a method for testing an electronic device constructed from a single or a plurality of semiconductor components, includes: turning a power supply on and off repeatedly while changing the ON/OFF cycle and/or voltage value of the power supply that is connected to the electronic device; and verifying whether or not the electronic device operates normally after the power supply has been turned on and off repeatedly. | 12-31-2009 |
| 20100007353 | GROUP OF CIRCUITS AND TESTING METHOD THEREOF AND TESTING MACHINE THEREOF - A Group of circuits and a testing method thereof and a testing machine thereof are provided. In the testing method, a first voltage of a first circuit is adjusted to be a second voltage according to a first adjusting signal, wherein the second voltage is closer to a standard voltage compared to the first voltage. Further, a third voltage of a second circuit is adjusted to be a forth voltage according to a second adjusting signal, and the forth voltage is closer to the standard voltage compared to the third voltage. In addition, a margin range of the second voltage and a margin range of the forth voltage are adjusted together according to a margin adjusting signal. Thereby, time required for testing the first circuit and the second circuit can be decreased, so as to lower the cost. | 01-14-2010 |
| 20100019774 | ISOLATION CELL WITH TEST MODE - An isolation cell having a test mode, connected between a first block and a second block, wherein the first block can operate in either a power-up mode or a power-down mode, comprises: an input terminal for receiving an input signal that is derived from the first block; an output terminal for outputting an output signal to the second block; a normal-sleep terminal for determining the isolation cell is operated in the power-up mode or in the power-down mode, and the logic level of the normal-sleep terminal is determined by the operation mode of the first block; and, a DFT-sleep terminal is for overwriting the logic level of the normal-sleep terminal when the isolation cell is in the test mode. | 01-28-2010 |
| 20100019775 | SHORT-CIRCUIT DETECTING CIRCUIT - A short-circuit detecting circuit which can accurately detect an output short-circuit of a class-D amplifier by a simple circuit construction. Two comparison pulse signals are formed on the basis of predetermined generating threshold values and a signal level of each of two output stage input pulse signals which are formed on the basis of an input pulse signal to the class-D amplifier and are supplied to an output stage of the class-D amplifier. A signal level of an output pulse from the class-D amplifier in a period of time corresponding to a pulse width of each of the comparison pulse signals is compared with a predetermined detection threshold values. A short-circuit detection signal is outputted in accordance with obtained level comparison results. | 01-28-2010 |
| 20100026311 | BOOSTING SYSTEM FAILURE DIAGNOSIS DEVICE, BOOSTING CIRCUIT CONTROLLER AND VEHICLE - A boosting converter and a boosting control unit are mounted on a vehicle. A failure diagnosis unit makes a failure diagnosis of an atmospheric pressure sensor based on a detection result of the atmospheric pressure sensor and on a detection result of an intake pressure sensor detecting engine intake pressure that changes in accordance with a change in the atmospheric pressure. Boosting control unit controls an output voltage of the boosting converter based on the detection result of atmospheric pressure sensor and the detection result of intake pressure sensor. | 02-04-2010 |
| 20100033189 | SEMICONDUCTOR INTEGRATED CIRCUIT AND TEST METHOD USING THE SAME - A semiconductor integrated circuit includes a pulse control register configured to hold an assigned code with a smaller number of bits than that of a pulse control pattern used to control an oscillation output of an oscillator, a code conversion unit configured to convert the assigned code held by the pulse control register into the pulse control pattern, and a pulse control unit configured to generate the test pulses by controlling pulses of the oscillation output of the oscillator based on the pulse control pattern resulting from the conversion by the code conversion unit. | 02-11-2010 |
| 20100033190 | ELECTRICAL TEST DEVICE - An electrical test device including at least one transducer to detect a status of a circuit under test, and at least one indicator located remotely from the at least one transducer to display the status of the circuit under test. | 02-11-2010 |
| 20100039117 | TEMPERATURE CONTROL SYSTEM FOR A DEVICE UNDER TEST - A temperature control system for an optical microscope for inspecting an integrated circuit device under test (DUT) that includes a first fluid circulation system coupled to and supplying fluid to fluid injectors that spray fluid on the DUT and a second fluid circulation system for exchanging energy between fluids in the first fluid circulation system and the second fluid circulation system (e.g., via a heat exchanger). The fluid injectors may be configured to mix the fluid and pressurized air that can be sprayed on the DUT to cool and/or heat the DUT. | 02-18-2010 |
| 20100052694 | Test Circuit - A test circuit according to the present invention includes: a synthesis circuit that synthesizes a first test result signal output from a first test target circuit in response to a test instruction, and a second test result signal output from a second test target circuit in response to the test instruction; an inter-block delay generation circuit that delays the second test result signal with respect to the first test result signal; and a test result holding circuit that holds a synthesized test result signal every predetermined timing, the synthesized test result signal being output from the synthesis circuit | 03-04-2010 |
| 20100052695 | SWITCHING DEVICE - The invention relates to a switching device for the alternate connection of at least one first test port or of a second test port to a measuring-device connection, where the measuring-device connection provides at least one test-signal input. The test-signal input is connected to a first signal path and to a second signal path, where the first signal path is connected alternately to the first or to the second test port, and the second signal path is connected at least to the respectively other test port. | 03-04-2010 |
| 20100052696 | Chip Testing Apparatus and Testing Method Thereof - A chip testing apparatus and a chip testing method are provided. The chip testing apparatus includes a command generating module, a transceiving module and a control module. When the command generating module generates a first test command, the transceiving module transmits the first test command to a radio frequency identification (RFID) chip and receives a target test result from the RFID chip. The control module determines whether the target test result complies with a reference test result. When the determination result of the control module is no, the control module controls the command generating module to generate a second test command for retesting the RFID chip. | 03-04-2010 |
| 20100052697 | REPAIRING DEFECTS - Methods and systems for defect repair are disclosed. The methods include: (a) identifying a defect causing an absence of an electrical connection between a first circuit element and a second circuit element, the first and second circuit elements being positioned in or on a substrate and the defect being positioned in the substrate; (b) removing a portion of the substrate to expose the defect, and depositing a conductive material to electrically connect the first and second circuit elements; and (c) verifying that the defect caused the absence of an electrical connection between the first and second circuit elements. | 03-04-2010 |
| 20100060291 | Method and Device for Monitoring and Electrical Heating Apparatus - The invention relates to a method for monitoring an electrical heating apparatus and to a corresponding apparatus. The electrical heating apparatus has at least one heating element. A measured value, which is dependent on the resistance and/or the inductance of the electrical heating element, is measured, the measurement being carried out by means of the measured value being sampled. Owing to the use of sampled values, the measurement process can be shortened. | 03-11-2010 |
| 20100060292 | TEST STRUCTURE FOR DETECTION OF DEFECT DEVICES WITH LOWERED RESISTANCE - The present invention relates to a test structure that comprises at least two devices under test DUT, which respectively have a first electrical device resistance in a non-defect state and a second electrical device resistance in defect state, the first being higher than the second electrical device resistance. In the test structure the DUTs are connected in parallel to a first test contact pad via a first conducting line and connected in parallel to a second test contact pad via a second conducting line, and respectively connected to the first conducting line via respective first test resistors, which have known respective electrical test resistances, such that a total electrical resistance between the first an second test contact pads is indicative of the number of DUTs, which have the second electrical device resistance. The test structure allows testing a larger number of DUTs in parallel in a single measurement. | 03-11-2010 |
| 20100060293 | DEVICE FOR DETECTING THE FAILURE OF AN ELECTRICAL POWER SUPPLY FOR A LOGIC UNIT - An electrical power supply device for a logic unit ( | 03-11-2010 |
| 20100073009 | Test circuit adapted in a display panel of an electronic device - A test circuit adapted in a display panel of an electronic device is provided. The test circuit is to test the pixel array function of the display panel, wherein the test circuit comprises: a plurality of test signal lines, a plurality of test signal transmitters, a plurality of gate lines and at least one static electricity protection device. The test signal lines receive a plurality of corresponding test signals respectively. The test signal transmitters comprises a plurality test signal transmitter groups comprising at least one transmitter, wherein each transmitter group corresponds to a test signal line and connects the test signal line and the pixel array. Each gate line connects to the gate of the at least one transmitter. The static electricity protection device is placed between two of the gate lines. | 03-25-2010 |
| 20100073010 | FLASHOVER ANALYSIS TOOL - According to the present invention, there is provided a method to minimize human intervention during decision making process while controlling the electrical power system by identifying the initiating element that cause a tripping of the transmission overhead lines and capable of identifying the potential future protection system failures that can initiate a cascading of tripping or total national blackout. A method of producing flashover analysis signal as a protection system analysis comprising processing a neutral current, three phase current profile, three phase voltage profile, and a plurality of digital signal of a transmission line using an artificial neural network to calculate pickup time, reset time, DEF confirmation time or total fault clearance time. A method of producing flashover analysis signal comprising as a flashover signature analysis to identify the cause of the flashover as a current transformer explosion, tree encroachment, crane, lightning strike or polluted insulator. | 03-25-2010 |
| 20100073011 | LIGHT SOAKING SYSTEM AND TEST METHOD FOR SOLAR CELLS - A method and apparatus for exposing a solar device to simulated environmental conditions is described. In one embodiment, a chamber is described. The chamber includes a frame defining a partial enclosure having an interior volume, the frame comprising a door selectively sealing an opening in the frame, a plurality of lighting devices coupled to the enclosure interior of an open wall, each of the plurality of lighting devices being positioned to direct light toward an upper surface of a platen disposed in the interior area, and a plurality of fan units positioned in an opening formed in a sidewall of the frame, each of the plurality of fan units positioned to direct ambient air flow from the outside of the enclosure toward the platen and between the plurality of lighting devices to exit through the open wall. | 03-25-2010 |
| 20100079149 | CIRCUIT TESTING APPARATUS AND SYSTEM - A circuit testing apparatus testing interconnectivity between two integrated circuits including: a data writing unit writing test pattern data for causing the outputting one of the two integrated circuits to perform a predetermined operation into a data buffer of the inputting integrated circuit; and a test control signal generating unit generating a test control signal for causing the inputting integrated circuit to read the test pattern data from the data buffer and provide the test pattern data to the outputting integrated circuit. | 04-01-2010 |
| 20100085063 | METHOD OF DIAGNOSING DEFECTIVE ELEMENTS IN A STANDALONE SYSTEM, POWERED BY AN INTERMITTENT POWER SOURCE - The diagnostic method applies to a standalone system including a generator, a power regulator and a power storage element. The method includes comparison of the effective charging power or current of the power storage element respectively with a predefined power or current threshold. If the effective charging power or current is lower than said threshold, the power storage element is disconnected. An abnormal behavior is then detected either by comparing the effective charging power with the smaller of the values representative of the theoretical charging power of the power storage element and of the maximum power able to be delivered by the generator and comparing the effective and theoretical charging voltages, or by comparing the effective and theoretical charging currents. | 04-08-2010 |
| 20100085064 | UNIVERSAL POWER AND TESTING PLATFORM - The present invention is directed to a Universal Power Platform (UPP) that powers the pump or pumps that may not be on the platform but that are in a skid subsea near the pipeline for a desired pre-commissioning method to be carried out, such as cleaning, filling, chemical treating, pigging, hydrostatic testing or dewatering the pipeline. The UPP is suspended from a vessel by an umbilical that provides the electric power for running the selected pump(s). The Power Platform also is used as a testing system for control umbilicals that usually are near the pipelines. | 04-08-2010 |
| 20100090704 | TEST FIXTURE - A test fixture is mounted to a supporting base and adapted for holding an electronic device, such as a laptop computer, a mobile phone and so on, on the purpose of testing an antenna characteristic of the electronic device. The test fixture includes a first fixing component and a second fixing component. The first fixing component is adapted for being mounted to the supporting base and has a first basic plate adapted for carrying the laptop computer. The second fixing component is removably mounted to the first fixing component, and has a plurality of supporting rods suspending above the first basic plate adapted for clamping the mobile phone therebetween. | 04-15-2010 |
| 20100090705 | LSI TEST APPARATUS, LSI TEST METHOD, AND COMPUTER PRODUCT - An LSI test apparatus includes a test circuit synthesizing unit that synthesizes a test circuit and inserts the test circuit in a pre-test-synthesis net list; a test pattern generating unit that, based on a post-test-synthesis net list acquired by the test circuit synthesizing unit, generates a test pattern that simultaneously activates selected gated clock buffers; a simulating unit that, using the test pattern generated by the test pattern generating unit, simulates operation of a circuit created from the post-test-synthesis net list; and a power source analyzing unit that analyzes voltage drop in terms of amount, based on operation rate information acquired by the simulating unit. | 04-15-2010 |
| 20100090706 | DEVICE AND METHOD FOR TESTING A CIRCUIT - A device having testing capabilities, the device includes: a tested circuit that includes multiple scan chains; a compactor adapted to compress scan chain test responses; a mask unit, connected between the multiple scan chains and the compactor, wherein the mask unit is adapted to mask scan chain test responses outputted by the multiple scan chains during a masking period; and an mask prevention unit, adapted to prevent masking of scan chain test responses during a mask prevention period that at least partially overlaps a mask unit configuration period. | 04-15-2010 |
| 20100090707 | TEST MODULE FOR RADIO FREQUENCY IDENTIFICATION CHIPS AND METHOD OF THE SAME - A test module and method for radio frequency identification (RFID) chips are provided. The test module includes a test head having a chip carrier for carrying a RFID chip to be tested, the chip carrier having a first antenna electronically connecting the RFID chip. The module further includes a second antenna for communicating with the first antenna; and a base supporting the chip carrier and the second antenna. The test module further includes a test computer electronically connecting the second antenna, wherein the test computer evaluates functions of the RFID chip by way of the communications between the first antenna and the second antenna. | 04-15-2010 |
| 20100097071 | Integrated Circuit Having Receiver Jitter Tolerance ("JTOL") Measurement - An integrated circuit capable of on-chip jitter tolerance measurement includes a jitter generator circuit to produce a controlled amount of jitter that is injected into at least one clock signal, and a receive circuit to sample an input signal according to the at least one clock signal. The sampled data values output from the receiver are used to evaluate the integrated circuit's jitter tolerance. | 04-22-2010 |
| 20100097072 | SYSTEM AND METHOD FOR CHECKING ANALOG CIRCUIT WITH DIGITAL CHECKER - Aspects of the present invention provide a system and method for checking a portion of an analog circuit using a digital checker. The method includes establishing a target in the analog circuit, creating an analog target dummy for the target, creating a digital target dummy, binding the digital target dummy to the analog target dummy, and checking a value of the digital target dummy with a digital checker. | 04-22-2010 |
| 20100097073 | Methods And Apparatus For Testing Electronic Circuits - Methods and apparatus are provided for testing to determine the existence of defects and faults in circuits, devices, and systems such as digital integrated circuits, SRAM memory, mixed signal circuits, and the like. In particular, methods and apparatus are provided for detecting faults in circuits, devices, and systems using input control signals to generate controlled-duration, controlled pulse-width, transient power supply currents in a device under test, where said transient power supply currents are of controllable bandwidth and can be used as observables to determine faulty or defective operation. Additionally, methods and apparatus are provided to permit high bandwidth sensing of transient supply currents as need to preserve the narrow widths of these current pulses. These methods may include autozero techniques to remove supply current leakage current and DC offsets associated with practical current sensing currents. The sensed transient supply currents can be compared to single or multiple thresholds to assess normal or faulty or defective operation of the device under test. | 04-22-2010 |
| 20100102825 | Spectral and information theoretic method of test point, partial-scan, and full-scan flip-flop insertion to improve integrated circuit testability - Design for testability (DFT) algorithms, which use both gradient descent and linear programming (LP) algorithms to insert test points (TPs) and/or scanned flip-flops (SFFs) into large circuits to make them testable are described. Scanning of either all flip-flops or a subset of flip-flops is supported. The algorithms measure testability using probabilities computed from logic simulation, Shannon's entropy measure (from information theory), and spectral analysis of the circuit in the frequency domain. The DFT hardware inserter methods uses toggling rates of the flip-flops (analyzed using digital signal processing (DSP) methods) and Shannon entropy measures of flip-flops to select flip-flops for scan. The optimal insertion of the DFT hardware reduces the amount of DFT hardware, since the gradient descent and linear program optimizations trade off inserting a TP versus inserting an SFF. The linear programs find the optimal solution to the optimization, and the entropy measures are used to maximize information flow through the circuit-under-test (CUT). The methods limit the amount of additional circuit hardware for test points and scan flip-flops. | 04-29-2010 |
| 20100109674 | DEVICE, TEST APPARATUS AND TEST METHOD - Provided is a test apparatus that tests a device under test. The device under test includes: a circuit under test; and a switching section that that connects an internal terminal being tested, from among one or more internal terminals of the circuit under test, to external terminals connected to the test apparatus. The test apparatus includes: a measuring section that controls a relay section, which provides a connection or a disconnect between two of the external terminals such that a transmission characteristic of the relay section in a connected state serves as a basis for calculating the transmission characteristic between each external terminal and each internal terminal of the circuit under test, to be in a connected state and measures the transmission characteristic of the relay section via the two external terminals; and a compensating section that compensates a signal to be supplied to the circuit under test via an external terminal and the switching section and/or a signal acquired from the circuit under test via the switching section and an external terminal, based on the measured transmission characteristic of the relay section. | 05-06-2010 |
| 20100109675 | METHOD TO DIGITIZE ANALOG SIGNALS IN A SYSTEM UTILIZING DYNAMIC ANALOG TEST MULTIPLEXER FOR DIAGNOSTICS - An integrated circuit capable of monitoring analog voltages inside an analog block is presented. The integrated circuit has an analog test multiplexer (mux) whose inputs are connected to analog voltages of interest inside an analog block. The analog test multiplexer directs a selected analog voltage from an analog block to the output of the analog test mux. The integrated circuit further includes an analog monitor state machine which provides the selection bits to the analog test multiplexer, enabling random access to the analog voltages inside the analog block. The integrated circuit also includes an analog to digital converter for converting the selected analog voltage from the analog test multiplexer into a digital representation. | 05-06-2010 |
| 20100109676 | ANALOG CIRCUIT TESTING AND TEST PATTERN GENERATION - Test vectors for structural testing of an analog circuit are selected by first selecting an initial set of test input vectors for the analog circuit. A set of faults is selected, comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node. A measure of overlap is computed between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit. Test input vectors are selected from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer. | 05-06-2010 |
| 20100117658 | TESTABLE INTEGRATED CIRCUIT AND TEST DATA GENERATION METHOD - An integrated circuit (IC) is disclosed that comprises a circuit portion ( | 05-13-2010 |
| 20100127712 | ELECTRONIC COMPONENT TESTER - The electronic component tester includes: a socket configured to supply power to connection terminals for operating an electronic component; an electronic component mount member on which the electronic component is to be mounted; and a temperature adjusting member which is configured to come into contact with the electronic component mount member to keep the electronic component at a predetermined temperature. The electronic component mount member includes a heat transfer plate on which the electronic component is to be mounted and which is configured to come into contact with the temperature adjusting member, and an electronic component cover for covering the electronic component. The heat transfer plate includes through holes. | 05-27-2010 |
| 20100127713 | Testing apparatus for testing electronic system with 5-wire resistive touch panel and the method therefor - The invention relates to a testing apparatus for testing a 5-wire resistive touch panel of an electronic system. The testing apparatus comprises a voltage control unit, a signal control unit, an electronic unit and a determining unit. The electronic unit is used for generating at least one output signal corresponding to a first voltage level and a second voltage level generated by the voltage control unit and a detecting signal generated by the signal control unit. The determining unit coupled to the electronic unit is used for determining the status of the electronic unit according to the at least one output signal. | 05-27-2010 |
| 20100134118 | TESTING APPARATUS FOR HARD DISK DRIVE - A testing apparatus includes a relay and a connector. The relay includes a coil, first and second single-pole double-throw (SPDT) switches. The first and the second SPDT switches include first and second contacts. The connector includes first and second hard disk drive (HDD) indicator pins, and first and second switch pins. The first contact of the first SPDT switch is grounded. The first contact of the second SPDT switch is connected to the power source. The first HDD indicator pin is connected to a power source. The second HDD indicator pin is connected to the second contact of the first SPDT switch and the second contact of the second SPDT switch. The first switch pin is connected to the power source. The second switch pin is grounded via the coil. | 06-03-2010 |
| 20100134119 | MICROCIRCUIT TESTING INTERFACE HAVING KELVIN AND SIGNAL CONTACTS WITHIN A SINGLE SLOT - In a first slot of a plurality of adjacent slots in alignment with traces on a load board of a tester, first and second conductor layers, each to make electrical contact with both a load board trace and a DUT lead. Each of the first and second contacts receives force from a resilient element extending across the slots and that urges a contact point on the contact against at least one trace and a DUT lead. Insulation between said first and second contacts in the first slot electrically insulates the first and second contacts from each other within the first slot. | 06-03-2010 |
| 20100134120 | PROCEDURE FOR CHECKING THE FUNCTIONALITY OF AN ELECTRIC HEATING DEVICE - A procedure for checking the functionality of an electric heating device ( | 06-03-2010 |
| 20100141265 | INTEGRATED CIRCUIT INSPECTION SYSTEM - Methods and systems that include a nanotube used as an emitter in the testing and fabrication of integrated circuits. The nanotube emits a signal to a substrate. Based on the signal or the electrical properties, e.g., current induced in the substrate by the signal, the region of the substrate is characterized. The characterization includes topology of the region of the substrate such as determining whether a recess in the substrate has a proper depth or other dimensions or characteristics of the substrate. | 06-10-2010 |
| 20100148792 | HEAT SINK STRUCTURE AND TEST HEAD WITH SAME - To provide a heat sink structure able to improve the heat radiation efficiency without thickening of the heat sink. | 06-17-2010 |
| 20100148793 | ELECTRONIC DEVICE TEST APPARATUS FOR SUCCESSIVELY TESTING ELECTRONIC DEVICES - An electronic device test apparatus includes a plurality of testers on which are mounted test heads that are connected to test outputters for outputting test signals to the electronic devices and for receiving response signals from the electronic devices. A loading transporter is provided at a frontmost stage of the testers that transports the electronic devices from a previous process conveyance medium to a test tray before loading the electronic devices into the testers. An unloading transporter is provided at a rearmost stage of the testers that unloads the electronic devices from the test tray to a later process conveyance medium corresponding to the response signals. A transporter is provided between the testers that transports the test tray from a previous process tester to a later process tester. The transporter includes a buffer that holds test trays to absorb a waiting time due to differences in processing capacities between test trays. | 06-17-2010 |
| 20100148794 | INDICATOR ARRANGEMENT - An indicator arrangement according to the invention also comprises a resistor ( | 06-17-2010 |
| 20100148795 | METHODS AND APPARATUS FOR SELECTING SETTINGS FOR CIRCUITS - Methods and apparatus selecting settings for circuits according to various aspects of the present invention may operate in conjunction with a measurement element connected to the circuit. The circuit may include a voltage source adapted to supply a voltage to the measurement element. The voltage may be substantially independent of the characteristics of the measurement element. The circuit may further include a measurement sensor responsive to a current in the measurement element. The measurement sensor may generate a control signal according to the current in the measurement element. | 06-17-2010 |
| 20100156432 | Method for Checking an Inductive Load - A full-bridge circuit comprises a first, second, third and fourth switch element (T | 06-24-2010 |
| 20100156433 | ELECTRONIC DEVICE AND METHOD FOR WIRE CHECK - An electronic device is provided, which includes a current supplying stage which is adapted to supply a first compensation current and a second compensation current to a first wire or a second wire, wherein the first compensation current is determined during a first clock period, when the first wire and the second wire are connected. The second compensation current is determined during a second clock period while the first wire and the second wire are not connected and the magnitude of the second current represents a ratio of a resistance value of the first wire and a resistance value of the second wire. | 06-24-2010 |
| 20100156434 | Testing Apparatus - There is provided a testing apparatus including a plurality of test units, a storage that is shared by the plurality of test units, where the storage stores therein wafers under test to be tested by the plurality of test units, a transport mechanism that transports the wafers under test between the storage and each of the plurality of test units, a mainframe that specifies a test procedure for each of the plurality of test units, a power source that is shared by the plurality of test units, where the power source supplies power to each of the plurality of test units, and a pressure source that is shared by the plurality of test units, where the pressure source supplies a pressure to each of the plurality of test units. Here, each of the plurality of test units includes a test module that transmits and receives a test signal to/from a plurality of circuits formed on a wafer under test, a connector that connects together transmission paths of the test signal between the test module and the wafer under test, a holding member that brings the wafer under test into contact with the connector when supplied with the pressure, and a housing that houses therein the holding member and the connector, where the wafer under test is to be tested within the housing. | 06-24-2010 |
| 20100164506 | Method for testing an electronics unit - A method for testing an electronics unit, especially an electronics unit of an apparatus for ascertaining and/or monitoring a process variable, wherein the electronics unit has a plurality of electrical components. At least a part of the electrical components is grouped into at least one group, and this group is supplied with a query signal. A response signal is received from the group, and the response signal is evaluated. Furthermore, the invention relates to an apparatus for determining and/or monitoring a process variable. | 07-01-2010 |
| 20100164507 | DIGITAL FAULT DETECTION CIRCUIT AND METHOD - Some embodiments show a digital fault detection circuit with an input circuit comprising an input and at least one output, wherein a first signal state at the input causes a predetermined signal state at the output and a second signal state at the input leaves the output floating. Moreover the digital fault detection circuit may comprise a signal line with a signal line input and a signal line output, wherein the signal line input is coupled to the output of the input circuit and furthermore a keeper circuit coupled to the signal line output and configured to keep the signal line at the predetermined signal state, after the signal state at the input has changed from the first signal state to the second signal state. The digital fault detection circuit may further comprise at least one fault detector cell, which is coupled to the signal line between the signal line input and the signal line output and which is configured to change the state of the signal line which is otherwise kept by the keeper circuit, in response to a fault. | 07-01-2010 |
| 20100164508 | SYSTEM AND METHOD FOR TEST STRUCTURE ON A WAFER - System and method for test structure on a wafer. According to an embodiment, the present invention provides a test structure for testing a chip. For example, the test structure and the chip are manufactured on a same substrate material and the testing being conducted is in a temperature-controlled environment. The test structure includes a top structure positioned above the chip. For example, the top structure can be characterized by a first surface area. The top structure includes a first metal material occupying less than 60% of the surface area. The test structure also includes a bottom structure positioned below the chip. For example, the bottom structure can be characterized by a second surface area. The second surface area is substantially equal to the first surface area. The bottom structure includes a first silicon material. The first silicon material occupies substantially all of the second surface area. | 07-01-2010 |
| 20100171507 | METHOD OF TESTING DISPLAY PANEL - A method of testing the display panel is provided. a display panel is provided, wherein the display panel has shorting bars and testing pads in a first peripheral area, and IC pads in a second peripheral area. A first stage test is performed to input a common voltage signal and a plurality of first stage test signals to the testing pads. A switching step is implemented to stop inputting the first stage test signals. A second stage test is carried out to input at least a second stage test signal to the IC pads. | 07-08-2010 |
| 20100171508 | In-Circuit Test Assembly - A test assembly that may provide access to signals of a circuit that includes an integrated circuit. The test assembly may include structural members that limit movement of components relative to each other. | 07-08-2010 |
| 20100171509 | CHIP TESTING CIRCUIT - The invention discloses a chip testing circuit that increases the testing throughput. The chip testing circuit uses a multiplexer to switch the connection of the data compressing circuit between data compressing base units which compress 4 XIOs, so as to obtain a multiplexer of testing data by one single interface circuit and to increase the testing throughput. | 07-08-2010 |
| 20100171510 | TESTING APPARATUS AND TESTING METHOD - A testing apparatus and a testing method are described and shown in the specification and drawing. The testing apparatus includes in-circuit testing equipment and a converter. The converter electrically connects an electric circuit and the in-circuit testing equipment. The in-circuit testing equipment includes an in-circuit testing module, a test instruction generation module and an feedback signal analysis module. The in-circuit testing module tests hardware of the electric circuit. The test instruction generation module sends a test instruction to the electric circuit through the converter when the electric circuit is supplied with power and after the hardware of the electric circuit passes the test by the in-circuit testing module, so that the electric circuit generates a feedback signal. The feedback signal analysis module receives the feedback signal through the converter and analyzes, according to the feedback signal, whether the electric circuit performs according to the electric circuit's intended function. | 07-08-2010 |
| 20100182012 | Wired Pipe Signal Transmission Testing Apparatus and Method - A wired pipe signal transmission testing apparatus is provided. The apparatus includes a core having a plurality of threads formed on a surface thereof and a plurality of slots cutting through crests and roots of at least a portion of the threads, thereby creating an escape route for debris that may enter in between the threads. The apparatus includes an inductive transducer coupled to the core. | 07-22-2010 |
| 20100188096 | TESTING OF AN INTEGRATED CIRCUIT WITH A PLURALITY OF CLOCK DOMAINS - An integrated circuit comprises a plurality of clock domains ( | 07-29-2010 |
| 20100188097 | FAULT TESTING FOR INTERCONNECTIONS - Embodiments of the invention are generally directed to fault testing for interconnections. An embodiment of a fault analysis apparatus includes a test pattern source to provide a test pattern for an interconnection between a transmitter and a receiver, the interconnection having a transmitter end and a receiver end, the interconnection including a first wire and a second wire, the transmitter transmitting the test pattern on the first wire to the receiver. The apparatus further includes a first switch to open and close a first connection for the first wire, and a second switch to open and close a second connection for the second wire. The first switch and the second switch are to be set according to a configuration to set at least a portion of a test path for the detection of one or more faults in the interconnection. | 07-29-2010 |
| 20100188098 | Procedure for checking the operational capability of an electric circuit - In a procedure for checking the operational capability of an electric circuit, which has a sensor module ( | 07-29-2010 |
| 20100194400 | Circuit Arrangement With A Test Circuit And A Reference Circuit And Corresponding Method - Implementations are presented herein that include a test circuit and a reference circuit. | 08-05-2010 |
| 20100194401 | SENSOR APPARATUS - A sensor apparatus of the present invention includes a first output terminal for outputting a sense signal, and a failure diagnosis circuit for determining whether a failure diagnosis object section is normal or abnormal, to output a failure detection signal from a second output terminal in the case of determining abnormality. The time required for an output concerning the failure detection signal from the failure diagnosis object section to reach the second output terminal is shorter than the time required for an output concerning the sense signal from the failure diagnosis object section to reach the first output terminal, thus leading to improvement in reliability under abnormal condition. | 08-05-2010 |
| 20100194402 | OPERATING CHARACTERISTIC MEASUREMENT DEVICE AND METHODS THEREOF - A device includes an integrated circuit device having a sensor to measure an operating characteristic of the device. The sensor provides information based on the measured operating characteristic to a trigger module. In response to the information indicating the measured operating characteristic meets a threshold associated with a device failure, the trigger module provides an indication to a storage element, which stores information indicating the threshold has been met. In the event of a failure of the integrated circuit device, the storage element can be accessed by a device analyzer to retrieve the stored information to determine the cause of the device failure. | 08-05-2010 |
| 20100201372 | Systems and Methods for Detecting Electrical Line Faults - Methods and systems for detecting changes in currents are disclosed, including: dividing a main current into two or more subcurrents, combining a first magnetic flux of a first subcurrent of the two or more of the subcurrents with another magnetic flux of another current to generate a combined magnetic flux, and sensing the combined magnetic flux to determine relative changes between the first subcurrent and the other current. | 08-12-2010 |
| 20100201373 | ANOMALY MONITORING DEVICE - In an anomaly monitoring device, in which an output signal from an encoder is input as an analog input signal via a wiring system, for detecting anomalies in the encoder or the wiring system, provided are a voltage level based device, a pulse number based device and a pulse width based device. The voltage level based device detects anomalies when the voltage level of the analog input signal exists within a prescribed range. The pulse number based device detects anomalies when the difference in the numbers of pulses of digital signals corresponding to the analog input signals is equal to or greater than a prescribed threshold value. The pulse width based device detects anomalies when the pulse width of the digital signals, measured from a combined signal of the digital signals or each of the digital signals, is different from the pulse width in a past control period. | 08-12-2010 |
| 20100207636 | POWER INTERRUPTION DETECTING SYSTEM, ELECTRONIC DEVICE AND POWER INTERRUPTION DETECTING DEVICE THEREOF - A power interruption detecting system includes an electronic device and a power interruption detecting device. The electronic device includes a power supply, a protection circuit, a main circuit and a recording structure. The power supply includes a first power supplying module and a second power supplying module. The protection circuit is connected in parallel to the first power supplying module. The main circuit is connected in parallel to the first power supplying module. The recording structure is connected to the main circuit and configured for collecting a number of values of working voltage of the main circuit. The power interruption detecting device is configured for determining a cause for a shutting down problem happened to the electronic device, according to the values of the working voltage. | 08-19-2010 |
| 20100207637 | Circuit assembly for error indicating - Circuit configuration for error reporting, having a signal transmitter ( | 08-19-2010 |
| 20100207638 | Testing System and Testing Method - The invention discloses a testing system and a testing method. The testing system includes a testing platform and a fetching device. The testing platform includes a metal base plate, a DUT board, a testing stand and a metal wall. The DUT board is disposed on the metal base plate. The testing stand is disposed on the DUT board. The metal wall is disposed on the metal base plate and surrounds the testing stand. The fetching device is movably disposed above the testing platform and used for placing a DUT on the testing stand. A metal covering plate of the fetching device corresponds to the metal wall of the testing platform. When the fetching device places the DUT on the testing stand, the metal covering plate cooperates with the metal wall and the metal base plate of the testing platform to form an isolated space, so as to isolate the DUT. | 08-19-2010 |
| 20100207639 | OPEN TERMINAL DETECTION DEVICE AND SEMICONDUCTOR DEVICE - An open terminal detection device that detects an open terminal, including: a transistor that is supplied with a base current from a current source in which an amount of current supply decreases corresponding to an increase in an external impedance of the terminal; a diode that limits discharge of a base charge of the transistor; and an output circuit that outputs an output signal in coordination with on/off switching of the transistor. | 08-19-2010 |
| 20100207640 | TEST APPARATUS, TEST METHOD AND MANUFACTURING METHOD - Provided is a test apparatus that tests a device under test, having two operational modes which are (i) an edge strobe mode in which the test apparatus judges acceptability of a value of an output signal from the device under test at sequentially designated reference timings, based on expected value information, and (ii) a multi-strobe mode in which the test apparatus judges the acceptability of values of the output signal at a plurality of strobes for each reference timing, based on expected value information, the plurality of strobes being generated based on the reference timing, and comprising a conversion control section that converts an expected value pattern supplied thereto into expected value information to be used in the edge strobe mode or into expected value information to be used in the multi-strobe mode, depending on which of the edge strobe mode and the multi-strobe mode is selected. | 08-19-2010 |
| 20100213950 | SYSTEM IN PACKAGE BATCH TEST METHOD AND BATCH TEST SYSTEM THEREOF - A system in package (SIP) batch test method and an SIP batch test system are applicable to an unpartitioned circuit module having a plurality of devices under test (DUTs). The circuit module is loaded in a loading module of the batch test system after probing test and molding operations. A test module of the batch test system is electrically coupled to at least two DUTs. At least two testers provide two different signal tests. A signal transmission controller controls signal transmission paths between the testers and the test module. A test controller controls the two testers and the test module to test the electrically coupled DUTs in parallel and record test results of the DUTs in configuration data. Finally, the circuit module is partitioned, so as to classify the DUTs according to the test results. | 08-26-2010 |
| 20100231227 | Reliability evaluation circuit and reliability evaluation system - A reliability evaluation system comprises a reliability evaluation circuit and a reliability evaluation control circuit. The reliability evaluation circuit includes a stress device array and a stress voltage generating block configured to receive a control voltage, generate stress voltages generated by using two reference voltages, and apply the stress voltages to the unit devices in a stress mode via first I/O lines according to the control voltage. The stress device array includes the unit devices that are matrix-arrayed. Each of the unit devices has a first terminal connected to one of the first I/O lines and a second terminal connected to one of second I/O lines. The reliability evaluation control circuit is configured to generate the control voltage and the two reference voltages, and test reliability of the unit devices by using the first I/O lines and the second I/O lines. | 09-16-2010 |
| 20100237876 | Method of Self Monitoring and Self Repair for a Semiconductor IC - A method for self repair of a semiconductor IC is presented. An IC state is set to test/repair mode upon powering up the IC. Fuse data is loaded from an e-fuse module. Defects or faults are detected by employing a built in self test (BIST) module. The IC self repairs using redundant circuitry by employing a built in self repair (BISR) module to repair each fault using redundant circuitry. The fault locations and repair locations are stored in the e-fuse module. The semiconductor IC state is changed to mission mode. | 09-23-2010 |
| 20100244852 | TEST APPARATUS, CALIBRATION METHOD, PROGRAM, AND RECORDING MEDIUM - Provided is a test apparatus, a calibration method, a program causing a computer to perform as a test apparatus, and a recording medium storing the program. The test apparatus includes a response characteristic detecting section that detects a difference between a response time of the comparator for a rising waveform and a response time of the comparator for a falling waveform, based on measurement results, obtained by the comparator, of the waveforms and corresponding reflected waveforms, The response characteristic detecting section calculates a difference between output characteristics of the rising waveform and the falling waveform output from the driver, based on the measurement results from the comparator of the waveforms and the corresponding reflected waveforms, and corrects a difference between the response times of the comparator based on the difference between the output characteristics. | 09-30-2010 |
| 20100244853 | Method and Apparatus for Diagnosing an Integrated Circuit - System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buffer chain. The inversion of the signal from the buffer chain allows the diagnostic cell to determine the location of a failure within an integrated circuit previously determined by a scan chain design for test methodology to contain a failure. | 09-30-2010 |
| 20100253362 | PCB DELIVERY APPARATUS PCB TESTING SYSTEM EMPLOYING THE SAME - A printed circuit board (PCB) testing system includes two gear groups, a pair of transmission belts and a driver. The pair of transmission belts geared onto and driven by the two gear groups is parallel and respectively perpendicular to the PCB transmission guideway so as to define a PCB accommodation space therebetween. Each transmission belt includes a plurality of projections. The two gear groups are rotated synchronously and inversely. During operation, the projections on the pair of transmission belts, facing the PCB accommodation space, move down, the projections move away from each other and to the bottom of the corresponding transmission belts, and a PCB supported by the pair of projections drops onto the PCB transmission guideway. | 10-07-2010 |
| 20100259277 | AUTOMATED TEST EQUIPMENT EMPLOYING TEST SIGNAL TRANSMISSION CHANNEL WITH EMBEDDED SERIES ISOLATION RESISTORS - Automated test equipment for high-speed testing of devices under test (DUTs) includes a tester channel circuit generating a high-speed electrical test signal applied to the signal input terminal of each DUT, and a contacter board in physical and electrical contact with the DUTs. The contacter board has a high-speed signal transmission channel including (1) an electrical contact at which the high-speed electrical test signal is received, (2) conductive etch extending from the electrical contact to isolation areas each adjacent to the signal input terminal of a respective DUT, and (3) an embedded series isolation resistor formed on an inner layer of the contacter board at a respective isolation area forming a connection between the conductive etch and the adjacent signal input terminal of the respective DUT. | 10-14-2010 |
| 20100259278 | TESTING CIRCUIT BOARD - A testing circuit board mounted on a testing machine is provided and utilized for testing at least one device under test (DUT). The testing circuit board includes at least one first testing circuit and a plurality of signal communication terminals. The first testing circuit directly formed by circuit printing means includes at least one test slot for holding the DUT to be tested. The signal communication terminals are utilized for receiving a plurality of testing signals from the testing machine, testing the DUT by transmitting the plurality of testing signals to the at least one test slot through the at least one first testing circuit, and transmitting a plurality of output signals from the o DUT to the testing machine. | 10-14-2010 |
| 20100264932 | TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION - An integrated circuit ( | 10-21-2010 |
| 20100264933 | SYSTEM AND METHOD FOR TESTING SIZE OF VIAS - A system and method for testing size of vias reads a component group from a storage system and reads a via size of each via in the component group. If the via size of a via accords with a standard size corresponding to the component group, the via is determined as a qualified via. If the via size of a via does not accord with the standard size, the via is determined as an unqualified via. The unqualified via is highlighted on a printed circuit board (PCB) design map displayed on a display. | 10-21-2010 |
| 20100264934 | PROCESSING DEVICE FOR PIEZOELECTRIC ACTUATOR AND PROCESSING METHOD FOR PIEZOELECTRIC ACTUATOR - A processing device is provided with a circuit connected to a first conductive portion and a second conductive portion. An AC voltage source produces an AC waveform voltage obtained by adding a bias voltage to an AC voltage for capacitance measurement. The AC waveform voltage is applied between the first conductive portion and the second conductive portion through the measurement probes. The moment the AC waveform voltage is applied to the circuit with a switch closed, an inrush current flows through the circuit based on a potential difference of the bias voltage. This inrush current causes dielectric breakdown in the conductive resin, thereby securing the continuity of the conductive resin. With the continuity of the conductive resin secured, a capacitance of the piezoelectric body is measured by the AC waveform voltage, and it is determined whether or not the piezoelectric body is normal. | 10-21-2010 |
| 20100264935 | Electrically Conductive Kelvin Contacts For Microcircuit Tester - Terminals of a device under test are connected to corresponding contact pads or leads by a series of electrically conductive contacts. Each terminal testing connects with both a “force” contact and a “sense” contact. In one embodiment, the sense contact partially or completely laterally surrounds the force contact, so that it need not have its own resiliency. The sense contact has a forked end with prongs that extend to opposite sides of the force contact. Alternatively, the sense contact surrounds the force contact and slides laterally to match a lateral translation component of a lateral cross-section of the force contact during longitudinal compression of the force contact. Alternatively, the sense contact includes rods that have ends on opposite sides of the force contact, and extend parallel. | 10-21-2010 |
| 20100271040 | ARRANGEMENTS FOR DETECTING DISCONTINUITY OF FLEXIBLE CONNECTIONS FOR CURRENT FLOW AND METHODS THEREOF - A detection circuit arrangement in a plasma processing chamber having movable lower electrode is provided. The arrangement includes flexible connector having a first flexible connector end, a second flexible connector end and at least a slit. At least portion of the slit is disposed in a direction parallel to a line drawn between two flexible connector ends. One end is coupled to the movable lower electrode and another end is coupled to a component of the plasma processing chamber. Flexible connector provides low impedance current path between the movable lower electrode and the component of the plasma processing chamber. The arrangement also includes means for detecting current flow through conductor material disposed on one side of the slit. The means for detecting includes at least a coil wound around the conductor material and a detector circuit coupled to the coil for detecting the current flow interruption due to a tear. | 10-28-2010 |
| 20100271041 | TESTING APPARATUS WITH HIGH EFFICIENCY AND HIGH ACCURACY - A testing apparatus includes a public test board, a single DUT (device under test) test board and a holder. The public test board includes a plurality of public test channel sets each having a plurality of public signal terminals for receiving test signals. On the single DUT test board, a plurality first signal terminals are arranged according to the pin layout of a DUT, a plurality second signal terminals are arranged according to the terminal layout of a public channel set, and a plurality traces are arranged for electrically connecting corresponding first and second signal terminals. The holder can connect the pins of the DUT to corresponding first signal terminals. | 10-28-2010 |
| 20100271042 | SENSOR APPARATUS - A sensor apparatus of the present invention includes a failure diagnosis circuit for setting as a failure diagnosis object section at least any one of a drive circuit section, a detection device, a detection circuit section and a processing circuit section, and determining whether the failure diagnosis object section is normal or abnormal. The sensor apparatus also includes a time point measuring unit for measuring time point information, and adding the time point information to an output concerning generation of the failure detection signal outputted from the failure diagnosis object section and an output concerning generation of the sense signal such that the output concerning generation of the failure detection signal is made to correspond to the output concerning generation of the sense signal using time point information in terms of time points. In the case of the failure diagnosis circuit determining abnormality of the failure diagnosis object section, the first output terminal outputs the sense signal added with the time point information at the time of occurrence of the abnormality and the sense signal added with the time point information after the time of occurrence of the abnormality, as a signal outside a range of a normal output voltage. Alternatively, the sensor apparatus of the present invention includes an output circuit section for outputting a sense signal from the processing circuit section and a failure detection signal from a failure diagnosis circuit by the time division system. In the case of the failure diagnosis circuit determining abnormality of the failure diagnosis object section, the output circuit section outputs the sense signal added with the time point information at the time of occurrence of the abnormality and the sense signal added with the time point information after the time of occurrence of the abnormality, as a signal outside a range of a normal output voltage. | 10-28-2010 |
| 20100277183 | ONE SHEET TEST DEVICE AND METHOD OF TESTING USING THE SAME - A one sheet test device and a method of testing using the same that can prevent a change of current characteristics due to a failure panel by measuring a current of normal panels except for the failure panel, when testing a one sheet substrate that includes panels, first wires that are arranged in a first direction between and connected to the panels, second wires that are arranged in a second direction different from the first direction between and connected to the panels. The test device includes voltage application units that are connected to the first and second wires, respectively, to apply a selected one of the first voltage and the second voltage to the corresponding wires; and a test unit that controls the voltage application units to measure an on-current and off-current of each of the panels. | 11-04-2010 |
| 20100283475 | SEPARATE TEST ELECTRONICS AND BLOWER MODULES IN AN APPARATUS FOR TESTING AN INTEGRATED CIRCUIT - The invention relates to an apparatus for testing an integrated circuit of an electronic device. | 11-11-2010 |
| 20100283476 | Testing System and Testing Method - The invention discloses a testing system and a testing method, suitable for testing a DUT with double-sided signal pins. The testing system includes a testing platform and a pick-and-place device. The testing platform includes an electromagnetic shielding chamber and a test-bench module. The electromagnetic shielding chamber has an opening. The test-bench module is disposed in-between the electromagnetic shielding chamber. The pick-and-place device is movably disposed above the testing platform. The pick-and-place device includes an electromagnetic shielding cap and a signal transmission structure. When the pick-and-place device places the DUT on the test-bench module, the electromagnetic shielding cap cooperates with the electromagnetic shielding chamber of the testing platform to form an isolated space for isolating the DUT, and furthermore, the signal pin disposed on an upper surface of the DUT can be electrically connected to the test-bench module through the signal transmission structure. | 11-11-2010 |
| 20100289500 | SUBSTRATE STRUCTURE - A substrate includes a first plate member; a plurality of first electrodes provided on the major surface of the first plate member, the first electrodes including at least one electrode for circuit connection and at least one monitor electrode separate from the electrode for circuit connection; a second plate member; a plurality of second electrodes provided on the major surface of the second plate member; a plurality of solder members provided between the first electrodes and the second electrodes for electrical connection therebetween, repeatedly; and a detector for detecting an electrical disconnection between at least one of the monitor electrode and the second electrode. | 11-18-2010 |
| 20100295552 | SIGNAL TESTING SYSTEM AND METHOD OF A PRINTED CIRCUIT BOARD - A signal testing method of a printed circuit board (PCB) applies a robot arm and an oscilloscope to test the PCB. The method controls the robot arm to move to test points of electronic signals of the PCB. The method further controls the oscilloscope connected to the robot arm to measure the electronic signals. | 11-25-2010 |
| 20100301873 | CIRCUIT FOR DETECTING MALFUNCTION GENERATION ATTACK AND INTEGRATED CIRCUIT USING THE SAME - An embodiment of the invention provides a circuit for detecting a malfunction generation attack, including: at least one sensor circuit adapted to detect a radiation of a light; and a detection circuit for detecting an intermediate voltage between a voltage corresponding to a High level and a voltage corresponding to a Low level in accordance with an output from the at least one sensor circuit, and outputting a detection signal. At least one sensor circuit has an output node a level at which is changed in accordance with the radiation of the light, and outputs a signal corresponding to the level at the output node which is changed in accordance with the radiation of the light. The detection circuit outputs the detection signal when a level of the output signal from the at least one sensor circuit reaches a level previously set. | 12-02-2010 |
| 20100301874 | CORRECTIVE DEVICE PROTECTION - A control system for an electrical power system includes an electrical corrective device, a voltage measuring device coupled to each phase of the electric power system, a current measuring device connected between each phase of the electric power system and the electrical corrective device, and a protective device connected to outputs of the voltage measuring device and the current measuring device. The protective device includes a controller configured to detect an imbalance using the measured voltages and currents output from the voltage measuring device and the current measuring device without using or independently of other recent voltage or current measurements for other points in the electrical corrective device and independently of a neutral-ground measurement at the electrical corrective device. | 12-02-2010 |
| 20100308838 | ELECTRONIC APPARATUS TRANSMITTING AND RECEIVING SIGNAL THROUGH SINGLE WIRE - There is provided an electronic apparatus transmitting and receiving a signal through a single wire that that has a main electronic apparatus and a sub-electronic apparatus connected through a single wire, transmits status information and performs control and communication through the single wire. The electronic apparatus transmitting and receiving a signal through a single wire may include: a sub-electronic apparatus transmitting a detection signal containing status information through a single wire, and performing a predetermined operation upon receiving a response signal to the detection signal; and a main electronic apparatus receiving the detection signal through the single wire and transmitting the response signal having a different signal format from the detection signal to the sub-electronic apparatus. | 12-09-2010 |
| 20100308839 | ELECTRONIC DEVICE IDENTIFYING METHOD - An electronic device that includes an actual operation circuit that operates during an actual operation of the electronic device, a second test circuit and a third test circuit that operate during a test of the electronic device, and a power supply section. The power supply section, during the actual operation of the electronic device, does not apply a power supply voltage to the second test circuit and applies power supply voltages to the actual operation circuit and the third test circuit. The power supply section, to obtain identification of the electronic device, applies a power supply voltage to the second test circuit. | 12-09-2010 |
| 20100315093 | POWER MEASUREMENT WITH A SIGNAL GENERATOR - A measuring system contains a signal generator and at least one power meter. A device under test is supplied with a signal from the signal generator. A signal output by the device under test can be measured by the first power meter. In this context, the signal generator and the power meter are connected by a bidirectional communications link. | 12-16-2010 |
| 20100315094 | Overlay key, method of forming the overlay key and method of measuring overlay accuracy using the overlay key - In an overlay key used for measuring overlay accuracy between first and second layers on a substrate, a first mark may be formed in the first layer, and a second mark may be formed on the second layer. The first mark may include first patterns having a first pitch and extending in a first direction. The second mark may include second patterns extending in substantially the same direction as the first direction and having a second pitch substantially equal to the first pitch. First and second images may be acquired from the first and second marks. The overlay accuracy may be produced from position information of first and second interference fringes formed by overlaying a test image having a third pitch onto the first and second images. | 12-16-2010 |
| 20100321030 | SYSTEM AND METHOD TO PROVIDE LUBRICATION FOR A PLUG-IN HYBRID - In hybrid electric vehicles having increased battery storage capacity and plug-in capability, electric-only operation of significant duration is available. To supplement lubrication for the electric and mechanical components provided in a fluid circuit by an engine-driven mechanical pump, an electric pump is provided in parallel to the mechanical pump. When the electric pump is operating, a diagnostic can be performed to determine system integrity. According to one embodiment, an actual quantity provide to the circuit is determined; an expected quantity is estimated; and a fault is determined when the actual and expected quantities differ by more than a predetermined amount. The fault may indicate a leak or plug in the fluid circuit or a failure of a component in the fluid circuit. | 12-23-2010 |
| 20100321031 | OPTICAL COMPONENT IDENTIFIER - A circuit board including a plurality of components; a plurality of light sources aligned along at least one axis; and a controller configured to activate the light sources to identify at least one of the components. The components on the circuit board can be identified by the light sources in response to a variety of conditions. | 12-23-2010 |
| 20100327876 | LAYOUT STRUCTURE OF ELECTRONIC ELEMENTS AND METHOD FOR ADDRESSING TO DETECT ELECTRONIC ELEMENTS - A layout structure of electronic elements includes M*N electronic elements in a form of a matrix, a first test pad group disposed on a first side of the matrix and all electronic elements in the same linear section in the matrix electrically connect to a corresponding test pad in the first test pad group, and a second test pad group disposed on a second side of the matrix and all electronic elements in the same linear section in the matrix electrically connect to a corresponding test pad in the second test pad group. | 12-30-2010 |
| 20100327877 | RADIO FREQUENCY IDENTIFICATION (RFID) DEVICE AND METHOD FOR TESTING THE SAME - A radio frequency identification (RFID) device and a test method thereof are disclosed. In this test method, the RFID device receives different kinds of tag selection addresses and memory addresses according to a time sharing scheme, so that one or more RFID tags are tested. The RFID device includes a tag chip and a test chip. The tag chip performs a test operation upon receiving a test input signal from an external node, and externally outputs a test output signal indicating a result of the test operation. The test chip tests the tag chip upon receiving an address and data from an external node via a test pad during a test mode. | 12-30-2010 |
| 20100327878 | Disconnection detecting device - A switch element is configured to decrease an impedance of a voltage-detection integrated circuit that detect voltage between both ends of unit cells of a higher-ordered battery block, for adjacently-connected pair of the higher-ordered battery block and a lower-ordered battery block. The voltage-detection integrated circuit is configured to detect disconnection of an electrical wire when voltage between both ends of a lowest-ordered unit cell that is detected with the switch element turned on is equal to or lower than a threshold. | 12-30-2010 |
| 20100327879 | CIRCUIT TEST JIG AND CIRCUIT TESTING METHOD - A circuit test jig used for a printed board that includes a circuit board on which a circuit is formed, the circuit test jig includes a holding plate disposed between the circuit board and the print board and holds a plurality of conductive members that transmit signals between a group of terminals of the printed board and a group of terminals of the circuit board, and an elastic plate in which through holes are formed therein disposed at least one of between the holding plate and the circuit board or between the holding plate and the printed board. | 12-30-2010 |
| 20110001486 | APPARATUS AND A METHOD FOR DETECTING FAULTS IN THE DELIVERY OF ELECTRICAL POWER TO ELECTRICAL LOADS - Apparatus for detecting faults in the delivery of electrical power to electrical loads, includes a plurality of load electrical connections arranged to deliver electrical power from an electrical power source to each of a plurality of electrical loads, a plurality of electrical switches, each connected to an associated one of the load connections, and a diagnostic device operable to detect a short circuit fault in the apparatus, wherein the diagnostic device is operable to apply a diagnostic procedure to detect a short circuit connection between at least two of the load electrical connections and includes a control logic unit operable to apply to each of the electrical switches in turn a test control signal causing operation of the switch to apply a test electrical signal to each of the load electrical connections in turn; and detector means connected to the load electrical connections and operable, whilst the test electrical signal is applied in turn to each load electrical connection, to detect whether a corresponding electrical output is produced in response on any of the other load electrical connections. Also described is a method of operation in the apparatus. | 01-06-2011 |
| 20110006778 | TESTER FOR TESTING OPERATIONAL RELIABILITY OF A COCKPIT OXYGEN DISTRIBUTION CIRCUIT - The present invention relates to a tester ( | 01-13-2011 |
| 20110006779 | FLUX-GATE LEAKAGE CURRENT SENSOR - A flux-gate leakage current sensor includes: an annular core; a coil wound around the core; a driving circuit which applies to the coil a voltage with a positive/negative symmetric rectangular wave so as to saturate a density of a magnetic flux of the coil while reversing a direction of the magnetic flux; a comparator circuit which compares a measured voltage changing according to a coil current flowing in the coil with a positive-side reference voltage and a negative-side reference voltage that are positive/negative symmetric to each other, and outputs a positive-side electric signal corresponding to a period in which the measured voltage is higher than the positive-side reference voltage and a negative-side electric signal corresponding to a period in which the measured voltage is lower than the negative-side reference voltage; and a determination circuit which compares the positive-side electric signal and the negative-side electric signal output from the comparator circuit. | 01-13-2011 |
| 20110012609 | METHOD AND APPARTUS FOR SUB-ASSEMBLY ERROR DETECTION IN HIGH VOLTAGE ANALOG CIRCUITS AND PINS - The innovation relates to systems and/or methodologies for error detection during sub-assembly in high voltage analog circuits. A signal driver communicates test signals to one or more high voltage analog circuits, and a state machine compares the electrical and/or thermal responses of the high voltage analog circuits to a set of predetermined expected results (e.g., signatures). The signal driver and state machine can be incorporated into the high voltage analog circuits. The expected results can be stored in the target circuits in the form of look-up tables, matrices, and so forth. Errors, such as, dry solders and bridge solders can be determined based on the comparison of the obtained responses to the expected signatures. | 01-20-2011 |
| 20110012610 | TESTING DEVICE AND METHOD FOR SM MEMORY CONNECTOR - A testing device for testing surface-mounted (SM) memory connectors on a circuit board is provided. The testing device includes a main control circuit storing standard pin information of the SM memory connectors. A data collecting circuit is connected to the main control circuit and to at least one SM memory connector of the circuit board. A display unit is connected to the main control unit. The main control circuit directs the at least one data collecting circuit to read pin information of the SM memory connector and transmit the pin information to the main control circuit. The main control circuit manages the collected pin information in accordance with the standard pin information and shows the results on the display unit. | 01-20-2011 |
| 20110012611 | TESTING METHOD FOR ELECTRONIC APPARATUS - An electronic apparatus includes a first power contact, a second power contact, and a control unit. The first power contact is electrically connected with an anode of a power supply source, and the second power contact is electrically connected with a cathode of the power supply source. The control unit electrically connects the first power contact and the second power contact for forming a signal transmission path and receiving the power generated by the power supply source. When the control unit is operated in a testing mode, the control unit operates in a working mode or a sleeping mode according to an instruction of a default instruction set for changing a current waveform signal transmitted over the signal transmission path, so as to achieve the purpose of providing a convenient and high-efficiency testing. | 01-20-2011 |
| 20110012612 | TEST APPARATUS - There is provided a test apparatus for testing a device under test, including a signal supply section that supplies a test signal to the device under test via a transmission line, and a comparing and judging section that receives a response signal from the device under test via the transmission line shared with the signal supply section, and judges whether the device under test is acceptable by referring to a comparison result obtained by comparing a signal level of the response signal with a reference level corresponding to a logic pattern of the test signal. | 01-20-2011 |
| 20110018548 | PRINTED CIRCUIT BOARD TEST ASSISTING APPARATUS, PRINTED CIRCUIT BOARD TEST ASSISTING METHOD, AND COMPUTER-READABLE INFORMATION RECORDING MEDIUM - A printed circuit board test assisting apparatus includes an input part that has the attribute information of the wiring pattern input thereto; a degradation degree process part that obtains a degradation degree in signal characteristics in a wiring pattern corresponding to attribute information that is input to the input part, based on position information of the wiring pattern corresponding to the attribute information input to the input part, the position information and the size information of the pattern removed area, and the degradation degree information; and an extracting process part that extracts for an actual measurement test a wiring pattern that has a degradation degree equal to or more than a predetermined degree, from wiring patterns for which degradation degrees have been obtained by the degradation degree process part. | 01-27-2011 |
| 20110018549 | TEST APPARATUS, ADDITIONAL CIRCUIT AND TEST BOARD - Provided is a test apparatus that tests a device under test, comprising a power supply that generates power supplied to the device under test; a transmission path that transmits the power generated by the power supply to the device under test; a current measuring section that measures a peak in current supplied to the device under test via the transmission path, the peak including a frequency component higher than a frequency corresponding to a product of an inductance component from the power supply to the device under test and a capacitance component between the transmission path and a ground potential; and a judging section that judges acceptability of the device under test based on the peak measured by the current measuring section. | 01-27-2011 |
| 20110018550 | INTEGRATED CIRCUIT WITH TEST ARRANGEMENT, INTEGRATED CIRCUIT ARRANGEMENT AND TEXT METHOD - An integrated circuit ( | 01-27-2011 |
| 20110031978 | APPARATUS AND METHOD FOR RECOGNIZING AN ERROR IN A POWER BRIDGE CIRCUIT - An apparatus and a method for recognizing an error in a power bridge circuit containing a load, a high-side branch and a low-side branch. Accordingly, a first switched current source is connected to the load and to a diagnosis connection for a high-potential of a diagnosis voltage, a second switched current source is connected to the load and to a diagnosis connection for a low-potential of the diagnosis voltage, and a control device for controlling the first switched current source and the second switched current source. The control device is configured so that it switches on one of the switched current sources when the high-side power switch and the low-side power switch are open, while the other switched current source is switched off. A testing device is provided to test a voltage at the load when one of the switched current sources is switched on and the other of the switched current sources is switched off. | 02-10-2011 |
| 20110037481 | Method Of Testing Substrate - Disclosed herein is a method of testing a substrate. In the method, a first test terminal is connected to a first external circuit layer coupled to a first connection pad of a first active element included in a substrate, and a second test terminal is connected to a second external circuit layer coupled to a second connection pad of the first active element. Static electricity is applied through the first test terminal and a voltage drop of an electrostatic discharge protection circuit of the first active element is measured at the second test terminal, thus testing a status of a connection between the first active element and the external circuit layers. In the method, status of a connection of a connection circuit layer, a connection of an external circuit layer, a connection of a surface mount element, and a normal operation of the substrate is further tested. | 02-17-2011 |
| 20110043215 | SINGLE LEVEL OF METAL TEST STRUCTURE FOR DIFFERENTIAL TIMING AND VARIABILITY MEASUREMENTS OF INTEGRATED CIRCUITS - A test structure for an integrated circuit device includes one or more experiments selectively configured to receive one or more high-speed input signals as inputs thereto and to output at least one high-speed output signal therefrom, the one or more experiments each comprising two or more logic gates configured to determine differential delay characteristics of individual circuit devices, at a precision level on the order of picoseconds to less than 1 picosecond; and wherein the one or more sets of experiments are disposed, and are fully testable, at a first level of metal wiring (M | 02-24-2011 |
| 20110043216 | CIRCUIT STRUCTURE FREE FROM TEST EFFECT AND TESTING METHOD THEREOF - A circuit structure free from test effect is provided. The circuit structure includes a first test terminal and a second test terminal. A symmetric circuit unit is coupled between the first test terminal and the second test terminal. The symmetric circuit unit includes a plurality of transistors, wherein the transistors are symmetrically disposed to form a first part circuit and a second part circuit. A switch control unit alternatively connects the transistors of the first part circuit and the transistors of the second part circuit between the first test terminal and the second test terminal according to a control signal. | 02-24-2011 |
| 20110043217 | ELECTRODE FAULT DETECTION - A method for detecting an electrode fault in a cochlear prosthesis. A voltage between the implanted electrode and a reference node is measured. It is then determined whether the voltage measured has been affected by an electrical leakage path between the electrode and a power supply node. | 02-24-2011 |
| 20110043218 | ANALYSIS METHOD AND ANALYSIS SYSTEM - The invention discloses an analysis method and an analysis system for analyzing an integrated circuit comprising a plurality of electronic components. The analysis method comprises steps of: performing a measurement or a simulation on an integrated circuit to obtain a time-domain waveform of an output signal of the integrated circuit; applying an time-frequency analysis to the time-domain waveform to obtain one or more frequency components; selecting a target frequency component from the one or more frequency components and identifying a point-in-time when an amplitude of the target frequency component changes; from the plurality of electronic components of the integrated circuit, identifying one or more target electronic components under an operating state at the point-in-time. The analysis system comprises a processing module and a memory module. The processing module analyzes the time-frequency information of an output signal of the integrated circuit according to the logical rules stored in the memory module. | 02-24-2011 |
| 20110057663 | TEST APPARATUS SYNCHRONOUS MODULE AND SYNCHRONOUS METHOD - Provided is a test apparatus that tests a device under test, comprising a plurality of test modules that test the device under test; a synchronization module that is connected to each of the plurality of test modules, and that synchronizes the plurality of test modules; and a test control section that is connected to the plurality of test modules and the synchronization module, and that controls the test modules and the synchronization module. The synchronization module includes a receiving section that receives, from each of the plurality of test modules, a state signal indicating a state of the test module; an aggregating section that generates an aggregate state signal by calculating an aggregate of the state signals received by the receiving section; and a transmitting section that transmits, to the plurality of test modules, a control signal ordering an operation corresponding to the aggregate state signal. | 03-10-2011 |
| 20110057664 | DEVICE-DEPENDENT REPLACEABLE UNIT AND MANUFACTURING METHOD - There is provided a device-dependent replaceable unit for use with a test apparatus, which can reduce signal deterioration. The device-dependent replaceable unit is selected depending on a type of a device under test, and to be mounted on the test apparatus to form a signal path between the device under test and the test apparatus. The device-dependent replaceable unit includes a socket board that has a front surface and a back surface, where the device under test is to be moved close to or away from the front surface of the socket board, and a plurality of spring pins that are positioned in a same manner as a plurality of connection terminals of the device under test, where the spring pins are supported by the socket board in such a manner that upper ends of the spring pins protrude from the front surface of the socket board and come into contact with the connection terminals of the device under test. | 03-10-2011 |
| 20110057665 | TEST APPARATUS FOR DIGITAL MODULATED SIGNAL - A pattern generator generates test data to be transmitted. An encoding circuit generates amplitude data which represent a modulated signal waveform that corresponds to the test data. The amplitude data are generated in a parallel manner in the form of multiple amplitude data in increments of multiple sampling points set within a predetermined period for cycles of the predetermined period. A data rate setting unit receives the multiple amplitude data in increments of sampling points, latches the amplitude data at corresponding sampling timings, and sequentially outputs the amplitude data thus latched. A multi-level driver receives sequentially input amplitude data, and generates a test signal having a level that corresponds to the value of the amplitude data thus received. | 03-10-2011 |
| 20110068804 | DEVICE TEST AND DEBUG USING POWER AND GROUND TERMINALS - The present disclosure describes a novel method and apparatus for using a device's power and ground terminals as a test and/or debug interface for the device. According to the present disclosure, messages are modulated over DC voltages applied to the power terminals of a device to input test/debug messages to the device and output test/debug messages from the device. The present disclosure advantageously allows a device to be tested and/or debugged without the device having any shared or dedicated test or debug interface terminals. | 03-24-2011 |
| 20110084703 | Frequency Extension Methods and Apparatus for Low-Frequency Electronic Instrumentation - An electronic measuring system for extending the effective measurement input frequency range of an electronic measuring instrument includes an electronic measuring instrument and a frequency downconverting subsystem, separate from the electronic measuring instrument, having one or more cascaded (i.e., series-connected) downconverting frequency extending units (FEU-Ds). Each FEU-D of the frequency downconverting subsystem includes a downconverting circuit (e.g., a block downconverter) enclosed within a housing. The frequency downconverting subsystem operates to downconvert a test signal from a device under test (DUT) to a downconverted test signal having a frequency within the permissible input frequency range of the measuring instrument, thereby extending the effective measurement input frequency range of the electronic measuring instrument. | 04-14-2011 |
| 20110095766 | TESTING FLEX AND APFA ASSEMBLIES FOR HARD DISK DRIVES - A tester for a testing a Hard Disk Drive (HDD) flex circuit prior to electrical installation of a Head Gimbal Assembly (HGA) includes a shorting block that makes electrical contact to the bondpads on the sample. The shorting block includes one or more electrical contacts that are electrically grounded and have a size and/or configuration to contact the bondpads as well as the surface of the sample around the bondpads to accommodate positioning tolerances of the sample under test, without need for optics, precise probes, or precision stages. The electrical contacts of the shorting block may be, e.g., a matrix of pogopins or a flexible electrically-conductive material. During testing, the bondpads are shorted together and to ground with the shorting block while it is determined whether Short failures are properly detected. While the shorting block is not engaged with the bondpads, it is determined whether open failures are properly detected. | 04-28-2011 |
| 20110101990 | Compensating for Aging in Integrated Circuits - An age compensation method and apparatus for an integrated circuit (IC). An IC may be configured to operate at an initial operating voltage at the beginning of its operational life. Various circuits may be used to detect aging of the IC, and indications of aging may be stored to determine the aging of the IC. The information indicative of the determined aging of the IC may be compared to an aging threshold. If the information indicates that the aging is greater than or equal to the determined aging threshold, the operating voltage of the IC may be increased. This process may be repeated over the life of the IC, increasing the operating voltage as the IC ages. Raising the operating voltage in response to aging may compensate for various age related degradation mechanisms that can occur over the operational life of the IC. | 05-05-2011 |
| 20110101991 | Techniques Employing Light-Emitting Circuits - A light-emitting circuit includes a light-emitting transistor and a voltage supply in communication with the light-emitting transistor to bias the light-emitting transistor in a reasonably bright state. A reasonably bright state is a state in which light emission approaches the greatest for a given drain-source current in the light-emitting transistor. In one aspect, the light-emitting circuit is in communication with a device under test and configured so that the light-emitting transistor emits photons in a manner indicative of an operation of the device under test. The light-emitting circuit may be disposed in a first semiconductor layer, and the device under test may be disposed in a second semiconductor layer. Further, the first semiconductor layer may be included in a first die, and the second semiconductor layer may be included in a second die. | 05-05-2011 |
| 20110101992 | METHOD AND DEVICE FOR MONITORING A PIEZO ACTUATOR - The invention describes a device and a method for monitoring a piezoelectric actuator. It is checked whether a discharge time assumes an inadmissible value, whether the voltage at the piezoelectric actuator assumes an inadmissible value and whether a fault signal is present. A short circuit of a battery switch is detected if the three conditions are met. | 05-05-2011 |
| 20110109318 | SIGNAL CAPTURE SYSTEM AND TEST APPARATUS INCLUDING THE SAME - A signal capture system for capturing a signal and storing the captured signal in a storage apparatus in real time, and a test apparatus including the signal capture system. The signal capture system includes a printed circuit board; a socket that is connected to the printed circuit board and on which a reference memory component is mounted; and an interposer that is mounted on the printed circuit board, is connected to the socket, an external apparatus, and a storage apparatus, receives first signals from the reference memory component and transmits the received first signals to the external apparatus and the storage apparatus, and receives second signals from the external apparatus and transmits the received second signals to the reference memory component and the storage apparatus, wherein a shape of the socket is defined according to a type of the reference memory component. | 05-12-2011 |
| 20110109319 | TEST CONFIGURATION FOR THE IMPULSE VOLTAGE TEST OF ELECTRIC HIGH-VOLTAGE COMPONENTS - The embodiments relate to a test configuration for an impulse voltage test of electric high-voltage components with a lightning generator. The lightning generator can be moved between a first horizontal position within a cuboid container, and a vertical position relative to the container. A movement between the two positions includes a pivoting movement about a rotational axis. The proofing movement is transverse to the longitudinal direction of the lightning generator. The container can be closed at the top by at least one moveable cover. | 05-12-2011 |
| 20110115494 | MANAGED ELECTRICAL CONNECTIVITY SYSTEMS - A connector arrangement includes a plug nose body; a printed circuit board positioned within a cavity of the plug nose body; and a plug cover that mounts to the plug nose body to enclose the printed circuit board within the cavity. The printed circuit board includes a storage device configured to store information pertaining to the electrical segment of communications media. The plug cover defines a plurality of slotted openings through which the second contacts are exposed. A connector assembly includes a jack module and a media reading interface configured to receive the plug. A patch panel includes multiple jack modules and multiple media reading interfaces. | 05-19-2011 |
| 20110121838 | METHOD AND APPARATUS FOR INCREASED EFFECTIVENESS OF DELAY AND TRANSISTION FAULT TESTING - The invention disclosed herein provides increased effectiveness of delay and transition fault testing. The method of delay fault testing integrated circuits comprises the steps of creating a plurality of test clock gating groups. The plurality of test clock gating groups comprising elements defining inter-element signal paths within the integrated circuit. Each of the elements of the plurality of test clock gating groups share clock frequency and additional shared characteristics. At least one test signal is commonly and selectively connected through at least one low-speed gate transistor to each of the elements comprising each of the plurality of test clock gating groups based on membership in the test clock gating group. This invention can also be practiced using scan-enable gating groups for the same purposes. | 05-26-2011 |
| 20110128012 | OPERATION STATUS DIAGNOSING DEVICE FOR EXTERNAL CONTROL MEANS - Provided is an operation status diagnosing device for an external control means, which is enabled by a simple constitution to perform the transmission of the drive status of an external control means constituted of either a relay contact to be activated by an ON/OFF signal or an ON/OFF means made of a semiconductor, and the transmission of a signal indicating the occurrence of troubles such as disconnection or shorting of a wiring line and the transmission of an electric power by a common means, thereby to prevent the rise of a production cost due to the increase in a parts count or the complexity of a circuit constitution and to diagnose the transmission of the signal and the soundness of the circuit precisely. The operation status diagnosing device for the external control means is constituted to comprise a second switch circuit for turning ON/OFF an alternating voltage generating means output in response to the drive signal of the external control means, thereby to apply that output to an insulating transformer primary side, a first switch circuit serving as an external control means connected with an insulating transformer secondary side, so that it is turned ON/OFF by the second switch circuit, an external control means operation status detecting circuit connected with the insulating transformer secondary side, so that an electric current flows therethrough when the first switch circuit is ON, and a measuring means connected with the second switch circuit, for measuring the electric current to flow to the insulating transformer primary side. | 06-02-2011 |
| 20110133748 | SIGNAL OUTPUT CIRCUIT, TIMING GENERATE CIRCUIT, TEST APPARATUS AND RECEIVER CIRCUIT - Provided is a signal output circuit that outputs a signal, comprising an output circuit that changes a characteristic of a signal output therefrom according to a change in power supply voltage supplied thereto and a control signal supplied thereto; and a control section that changes the control signal to compensate for a change in the characteristic due to a change in the power supply voltage. | 06-09-2011 |
| 20110133749 | TEST ARRANGEMENT FOR AC TESTING OF ELECTRICAL HIGH VOLTAGE COMPONENTS - A test arrangement is provided for AC testing of electrical high voltage components including at least one inverter, at least one test transformer and at least one high-voltage inductor arranged as test components in a common cuboid container. The at least one high-voltage inductor is at least partly removable from the container through at least one opening on a boundary surface of the container by means of a movement apparatus. | 06-09-2011 |
| 20110133750 | INLINE INSPECTION OF PHOTOVOLTAICS FOR ELECTRICAL DEFECTS - A method of inline inspection of photovoltaic material for electrical anomalies. A first electrical connection is formed to a first surface of the photovoltaic material, and a second electrical connection is formed to an opposing second surface of the photovoltaic material. A localized current is induced in the photovoltaic material and properties of the localized current in the photovoltaic material are sensed using the first and second electrical connections. The properties of the sensed localized current are analyzed to detect the electrical anomalies in the photovoltaic material. | 06-09-2011 |
| 20110140710 | Continuous Critical Current Measurement Apparatus And Method Of Measuring Continuous Critical Current Using The Same - The present invention relates to an apparatus and method for measuring the critical current of a superconducting tape. A continuous critical current measurement apparatus for measuring critical current of a superconducting tape while feeding a superconducting tape in a liquid nitrogen container includes wheel-type current terminals and wheel-type voltage terminals. The superconducting tape is continuously supplied and fed by a reel-to-reel device, and the critical current of the superconducting tape is measured in real time using the wheel-type current terminals and the wheel-type voltage terminals while the superconducting tape is fed at constant linear velocity in contact with the wheel-type current terminals and the wheel-type voltage terminals. | 06-16-2011 |
| 20110140711 | MEASUREMENT CIRCUIT AND ELECTRONIC DEVICE - Provided is a measurement circuit that is provided in the same electronic device as a circuit under measurement, comprises a difference generating section and an integrating section, and performs a sigma-delta AD conversion on a signal under measurement output by the circuit under measurement, the measurement circuit further comprising a sampling section that is provided between an output end of the difference generating section and an input end of the integrating section, detects a level of a signal input thereto at predetermined sampling intervals, and outputs a sampled signal corresponding to the detected signal level. This measurement circuit is used to easily perform a sigma-delta AD conversion on a high-frequency signal under measurement. | 06-16-2011 |
| 20110140712 | METHOD OF DETERMINING APPLICATION LIMIT OF ELECTROSTATIC CHUCK - There is provided a method of determining an application limit of an electrostatic chuck, in which method a determination can be accurately made as to whether the electrostatic chuck has reached the application limit or not. The electrostatic chuck has a first electrode and a second electrode, and a coating layer made of a dielectric material to cover both the electrodes. By applying a voltage from a power supply between the first and the second electrodes, a to-be-processed substrate that is mounted on a surface of the coating layer is attracted. A current value that flows between the first and the second electrodes in a state of attracting the to-be-processed substrate is detected by an ammeter. When the detected current value has exceeded a predetermined threshold value, a determination is made that the electrostatic chuck has reached the application limit. The threshold value is set to different values depending on various kinds of to-be-processed substrates whose rear surfaces coming into contact with the electrostatic chuck have different resistance values. | 06-16-2011 |
| 20110148429 | DC Testing Integrated Circuits - In accordance with some embodiments, voltage testing, including input and output voltage levels, may be tested in an integrated circuit without using an external tester in some embodiments. In some cases, active loads may be provided on chip for DC testing. In addition, a comparator may be used to compare an input voltage on an interconnection to a reference voltage to determine whether the voltage levels are correct and the extent to which the voltage levels exceed the designer's specification. | 06-23-2011 |
| 20110163755 | SELF-ALIGNING TEST FIXTURE FOR PRINTED CIRCUIT BOARD - A printed circuit board (“PCB”) test fixture is provided comprising a PCB support, an electrical tester, first and second enclosure portions, and an actuator. The PCB support is configured for supporting a PCB being tested in a PCB test position. The first enclosure portion includes a pressing device which is configured for effecting, with respect to a PCB supported in the PCB test position on the PCB support, pressing of a circuit of the PCB against the electrical tester so as to provide an operative circuit. The second enclosure portion extending peripherally about the PCB support. The actuator is coupled to a one of the first enclosure portion and the second enclosure portion and configured to effect an application of force to the one of the first enclosure portion and the second enclosure portion. The PCB support is disposed between the first and second enclosure portions. | 07-07-2011 |
| 20110163756 | METHOD AND DEVICE FOR DETECTING FAILURES IN INDUCTIVE CONDUCTIVITY MEASUREMENTS OF A FLUID MEDIUM - Exemplary embodiments of the present invention are directed to methods and devices for detecting open-circuit and short-circuit failure in an electromagnetic (inductive) measurement of the conductivity of liquids and on the sensor and cable wiring. An electromagnetic measurement of the conductivity of a liquid is performed by immersing a sensor into the liquid, wherein the sensor includes at least 2 toroidal cores, one of them carrying an excitation coil and the other carrying an induction coil. When an AC excitation voltage is applied to the excitation coil, an induced current or voltage can be measured in the induction coil which is proportional to the conductivity of the measured liquid. | 07-07-2011 |
| 20110169499 | HIGH SPEED MEASUREMENT OF RANDOM VARIATION/YIELD IN INTEGRATED CIRCUIT DEVICE TESTING - A test structure is provided that utilizes a time division sampling technique along with a statistical modeling technique that uses metal-oxide-semiconductor field effect transistor (MOSFET) saturation and linear characteristics to measure the mean (average) and sigma (statistical characterization of the variation) of a large population of electrical characteristics of electrical devices (e.g., integrated circuits) at high speed. Such electrical characteristics or sampling parameters include drive currents, leakage, resistances, etc. | 07-14-2011 |
| 20110169500 | TEST APPARATUS, ADDITIONAL CIRCUIT AND TEST BOARD - Provided is a test apparatus that tests a device under test, comprising a power supply that generates power supplied to the device under test; a transmission path that transmits the power generated by the power supply to the device under test; an intermediate capacitor that is provided between the transmission path and a ground potential; a charge/discharge current measuring section that measures charge/discharge current of the intermediate capacitor; and a load current calculating section that calculates a load current flowing through the device under test, based on the current measured by the charge/discharge current measuring section. | 07-14-2011 |
| 20110175621 | TEST APPARATUS AND PALLET FOR PARALLEL RF TESTING OF PRINTED CIRCUIT BOARDS - A test apparatus features an upper RF impermeable hood and lower RF impermeable hood, wherein each of the hoods have internal dividers. When in a closed position, the hoods and dividers create two or more RF impermeable chambers. The hoods are configured to enclose or sandwich a pallet supporting two or more printed circuit boards. One of the printed circuit boards is disposed in each chamber formed by the hoods and dividers. | 07-21-2011 |
| 20110175622 | TESTING DEVICE FOR PRINTED CIRCUIT BOARDS - A testing device for testing functions of a printed circuit board (PCB) includes a transfer board electrically coupled to the PCB, and a controller board electrically coupled to the transfer board and the PCB. The transfer board includes a signal bus and a controller bus. The PCB is capable of running a test program stored therein to transmit instructions to the controller board; and the controller board is capable of transmitting control signals to the transfer board according to the instructions. The transfer board is capable of switching the PCB corresponding ports on/off; and the PCB information is capable of being transmitted to the controller board via the signal bus. The controller board is capable of converting the PCB information to network information which is uploaded to the internet. | 07-21-2011 |
| 20110175623 | Online Incipient Fault Sensor Device for Detection of Incipient Fault in Oil-Filled Electrical Apparatus Such as a Transformer - A sensor detecting incipient fault in oil-filled electrical apparatuses (transformer) includes a sensor head ( | 07-21-2011 |
| 20110181292 | SYSTEM FOR DIAGNOSING SENSORS TO FIND OUT ABNORMALITY THEREIN - In an abnormality diagnosing system for first and second current sensors for measuring a current, an obtaining unit obtains at least one pair of measured values of the first and second current sensors. The at least one pair of measured values is measured by the first and second current sensors at a substantially same timing. A diagnosing unit diagnoses whether there is an abnormality in at least one of the first and second current sensors based on a function defining a relationship between the at least one pair of measured values of the first and second current sensors. | 07-28-2011 |
| 20110181293 | Method for Diagnosing an Electrical Connection, and Output Assembly - A output assembly and method for diagnosing an electrical connection for reliably identifying a possible wire break to a load in redundantly connected output assemblies in which a control device for operating a switching device is configured such that the control device subjects the measured value to a test criterion, wherein satisfaction of the test criterion initially noted in the output assembly as a diagnosis fault, and the test criterion is applied cyclically within a time period comprising a waiting time, and wherein another output assembly performs a switch-off test during this time, thus allowing a statement to be made as to whether a wire break is present. | 07-28-2011 |
| 20110187382 | Dielectric Film and Layer Testing - A system for testing and a method for making a semiconductor device is disclosed. A preferred embodiment includes a conductor overlying a dielectric layer. The conductor is coupled to a first test pad via a first conducting line and to a second test pad via a second conducting line. | 08-04-2011 |
| 20110193562 | SEMICONDUCTOR TEST SYSTEM AND RELAY DRIVING TEST METHOD THEREFOR - It is aimed to provide a semiconductor test system and a relay driving test method therefor which can automatically and continuously perform tests without bringing needle tips into contact with a number of relays mounted on a probe card and by using a device. In a semiconductor test system with a probe card and a tester, the probe card includes a substrate having a probe and a relay connected to the probe, a relay controller for the relay and a first measurement channel for connecting the relay and the probe to the tester are further provided on the substrate. The tester includes a DC power supply, a control board for controlling the relay controller, and a first circuit connected to the first measurement channel, the DC power supply and a voltmeter. The first measurement circuit includes a first resistor having a predetermined time constant and a first changeover switch to be connected to measurement channel. The DC power supply and the first resistor are connected to the first changeover switch, and the first measurement channel is switchingly connected to the DC power supply or the first resistor by the first changeover switch. | 08-11-2011 |
| 20110199093 | METHOD FOR INSPECTING ELECTROSTATIC CHUCK, AND ELECTROSTATIC CHUCK APPARATUS - Provided are a method and an apparatus capable of determining which attracting electrode in an electrostatic chuck of bipolar type has a capacitance abnormality occurring in its vicinity. In this inspection method, a positive auxiliary electrode ( | 08-18-2011 |
| 20110204900 | METHOD AND DEVICE FOR DETECTING UNDERPERFORMING PV MODULES IN A PV SYSTEM BY USING DISCONNECT SWITCHES - A measuring method for determining an output drop of a PV unit is provided. The PV unit is arranged within a photovoltaic system comprising a plurality of electrically parallel-connected PV units. Each PV unit can be removed from the parallel circuit by a switching device. Further, a total current measuring device for measuring the total current through all PV units of the parallel circuit is provided. The defective PV unit is determined in an evaluation unit by the connection and disconnection of a disconnect switch. | 08-25-2011 |
| 20110210748 | SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC INFORMATION DEVICE - A semiconductor integrated circuit and an electronic information device each of which can detect a fault at one of control signals of tristate gates with a smaller area than conventional ones and without reducing the speed of normal operation, by providing a fault detector using tristate gates. | 09-01-2011 |
| 20110215812 | METHOD AND APPARATUS FOR INSPECTING ELECTRONIC COMPONENT - In one embodiment, a method for inspecting an electronic component includes preparing a current detector which is electrically connected to a current detection terminal via a gating device, and electrically connecting the current detection terminal to an interconnect which is in the electronic component and on which a failure portion is suspected to be generated. The method further includes pulsing an electron beam and irradiating the interconnect with the electron beam, and detecting a current generated when the interconnect is irradiated with the electron beam, by the current detector, while adjusting an opening and a closing of a gate in the gating device. | 09-08-2011 |
| 20110215813 | FUEL PROPERTY SENSOR ABNORMALITY DETERMINING DEVICE - A plurality of capacitance values at different obtained fuel temperatures are obtained. Ethanol concentrations of fuel to be measured are obtained from these capacitance values after correcting for an amount of change in the capacitance values due to a temperature characteristic. The correction according to the temperature characteristic is realized according to a map stored in a control apparatus. It is determined that there is an abnormality in an alcohol concentration sensor if the difference among the obtained ethanol concentrations is equal to or greater than a predetermined value. | 09-08-2011 |
| 20110221449 | METHOD AND APPARATUS FOR DETECTING A SHORT CIRCUIT - This invention provides a method and an apparatus for detecting a short-circuit occurring between a signal line and a ground line of a lead wire. The apparatus comprises a circuit and a resistive element. The circuit has an output terminal, an input terminal and ground. One end of the ground line is connected to the ground of the circuit, and the other end of the ground line is disconnected. A first terminal of the resistive element is connected to the output terminal of the circuit. One end of the signal line is connected to a second terminal of the resistive element, and the other end of the signal line is disconnected. The circuit is configured to provide a first voltage via the output terminal and obtain a second voltage via the input terminal connected to a joint of the signal line and the resistive element, to provide a third voltage via the output terminal and obtain a fourth voltage via the input terminal, to derive an impedance of the lead wire from the first voltage, the second voltage, the third voltage, the fourth voltage and an impedance of the resistive element, and to determine whether a short-circuit occurs or not, based on the impedance of the lead wire and a predefined impedance. In this way, the shorted lead wire can be detected with high accuracy. | 09-15-2011 |
| 20110234236 | METHOD AND A DEVICE FOR DETECTING AN ELECTRICAL FAILURE AFFECTING AN ELECTRIC CONTROL SYSTEM OF A HYDRAULIC ACTUATOR OF VARIABLE GEOMETRIES OF AN AEROENGINE - After the control system has been started, which system has two control paths that are used as alternatives for delivering a control electric current to an electrohydraulic member for transforming said current into hydraulic power that is delivered to the actuator, and before powering a starter-generator of the engine, the detection method comprises implementing the following steps for each of the control paths in succession:
| 09-29-2011 |
| 20110241694 | SYSTEM AND METHOD FOR DETERMINING AN ABUSED SENSOR DURING ANALYTE MEASUREMENT - A method of measuring an analyte in a biological fluid comprises applying an excitation signal having a DC component and an AC component. The AC and DC responses are measured; a corrected DC response is determined using the AC response; and a concentration of the analyte is determined based upon the corrected DC response. Other methods and devices are disclosed. | 10-06-2011 |
| 20110248720 | TESTING SYSTEM FOR INTEGRATED CIRCUITS - A system for testing an integrated circuit including components for receiving clock signals corresponding to different clock domains includes a pin of the integrated circuit to receive a test clock signal for components included in different clock domains, clock gating cells integrated in the integrated circuit to direct said test clock signal from the pin towards components included in respective clock domains and, coupled to each of the gating cells, a dedicated flip-flop for a respective clock domain, the dedicated flip-flop being also integrated in the integrated circuit to effect on the cell to which it is coupled a clock gating function during testing of the integrated circuit. | 10-13-2011 |
| 20110248721 | PARTIAL DISCHARGE MONITORING METHOD AND SYSTEM - The invention relates to a method and system of monitoring partial discharges occurring in an electrical system, and to a method of measuring or analyzing partial discharges occurring in an electrical system. The method comprising receiving a signal or impulse, or information associated therewith, from the electrical system; breaking the received signal or impulse into predefined frequency components; and displaying a peak of the received signal or impulse on a scatter plot with other peaks associated with similar predefined frequency components. | 10-13-2011 |
| 20110248722 | Diagnostic Circuit and Method of Testing a Circuit - A diagnostic circuit is configured for connecting to a unit under test that has a load and a sinusoidal source. The diagnostic circuit includes a voltage sensing device that has an input for sensing a signal, a first terminal for connecting to the load, a second terminal for connecting to the sinusoidal source, and a relay connected between the first and second terminals for connecting the sinusoidal source to the load. Clamping diodes are provide for clamping a sinusoidal signal and include a first clamping diode connected between a D/C voltage source and the input and a second clamping diode connected between ground and the input. A resistor is connected between the D/C voltage source and the first terminal. The diagnostic circuit verifies the operational functionality of the load, related wiring and connections. | 10-13-2011 |
| 20110260734 | INTEGRATED CIRCUIT DEVICE TEST APPARATUS - A carrier and a frame, movable relative to one another in both an x-y direction and a z direction provide a test bed for MEMS like integrated circuits. The carrier includes receptacles mounted on a test substrate. The frame includes pins projecting from a surface of a plate. The plate has open areas. In a test sequence, the frame and carrier are oriented so that the cavities are exposed by open areas of the plate; a tool is used to place a device to be tested in each cavity; the frame and carrier are moved into alignment and toward one another to bring the pin ends into contact with the devices in the cavities. Then a test cycle is carried out. Following the test cycle the process is reversed to expose the devices for a pick-and-place tool to remove and bin the tested devices. | 10-27-2011 |
| 20110267071 | HYBRID SELF-TEST CIRCUIT STRUCTURE - A hybrid self-test circuit structure comprises a plurality of input terminals and a plurality of output terminals for testing a plurality of memory units. The circuit structure comprises a first level functional unit for driving a plurality of first output terminals electrically coupled to the first level functional unit to output an output signal according to an external control signal transmitted from the outside; a plurality of second level functional units for receiving the output signal and generating a test signal according to the output signal and outputting the test signal to the memory units; a parallel interface parallelly installed between the first level functional unit and at least one of the second level functional units; and a serial interface serially installed between the first level functional unit and at least one of the second level functional units. | 11-03-2011 |
| 20110273184 | SYSTEM AND METHOD FOR IMPROVED TESTING OF ELECTRONIC DEVICES - An improved method of testing and sorting electronic devices uses two or more test stations and two or more sorting stations applied to a single track to improve system throughput. Applying two or more test stations and two or more sorting stations to a single track accomplishes improved system throughput while increasing system cost less than would be expected if a duplicate track was installed for each test station. | 11-10-2011 |
| 20110291662 | METHOD AND APPARATUS TO MONITOR ELECTRIC ISOLATION OF A HIGH-VOLTAGE DIRECT CURRENT ELECTRICAL CIRCUIT - An electrically isolated high-voltage direct-current electric circuit is monitored. Electrical signals are periodically sampled, and ground isolation indexes are calculated. A trend corresponding to trend elements is characterized. The characterized trend is compared with an expected trend with deviations indicative of potential faults. | 12-01-2011 |
| 20110291663 | PRINTING APPARATUS AND LIQUID DETECTION SENSOR INSPECTION METHOD - The printing apparatus applies a first waveform to the liquid detection sensor, and measures a second waveform output from the liquid detection sensor in response to the application of the first waveform. Based on a measurement result of the second waveform, the printing apparatus inspects whether the liquid detection sensor can be driven. Further, prior to the application of the first waveform to the liquid detection sensor, the printing apparatus measures the first waveform itself, and performs an inspection based on a measurement result of the first waveform. | 12-01-2011 |
| 20110298471 | CIRCUIT CONFIGURATION FOR DETECTING AN ERROR IN A CONVERTER - A circuit configuration for detecting an error occurring in a converter, that is designed for integrating an analog useful signal and a digital useful signal of the converter and checking in each instance, when the integrated analog useful signal reaches a specific threshold value, and when the integrated digital useful signal reaches a specific threshold value, the circuit configuration for the converter detecting an error if the threshold values are not reached within a defined time window. | 12-08-2011 |
| 20110304341 | METHOD OF TESTING INTEGRATED CIRCUITS - A method of testing integrated circuits includes providing an integrated circuit test system that has a voltage supply and a plurality of control channels. A first switching element is connected between the voltage supply and a first integrated circuit, and a second switching element is connected between the voltage supply and the second integrated circuit. The switching elements can include, for example, electromagnetic relays. The relays are controlled by respective test system control channels to selectively provide electrical power to each of the integrated circuits. | 12-15-2011 |
| 20110304342 | DEVICE FOR A SYSTEM COMPONENTS OF A HIGH-VOLTAGE IMPULSE TEST SYSTEM - The present invention relates to a device for system components of a high-voltage impulse test system, preferably for quality assurance of power transformers. According to the invention, a common base frame having only one main electrode common to the system components is proposed for the spatial collection of the system components. | 12-15-2011 |
| 20110309843 | Discontinuous Type Layer-ID Detector For 3D-IC And Method of The Same - A 3D-IC detector for each layer of a stacked device with N layer, includes a dividing-two circuit coupled to a (N−1) signal; a first comparator is coupled to the dividing-two circuit, wherein an input A is coupled to an initial layer number signal, an input B of the first comparator is coupled to an output of the dividing-two circuit; a second comparator is coupled to the initial layer number by an input A of the second comparator, and a num is coupled to an input B of the second comparator; a first Add/sub circuit is coupled to the num via an input A of the first Add/sub circuit, and coupled to the first comparator via an input B of the first Add/sub circuit, to the second comparator via an input +/−signal of the first Add/sub circuit; and a second Add/sub circuit coupled to the first comparator via an input A of the second Add/sub circuit, to the num via an input B of the second Add/sub circuit. | 12-22-2011 |
| 20110316554 | SWITCHING APPARATUS AND TEST APPARATUS - To perform a forcible disconnection when voltage outside a reference range is applied to a terminal, provided is a switching apparatus comprising a main switch provided between a first terminal and a second terminal; a voltage detection section that detects whether voltage of the second terminal is within a reference range; and a control section that controls the main switch according to a control signal received from a control terminal and turns OFF the main switch when the voltage of the second terminal is outside the reference range. The voltage detection section includes a detection switch that disconnects the second terminal and the control section from each other when the voltage of the second terminal is within the reference range and connects the second terminal and the control section to each other when the voltage of the second terminal is outside the reference range. | 12-29-2011 |
| 20120001641 | GAS SENSOR CONTROL APPARATUS AND METHOD - A gas sensor control apparatus ( | 01-05-2012 |
| 20120013343 | RECEIVING APPARATUS, TEST APPARATUS, RECEIVING METHOD, AND TEST METHOD - A receiving apparatus that acquires a reception signal using a recovered clock that is recovered from an edge of the reception signal. The receiving apparatus comprises a recovered clock generating section that generates the recovered clock; a multi-strobe generating section that generates a plurality of strobes having different phases from each other, according to a pulse of the recovered clock; a detecting section that detects an edge position of the reception signal relative to the strobes, based on a value of the reception signal at timings of each of the strobes; an adjusting section that adjusts a phase of the recovered clock according to the edge position of the reception signal; and an acquiring section that acquires the reception signal at a timing shifted by a set phase difference, which is set in advance, from the recovered clock. | 01-19-2012 |
| 20120013344 | DEVICE FOR DIAGNOSING MEASUREMENT OBJECTS USING A MEASUREMENT VOLTAGE - A device for diagnosing measurement objects using a measurement voltage comprises a housing, in which at least one electric measurement circuit is arranged for carrying out the diagnosis. To this end, the device is designed for the simultaneous diagnosis of a plurality of measurement objects using the same measurement voltage and comprises at least two separate connecting elements for connecting one measurement object each to the measurement voltage. The measurement circuit in turn comprises at least two current detection units and a voltage detection unit, by means of which the current flowing through each measurement object and the measurement voltages present at all measurement objects can be measured at the same time. | 01-19-2012 |
| 20120025841 | CAPACITANCE MEASUREMENT IN MICROCHIPS - A measurement system for determining the capacitance of a device-under-test in an integrated circuit is disclosed. In one aspect, the measurement system has a reference circuit and a test circuit. Each circuit has first and second diodes that are switched in accordance with a clock cycle to charge and discharge the associated circuit. A method takes average current measurements for each circuit at one voltage level and processes them so that the capacitance of a device-under-test connected to the test circuit can accurately and reliably be determined. Two voltage levels may be used and adjustments are made for voltage threshold of the diodes and also their resistance. | 02-02-2012 |
| 20120032683 | METHOD FOR DIAGNOSING CURRENT SENSORS IN AN INDUCTION MACHINE DURING OPERATION THEREOF - A method diagnoses current sensors of an n-phase induction machine which has n−1 current sensors. The n phases of the induction machine are short-circuited for a brief period of time during normal operation of the induction machine, and the time progressions of the n−1 currents are measured by the n−1 current sensors during the short-circuit operation. The actual values of the time progressions of the n−1 measured short-circuit currents are compared to corresponding prescribed target values for the n−1 short-circuit currents. A potential fault state of one or more current sensors is determined from the comparison. | 02-09-2012 |
| 20120038366 | System and Method for Detecting Sensor Leakage - A test system for testing a sensor system includes a high-impedance resistor for forming a voltage divider with any corrosion or foreign substance that might be present between a signal conductor and a ground conductor. While a voltage is applied across the voltage divider, the voltage can be measured across the high-impedance resistor for determining whether an undesirable amount of conductance exists between the signal wire and ground. The test system also includes switching means for switching between any number of signal wires of a system undergoing testing. | 02-16-2012 |
| 20120043968 | VARIABLE EQUALIZER CIRCUIT - A variable equalizer circuit equalizes a signal received via a transmission line from a device which is a communication partner device. A first resistor is arranged between an output terminal and a fixed voltage terminal, and is configured to have a variable resistance. A first capacitor is arranged between an output terminal and the fixed voltage terminal, and is arranged in parallel with the first resistor, and is configured to have a variable capacitance. A second resistor is arranged between an input terminal and the output terminal. A second capacitor is arranged in parallel with the second resistor between the input terminal and the output terminal. A shunt resistor is arranged on a path including the first capacitor and the second capacitor between the input terminal and the fixed voltage terminal. | 02-23-2012 |
| 20120068719 | MEASURED DEVICE AND TEST SYSTEM UTILIZING THE SAME - A measured device coupled to test equipment providing at least two test factors and receiving a test result is disclosed. The measured device includes a combinatorial logic circuit and a main circuit. The combinatorial logic circuit includes a first storage module and a second storage module. The first storage module stores the test factors according to a first operation clock. The second storage module stores and outputs at least two output factors according to a second operation clock. The frequency of the second operation clock is higher than the frequency of the first operation clock. When the test factors are stored in the first storage module, the test factors stored in the first storage module are served as the output factors and the output factors are output and stored in the second storage module. The main circuit generates the test result according to the output factors output by the second storage module. The test equipment obtains information as to whether the main circuit is normal according to the test result. | 03-22-2012 |
| 20120074953 | WIRING TESTING DEVICE - A wiring testing device configured to test the wiring correctness of an inverter is disclosed. The inverter is configured to be connected to a low-voltage three-phase system with a neutral conductor serving as a reference point for grid-side conductor voltages. The wiring testing device includes a test circuit configured to measure the grid-side conductor voltages and determine an average value from the sum of the instantaneous values of the grid-side conductor voltages, and a display unit configured to display an error message if the average value exceeds a threshold voltage for a defined time period. The wiring testing device further includes a capacitor connected between a phase of the three-phase system and the neutral conductor configured to generate a voltage imbalance if the neutral conductor connection is missing, wherein the test circuit is configured to measure the conductor voltages and determine the voltage imbalance. | 03-29-2012 |
| 20120081128 | SYSTEM AND METHOD FOR DETECTION OF OPEN CONNECTIONS BETWEEN AN INTEGRATED CIRCUIT AND A MULTI-CELL BATTERY PACK - An apparatus comprises an integrated circuit and an open connection detection circuit within the integrated circuit. The integrated circuit includes a plurality of inputs for connecting with a plurality of outputs of a multi-cell battery pack. The open connection detection circuit within the integrated circuit detects an open connection on at least one of the plurality of inputs from the multi-cell battery and generates a fault condition responsive thereto. | 04-05-2012 |
| 20120092020 | ACOUSTIC APPARATUS AND ACOUSTIC SENSOR APPARATUS INCLUDING A CLAMP - An acoustic sensor apparatus includes a housing; a clamp structured to clamp together the housing and an electrical power conductor; an acoustic sensor structured to detect acoustic noise from the electrical power conductor and output a signal; and a circuit structured to detect an electrical conductivity fault from the signal. | 04-19-2012 |
| 20120092021 | Test Structure for GIP panel - The present invention discloses the test structure for a display panel, particularly for the GIP panel driven by the gate drivers on both left and right side of the panel. Through a plurality of dedicated pads designed on the GIP panel and a control circuit in probe card, the disclosed test structure can reduce the requirement of test equipments and thus save test cost. | 04-19-2012 |
| 20120092022 | METHODS FOR DETECTING DAMAGE TO MAGNETORESISTIVE SENSORS - A system for detecting a damaged magnetoresistive sensor includes a circuit for measuring resistances of a plurality of sensors at at least a first bias current level; a processor; logic or software for determining whether one of the sensors has a resistance that is at least a predetermined amount higher or lower than the resistances of the other sensors; and logic or software for outputting an indication that the one of the sensors has a resistance that is at least a predetermined amount higher than the resistances of the other sensors. | 04-19-2012 |
| 20120098547 | SEMICONDUCTOR CIRCUIT, SEMICONDUCTOR DEVICE, METHOD OF DIAGNOSING ABNORMALITY OF WIRE, AND COMPUTER READABLE STORAGE MEDIUM - There is provided a semiconductor circuit including: a selection circuit, to which are connected batteries in series, and which selects any one of the batteries; a difference detecting circuit, to which voltage of a high potential side of the selected battery inputted, and to which voltage of a low potential side of the selected battery is inputted, and which outputs a difference between the voltage at the high-potential side and the voltage at the low-potential side; and a voltage applying unit that applies diagnostic voltage to a wire that is for inputting the high potential voltage to the difference detecting circuit when diagnosing an abnormality of a wire associated with the selected battery if the selected battery is a battery of a highest position in the series or a battery of a lowest position in the series. | 04-26-2012 |
| 20120112761 | AUTOMATIC TEST EQUIPMENT FOR TESTING AN OSCILLATING CRYSTAL AND METHOD FOR OPERATING THE SAME - Embodiments of the invention relate to automatic test equipment for testing a circuit having an oscillating crystal and to a method for operating such automatic test equipment. A generator generates a first signal comprising an oscillating part having at least one predetermined frequency. A first terminal couples the first signal to the oscillating crystal. At least one predetermined frequency is located inside a predetermined window around one of the resonance frequencies of the oscillating crystal. An analyzer has a second terminal coupled to the oscillating crystal for detecting a second signal and a rectifier connected in series with a low-pass filter for rectifying and filtering the second signal. A detector for detects a DC-signal at the output of the low-pass filter and for signals a valid test result for the oscillating crystal if the DC-signal exceeds a certain threshold value. | 05-10-2012 |
| 20120119752 | TEST APPARATUS AND CIRCUIT MODULE - Provided are a first test substrate and a second test substrate opposing each other, a first test circuit testing a device under test and being disposed on a face of the first test substrate that faces the second test substrate, a second test circuit testing the device under test and being disposed on a face of the second test substrate that faces the first test substrate, and a sealing section that is formed by sealing a space between the first test substrate and the second test substrate to enclose the first test circuit and the second test circuit in a common space that is filled with coolant. | 05-17-2012 |
| 20120119753 | System and Method of Detecting and Locating Intermittent Electrical Faults In Electrical Systems - Signals are transmitted from at least one transmitter that is positioned in an electrical network. The signals that have been transmitted are received a single receiver positioned within the electrical network. At the single receiver, the received signals are analyzed and a determination from the analyzing the received signals is made as to whether a fault has occurred in the electrical network and the approximate location of the fault. | 05-17-2012 |
| 20120126821 | System and Method for Testing a Radio Frequency Integrated Circuit - In an embodiment, a method of testing a radio frequency integrated circuit (RFIC) includes generating high frequency test signals using the on-chip test circuit, measuring signal levels using on-chip power detectors, and controlling and monitoring the on-chip test circuit using low frequency signals. The RFIC circuit is configured to operate at high frequencies, and an on-chip test circuit that includes frequency generation circuitry configured to operate during test modes. | 05-24-2012 |
| 20120139553 | ELECTROCHEMICAL CELL MONITORING AND BALANCING CIRCUIT WITH SELF-DIAGNOSTIC FEATURE - A system and method for measuring a voltage of electrochemical cells of a pack. The system includes circuit elements individually associated with respective electrochemical cells of the pack and having electrical characteristics that are different such that individual electrochemical cells can be distinguished from one another. The system also includes a measurement circuit configured to measure the voltage of the electrochemical cells and to identify an electrochemical cell being measured based on an electrical characteristic of a circuit element associated with the electrochemical cell. Various self-diagnostic techniques are described, as well as techniques for measuring sense resistance, reducing sense resistance, and measuring changes in voltage of a cell over time. | 06-07-2012 |
| 20120146658 | DEBUG STATE MACHINE CROSS TRIGGERING - An embodiment of an electronic system includes a first electronic module, a second electronic module, a first debug circuit integrated with the first electronic module, a second debug circuit integrated with the second electronic module, and a communications interface between the first debug circuit and the second debug circuit. The first debug circuit is configured to determine that a triggering event has occurred, and to produce a first cross trigger signal on the communications interface in response to determining that the triggering event has occurred. The second debug circuit is configured to detect the first cross trigger signal on the communications interface, and to perform an action in response to detecting the first cross trigger signal. | 06-14-2012 |
| 20120146659 | METHOD OF EVALUATING A CLAMPING PORTION OF AN ELECTRIC WIRE AND A TERMINAL, AND DEVICE FOR EVALUATING THE CLAMPING PORTION - There is provided a method of evaluating a clamping portion of an electric wire and a terminal, which can determine whether a clamping quality is good, or not, through simple test, and can easily test all of the clamping portions. The method of evaluating the clamping portion of an electric wire (W) and a terminal ( | 06-14-2012 |
| 20120153963 | TESTING OF A TRANSIENT VOLTAGE PROTECTION DEVICE - A method of testing a voltage protection device in a circuit is provided. The circuit comprises a source and load and a detector is provided in parallel with the protection device. The method comprises opening a switching device provided in the circuit. The method further comprises detecting a property of a voltage spike caused by the rate of change of current in the circuit inductance produced by the opening of the switching device to determine the condition of the protection device. | 06-21-2012 |
| 20120161779 | DISCHARGE DEVICE AND TEST SYSTEM HAVING THE SAME - A discharge device and a test system having the same are provided. The test system comprises at least one power supply module, a test instrument and a discharge device. The power supply module supplies power to a device under test. The test instrument is connected to the device under test. The test instrument performs a plurality of on-power test procedures on the device under test. The discharge device comprises at least one first constant current discharge unit disposed in the test instrument, at least one second constant current discharge unit disposed in the power supply module and a control module. The control module controls the first and the second constant current discharge units to drain a constant current from the device under test and the power supply module to perform a discharge process when each one of the on-power test procedures is finished. | 06-28-2012 |
| 20120161780 | SEMICONDUCTOR DEVICE, TEST METHOD, AND TEST APPARATUS - A semiconductor device includes; a first pad that receives an external voltage during a test, a second pad coupled to an external impedance during the test, a voltage-current converter coupled to the first pad and the second pad and generating a bias current substantially in response to only the external voltage and the external impedance, and an internal circuit responsive to a test current during the test, such that the level of the test current is defined by the level of the bias current. | 06-28-2012 |
| 20120169348 | Methods and Systems Involving Monitoring Circuit Connectivity - A circuit protection system includes a processor, a current sensing device having a first node and a second node, a current sensing circuit connected to the first node and the second node, the current sensing circuit operative to output a voltage indicative of a current sensed by the current sensing device to the processor, and a connection verification portion connected to the first node, the second node, and the processor, the connection verification portion operative to induce a current through the current sensing device. | 07-05-2012 |
| 20120169349 | CURRENT TEST SYSTEM FOR HARD DISK DRIVE AND ADAPTER BOARD THEREOF - A current test system for a hard disk drive includes an adapter board, a test device, two cables and two current clamps. The hard disk drive is connected to the test device through the adapter board. The two cables are connected to two power routes of the adapter board, respectively. While the test device tests the hard disk drive through the adapter board, the two current clamps respectively clamp the two cables to determine the current through the two power routes. | 07-05-2012 |
| 20120187953 | CIRCUIT FOR DETECTING STRUCTURAL DEFECTS IN AN INTEGRATED CIRCUIT CHIP, METHODS OF USE AND MANUFACTURE AND DESIGN STRUCTURES - Detection circuits, methods of use and manufacture and design structures are provided herein. The structure includes at least one signal line traversing one or more metal layers of an integrated circuit. Circuitry is coupled to the at least one signal line, which is structured to receive a signal with a known signal from the at least one signal line or a signal from a different potential and, based on which signal is received, determine whether there is a structural defect in the integrated circuit. | 07-26-2012 |
| 20120187954 | Method and Device for Inspecting Strips of Touch Panel - A method for inspecting the strips of a touch panel is disclosed. The method includes providing a first signal to a first driven first strip of a plurality of first strips and generating a plurality of continuous first differences according to signals on a plurality of second strips; providing the first signal to the first driven first strip and a second driven first strip of the plurality of first strips and generating a plurality of continuous second differences according to the signals on the plurality of second strips; and determining if there is a broken second strip between the first and second driven first strips based on the continuous first and second differences. Herein, the plurality of first and second strips intersect each other on the touch panel to form a plurality of intersecting regions. | 07-26-2012 |
| 20120187955 | ADAPTOR FAILURE TOLERANCE TEST DEVICE - An adaptor failure tolerance test device includes a first connection module, a second connection module, a teaming control module, and a connection control module. The first connection module includes eight first interfaces configured for connecting to a plurality of respective adaptors of a network server. The second connection module includes eight second interfaces configured for connecting to a switch. The teaming control module includes eight first switches, each of which is connected to a corresponding first interface. The connection control module includes eight second switches and a control unit. Each of the second switches is interposed between a corresponding first switch and a corresponding second interface. The control unit is configured for detecting which first switches are turned on and turning on the second switches corresponding to the first switches which are turned on for a predetermined time period. | 07-26-2012 |
| 20120187956 | Touchscreen Testing - Touchscreen testing techniques are described. In one or more implementations, a conductor is placed proximal to a touchscreen device and the touchscreen device is tested by simulating a touch of a user by placing the conductor in a grounded state and lack of a touch by the user by placing the conductor in an ungrounded state. | 07-26-2012 |
| 20120194201 | FREQUENCY BASED FAULT DETECTION - A electrical circuit includes an excitation voltage connected via a first circuit path to an output, a switching device having a control terminal and first and second controlled terminals connected to the first circuit path, and a controller that generates a control signal provided to the control terminal of the switching device to selectively supply the excitation voltage to the output. Faults in the electrical circuit are detected by monitoring the switching device voltage at one of the controlled terminals of the switching device. | 08-02-2012 |
| 20120200300 | Apparatus for Preventing Damage to Electronics Caused by a Broken or Damaged Service Neutral Line Connection - This invention is a system that will prevent damage to electronics if the service neutral line is broken or damaged, or if other failures cause the voltage between the active line and neutral line to increase above typical regulated values. Damage to the service neutral line can cause erratic voltages between the active line and ground terminals of a home or business, often damaging electronics without tripping circuit breaker switches. This design is an easily-built, easily-installed and cost effective way to determine if the voltage between the active line and the neutral line is too high and, if so, disable current from reaching electronic equipment. | 08-09-2012 |
| 20120200301 | SENSING SYSTEM AND METHOD FOR MANUFACTURING THE SAME - A system includes a sensor housing having a base portion, a lid portion, and a joining portion. The joining portion is configured to be wrapped around at least a portion of an electrical wire. The lid portion includes one end detachably coupled to a first end of the base portion and another end coupled to a second end of the base portion via the joining portion. A flexible coil sensor is disposed in the sensor housing; bonded substantially along the base portion and the joining portion and configured to generate a signal representative of a fault in the electrical wire. A processing device is disposed in the sensor housing and configured to detect and locate a fault in the electrical wire in response to the signal representative of the fault in the electrical wire generated by the flexible coil sensor. | 08-09-2012 |
| 20120206150 | ADJUSTABLE GAIN AMPLIFIER, AUTOMATED TEST EQUIPMENT AND METHOD FOR ADJUSTING A GAIN OF AN AMPLIFIER - The adjustable gain amplifier comprises an amplifier transistor comprising a control terminal and a controllable path. The adjustable gain amplifier also comprises a variable impedance circuit, which is configured to provide variable impedance for varying a gain of the amplifier transistor. The load path of the amplifier transistor and the variable impedance circuit are coupled in series between a first supply potential feed and a second supply potential feed. The adjustable gain amplifier also comprises an active feedback circuit configured to stabilize a load path bias voltage of the amplifier transistor. | 08-16-2012 |
| 20120223721 | System and Method for Bonded Configuration Pad Continuity Check - A continuity test circuit for a boundary pad includes a pull-up transistor electrically connected between the boundary pad and a first power supply, and a pull-down transistor electrically connected between the boundary pad and a first reference ground potential. A normal output conductor is electrically connected to have a same electrical state as the boundary pad during normal operation. A continuity test output conductor is electrically connected to have a same electrical state as the boundary pad during continuity test operation. Continuity testing control circuitry is defined to control the pull-up transistor, the pull-down transistor, and the normal output conductor during continuity test operation such that an electrical state present on the continuity test output conductor indicates a status of electrical continuity between the boundary pad and either a second power supply or a second reference ground potential to which the boundary pad should be electrically connected. | 09-06-2012 |
| 20120223722 | Voltage Measurement Device and Voltage Measurement System - A voltage measurement device, includes: a multiplexer that includes a plurality of input terminals at which voltage signals are inputted; a control circuit that performs voltage measurement by acquiring the voltage signal at a selected input terminal from the multiplexer; and a decision circuit that makes a decision as to whether or not an abnormality has occurred, based upon voltage values measured by the control circuit, wherein: the plurality of input terminals include input terminals at which voltage signals from a plurality of subjects of measurement are inputted, and an input terminal at which a potential for diagnosis is inputted; the control circuit, when performing voltage measurement for the plurality of subjects of measurement, measures voltages at the input terminals at which the voltage signals from the plurality of subjects of measurement are inputted, and a voltage at the input terminal at which the potential for diagnosis is inputted. | 09-06-2012 |
| 20120229145 | Detection of Pre-Catastrophic, Stress Induced Leakage Current Conditions for Dielectric Layers - Techniques disclosed herein stress a dielectric layer until a pre-catastrophic, stress induced leakage current (SILC) condition is detected. When the pre-catastrophic SILC condition is detected, the stress is removed to prevent catastrophic failure of the dielectric and its associated device. Because these techniques prevent catastrophic failure of the dielectric layer, engineers can carry out physical failure analysis of the device, which is now known to have some type of defect due to detection of the pre-catastrophic SILC condition. In this way, the techniques disclosed herein allow engineers to more quickly determine an underlying cause of a defect so that yields can be kept at optimal levels. | 09-13-2012 |
| 20120235687 | SELF-DIAGNOSTIC APPARATUS FOR ELECTRICAL STORAGE SYSTEM - A startup self-diagnostic apparatus for an electrical storage system including an electrical storage device, a charge and discharge switch device disposed to be connected to the electrical storage device, an electrical storage device breaker disposed between the electrical storage device and the charge and discharge switch device, and a load side breaker disposed between the charge and discharge switch device and an external load comprises a state monitoring unit for the electrical storage device breaker, a state monitoring unit for the load side breaker, a converter diagnosing unit, a switching device diagnosing unit, and an electrical storage device monitoring unit, for diagnosing peripheral diagnostic items which may be diagnosed without using the electrical storage device. | 09-20-2012 |
| 20120242346 | Power Compensation in 3DIC Testing - A device, such as a 3DIC stacked device includes a first device under test (DUT) connected to a first force pad by a first through substrate via (TSV) stack and connected to a first sense pad by a second TSV stack. The device further includes a second DUT stacked above the first DUT and connected to a second force pad and a second force pad by a second third TSV and connected to a second sense pad by a fourth TSV. Functional blocks on either the first or second blocks can be accessed for testing by way of the TSVs. In some applications the TSVs are vertically aligned to form TSV stacks. | 09-27-2012 |
| 20120249155 | METHOD AND APPARATUS FOR DEALING WITH FAULTS IN AN ELECTRICAL DRIVE SYSTEM - A method for dealing with faults in an electrical drive system having an electrical machine and a pulse-controlled inverter which has a first and a second supply connection, the method comprising the steps of: detecting a first fault in the electrical drive system; selecting a first of a large number of circuit states ( | 10-04-2012 |
| 20120249156 | MULTI-TRACK DETECTION SYSTEM FOR DETECTING THE APPEARANCE OF ELECTRONIC ELEMENTS - A multi-track detection system for detecting the appearance of electronic elements includes a rotary module, a feeding module, an unvibrated module, a detection module, and a classification module. The rotary module includes a hollow transparent rotary structure having at least two annular guiding areas on the top surface thereof, and the electronic elements are sequentially arranged on the two annular guiding area. The feeding module has two V-shaped feeding grooves for guiding the electronic elements. The unvibrated module includes an unvibrated guiding block having two V-shaped unvibrated guiding grooves respectively communicated with the two V-shaped feeding grooves and respectively corresponding to the two annular guiding areas. The electronic elements on the V-shaped feeding grooves are sequentially transmitted onto the two annular guiding areas through two V-shaped unvibrated guiding grooves, thus each electronic element can be detected by the detection module and classified by the classification module, respectively. | 10-04-2012 |
| 20120249157 | TEST APPARATUS - Provided is a test apparatus that tests a memory under test including a plurality of repair regions for repairing fails in a memory region, the test apparatus comprising a testing section that sequentially tests each of a plurality of portions of the memory region of the memory under test; a repair solution memory that stores a repair solution indicating which repair region replaces a fail portion of the memory under test; and an updating section that, during testing, in response to a new fail portion being detected by the testing section, updates the repair solution stored in the repair solution memory to be a repair solution that also repairs the newly detected fail portion. | 10-04-2012 |
| 20120249158 | METHOD FOR DETECTING A MALFUNCTION OF A SENSOR FOR MEASURING AN ANALYTE CONCENTRATION IN VIVO - The invention relates to a method for detecting a malfunction of a sensor for measuring an analyte concentration in vivo, wherein a series of measurement signals is produced by means of the sensor, and a value of a noise parameter is continually determined from the measuring signals, the noise parameter indicating how severely the measurement is impaired by interference signals. According to the invention, continually determined values of the noise parameter are used to determine how quickly the noise parameter changes, and the rate of change of the noise parameter is evaluated to detect a malfunction. | 10-04-2012 |
| 20120262184 | DISPLAY PANEL AND TESTING METHOD THEREOF - A display panel and a testing method of the display panel are provided. The display panel has a display region and a non-display region and includes a first substrate, a second substrate, and a display medium. The display panel further includes scan lines, data lines, pixel units, at least one testing line, and at least one testing pad. The scan lines and the data lines are located on the first substrate within the display region. The pixel units are located on the first substrate within the display region. Each pixel unit electrically connects one of the scan lines and one of the data lines. The testing line is located on the first substrate within the non-display region, crosses over the scan lines, and is insulated from the scan lines. The testing pad is located on the first substrate within the non-display region and electrically connected to the testing line. | 10-18-2012 |
| 20120274335 | BATTERY PACK, METHOD OF DETERMINING MALFUNCTION, AND A MALFUNCTION DECISION CIRCUIT - Application of rechargeable battery 1 charging voltage is determined by a signal applied to a battery-connect terminal | 11-01-2012 |
| 20120280696 | TEST CHIP AND CHIP TEST SYSTEM USING THE SAME - A chip test system including a chip under test, a test chip, and a test equipment is provided. The chip under test receives a test input data and provides a test output data according to the test input data. The test chip performs at least one of a skew test, a jitter test, and a setup/hold time test on the chip under test by using the test input data and determines whether a test result falls within a predetennined range. The test equipment provides the test input data and inputs the test input data into the chip under test through the test chip. | 11-08-2012 |
| 20120286796 | ACTIVE 2-DIMENSIONAL ARRAY STRUCTURE FOR PARALLEL TESTING - A structure and method is provided for testing a 2-dimensional array of electrical devices, such as a 2-dimensional array in the first metal level (M1) of an electronic structure. The method for testing the 2-dimensional array provides a parallel test approach. The test structure provides a plurality of test pad structures to implement the parallel test approach. The test pad structures may include field effect transistors. | 11-15-2012 |
| 20120286797 | ELECTROMAGNETIC WAVE MEASUREMENT DEVICE, MEASUREMENT METHOD, AND RECORDING MEDIUM - According to the present invention, an electromagnetic wave measurement device includes an electromagnetic wave output device, an electromagnetic wave detector and a measurement unit. The electromagnetic wave output device outputs an electromagnetic wave having a frequency equal to or more than 0.01 [THz] and equal to or less than 100 [THz] toward a device under test including at least two layers, and the electromagnetic wave detector detects reflected electromagnetic waves which are the electromagnetic waves reflected by the respective at least two layers. The measurement unit measures the device under test based on one or both of extreme values of electric fields of the respective reflected electromagnetic waves and a time difference between timings in which the electric fields of the respective reflected electromagnetic waves take the extreme values. | 11-15-2012 |
| 20120293182 | ELECTRICAL TEST APPARATUS FOR A PHOTOVOLTAIC COMPONENT - The present invention relates to electrical test apparatuses for photovoltaic components and methods of testing photovoltaic components. | 11-22-2012 |
| 20120299600 | TEST APPARATUS AND TEST METHOD - A test apparatus that tests a device under test outputting a data signal and a clock signal indicating a timing at which the data signal is to be sampled, the test apparatus comprising a data acquiring section that acquires the data signal output by the device under test, at a timing corresponding to a sampling clock corresponding to the clock signal output by the device under test or a timing of a timing signal corresponding to a test period of the test apparatus; a judging section that judges pass/fail of the device under test, based on a result of a comparison between the data signal acquired by the data acquiring section and an expected value; and a designating section that designates whether the data acquiring section acquires the data signal at the timing corresponding to the sampling clock or at the timing corresponding to the timing signal. | 11-29-2012 |
| 20120299601 | METHOD OF TESTING A SPUR SHORT CIRCUIT PROTECTION SYSTEM AND DIAGNOSTIC DEVICE FOR PERFORMING THE METHOD - A method of testing a short circuit protection system applied to a spur of an electric circuit, in which the short circuit protection system comprises a current limiting means which applies a current limit to said spur if the current thereon exceeds a spur current trip level, in which the electric circuit comprises a power supply and an isolation means adapted to fully or partially isolate the power supply from the electric circuit if the current thereon exceeds a power supply trip level for longer than a dead-band period, in which said method comprises the following steps: i) applying a test current demand to said short circuit protection system which has a current and duration sufficient for said spur current trip level to be exceeded, but a current insufficient for said power supply trip level to be exceeded and/or a duration insufficient to exceed said deadband period, ii) detecting if the current limiting means applies said current limit or not during said test current demand. | 11-29-2012 |
| 20120306509 | DIAGNOSTIC CIRCUIT AND METHOD OF TESTING A CIRCUIT - A diagnostic circuit for trouble shooting electronic control units of appliances includes a voltage sensing and signal generation device with an input/output and an input. The circuit includes first terminals for connecting to the load and second terminals for connecting to the two lines of the sinusoidal source. One of the first terminals is connected to the input/output, and another one of the first terminals is connected to the input. A relay is connected between one of the second terminals and the input/output. Another relay is connected between another one of the second terminals and the input. A first diode pair with clamping diodes is connected to the input/output, and a second diode pair first diode pair with clamping diodes is connected to the input. | 12-06-2012 |
| 20120319698 | RIPPLE SPRING AND DIAGNOSTIC METHOD THEREFOR - A ripple spring is provided having one or more conductive layers, and one or more non-conductive layers. The conductive layers and the non-conductive layers are laminated together to form a symmetrical stack of layers. A method is also provided for monitoring the ripple spring. The method includes the steps of providing a ripple spring that holds a winding in place, where the ripple spring is positioned at least partially within a stator slot defined within an electromechanical device. Providing a conductive layer disposed within the ripple spring, and generating signals from the conductive layer, the signals corresponding to at least one aspect of the ripple spring. An analyzing step analyses the signals to determine the at least one aspect of the ripple spring, wherein the at least one aspect facilitates an identification of faults in the ripple spring. | 12-20-2012 |
| 20130038334 | TEST STRUCTURE, METHOD AND CIRCUIT FOR SIMULTANEOUSLY TESTING TIME DEPENDENT DIELECTRIC BREAKDOWN AND ELECTROMIGRATION OR STRESS MIGRATION - Test structures for simultaneously testing for electromigration or stress migration fails and time dependent dielectric breakdown fails in integrated circuits, test circuits using four test structures arranged as a bridge balance circuit and methods of testing using the test circuits. The electromigration or stress migration portions of the test structures include via chains of wire segments connected in series by electrically conductive vias, the wire segments formed in at least two adjacent wiring levels of an integrated circuit. The time dependent dielectric breakdown portions of the test structures include digitized wire structures in one of the at least two adjacent wiring levels adjacent to a less than whole portion of the wire segments in the same wiring level as the digitized wire structures. | 02-14-2013 |
| 20130038335 | SWITCHING APPARATUS AND TEST APPARATUS - Provided is a switching apparatus comprising a contact point section that includes a first contact point; an actuator that includes a second contact point and moves the second contact point to contact or move away from the first contact point; and a control section that controls a first drive voltage. The actuator includes a first piezoelectric film that expands and contracts according to the first drive voltage and a support layer disposed on the first piezoelectric film. The control section causes the first piezoelectric film to contract by causing a change from a voltage that applies an electric field that is less than a first coercive electric field to a voltage that applies an electric field that exceeds the first coercive electric field, and causes the first piezoelectric film to expand by outputting a voltage that applies an electric field that is less than a second coercive electric field. | 02-14-2013 |
| 20130076369 | DETECTION CIRCUIT AND METHOD FOR OPERATING A DETECTION CIRCUIT - A detection circuit has a detection path and a control path. The detection path comprises a signal limiter ( | 03-28-2013 |
| 20130076370 | Diagnostic Circuit for Monitoring an Analog-Digital Converter Circuit - Described is monitoring of an analog-digital conversion of a measured value of at least one of a pressure gauge, a level gauge and a flowmeter. Different measured values can be provided for the analog-digital converter by means of a first microcontroller, wherein these measured values are subsequently transmitted from this first area into a second area by means of a unidirectional coupler. These values are acquired by a second microcontroller in the second area and compared with reference values that are stored in the second area or at another location. This diagnostic circuit may make it possible to detect drifts of resistances and of reference voltages, as well as a faulty analog-digital converter or a program execution error of the first microcontroller. | 03-28-2013 |
| 20130082716 | MONITORING MODULE AND METHOD FOR DETERMINING THE STATUS OF ELECTRICAL COMPONENTS - According to one example, there is provided a monitoring module for determining the status of electrical components in an array of N electrical components. The monitoring module comprises a resistance measurer to measure the resistance across a pair of diagnostic terminals, a comparator to compare the measured resistance with a set of reference resistances, and a diagnostic module to determine the status of at least one electrical component in the array based on the comparison. | 04-04-2013 |
| 20130082717 | METHOD AND APPARATUS FOR MEASURING PERFORMANCE OF ELECTRONIC DEVICE - A method and an apparatus for measuring performance of an electronic device are provided. The apparatus includes an electromagnetic wave measuring device for measuring an actual level of an electromagnetic wave of an electronic device, and an analysis controller for applying a previously stored level change value to the actual level of the electromagnetic wave to compute a measured level of the electromagnetic wave. The method and the apparatus for measuring performance of an electronic device can easily measure an electromagnetic wave level of the electronic device without using a device suggested by an international standard. | 04-04-2013 |
| 20130093431 | SENSOR READOUT WITH REDUNDANCY-CHECKING - A difference measurement circuit including a first port and a second port for connection to a first set of nodes and a second set of nodes of a sensor unit. The circuit further includes switching units for switching excitation signals emanating from excitation nodes from being applied to the first set of nodes via the first port to being applied to the second set of nodes via the second port and for switching differential measurement signals measured at sensing nodes from being obtained from the second set of nodes via the second port to being obtained from the first set of nodes via the first port. A corresponding method is described. The circuit further includes redundancy testing circuitry for evaluating the similarity or deviation between measurement signals obtained in different states of the switching units. | 04-18-2013 |
| 20130093432 | Disconnection Detection Circuit for Bridge Circuit and System Including Disconnection Detecting Means - In an existing disconnection detection circuit for a bridge circuit, consideration is not taken into the fact that an offset voltage or temperature characteristic of a bridge output is degraded. Provided is a disconnection detection circuit for a bridge circuit capable of suppressing a change in a characteristic of a sensor to a minimal extent. A disconnection detection circuit | 04-18-2013 |
| 20130154661 | ELECTRONIC COMPONENT INSPECTION APPARATUS - There is provided an electronic component inspection apparatus. The electronic component inspection apparatus includes a first rotation unit, rotatable based on a first rotating shaft, a plurality of second rotation units rotatably provided in the first rotation unit based on a second rotating shaft, and an inspection unit inspecting characteristics of an electronic component mounted in the second rotation unit. | 06-20-2013 |
| 20130154662 | TESTING SYSTEM AND METHOD FOR ELECTRONIC DEVICE - A testing system for testing an under test electronic device, includes a power supply status detection module, a temperature detection module, an error detection module, a storage unit, and a control terminal. The power supply status detection module detect power supply status of the under test electronic device and generates corresponding power signal. The temperature detection module detects temperature in the under test electronic device and generates corresponding temperature signal. The error detection module detects running error of the under test electronic device and generates corresponding error occurring signal. The storage unit stores the power signal, the temperature signal, and the error occurring signal. The control terminal picks out the power signal, the temperature signal, and the error occurring signal from the storage unit and analyzes these signals. | 06-20-2013 |
| 20130154663 | LENS MODULE ELECTRICAL TESTING SYSTEM AND TESTING METHOD - A lens module electrical testing system is set up and configured for testing lens modules. The lens module electrical testing system includes a circuit board, a LCR meter connecting with the circuit board, and a program controller connecting with the circuit board. The circuit board includes an electrical connecting portion and a microcontroller. The electrical connecting portion connects with the lens module. The program controller sends programs to the microcontroller. The microcontroller sends a control command to the LCR meter. The LCR meter tests the electrical properties of the lens module, and then determines the quality of the lens module corresponding to the control command by pass or fail. The present disclosure further provides a testing method for testing lens modules using the lens module electrical testing system. | 06-20-2013 |
| 20130169288 | APPARATUS AND METHOD FOR DETECTING FAILURE OF SWITCHING DEVICE IN INVERTER - Disclosed is an apparatus and method for detecting failure of a switching device in an inverter, the method including detecting a maximum value and a minimum value of a phase current inputted into a motor from synchronous angle information of the motor through a switching device in a predetermined leg of the inverter unit, and detecting failure of the switching device of the leg through an asymmetry ratio of the phase current. | 07-04-2013 |
| 20130169289 | METHOD AND APPARATUS FOR TESTING IN FIELD WIND TURBINES - A method for testing in field a wind turbine. The wind turbine being configured for providing power at a given rated voltage and at a rated frequency of 50 or 60 Hz; the method comprising connecting the wind turbine to an electric grid of a given rated voltage and of a rated frequency of 50 or 60 Hz through a conversion device that allows the adaptation of the features of the electric grid at the wind turbine side of said conversion device to the conditions requested by the tests to be performed to the wind turbine; that adaptation including the adaptation of the rated frequency of the electric grid to the rated frequency of the wind turbine, when they are different, so that identical tests to wind turbines configured for different rated frequencies can be performed in the same site. | 07-04-2013 |
| 20130169290 | APPARATUS AND METHOD TO DETECT A SERIES ARC FAULT OF AN ELECTRICAL CIRCUIT - An apparatus is for a power circuit providing an alternating current to a load. The apparatus includes a high frequency current sensor structured to cooperate with the power circuit to provide a high frequency current signal. A voltage zero crossing detector is structured to cooperate with the power circuit to provide a voltage zero crossing signal. A high pass filter is structured to provide a filtered current signal from the high frequency current signal. A threshold comparator is structured to provide an output when the filtered current signal exceeds a predetermined value. A processor is structured to receive the voltage zero crossing signal and the output of the threshold comparator and output a trip signal in response to undesired series arcing by detecting an unsymmetrical high frequency signal for a predetermined number of cycles. | 07-04-2013 |
| 20130187663 | LOW-VOLTAGE TESTING DEVICE FOR HIGH-VOLTAGE FREQUENCY CONVERTER OF SERIAL SUPERPOSITION VOLTAGE TYPE - A low-voltage testing device for a high-voltage frequency converter of a serial superposition voltage type including a tap transformer, power portion, monitoring box, analog interface board, voltage detecting portion and remote control portion, in which the tap transformer is connected to the power portion, the power portion is connected to the voltage detecting portion, the monitoring box is connected to the power portion via an optical fiber and the analog interface board is connected to the monitoring box and the remote control portion respectively. | 07-25-2013 |
| 20130193980 | SYSTEM AND METHOD FOR FUNCTIONAL VERIFICATION OF MULTI-DIE 3D ICs - A system and method is disclosed for functional verification of multi-die 3D ICs. The system and method include a reusable verification environment for testing each die in a stack of dies individually without having to simultaneously operate all of the dies in the stack. The system and method includes converting an input/output (“IO”) trace from a die verification test from a first format to a second format to improve performance. | 08-01-2013 |
| 20130193981 | SWITCHED CAPACITOR COMPARATOR CIRCUIT - A circuit including a first switch receiving an input reference voltage, a second switch receiving an input testing voltage, the first switch and the second switch are electrically connected in parallel. The circuit further includes a first capacitor electrically connected in series with the first switch and the second switch. The circuit further includes a feedback stage comprising a feedback inverter electrically connected in parallel with a feedback switch, where the feedback stage is electrically connected in series with the first capacitor. The circuit further includes a first inverter electrically connected in series to the feedback stage, and a third switch electrically connected in series with the first inverter. The circuit further includes a second inverter electrically connected in parallel to a third inverter, the second inverter and the third inverter are electrically connected in series to the third switch, and the third inverter outputs a first output signal. | 08-01-2013 |
| 20130207665 | SENSOR FAULT DETECTION SYSTEM AND METHOD - Fault detection techniques for control of sensor systems. A sensor control integrated circuit (“IC”) may include a fault detection system for coupling to the sensor supply lines. The system may detect faults for each of the sensor supply lines. The fault detection system may level shift sensor supply line signals from a first voltage domain to a second voltage domain appropriate for the fault detection system of the controller IC. The fault detection system may level shift source potential voltages from the first voltage domain to the second voltage domain to detect predetermined fault types. The fault detection system may compare the second domain voltages from the sensor supply lines to voltages representing predetermined fault types and may generate fault status indicators based on the comparison. | 08-15-2013 |
| 20130214793 | ELECTRICAL DIAGNOSTIC TOOL - A diagnostic tool for monitoring a component in a load electrical circuit is provided. The diagnostic tool includes a housing containing a relay, at least one electrical sensor, a computer readable memory and a processor. The relay is configured for selectively open and close the load electrical circuit according to a control electrical circuit. The at least one sensor is configured to measure current and/or voltage in the load electrical circuit and to generate signals corresponding to the electrical load drawn through the load electrical circuit. The processor is in electrical with the sensor or sensors and the computer readable memory for storing data in the computer readable memory corresponding to the signals generated by the sensor. | 08-22-2013 |
| 20130214794 | MISALIGNMENT DETECTION DEVICES - A misalignment detection device comprising a first substrate, at least one integrated circuit, a second substrate, a third substrate, and at least one detection unit. The at least one integrated is disposed on the first substrate in a first pressing region. The third substrate is disposed on the first substrate in a second pressing region and on the second substrate on the second substrate in a third pressing region. The at least one detection unit outputs a fault signal in response to a positioning shift occurring in at least one of the first, second, and third pressing regions. | 08-22-2013 |
| 20130221978 | Light Emitting Device Control Circuit and Short Detection Circuit Thereof - The present invention discloses a light emitting device control circuit and a short detection circuit. The light emitting device control circuit controls a light emitting array which includes a plurality of light emitting device strings. Each light emitting device string includes a first terminal which is connected to a common node, a second terminal, and a plurality of light emitting devices connected in series. The light emitting device control circuit includes: a short detection circuit, coupled to the second terminals to receive second terminal signals from the second terminals, generating comparison signals according to whether the second terminal signals are higher than a reference signal, and generating a short detection signal according to whether a number of the comparison signals is between a first setting value and a second setting value. | 08-29-2013 |
| 20130221979 | TECHNIQUES FOR IMPROVING RELIABILITY OF A FAULT CURRENT LIMITING SYSTEM - Techniques for improving reliability of a superconducting fault current limiting system (SCFCL) are provided. In one particular exemplary embodiment, the technique may be realized as a method of improving a reliability of a superconducting fault current limiting system (SCFCL), the SCFCL system comprising a superconductor provided in a container. The method may comprise providing one or more sensors capable of detecting a fault current proximate to the superconductor; determining a change in the condition of the superconductor as a result of the fault current; and estimating the lifetime of the superconductor based on the change in the condition of the superconductor. | 08-29-2013 |
| 20130221980 | APPARATUS AND METHOD FOR PERFORMING BURST TRIGGERING IN A TEST AND MEASUREMENT INSTRUMENT - A test and measurement apparatus, system, and method for synchronizing an acquisition or triggering system to a specific burst of interest. The subject apparatus and method triggers on varying energy content of a signal qualified by time in the presence of high-frequency input signal bursts, by using an adjustable pulse width envelope detector, disposed in the signal path of the trigger circuitry, as a digital rectifier or to otherwise process and extract an envelope signal. An RF envelope probe having an analog envelope detector among other suitable components is disclosed. A method is implemented for isolating an interval of interest in a signal under test. An envelope detector circuit produces an envelope signal from the signal. Trigger circuitry receives the envelope signal from the envelope detector, and isolates the interval of interesting in the signal under test using the envelope signal. | 08-29-2013 |
| 20130229190 | TEST CHIP, TEST BOARD AND RELIABILITY TESTING METHOD - Multiple test circuits are formed in a test board for each test chip. Alternatively and/or additionally, a test circuit extends through at least two layers among metallization layers of the test chip. | 09-05-2013 |
| 20130229191 | METHOD AND DEVICE FOR TESTING AN ELECTRONIC APPLIANCE - A method and a device for testing an electronic appliance for determining at least one variable of a system. The electronic appliance is designed in the form of a sensor. The method includes defining an expected minimum and/or maximum value of the variable and producing an electric signal by means of the electronic appliance depending on the variable. The method also includes detecting at least one value of a parameter of the produced electric signal and defining an expected minimum and/or maximum value of the parameter depending on the defined minimum and/or maximum value of the variable of the system. A determination is made, based on whether the detected value of the parameter is greater than the minimum value defined for the parameter and/or smaller than the maximum value, whether there is a malfunction of the electronic appliance provoked by an external electromagnetic interference field. | 09-05-2013 |
| 20130234723 | APPARATUS AND METHOD FOR TESTING A PLURALITY OF DEVICES UNDER TEST - Embodiments of the invention relate to an apparatus and a method for testing a plurality of devices under test. The apparatus for testing a plurality of devices under test comprises a common device output line and a driver unit configured to provide a stimulus to the DUTs. The driver unit is configured such that the stimulus reaches different DUTs at different times, thereby creating stimuli time shifts at the DUTs. The apparatus further comprises a receiver unit electrically coupled to the common device output line and a plurality of DUTs connections, electrically coupled to the common device output line, so that DUT terminals of the plurality of DUTs are electrically coupleable via the common device output line to the receiver unit. Output signal propagation delays for DUT output signals, propagating from the DUT connections to the receiver unit, are adapted to the stimuli time shift, such that a test of DUTs which have identical stimulus response delays, results in a temporally aligned superposition of the DUT output signals at the receiver unit. | 09-12-2013 |
| 20130234724 | DISCRIMINATING APPARATUS, DISCRIMINATING METHOD AND DISCRIMINATING SYSTEM - A discriminating apparatus includes a discrimination section configured to discriminate the presence or absence of an abnormality, in accordance with information on power generation from a power generation section. | 09-12-2013 |
| 20130241570 | Monitoring device and monitoring method for rotary encoder - Disclosed is a monitoring device for a rotary encoder electronically connectable to the monitoring device. A pulse generating unit generates a comparison pulse signal by extracting a portion corresponding to a specific phase range from a first pulse included in a first pulse signal output from the rotary encoder. The rotary encoder detects rotation of a rotating body and outputs the first pulse signal and a second pulse signal, the first pulse signal and the second pulse signal having a phase difference from each other. A determining unit determines an abnormality of the rotary encoder, based on a state of a pulse of the comparison pulse signal at a specific timing of a second pulse included in the second pulse signal. | 09-19-2013 |
| 20130257447 | PORTABLE ELECTRONIC DEVICE - A portable electronic device includes a functional section that operates in first and second modes, a current measurement section that measures a current supplied to the functional section, and an abnormality detection section that confirms the current in a first cycle, a second cycle, or a third cycle, and detects current abnormality. When the functional section operates in the first mode, the abnormality detection section confirms the current in the first cycle, next, when the functional section is switched from the first mode to the second mode, the abnormality detection section confirms the current in the second cycle, and when the abnormality detection section does not detect the current abnormality for a predetermined period after the mode has been switched, the abnormality detection section confirms the current in the third cycle. | 10-03-2013 |
| 20130265060 | On-Chip Test Technique for Low Drop-Out Regulators - A circuit and method is described for automatically testing multiple LDO regulator circuits on an integrated circuit chip independent of an ATE. Each LDO regulator is tested for voltage at a specified current output capability, wherein the output driver transistor is formed by at least two pass transistors, which are each tested for voltage output at a particular current capability. The test results are delivered back to the ATE and for a failed test, the gate voltage of the pass device can be observed through an analog multiplexer to enable debug. | 10-10-2013 |
| 20130265061 | METHOD AND APPARATUS FOR MANAGING ELECTRONIC APPLIANCE - A method and apparatus for managing an electronic appliance, which determines an abnormality of the electronic appliance, such as a malfunction or worn out of the electronic appliance, based on power consumption information measured in the electronic appliance while an operation requested by a user of the electronic appliance is performed by the electronic appliance, and past power consumption information about the same operation performed by the same electronic appliance, and a non-transitory computer-readable recording medium having recorded thereon a program to execute the method. | 10-10-2013 |
| 20130271152 | INTERFACE UNIT, CONVEYING SYSTEM AND METHOD - The invention relates to an interface unit, a conveying system and a method. The interface unit comprises an input circuit for the signal determining the safety of the conveying system. The interface unit further comprises means for testing the operating condition of the input circuit. | 10-17-2013 |
| 20130278273 | METHOD AND DEVICE FOR DETECTING SHORT CIRCUIT - In a charge cable which can be connected to an electric charging device to charge a battery of an electric vehicle, a method for detecting a short-circuit selects a first voltage value for a test voltage. By applying this test voltage to the charge cable, testing is carried out to determine whether there is a short-circuit , a fault signal is output; if there is a no short-circuit, the test voltage is increased incrementally up to a maximum voltage value. The increased test voltage is used to test whether there is a short-circuit in the charge cable or in the contact connected to the charge cable. | 10-24-2013 |
| 20130307558 | TEST DEVICE, TEST SYSTEM AND METHOD FOR TESTING A POWER ENGINEERING TEST OBJECT - In order to test a power engineering test object ( | 11-21-2013 |
| 20130307559 | Intelligent Current Analysis for Resonant Converters - A new method of extracting information from a current waveform for the purpose of controlling a resonant converter is presented. The information could also be used for the purpose predicting the inductance and load of a circuit to indicate alignment in a inductive charging system. | 11-21-2013 |
| 20130307560 | SHEET SUBSTRATE, ELECTRONIC PART, ELECTRONIC APPARATUS, METHOD FOR TESTING ELECTRONIC PARTS, AND METHOD FOR MANUFACTURING ELECTRONIC PARTS - A sheet substrate includes a plurality of substrate regions arranged in a matrix, an integrated circuit disposed in each of the substrate regions, and a first implementation electrode and a second implementation electrode disposed in each of the substrate regions and electrically connected to the integrated circuit. The sheet substrate according to an embodiment of the invention further includes first terminals to each of which the first implementation electrodes arranged in a row of part of the substrate regions are connected in parallel to each other and second terminals to each of which the second implementation electrodes arranged in a column of part of the substrate regions and can activate an arbitrary one of the integrated circuits that is specified by selected ones of the first terminals and the second terminals. | 11-21-2013 |
| 20130314100 | Device and Method for Detecting State of Overload and Overcurrent Protector - A device and method for detecting a state of a load overcurrent protector are disclosed. The above-mentioned device includes: an input module ( | 11-28-2013 |
| 20130320994 | ELECTRODE TESTING APPARATUS - An apparatus to infer the resistivity of an electrode by stimulating the electrode with a capacitively coupled signal, and processing the resultant signal with circuitry that produces a signal having an amplitude that is a function of the resistivity of the electrode. | 12-05-2013 |
| 20130335099 | STRUCTURE AND METHOD FOR DYNAMIC BIASING TO IMPROVE ESD ROBUSTNESS OF CURRENT MODE LOGIC (CML) DRIVERS - An integrated circuit having a CML driver including a driver biasing network. A first output pad and a second output pad are connected to a voltage pad. A first driver is connected to the first output pad and the voltage pad. A second driver is connected to the second output pad and the voltage pad. A first ESD circuit is connected to the voltage pad, the first output pad, and the first driver. A second ESD circuit is connected to the voltage pad, the second output pad, and the second driver. The first ESD circuit biases the first driver toward a voltage of the voltage pad when an ESD event occurs at the first output pad, and the second ESD circuit biases the second driver toward the voltage of the voltage pad when an ESD event occurs at the second output pad. | 12-19-2013 |
| 20130335100 | Method for Checking the Proper Method of Operation of a Current Sensor - The disclosure describes a method for checking the proper method of operation of a current sensor which is designed to measure a battery current. During a precharge phase which begins at a time at which at least one electrical component is connected to a battery and during which the electrical component is precharged by a precharge current, at least one measured value provided by the current sensor is compared with an expected current value determined from an expected temporal profile of the precharge current. The disclosure also describes a computation unit and a battery which are designed to carry out the method according to the disclosure. | 12-19-2013 |
| 20130335101 | TEST APPARATUS - A test apparatus for testing a device under test, includes a low-speed comparator, a high-speed comparator that is operable faster than the low-speed comparator, and a switching section that switches, according to a signal output from the device under test, which one of the low-speed comparator and the high-speed comparator is used to measure a signal under measurement output from the device under test. The test apparatus may further include a termination resistance that is arranged in parallel with the high-speed comparator. | 12-19-2013 |
| 20140002099 | PARTIAL DISCHARGE SENSOR | 01-02-2014 |
| 20140002100 | SURGE PROTECTION CIRCUIT AND METHOD FOR TESTING A SURGE PROTECTION CIRCUIT | 01-02-2014 |
| 20140002101 | UNIVERSAL MATE-IN CABLE INTERFACE SYSTEM | 01-02-2014 |
| 20140009166 | Monitoring Circuit with a Signature Watchdog - A method can be used for monitoring a processing circuit. The processing circuit generates a response to a request and the response is compared with an expected response. A pass pulse is generated when the response matches the expected response. The causing, comparing and generating steps are repeated a number of times A frequency at which pass pulses occur is evaluated. | 01-09-2014 |
| 20140015540 | Method for Ascertaining at least one Malfunction of a Conductive Conductivity Sensor - A method and a sensor for ascertaining at least one malfunction of a conductive conductivity sensor having at least two electrodes applying a first electrical variable to the electrodes measuring at least a second electrical variable on the electrodes and deciding whether a malfunction is present based on measuring the second electrical variable. The second electrical variable is located in a first range when measuring the medium when no malfunction is present, and the second electrical variable is located in a second range in the case of a first malfunction, especially when the conductivity sensor is located at least partially outside of the medium, and the second electrical variable is located in a third range when a second malfunction is present, especially an electrode break or a break in a line to the electrodes. | 01-16-2014 |
| 20140015541 | ELECTRIC FIELD MEASURING DEVICE - In the electric field measuring device, a DC bias circuit applying a DC bias voltage to an optical intensity modulator is disposed in an area, and a DC bias control portion controlling a DC bias voltage is disposed outside the area. An electrical signal of a DC bias voltage which is output from the DC bias control portion is converted into an optical signal by an electrical-optical converter (E/O) so as to be introduced into the area via an optical fiber, and the optical signal is converted into an electrical signal by an optical-electrical converter (O/E) disposed in the area such that the electrical signal is input to the DC bias circuit. | 01-16-2014 |
| 20140021963 | TEST SYSTEM - A reflectometer for allowing a test of a device, the reflectometer comprising: a source of pulsed radiation; a first photoconductive element configured to output a pulse in response to irradiation from said pulsed source; a second photoconductive element configured to receive a pulse; a transmission line arrangement configured to direct the pulse from the first photoconductive element to the device under test and to direct the pulse reflected from the device under test to the second photoconductive element; and a termination resistance provided for said transmission line configured to match the impedance of the transmission line. | 01-23-2014 |
| 20140028324 | CUBICLE TYPE GAS INSULATED SWITCHGEAR MONITORING AND DIAGNOSIS SYSTEM - The disclosure relates to a cubicle type gas insulated switchgear monitoring and diagnosis system that is able to remotely monitor and diagnose the state by measuring and analyzing in real time deterioration of a gas section and the operation state and the integrity assessment of a breaking unit in a cubicle gas insulated switchgear. The system includes the cubicle gas insulated switchgear, a Slave Data Acquisition System connected to the cubicle gas insulated switchgear, and a Master Data Acquisition System that determines deterioration of the cubicle type gas insulated switchgear and the operation state and the integrity assessment of the breaking unit by receiving and analyzing the sensing data from the S-DAS. | 01-30-2014 |
| 20140043036 | DETECTION CIRCUIT AND DETECTION METHOD - The present disclosure provides a detection circuit and a detection method. The detection circuit used for detecting an electrostatic discharge (ESD) protective device that is inversely soldered, the ESD protective device includes a first diode, a second diode, and a third diode; the cathodes of the first diode, the second diode and the third diode are mutually connected, and an anode of the third diode is coupled to a ground terminal of the circuit by a divider resistor. The detection circuit includes a comparator. The comparator is configured with a first input end connected to the reference voltage and a second input end coupled to the anode of the third diode, and an output end of the comparator is coupled to a warning device. | 02-13-2014 |
| 20140043037 | ANTENNA TESTING DEVICE AND ANTENNA TESTING UNIT THEREOF - An antenna testing unit is provided. The antenna testing unit includes a ground element and a radiator. The radiator includes a body, a first radiator unit and a second radiator unit. The body corresponds to the ground element. The first radiator unit is connected to the body, comprising a first wing shaped portion and a second wing shaped portion, wherein a shape of the first wing shaped portion is symmetrical to a shape of the second wing shaped portion. The second radiator unit is connected to the body, and comprises a first section and a second section, wherein the first section extends toward the first wing shaped portion, and the second section extends toward the second wing shaped portion. | 02-13-2014 |
| 20140043038 | TESTING SYSTEM AND TESTING METHOD FOR TOUCH DEVICE - A testing system for a touch device includes a touch simulation module, a control module and a determination module is provided. The touch simulation module includes multiple conductive elements respectively corresponding to multiple touch sensing regions of the touch device. The control module selectively provides a testing signal to one or multiple of the conductive elements. The determination module determines whether the touch device correctly responds a testing that the control module provides to the device under testing through the touch simulation module. | 02-13-2014 |
| 20140043039 | IMPEDANCE MEASUREMENT SYSTEM, IMPEDANCE MEASUREMENT METHOD AND PROGRAM - A condition input device inputs a measurement condition and the information of an electronic apparatus to be measured. A measurement operation program device selects a program that causes the electronic apparatus to perform an measurement operation based on the information of a measuring target object and the measurement condition. A voltage measurement device measures a voltage variation generated by the power source of the electronic apparatus. A wave form calculating device performs an arithmetic processing, such as a filtering processing or a time-frequency conversion (e.g. Fourier conversion) for the measured voltage variation to obtain the frequency characteristics of the voltage variation. An impedance calculating device calculates an impedance from the frequency characteristics of the voltage variation and the frequency characteristics of current and the condition of the measurement operation program. | 02-13-2014 |
| 20140062499 | TESTING APPARATUS FOR DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - A testing apparatus for a display device according to an embodiment of the present invention includes: a substrate; a driving chip mounted on the substrate; and a pad disposed on the substrate and electrically connected to the driving chip, wherein the pad includes a bottom layer electrically connected to the driving chip, and a sheet layer disposed on the bottom layer and electrically connected to the bottom layer, and wherein a lateral surface of the bottom layer is not covered by the sheet layer. | 03-06-2014 |
| 20140062500 | METHOD AND SYSTEM FOR DETECTING AN ARC FAULT IN A POWER CIRCUIT - A method of detecting an arc fault in a power circuit includes injecting an AC-signal into the power circuit and measuring a response signal that is related to the injected AC-signal in the power circuit. The method further includes determining a frequency response of the power circuit from the response signal, analyzing the frequency response, and identifying a preferred frequency. A signal related to AC-current flowing in the power circuit within the preferred frequency range is measured and an occurrence of an arc fault in the power circuit is signaled depending on the measured signal. A system for detecting an arc fault is designed to perform a method as described before. | 03-06-2014 |
| 20140070816 | TEST APPARATUS WITH PHYSICAL SEPARATION FEATURE - A test apparatus with physical separation feature is disclosed. The test apparatus includes probes ( | 03-13-2014 |
| 20140070817 | TESTING OF OPTICAL DEVICES - The present disclosure describes techniques for testing optical devices in a manner that, in some implementations, simulates the environment in which the devices will be used when they are integrated into the end-product or system. For example, one aspect includes providing a transparent sheet that is positioned near the optical device in a manner that simulates at least some aspects of the environment when the device is incorporated into the end-product or system. The testing can be performed, for example, while the optical devices are in production or at some other time prior to their being integrated into an end-product or system. | 03-13-2014 |
| 20140084938 | SENSING ELEMENT AND SIGNAL SENSING DEVICE WITH THE SAME - A sensing element suitable for sensing an interference signal radiated by an object under test is provided, including a substrate, a ground plane and a sensing antenna. The ground plane is disposed on a first surface of the substrate. The sensing antenna is disposed on the first surface of the substrate and is located on a first side of the ground plane. The sensing antenna and the ground plane are separated by a preset distance. Besides, the sensing antenna is electrically connected to the ground plane through a coaxial wire and receives the interference signal through the ground plane. | 03-27-2014 |
| 20140084939 | Condition estimation device and method of generating open circuit voltage characteristic - A condition estimation device includes a voltage measurement circuit, memory, and a controller. The voltage measurement circuit measures an open circuit voltage (OCV) of an electric storage device. The memory is configured to store first information on a correlation between a positive electrode potential and an electric storage capacity and second information on a correlation between a negative electrode potential and an electric storage capacity. The controller is configured to: measure an OCV under charge or discharge; calculate an electric storage capacity of the electric storage device having the OCV equal to a reference voltage; correct at least one of the first information and the second information such that a potential difference at the calculated capacity is equal to the reference voltage; and generate an OCV characteristic based on the first and the second information after the at least one of the first and the second information is corrected. | 03-27-2014 |
| 20140111221 | TESTING DEVICE AND METHOD - A testing method tests the performance of a disc loading and transferring mechanism having a tray. The testing method includes steps of transmitting tray-out and tray-in instructions in that order, to drive the tray between a closed position and an opened position, detecting when the tray reaches the opposing position, counting the number of operations of the tray alternating between a closed position and an opened position; determining when the number of counts is equal to a predetermined number and outputting test results when the actual count is equal to a predetermined number or when the count is interrupted by malfunction. | 04-24-2014 |
| 20140118000 | CURRENT DIFFERENTIAL PROTECTION - A current differential protection system for a multi-terminal power line includes a current sensor for sensing a current at a local terminal, a controller for time synchronizing the local terminal and remote terminals, and a fault detection module to detect a fault in the multi-terminal power line if a differential current exceeds a threshold value. The controller includes a time measurement exchange module for exchanging time stamp data with remote terminals, an upper range clock for exchanging time stamp data with remote terminals and a lower range clock for indexing the current at the local terminal. A first time period of the upper range clock is N times a second time period of the lower range clock where N is a number of multi-terminals. The controller includes a clock offset calculation module for determining an average time offset based on time stamp data from remote terminals and the local terminal. | 05-01-2014 |
| 20140118001 | FAULT CURRENT DETECTING CIRCUIT - The fault current detecting circuit includes: a current detection unit that outputs a current detection signal; a first comparing circuit unit that compares the current detection signal with a predetermined reference current value and outputs a first output signal; a differentiator that differentiates the current detection signal to output a change slope of the current detection signal; a second comparing circuit unit that compares the change slope with a predetermined reference change slope value and outputs a second output signal; a third comparing circuit unit that compares the current detection signal with a predetermined current detection limit reference value and output a third output signal; and a trip determining unit that outputs a trip control signal only when the first output signal and the second output signal are maintained to be received and the third output signal is not received. | 05-01-2014 |
| 20140125351 | METHOD AND APPARATUS FOR TESTING UTILITY POWER DEVICES - An apparatus for performing measurements on a utility power device that shares a common ground with the apparatus selectively sends a first high voltage signal via a first lead to a first terminal of the utility power device, measures a first corresponding signal returned via a second lead of the apparatus from a second terminal of the utility power device. While the corresponding first lead and the second lead of the apparatus remain electrically coupled to the corresponding first and the second terminal of the utility power device. The apparatus selectively sends a second high voltage signal via the second lead to the second terminal of the utility power device, and measures a second corresponding signal returned via the first lead of the apparatus from the first terminal of the utility power device. | 05-08-2014 |
| 20140132279 | APPARATUS AND METHOD FOR INSPECTING INFRARED SOLID-STATE IMAGE SENSOR - An apparatus includes: a current control unit to control an amount of constant current and supply a first and second constant currents to an infrared detection pixel; a constant current supply time control unit to control periods of time in which the first and second constant currents are supplied to the infrared detection pixel; an A-D converter to convert a first and second electrical signals from the infrared detection pixel into a first and second digital signals, the first and second electrical signals being generated when the first and second constant currents is supplied to the infrared detection pixel, respectively; a subtracting unit to calculate a difference between the first and second digital signals; and a determining unit to determine whether the infrared detection pixel is a defective pixel based on the absolute value of the difference calculated by the subtracting unit. | 05-15-2014 |
| 20140139234 | Methods for diagnosing the condition of an electrical system - Diagnosing the condition of an electrical system during operation may comprise identifying the intended operating status of the system, measuring an electrical consumption in the system, comparing the measured electrical consumption at least with one predetermined electrical consumption that is associated to the intended operating status of the system, and diagnosing the condition of the system based on the comparison. | 05-22-2014 |
| 20140145728 | METHOD AND SYSTEM FOR DETECTING A SHORT CIRCUIT AFFECTING A SENSOR - A method of detecting a short circuit affecting a sensor, at least one terminal of the sensor being connected to a bias resistor, includes: applying to at least one bias resistor at least one test bias voltage having at least one predefined characteristic that is different from a corresponding characteristic of a nominal bias voltage of the resistor; measuring a resulting differential voltage across the terminals of the sensor; and as a function of at least one characteristic of the measured differential voltage corresponding to the predefined characteristic of the test bias voltages, determining whether the sensor presents a short circuit. | 05-29-2014 |
| 20140159741 | Method for Producing an Arc Detection Signal and Arc Detection Arrangement - A method for producing an arc detection signal on the basis of a plurality of observation signals comprises producing an arc detection part-signal for each of at least two observation signals. Producing each of the part-signals includes correlating the respective observation signal with a correlation signal by influencing the correlation signal with the respective observation, thereby producing a correlation result; producing or modifying a coefficient on the basis of the correlation result; and weighting the respective observation signal with the coefficient. The arc detection part-signals are added to form the arc detection signal. | 06-12-2014 |
| 20140176153 | MONITORING CIRCUIT AND SYSTEM FOR ESD PROTECTION DEVICE - A monitoring circuit and a monitoring system for electrostatic discharge (ESD) protective device are disclosed herein. The monitoring circuit includes an oscillating unit, a signal processing unit and a comparator. The oscillating unit includes a first monitoring end and a second monitoring end. The first monitoring end is configured to be electrically connected to an ESD protective device. The second monitoring end is configured to be electrically connected to ground. When the first monitoring end is not electrically contacted to a user's body or the second monitoring end is not connected to ground, the oscillating unit is configured to output an oscillating signal. The signal processing unit is electrically connected to the oscillating unit, and is configured to output a first voltage according to the oscillating signal. The comparator is configured to compare the first voltage and a reference voltage, and correspondingly output an alarm signal. | 06-26-2014 |
| 20140184237 | PACKAGED DEVICE FOR DETECTING FACTORY ESD EVENTS - An ESD monitor device may take the form of an integrated circuit with a plurality of monitor components available at each I/O site of the ESD monitor device. Each monitor component has a physical structure which provides scalable ESD robustness. The monitor components are connected in parallel to an ESD bus. An integrated circuit may be formed by processing an ESD monitor device through one or more process steps of an integrated circuit manufacturing line, and subsequently measuring the ESD monitor device. Parameters of a process step of the manufacturing line may be adjusted to reduce ESD events at the process step, based on measurement results from the ESD monitor device. The integrated circuit may subsequently be processed through the adjusted process step. | 07-03-2014 |
| 20140191766 | DEVICE AND METHOD FOR MONITORING THE STATE OF A SYSTEM COMPONENT - In order to detect the current state of a system component, e.g. to display whether an electrical conductor, a cable or the like, is currently live, a field generator that generates a magnetic field in the environment of the system part is provided, which generator is connected to an organic magnetoresistive OMR semiconductor element that is arranged stationary in the environment of the system component to be monitored, and a voltage source for generating an electrical voltage between two electrodes of the OMR semiconductor element is provided. The device and the method can be fitted in a simple manner and cost-effectively to almost any system part, even at a later stage to already existing systems. A corresponding display shows the desired information locally limited and in the simplest manner: if the electric conductor is currently energized, an additional evaluation is not necessary. | 07-10-2014 |
| 20140197845 | APPARATUS FOR INSPECTING TOUCH PANEL AND METHOD THEREOF - Disclosed herein is an apparatus for inspecting a touch panel and a method thereof, the apparatus includes: a capacitance measuring unit measuring capacitance value of a number of regions set on a touch panel, and a defect determining unit determining whether or not a specific region is defective, by comparing the capacitance value of the specific region with the capacitance value of an adjacent region. According to the present embodiments, a touch panel having an improved defect detection ability and a method thereof, by comparing with capacitance of regions adjacent to each other, are provided. | 07-17-2014 |
| 20140203816 | ELECTRONIC TESTING METHOD OF IN-CELL TOUCH SCREEN - A method of electrically testing an in-cell touch screen is disclosed. The in-cell touch screen includes a display electrode, a driving line, and a detecting line. The detecting line intersects the driving line. The method includes floating the display electrode and performing at least one of: A) applying a first predetermined voltage to one column of adjacent columns of the driving line or one row of adjacent rows of the driving line, and grounding the other column of the adjacent columns or the other row of the adjacent rows, and B) applying a second predetermined voltage to one column of adjacent columns of the detecting line or one row of adjacent rows of the detecting line, and grounding the other column of the adjacent columns or the other row of the adjacent rows. The method also includes determining whether the driving line or the detecting line is shorted or opened. | 07-24-2014 |
| 20140232415 | PROTECTION AND CONTROL SYSTEM, AND MERGING UNIT - A protection and control system includes a first merging unit which obtains an electric variable from a transformer installed in an electric power system, and digitally converts the obtained electric variable to output the converted electric as first electric variable information to a network, and a plurality of protection and control devices, each of which obtains the first electric variable information from the first merging unit through the network, judges whether or not a system fault occurs in a zone to be protected of the electric power system based on a predetermined relay characteristic, and outputs main trip information to the network when that the system fault occurs is judged, wherein the first merging unit judges whether or not the system fault occurs in the zone to be protected. | 08-21-2014 |
| 20140239970 | THERMOCOUPLE OPEN-CIRCUIT DETECTION CIRCUIT AND METHOD - A method for detecting an open-circuit in an external thermocouple network includes these steps: (a) injecting a current pulse of a predetermined duration into the external thermocouple network; and (b) measuring the voltage across the pair of terminals after a time period following the predetermined duration. In one example, the time period is sufficiently long to allow the current pulse to dissipate from the external thermocouple circuit when a thermocouple in the external thermocouple network does not have an open circuit. The thermocouple network may include a resistor-capacitor network provided between the thermocouple and one of the terminals. | 08-28-2014 |
| 20140239971 | DEBUGGING CIRCUIT AND CIRCUIT BOARD USING SAME - A debugging circuit outputs a plurality of control signals to a chip, the chip outputs a data signal according to the plurality of control signals. The debugging circuit comprises a resistor unit and an adjusting unit. The resistor unit comprises a plurality of resistors, each resistor is electrically connected to one input pin of the chip. The adjusting unit comprises a plurality of control terminals and a switch sub-unit. Each control terminal corresponds to one resistor and one input pin, the switch sub-unit is selectively connected to a first power source or a ground, and the plurality of control terminals output different control signals to the plurality of input pins according to voltage levels of the switch sub-unit | 08-28-2014 |
| 20140266239 | DIAGNOSABLE SLIDE SWITCH - A seatbelt restraint system includes a seatbelt buckle housing having a printed circuit board, a slider, and an ejector. The printed circuit board includes a circuit where the output signal can be altered in response to translation of the ejector and the slider. A predetermined voltage can be applied to the circuit and the output signal can be detected in the circuit to determine the position of the ejector and the slider based on the detected altered output signal. In the event of a fault in the system, the resultant output signal of the circuit will be different than the expected output signal of the buckled and unbuckled states. | 09-18-2014 |
| 20140266240 | Systems and Methods for Energy Harvesting and Current and Voltage Measurements - A harvesting and measurement device is operable in at least a normal operation mode, a demand measurement mode, and a fault measurement mode. In the normal operation mode, the device is able to harvest energy from an associated power line and monitor current and voltage conditions through a lower power circuit. In the demand measurement mode, harvesting elements of the circuit are disabled so as not to interfere with accuracy of demand current measurements. In the fault measurement mode, one or more Hall sensors are activated such that high currents can be accurately measured. | 09-18-2014 |
| 20140266241 | APPARATUS TO VERIFY AN ELECTRICALLY SAFE WORK CONDITION - An apparatus for electrical safety is disclosed. A system and an alternate apparatus also perform the functions of the apparatus. The apparatus includes a test point accessible from an exterior of an enclosure while the enclosure is in a closed state. The enclosure houses one or more electrical components and the closed state prevents a user from touching the one or more electrical components. The apparatus includes a test conductor connected to a point on a conductor connected to an electrical component of the one or more electrical components where the test conductor is within the enclosure. The apparatus includes an impedance connecting the test point to the test conductor. The impedance is within the enclosure. The test point meets an Ingress Protection code rating of 20. | 09-18-2014 |
| 20140266242 | SCREENING METHODOLOGY TO ELIMINATE WIRE SWEEP IN BOND AND ASSEMBLY MODULE PACKAGING - Quality control testing for a batch of electronic modules. A series of tests are performed on manufactured electronic modules, including tests sensitive to the failure rate of previously tested modules. Specifically, a first test comprised of two phases is performed on the module batch. Further screening is then performed responsive to detection of a wire sweep failure in a subset of failed modules from the first test phase. The further screening is on modules that passed the first test phase and excludes modules that failed the first test phase. | 09-18-2014 |
| 20140266243 | POWER LEVELING OF A SYSTEM UNDER TEST - Power leveling a system under test (SUT). An input signal is provided at an initial power level to the SUT. Multiple iterations are performed, each including measuring, over a specified measuring interval, power of a signal produced by the SUT in response to the input signal, and dynamically adjusting the power of the input signal in response. The measuring interval is increased over the iterations, thereby increasing accuracy of the measuring over the iterations while converging the signal to a specified power level. An initial power leveling operation may be performed for the SUT to establish a specified power level, after which the SUT is tested, during which multiple power leveling operations are performed, each including measuring power of a signal from the SUT over a specified measuring interval, and adjusting the input signal in response, thereby maintaining the specified power level during the testing while correcting for thermal droop. | 09-18-2014 |
| 20140266244 | SYSTEMS AND METHODS FOR REAL-TIME MONITORING OF DISPLAYS DURING INSPECTION - Described are techniques for maintaining reliable and reproducible conditions for panel inspection, i.e. pixel and line defect detection, while at the same time preventing large-scale panel damage. One implementation involves an apparatus for identifying a defect in an electronic circuit incorporating a circuit driving module configured to apply an electrical test signal to the electronic circuit; a defect detection module configured to identify the defect in the electronic circuit based at least on the applied electrical test signal; a signal monitoring module configured to measure the electrical test signal at the electronic circuit; and a control module operatively coupled to the signal monitoring module and the circuit driving module and configured to control at least the circuit driving module based on the electrical test signal measured at the electronic circuit. | 09-18-2014 |
| 20140285211 | Self-Test Solution For Delay Locked Loops - A built-in self test (BIST) circuit and method is provided to test a first and a second DLL. The first DLL has a first delay input, a first clock input disposed to receive a clock input signal, and a first clock output that provides a first clock output signal delayed in comparison with the clock input signal. The second DLL has a second delay input, a second clock input disposed to receive the clock input signal, and a second clock output signal delayed in comparison with the clock input signal. The BIST circuitry provides a first delay amount over the first delay input creating a start offset between the first and second clock output signals. If the first DLL is functioning properly the start offset between the output signals should remain unchanged even after the BIST circuitry provides an additional common delay amount to the first and second delay inputs. | 09-25-2014 |
| 20140285212 | METHOD FOR THE PREVENTATIVE DETECTION OF FAILURE IN AN APPARATUS, COMPUTER PROGRAM, SYSTEM AND MODULE FOR THE PREVENTATIVE DETECTION OF FAILURE IN AN APPARATUS - A method of preventive detection of a fault in at least one device under surveillance of a group comprising at least two devices, the device under surveillance having at least one first parameter correlated with at least one second parameter of at least one second device in the group, said parameters representing state variables of said devices. The method includes the following steps: predicting a value of the first parameter from a measured value of the second parameter; comparing the predicted value of the first parameter and a measured value of the first parameter; and analyzing the result of the comparison effected in the comparison step to detect a potential fault. The invention also relates to a computer program, an installation, and a module for preventive detection of a fault in a device. | 09-25-2014 |
| 20140292348 | Electronic Testing Device - Systems and methods for cabling verification may include one or more operations including, but not limited to: receiving floor plan data representing a floor plan of a premises; receiving at least one user input specifying a location of at least one cabling endpoint relative to the floor plan; receiving at least one user input selecting at least one cabling verification test for the at least one cabling endpoint; receiving one or more cabling verification test results for the at least one cabling endpoint obtained by at least one testing device; and updating at least one database element associated with the at least one cabling endpoint and maintained by the cloud-based server. | 10-02-2014 |
| 20140300371 | DEVICE AND METHOD TO PREVENT INTER-SYSTEM INTERFERENCE - A method of preventing inter-system interference while acquiring waveforms in a test and measurement instrument with variation in a device under test system S-parameters. The method includes receiving a waveform from a device under test at the test and measurement instrument, digitizing the waveform, identifying portions of the digitized waveform with different S-parameter characteristics, separating the identified portions of the digitized waveform into different waveforms, and displaying the different waveforms to a user. | 10-09-2014 |
| 20140300372 | Fuel Dispenser Tamper Detection Arrangement - Methods and systems provide for detecting tampering of a fuel dispenser. Power is applied to a valve coil of a fuel dispenser. The valve coil is part of a control valve configured to accomplish a gradated fuel flow of the fuel dispenser. Current flowing through the valve coil is measured in response to the power being applied to the valve coil. The current measurements are compared with predetermined criteria and tampering with the valve coil is determined if the current measurements are sufficiently different than expected. | 10-09-2014 |
| 20140306714 | TRANSIENT VOLTAGE SUPPRESSION PROTECTION CIRCUIT INCLUDING BUILT IN TESTING - A lightning protection circuit includes a first lightning protection branch including at least one transient voltage suppression (TVS) protection element, and a testing element integral to the lightning protection circuit. The testing element is operable to test a functionality of the lightning protection circuit while he lightning protection circuit is installed in an electronic control system. A controller is connected to the testing element, such that the controller receives sensed signals from the testing element. | 10-16-2014 |
| 20140306715 | MISSING OR BROKEN NEUTRAL MONITORING CIRCUIT FOR SPLIT PHASE ELECTRICAL DISTRIBUTION CONFIGURATIONS - A circuit for indicating a broken or missing neutral in a split phase electrical distribution configuration having an unbalanced load includes: a voltage divider configured to divide the voltage difference between a first line and a second line and to output the divided voltage difference as a virtual neutral; a rectifier including an input of the virtual neutral, the neutral, and an output, the rectifier configured to rectify a voltage difference between the virtual neutral and the neutral; a determination circuit including an input of the rectified voltage difference, a reference voltage and an output, the determination circuit configured to determine if the neutral is missing or broken based on the rectified voltage difference and the reference voltage; and an indicator circuit configured to indicate when the neutral is missing or broken based on the output of the determination circuit. | 10-16-2014 |
| 20140327448 | SYSTEM AND METHOD FOR MONITORING POWER FACILITY STATUS BY MESAURING ONLINE ELECTRIC CIRCUIT PARAMETER - The present invention relates to a system and a method for monitoring a power facility by measuring from online a line parameter of the power facility that is in operation, and the system for monitoring the power facility, according to the present invention, sets a measurement time and selects a facility to be measured in accordance with external input, receives current and voltage data which are measured from the facility to be measured, extracts the current and voltage data that are simultaneously measured at the measurement time that is set, by referencing time information that is tagged on the current and voltage data that are inputted, removes zero-phase-sequence component from the current and voltage data, outputs the line parameter with respect to the facility to be measured that is selected by using the current and voltage data from which the zero-phase-sequence component is removed, determines the electrical status of the facility including malfunction and various connection statuses depending on whether the size or the increase/decrease rate of the line parameter that is outputted is beyond a predetermined standard value to output a status notification message or a trip signal, thereby monitoring/controlling the status of the facility to be measured. | 11-06-2014 |
| 20140333324 | INDIRECT ELECTRICAL APPLIANCE POWER CONSUMPTION MONITORING AND MANAGEMENT - The operation of electrical appliances receiving electrical power from an electrical system may be indirectly monitored using monitoring units engaged with outlets on branch circuits of the electrical system. Electrical systems providing power to appliances to be monitored in accordance with the present invention may comprise split phase alternating current systems, tri-phase systems, or any other type of electrical system. Known loads may be applied to calibrate the monitoring system. The monitoring system may measure the power consumption of appliances operating on the electrical system and/or detect possible fault conditions. The monitoring system may be distributed across multiple monitoring units and other computing devices. Output devices may be used to output a summary of the power consumption or other operation of monitored electrical appliances. | 11-13-2014 |
| 20140347065 | Sub-Harmonic Arc Fault Detection System and Method - Embodiments of the invention provide systems and methods for detecting a sustained arc in an electrical system. Over a time period, current and voltage data for a load signal are collected, from which spectral information is extracted. The spectral information has a frequency component and an amplitude component. The load signal is processed to remove a line frequency signature from the spectral information. One or more sub-harmonic frequency bands are extracted from the load signal and analyzed to determine the presence of an arc signature therein. The sub-harmonic frequency bands may be centered on frequencies corresponding to an integer number of half line cycle periods. Analysis of the sub-harmonic frequency bands can include detecting the peak amplitudes of the rectified sub-harmonic frequency bands to obtain an indicator signal and determining if the indicator signal exceeds a threshold that indicates the presence of the sustained arc. | 11-27-2014 |
| 20140347066 | Arc Fault Detection System and Method - Embodiments of the invention provide systems and methods for detecting a sustained arc in an electrical system containing polymer-based, semi-conducting components which derive their conductivity from carbon black, carbon nanotubes or other conductive materials. Over a time period, current and voltage data for a cable signal are collected, from which spectral information is extracted. The spectral information has a frequency component and an amplitude component. The cable signal is processed to remove a line frequency signature that includes the electrical system's line current frequency and its harmonics. One or more off-harmonic frequency bands are extracted from the cable signal and analyzed to determine the presence of an arc signature therein. Analysis of the off-harmonic frequency bands can include applying a matched filter to the off-harmonic frequency bands to obtain an indicator signal and determining if the indicator signal exceeds a threshold that indicates the presence of the sustained arc. | 11-27-2014 |
| 20140347067 | Fault Detection Device For Inverter System - To provide a fault detection device for an inverter system, that detects a fault in the inverter system including an inverter circuit | 11-27-2014 |
| 20140354294 | SOLID STATE IMPEDANCE TUNERS - A solid state impedance tuner or impedance tuner system including a housing structure and at least two solid state tuner modules electrically combined and disposed in one package within the housing structure. Each tuner module includes at least one solid state control element. | 12-04-2014 |
| 20140361786 | IN-CELL TOUCH PANEL AND VOLTAGE TESTING METHOD THEREOF - An in-cell touch panel is disclosed. The in-cell touch panel includes an array substrate, and a plurality of signal lines arranged at one side of the array substrate. Each signal line includes a transient lead and includes one of a display pin and a touch pin connected to the transient lead. The in-cell touch panel also includes an insulating layer covering the transient lead, and a first wire formed on the insulating layer of at least one transient lead, where the first wire is electrically connected with the transient lead via a first through-hole in the insulating layer. | 12-11-2014 |
| 20140361787 | Apparatus for Measuring High Frequency Electromagnetic Noise in Printed Circuit Boards and Measurement Method Therefor - An apparatus and a method for measuring high frequency electromagnetic noise on the power supply planes of printed circuit boards (PCBs). The apparatus comprises a printed reverberation board (PRB) with curved edges that generates a strong sensitivity of the results to the boundary conditions. The PCB under test is inserted into a hole in the PRB and the power supply planes are connected to the PRB's first and second layer, in order to convey the noise into the device. Tuners are provided in to order obtain a statistically significant number of measurements with different boundary conditions. Measurement are conducted on the device ports. (See | 12-11-2014 |
| 20140368212 | ELECTRIC CIRCUIT EVALUATION METHOD - The electric circuit evaluation method according to the present invention comprises: a step for finding a malfunction power frequency property, in which the magnitude of a critical noise signal at which a designated electric circuit causes a malfunction is represented by the power injected into the designated electric circuit; and a step for finding a malfunction current frequency property, in which the magnitude of the critical noise signal at which the designated electric circuit causes a malfunction is represented by a current (I_LSI) flowing to a predetermined portion of the designated electric circuit, and a malfunction voltage frequency property, in which the magnitude of the critical noise signal at which the designated electric circuit causes a malfunction is represented by a voltage (V_LSI) occurring between predetermined points of the designated electric circuit, both of which properties found from the malfunction power frequency property. | 12-18-2014 |
| 20140368213 | Electric Circuit Evaluation Method and Electric Circuit - A noise signal for a malfunction test is inputted to a ground terminal, and a frequency property of the magnitude of the power at which a designated electric circuit causes a malfunction is found. A detection reference ground of a detection part for detecting malfunctions of the designated electric circuit is connected at high impedance to a ground of the targeted circuit. Differential input parts are provided to the detection part, a to-be-detected part of the designated electric circuit is connected to one differential input part, and the ground of the targeted circuit is connected to the other differential input part. A ground of a noise source is isolated from a ground of a power source circuit for supplying a power source to the designated electric circuit. The ground of the noise source is galvanically isolated from the ground of the designated electric circuit. | 12-18-2014 |
| 20140375330 | Burst Detection for Lines to Remote Devices - In some implementations, a control device is coupled with an output, the output to be coupled with a remote device via a line, for example, in an industrial environment. A burst detector is coupled with the output to detect bursts on the line. In response to detected bursts, a switch device may couple the output with a reference potential. | 12-25-2014 |
| 20140375331 | FAULT DETECTION OF FOUR WIRE VARIABLE DIFFERENTIAL TRANSFORMER SENSORS - Apparatus and methods of detecting failures in systems having a four-wire variable differential transformer sensor. In one embodiment, a method of detecting failures includes monitoring a source frequency of an Alternating Current (AC) voltage applied to an input of a four-wire variable differential transformer sensor, and monitoring an output frequency for an output of the sensor. The method further includes comparing the output frequency with the source frequency, and detecting a failure if the output frequency is different than the source frequency. | 12-25-2014 |
| 20140375332 | METHOD OF VALLEY INDUCTANCE CURRENT POLARITY DETECTION IN A PULSE WIDTH MODULATED CIRCUIT WITH AN INDUCTIVE CHARGE - A valley inductance current polarity change in a pulse width modulated circuit charged with an inductive charge is detected by comparing respective times that a first output of the circuit charged with an inductive charge and a second output of a pulse width modulated reference circuit with no inductive charge reach an output level. Responsive thereto, control over operation of the pulse width modulated circuit charged with an inductive charge is made with respect to switching to a pulse skipping mode of operation or keeping the pulse width modulation mode of operation. | 12-25-2014 |
| 20140375333 | OVERCURRENT DETECTION APPARATUS AND INTELLIGENT POWER MODULE USING SAME - An overcurrent detection apparatus includes a sense emitter current detection unit that detects a sense emitter current output from a sense emitter of an IGBT as a sense emitter voltage, and a comparison unit that detects an overcurrent by comparing the sense emitter voltage detected by the sense emitter current detection unit with a threshold voltage. The overcurrent detection apparatus also includes a correction current detection unit that detects a correction current corresponding to a current flowing between a gate and the sense emitter of the IGBT as a corrected voltage; and a voltage correction unit that calculates a sense emitter corrected voltage by subtracting the correction voltage detected by the corrected current detection unit from the sense emitter voltage detected by the sense emitter current detection unit, and supplies the sense emitter corrected voltage to the comparison unit. | 12-25-2014 |
| 20150008935 | PROTECTION APPARATUS AND METHOD OF VERIFYING OPERATION THEREOF - A method of verifying a protection apparatus is provided. The method includes: setting a plurality of relay elements for sensing an abnormal state of the protection apparatus; receiving an input regarding test information for testing each of the plurality of relay elements; and when at least one of the plurality of relay elements is in an abnormal state from the reception of the input regarding the test information, identifying whether the protection apparatus has created an abnormal state sensing signal. | 01-08-2015 |
| 20150008936 | Method for Evaluating Device Including Plurality of Electric Circuits - A method for evaluating a device including a plurality of electric circuits has: a step of finding a first malfunction frequency property for individual electric circuits included in the device, the first malfunction frequency property representing the magnitude of a critical noise signal at which each electric circuit causes a malfunction; and a step of finding a second malfunction frequency property based on the first malfunction frequency property found for each of the electric circuits, an equivalent circuit of the entire device, and an equivalent circuit of each of the electric circuits, the second malfunction frequency property representing the magnitude of a critical noise signal at which the entire device causes a malfunction. | 01-08-2015 |
| 20150015270 | RELATIVE ANGLE DETECTION APPARATUS AND ELECTRIC POWER STEERING APPARATUS - A relative angle detection apparatus includes a first magnetometric sensor and a first voltage amplifier that output a signal corresponding to a relative rotation angle between a first rotation shaft and a second rotation shaft; a first amplifier circuit that amplifies the output signal of the first voltage amplifier; a second magnetometric sensor and a second voltage amplifier that output a signal that corresponds to the relative rotation angle; a second amplifier circuit that amplifies the output signal of the second voltage amplifier; a first resistor that is provided between the first amplifier circuit and a power supply terminal, or between the first amplifier circuit and a GND terminal; and a second resistor that is provided between the second amplifier circuit and the power supply terminal, or between the second amplifier circuit and the GND terminal. | 01-15-2015 |
| 20150042356 | TEST SYSTEM FOR TESTING ELECTROSTATIC TESTER AND METHOD THEREOF - A test system for testing electrostatic testers, is used to test at least one electrostatic tester each including a voltage test terminal and a connection test terminal. The test system includes at least one optical coupler circuit and a chip. Each optical coupler circuit is coupled the voltage test terminal and the connection test terminal of one corresponding electrostatic tester, and each optical coupler circuit converts voltages of the voltage test terminal and the connection test terminal respectively to a voltage test signal and a connection test signal. The chip is couple to the at least one optical coupler circuit, and receives the connection test signal and the voltage test signal produced by the at least one optical coupler circuit, and determines whether the corresponding electrostatic tester connected to each optical coupler circuit is worked normally according to the connection test signal and the voltage test signal. | 02-12-2015 |
| 20150048842 | CONDUCTOR MONITOR DEVICE AND METHOD - An illustrative example conductor monitoring device includes a generator configured to radiate a field into a conductor. A detector is configured to detect at least some of the field propagated along the conductor. A processor is configured to determine when a change in the propagated field detected by the detector indicates contact between the conductor and a conductive blade of a wire processing machine. The example conductor monitoring device is capable of providing information regarding the condition of a conductor that has gone through a wire handling process that involves cutting the wire and stripping insulation from near the end of the cut wire, for example. The information regarding the condition of the wire is obtained without making contact with the wire and without interfering with or requiring any alteration of the wire handling process or machine. | 02-19-2015 |
| 20150061691 | Method and Apparatus for Estimating the Noise Introduced by a Device - An apparatus and method for measuring the properties of a DUT characterized by a signal gain applied to an input signal to that DUT and a DUT noise spectrum introduced by that DUT is disclosed. An apparatus includes first and second measurement channels and a controller. The first and second measurement channels are characterized by gains and noise spectrums that are different for the different channels and generate first and second measurement signals. The controller measures an average value of a product of the first and second measurement signals when an input signal is applied to the input of the DUT, the controller providing a measure of the signal to noise ratio of the output of the DUT, independent of the noise spectrums in the first and second measurement channels. Four channel embodiments reduce the amount of calibration needed to measure the gain and noise spectrum of the DUT. | 03-05-2015 |
| 20150061692 | Devices and Methods for Providing an Impulse Circuit - Devices include an impulse current generator that is configured to provide a direct impulse current (DIC) that includes a specified waveform to a test load during a test duration, a continuous power supply that is configured to provide a continuous power to the test load during the test duration, a trigger circuit that is configured to determine a trigger condition that corresponds to the DIC and to generate a trigger signal responsive to determining the trigger condition, and a current bypass circuit that is configured to receive the trigger signal generated by the trigger circuit and to conduct a majority portion of the DIC being conducted by the load responsive to the trigger signal. | 03-05-2015 |
| 20150061693 | APPARATUS AND METHOD - Apparatus and method for assessing the quality of membrane electrode assemblies. | 03-05-2015 |
| 20150077132 | PLC ANALOG OUTPUT MODULE - As a configuration for detecting an occurrence of abnormalities such as a disconnection of output wiring or an overcurrent of a PLC analog output module that controls a load by an analog current signal, the PLC analog output module includes a current output circuit that outputs the analog current signal, a current sensing resistor provided at a current output terminal of the current output circuit for directly detecting an analog current output to the load, a monitoring circuit that monitors voltages at both ends of the current sensing resistor, and an abnormality detection circuit that discriminates whether there is an occurrence of a disconnection or an overcurrent based on a monitoring result of the monitoring circuit. | 03-19-2015 |
| 20150077133 | DETECTION OF A FAULT IN AN UNGROUNDED ELECTRIC POWER DISTRIBUTION SYSTEM - Detection of a fault in an ungrounded electric power distribution system that includes a plurality of feeders and buses is disclosed herein. Embodiments consistent with the present disclosure may monitor an electrical parameter associated with each of a plurality of feeders and buses in the ungrounded electric power distribution system. An incremental change in the monitored electrical parameters may be determined using the monitored electrical parameter. Further, the incremental change may be associated with a first sub-set of the plurality of feeders. Torque values for the feeders may be calculated using a reference quantity from the bus first exhibiting an incremental change above a threshold. A feeder having the largest incremental change in the first sub-set of the plurality of feeders may be identified. A fault may be identified based on the torque and the incremental change. | 03-19-2015 |
| 20150097572 | Tamper Protection Mesh in an Electronic Device - A technique for tamper protection in an electronic device is disclosed. A conductive mesh is affixed onto one or more interior surfaces of the outer housing of the device. The mesh includes one or more conductive traces coupled to one or more detectors within the device. The detector can detect an open-circuit or short-circuit condition resulting from an unauthorized attempt to open the housing, and output a signal to trigger an appropriate countermeasure. The electrical contacts along the trace that are monitored can be selected differently from one manufactured unit to the next, and can be selected based on a randomness function. The selection of contacts may be made during or after manufacturing of the device. The mesh can include multiple metal traces that run very close together, in parallel, across one or more interior surfaces of the housing, allowing detection of both open-circuit and short-circuit conditions. | 04-09-2015 |
| 20150097573 | LOAD APPARATUS FOR TESTING - A load apparatus for testing is provided. The load apparatus for testing includes a first comparison circuit, a switch circuit, a voltage-dividing load circuit and a second comparison circuit. The first comparison circuit receives an input voltage from an input terminal and obtains a first sensing voltage according to the input voltage, and compares whether the first sensing voltage is greater than a first reference voltage for providing a first sensing signal. The switch circuit receives the first sensing signal and the input voltage. The switch circuit guides the input voltage to the voltage-dividing load circuit according to the first sensing signal. The voltage-dividing load circuit generates a second sensing voltage according to an input current generated at the input terminal. The second circuit is coupled to the voltage-dividing load circuit and compares whether the input current is greater than a reference current for providing a testing signal. | 04-09-2015 |
| 20150097574 | PHASE DETERMINING METHOD, PHASE DETERMINING APPARATUS, AND RECORDING MEDIUM - A non-transitory computer-readable recording medium stores therein a program that causes a computer to execute a phase determining process. The phase determining process includes: transmitting electricity to a consumer via a power distribution line branched from a power distribution line using a three-phase three-wire system; identifying a time change pattern of a highest correlation with a time change pattern of power consumption, voltage, or current at the consumer out of time change patterns of power consumption, voltage, or current of respective phases of a high-voltage power distribution line using the three-phase three-wire system; and determining a phase corresponding to the identified time change pattern to be a phase at a time of branching the power distribution line to the consumer. | 04-09-2015 |
| 20150097575 | METHOD OF EVALUATING DEVICE INCLUDING NOISE SOURCE - A method of evaluating a device includes a first electric circuit acting as a noise source and a second electric circuit which is likely to malfunction due to a noise signal. The method includes: obtaining malfunction frequency characteristics indicating magnitudes of a threshold noise signal causing malfunction of the second electric circuit; obtaining internal noise arrival frequency characteristics indicating magnitudes of an internal noise signal arriving at the second electric circuit from the first electric circuit; and comparing the malfunction frequency characteristics with the internal noise arrival frequency characteristics. | 04-09-2015 |
| 20150108996 | CIRCUIT AND METHOD FOR DETECTION OF IC CONNECTION FAILURE - The invention provides a testing circuit for testing a connection between a chip and external circuitry. A current source is used to inject a DC current towards the connection to be tested from the chip side. On-chip ESD protection is provided giving a path between the connection to be tested and a fixed voltage line. A shunt path is also coupled to the connection to be tested on the external circuitry side. It is determined if the current source current flows through the ESD protection circuit, and this can be used to determine whether or not the connection to be tested presents an open circuit for the DC test current. | 04-23-2015 |
| 20150115973 | DEVICE FOR ELECTRICALLY TESTING THE INTERCONNECTIONS OF A MICROELECTRONIC DEVICE - A simultaneous electrical testing device for TSV interconnection elements passing through a substrate and including one end connected to an integrated testing circuit and another end to a removable connection mechanism assembled to the substrate through an anisotropic conductive glue. | 04-30-2015 |
| 20150130476 | DIRECT-CURRENT REGULATOR, DC-DC CONVERTER, AND METHOD FOR MONITORING ANOMALY OF DIRECT-CURRENT REGULATOR - A direct-current regulator includes: a fuse, a high-side switch, and a low-side switch connected in series between a high potential side input voltage terminal and a low potential side input voltage terminal; and a control unit configured to control the high-side switch and the low-side switch, wherein the fuse is formed on a silicon substrate on which the high-side switch is formed, and the fuse includes: two electrodes separately formed on the silicon substrate; a plurality of band-shaped polysilicon films formed between the two electrodes; and a linking part of a polysilicon film provided so as to connect the neighboring band-shaped polysilicon films at intermediate portions. | 05-14-2015 |
| 20150137826 | APPARATUS AND METHOD FOR DETECTING FAULT IN DIGITIZER - Disclosed herein is an apparatus and method for detecting a fault in a digitizer. The apparatus includes a function generator for generating test signals, a transmitting switch for transmitting the test signals generated by the function generator to a selective part or all of X- and Y-channels of a transmitting digitizer, a receiving digitizer arranged in a shape identical to that of the transmitting digitizer to be adjacent to the transmitting digitizer, the receiving digitizer receiving reception signals produced by the transmitting digitizer, a receiving switch for receiving resulting signals, generated by the receiving digitizer in response to the reception signals, from a selective part or all of X- and Y-channels of the receiving digitizer, a channel controller for controlling the transmitting switch and the receiving switch, a data collection unit for collecting the resulting signals, and an analysis unit for analyzing the collected resulting signals. | 05-21-2015 |
| 20150137827 | SYSTEMS AND METHODS FOR DETECTING PARTIAL DISCHARGE IN ELECTRICAL COMPONENTS - A system for detecting partial discharge in electrical components may include a control system that may operate a drive in an industrial automation system. The industrial automation system may include the electrical components being analyzed for partial discharge. The system may also include one or more acoustic sensors that may detect one or more acoustic waveforms generated within at least one of the electrical components. The system may also include a monitoring system that may receive the acoustic waveforms from the acoustic sensors and determine whether the one electrical component is experiencing partial discharge based on the acoustic waveforms. The monitoring system may then send a notification to the control system when the one electrical component is determined to be experiencing partial discharge, such that the notification indicates that the one electrical component is experiencing partial discharge. | 05-21-2015 |
| 20150145522 | Analog Signal Input Circuit with a Number of Analog Signal Detection Channels - The invention relates to an analog signal input circuit with a first number of analog signal detection channels ( | 05-28-2015 |
| 20150309090 | OVERCURRENT DETECTION CIRCUIT - An overcurrent detection circuit includes a current detection resistor that generates a voltage in proportion to current flowing through a switching element and a comparator that compares the voltage detected via the current detection resistor and a reference voltage generated by a reference voltage generation circuit to thereby detect overcurrent flowing through the switching element. In particular, the reference voltage generation circuit includes: a first resistance voltage dividing circuit that resistance-divides a standard voltage by connecting, in series, two types of resistors having different temperature characteristics; a second resistance voltage dividing circuit that resistance-divides the standard voltage by connecting, in series, resistors having the same temperature characteristics; and an instrumentation amplifier that generates the reference voltage according to the difference between the divided output voltages of the first and second resistance voltage dividing circuits. | 10-29-2015 |
| 20150309104 | DIFFERENTIAL CURRENT MONITORING DEVICE WITH ARC DETECTION - The invention relates to a differential current monitoring device for monitoring differential currents in power supply systems, having a first measuring current transformer and having a measuring circuit for determining the differential current and having a computing unit for evaluating the differential current and for generating a switch-off signal. The differential current monitoring device has a device for detecting arcs, the integration of which according to the invention can considerably reduce the technical effort needed to monitor the differential current in connection with the arc detection in comparison to a functionally and spatially separate arrangement of both protective measures. | 10-29-2015 |
| 20150316606 | SELF LEARNING RADIO FREQUENCY MONITORING SYSTEM FOR IDENTIFYING AND LOCATING FAULTS IN ELECTRICAL DISTRIBUTION SYSTEMS - Electrical faults are detected in electrical distribution systems (EDS) by detection and location of radio frequency (RF) emissions generated by the fault with multiple time-synchronized radio frequency monitors (RFM) distributed about the EDS. The RFMs are coupled to a self-learning, electrical fault monitor (EFM) that characterizes and/or locates electrical faults based on operating state (OS) patterns learned from transmission of test signals generated within the EDS. RF emissions data samples are characterized as safe operation (SO) states or potential electrical faults by accessing a base of stored knowledge concerning fault emission characteristics and/or synchronized time of arrival at each RFM. Information in the base of stored knowledge is updated to include new EDS operating states (OS). Confidence level associations, location of new radio frequency emission patterns and whether those patterns are indicative of safe operating (SO) conditions or electrical faults are stored in the base of stored knowledge. | 11-05-2015 |
| 20150323587 | DIAGNOSTIC CIRCUIT FOR TESTING A CIRCUIT - A diagnostic circuit is configured for connecting to a unit under test that has a load and a sinusoidal source. The diagnostic circuit includes a voltage sensing device that has an input for sensing a signal, a first terminal for connecting to the load, a second terminal for connecting to the sinusoidal source, and a relay connected between the first and second terminals for connecting the sinusoidal source to the load. Clamping diodes are provide for clamping a sinusoidal signal and include a first clamping diode connected between a D/C voltage source and the input and a second clamping diode connected between ground and the input. A resistor is connected between the D/C voltage source and the first terminal. The diagnostic circuit verifies the operational functionality of the load, related wiring and connections. | 11-12-2015 |
| 20150377809 | DETECTING THERMAL INTERFACE MATERIAL ('TIM') BETWEEN A HEAT SINK AND AN INTEGRATED CIRCUIT - Detecting TIM between a heat sink and an integrated circuit, the heat sink including TIM detection points, each TIM detection point adapted to receive TIM upon installation of the heat sink, each TIM detection point including a TIM detection device configured to be activated upon contact with TIM, including: receiving, upon installation of the heat sink on the integrated circuit and the TIM, TIM in one or more of the TIM detection points; activating, by the TIM in each of the one or more TIM detection points receiving the TIM, a TIM detection device; and determining, by a TIM detection module in dependence upon the activations of the TIM detection devices, sufficiency of the TIM between the heat sink and the integrated circuit. | 12-31-2015 |
| 20150377981 | Novel On-Chip Test Technique for Low Drop-Out Regulators - A circuit and method is described for automatically testing multiple LDO regulator circuits on an integrated circuit chip independent of an ATE. Each LDO regulator is tested for voltage at a specified current output capability, wherein the output driver transistor is formed by at least two pass transistors, which are each tested for voltage output at a particular current capability. The test results are delivered back to the ATE and for a failed test, the gate voltage of the pass device can be observed through an analog multiplexer to enable debug. | 12-31-2015 |
| 20160002801 | ARRANGEMENT FOR MEASURING ELECTRIC CURRENT IN AN INDIVIDUAL ELECTRODE IN AN ELECTROLYSIS SYSTEM - The invention relates to a method and current measuring arrangement for measuring electric current flowing in an individual electrode in an electrolysis system. The electrolysis system comprises a plurality of interleaved electrodes ( | 01-07-2016 |
| 20160003893 | MULTI-DOMAIN HETEROGENEOUS PROCESS-VOLTAGE-TEMPERATURE TRACKING FOR INTEGRATED CIRCUIT POWER REDUCTION - The systems and method described herein provide efficient (e.g., low power and low area) means to track performance in numerous supply domains with heterogeneous circuits that are used in a large system-on-a-chip integrated circuit (SoCs). The heterogeneous circuits can include circuits made with different devices, different cell libraries, and different hard macros that are in different power supply domains. Performance measurements from performance sensors (or process-voltage-temperature (PVT) sensors) that are spread about the SoC are collected and processed to determine voltage levels for each of the supply domains. A single controller can receive can determine voltage levels for a whole SoC. The performance sensors are connected to the controller by a scan chain. The technique is flexible and can be easily adapted for use in SoCs with different power supply domains and types of circuits. | 01-07-2016 |
| 20160011248 | CRYSTAL UNIT AND DEVICE FOR MEASURING CHARACTERISTICS OF THE CRYSTAL UNIT | 01-14-2016 |
| 20160033559 | OVERCURRENT DETECTING DEVICE AND OVERCURRENT DETECTING METHOD - The present invention relates to an overcurrent detecting device and an overcurrent detecting method each of which detects an overcurrent upstream of an inverter circuit in a drive control device for an electric motor. The overcurrent is detected without providing a shunt resistor in the upstream of the inverter circuit, and miniaturization of a circuit substrate is achieved. The overcurrent detecting device calculates a current value of a power supply line from each phase current supplied to the electric motor and a power supply voltage of the inverter circuit, and detects an overcurrent, based on a current value determined from a drop voltage value by an electronic part connected to the power supply line and the current value of the power supply line. | 02-04-2016 |
| 20160054363 | CORONA AVOIDANCE ELECTRIC POWER LINE MONITORING, COMMUNICATION AND RESPONSE SYSTEM - An electric power line monitoring, communication and response system schedules the transmission of packets to occur during voltage zero-crossing intervals when corona is minimized. The transmitters may be located at high voltage hanging directly from the power line conductors along with associated current transformers and voltage sensors. A system of these transmitters distributed throughout the power grid communicate with each other in a data-forward manner to bring complete, real-time current and voltage waveform, device status and fault monitoring information to data aggregation waypoints, such as transmission substations where supervisory control and data acquisition (SCADA) equipment is installed. The power line monitoring data is then transmitted from the data waypoints to a central monitoring and control center, typically using existing SCADA equipment, to provide h detailed power line monitoring data for a large number of data monitoring points distributed throughout the power grid. | 02-25-2016 |
| 20160054366 | INSPECTION APPARATUS AND INSPECTION METHOD - An inspection apparatus for inspecting wires of an object in which a plurality of x-axis and y-axis wires are arranged perpendicular to each other, each x-axis and y-axis wire having a display wire and tab wire, respectively. The apparatus includes a power supply device supplying an AC signal to the wire as an inspection object;, a connecting device being in conductive contact with the tab wire to transmit the AC signal, a first detecting device disposed in a non-contact manner at one end of the display wire and conductively connected to one end of the power supply device, a second detecting device disposed in the non-contact manner and opposed to the display wire and conductively connected to the one end of the power supply device, and a determining device determining quality of the wire on the basis of results of the first and second detecting devices. | 02-25-2016 |
| 20160054421 | METHOD FOR CALIBRATING A SHORT CIRCUIT INDICATOR WITH DIRECTION DETECTION AND SHORT CIRCUIT INDICATOR TO USE SUCH A METHOD - The present invention relates to a method for calibrating a short-circuit indicator ( | 02-25-2016 |
| 20160061875 | CIRCUIT AND METHOD FOR TESTING RF DEVICE AND RF DEVICE WITH BUILT-IN TESTING CIRCUIT - In a testing circuit performing a testing operation to detect an RF circuit characteristic, a first filter unit is provided, having a first external terminal electrically coupled to a testing signal and a second external terminal electrically coupled to an RF circuit of the RF device. The first filter unit is configured to allow the testing signal to enter the RF circuit while blocking an RF signal transmitted in the RF circuit from entering the testing circuit. In addition, a testing-result informing unit is provided, having an external input electrically coupled to the first external terminal, and generating an informing signal, which indicates a condition of the RF circuit according to an electric level at the external input. | 03-03-2016 |
| 20160065183 | One-Shot Circuit - An example one-shot circuit includes: circuitry including a set-reset (SR) latch to produce an output pulse of controlled duration in response to an input signal rising edge, where the SR latch includes a first circuit input and a second circuit input; a circuit path to provide a signal to the first circuit input; and a delay element connected to the circuit path and to the second circuit input. | 03-03-2016 |
| 20160077143 | POWER UP DETECTING SYSTEM - A power up detecting system for generating one of a first power up detecting signal and a second power up detecting signal as the final power up detecting signal, according to power provided by a power supplier. The power up detecting system comprises: a power up detecting module, controlled by a control signal to generate the first power up detecting signal in a first mode and to generate the second power up detecting signal in a second mode, wherein a voltage level of the first power up detecting signal is transited when the power reaches a first predetermined voltage value, and the voltage level of the second power up detecting signal is transited when the power reaches a second predetermined voltage value; where the first predetermined voltage value is higher than the second predetermined voltage value. | 03-17-2016 |
| 20160097799 | METHOD FOR DETECTING A WIRING FAULT IN A CAPACITIVE SENSOR - A method for detecting a wiring fault in a capacitive sensor ( | 04-07-2016 |
| 20160097800 | RING CIRCUIT CONTINUITY TESTER - Apparatus and method are provided for testing continuity of a ring circuit of an electricity distribution system, the ring circuit including at least a first conductor connecting, in a ring configuration, a source of electricity to a plurality of accessories. The apparatus includes: a switch arranged to cause a break in the ring circuit at a location in the ring circuit, the break resulting in a first end and a second end of the ring circuit at the location; a detector for measuring the relative voltage between the first end and the second end of the ring circuit; and an indicator which indicates, responsive to the detector detecting a relative voltage between the first end and the second end of the ring circuit, that there is a lack of continuity in the ring circuit. | 04-07-2016 |
| 20160097805 | IN-DIE TRANSISTOR CHARACTERIZATION IN AN IC - In an example implementation, an integrated circuit (IC) includes: a plurality of transistors disposed in a plurality of locations on a die of the IC; conductors coupled to terminals of each of the plurality of transistors; a digital-to-analog converter (DAC), coupled to the conductors, to drive voltage signals to the plurality of transistors in response to a digital input; and an analog-to-digital converter (ADC), coupled to at least a portion of the conductors, to generate samples in response to current signals induced in the plurality of transistors in response to the voltage signals, the samples being indicative of at least one electrostatic characteristic for the plurality of transistors. | 04-07-2016 |
| 20160109498 | Identifying Components Associated With A Fault In A Plasma System - A method for identifying a faulty component in a plasma tool is described. The method includes accessing a measurement of a parameter received from a frequency generator and measurement device. The measurement is generated based on a plurality of radio frequency (RF) signals that are provided to a portion of a plasma tool. The RF signals have one or more ranges of frequencies. The method further includes determining whether the parameter indicates an error, which indicates a fault in the portion of the plasma tool. The method includes identifying limits of the frequencies in which the error occurs and identifying based on the limits of the frequencies in which the error occurs one or more components of the portion of the plasma tool creating the error. | 04-21-2016 |
| 20160116524 | Method and Apparatus for Electric Arc Detection - A method for detecting high-frequency AC currents in a DC circuit including a common mode choke with two partial windings includes tapping voltages dropping across the two partial windings due to the AC current, superposing the tapped voltages, and obtaining a superposed AC voltage wherein differential mode portions of the tapped voltages are summed constructively and common mode portions of the voltages are summed destructively; and measuring the superposed AC voltage. | 04-28-2016 |
| 20160116525 | Mismatch Detection using Replica Circuit - An apparatus for detecting an operating characteristic mismatch at an output of an amplifier by using a replica circuit is presented. In one exemplary case, a detected voltage difference at the output of the two circuits is used to drive a tuning control loop to minimize an impedance mismatch at the output of the amplifier. In another exemplary case, the replica circuit is used to detect a fault in operation in a corresponding main circuit. A method for detecting a load mismatch in a main RF circuit using the replica circuit is also presented. | 04-28-2016 |
| 20160126573 | METHOD FOR DIAGNOSING CURRENT SENSOR OF FUEL CELL SYSTEM - A method for diagnosing a current sensor of a fuel cell system includes calculating an estimated duty value of a hydrogen pressure control valve, corresponding to a sensing value of the current sensor, while operating the fuel cell system. The estimated duty value is compared with an actual duty value where the hydrogen pressure control valve is controlled during the operation of the fuel cell system, thereby calculating an error value between the estimated duty value and the actual duty value. The error value is compared with a critical value in a normal range, thereby determining whether a failure occurs in the current sensor. The hydrogen pressure control valve controls a pressure of hydrogen supplied to a fuel cell stack of the fuel cell system. | 05-05-2016 |
| 20160131712 | WELLNESS MONITORING OF ELECTROMAGNETIC SWITCHING DEVICES - One embodiment describes a tangible, non-transitory, computer-readable medium storing instructions executable by a processor of an operating coil driver circuitry. The instructions include instructions to instruct a switch to supply a specific current to an operating coil of a switching device using a pulse-width modulated signal; determine duty cycle of the pulse-width modulated signal; and determine wellness of the switching device based at least in part on the duty cycle of the pulse-width module signal. | 05-12-2016 |
| 20160140836 | METHOD AND DEVICE FOR MEASURING A LINE RESISTANCE OF CONTROL LINES IN HAZARD WARNING AND CONTROL SYSTEMS - A method for measuring a line resistance R | 05-19-2016 |
| 20160169963 | Detection Circuit For Relative Error Voltage | 06-16-2016 |
| 20160178671 | CIRCUIT AND METHOD FOR EVALUATION OVERLOAD CONDITION IN FLYBACK CONVERTER | 06-23-2016 |
| 20160252566 | ELECTRONIC SYSTEM AND METHOD FOR TESTING CAPACITIVE CIRCUIT LINES | 09-01-2016 |
| 20190146034 | Fault Detection Circuit for a PWM Driver, Related System and Integrated Circuit | 05-16-2019 |
