| Entries |
| Document | Title | Date |
|---|
| 20080197865 | PROBE CARD ANALYSIS SYSTEM AND METHOD - A system and method for evaluating wafer test probe cards under real-world wafer test cell condition integrates wafer test cell components into the probe card inspection and analysis process. Disclosed embodiments may utilize existing and/or modified wafer test cell components such as, a head plate, a test head, a signal delivery system, and a manipulator to emulate wafer test cell dynamics during the probe card inspection and analysis process. | 08-21-2008 |
| 20080197866 | Method of Manufacturing Needle for Probe Card Using Fine Processing Technology, Needle Manufactured by the Method, and Probe Card Comprising the Needle - Disclosed are probe card needles manufactured using microfabrication technology, a method for manufacturing the probe card needles, and a probe card having the probe card needles. The probe needles are manufactured by forming, on a ceramic board, probe needle bases made of conductive metal, and a polymeric elastomer layer, by using photolithography and a photoresist, and continuously depositing conductive metal layers on the probe needle bases in such a manner as to be supported by the polymeric elastomer layer. The probe card comprises: a printed circuit board (PCB) which is connected to a test head for transmitting an electrical signal from a tester; a ceramic board located below the PCB and electrically connected to the PCB by a plurality of interface pins; a jig for mechanically holding the interface pins and the multilayer ceramic board to the PCB; and a plurality of probe needles attached to the lower surface of the multilayer ceramic board and making contact with electrical/electronic devices. | 08-21-2008 |
| 20080204058 | Probe Storage Container, Prober Apparatus, Probe Arranging Method and Manufacturing Method of Probe Storage Container - An object of the present invention relates to an arrangement of a manufactured probe in a prober apparatus without being exposed to an atmospheric air. | 08-28-2008 |
| 20080211523 | Inspection contact structure and probe card - In the present invention, an inspection contact structure is attached to the lower surface side of a circuit board in a probe card. In the inspection contact structure, elastic sheets with protruding conductive portions are respectively attached to both surfaces of a silicone substrate. The silicone substrate is formed with current-carrying paths passing therethrough in the vertical direction, and the sheet conductive portions are in contact with the current-carrying paths from above and below. The conductive portions on the upper side are in contact with connecting terminals of the circuit board. At the time of inspection of electric properties of a wafer, electrode pads on the wafer are pressed against the conductive portions on the lower side and thereby brought into contact with them. | 09-04-2008 |
| 20080211524 | Electrochemically Fabricated Microprobes - Multilayer probe structures for testing semiconductor die are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments the structures may include generally helical shaped configurations, helical shape configurations with narrowing radius as the probe extends outward from a substrate, bellows-like configurations, and the like. In some embodiments arrays of multiple probes are provided. | 09-04-2008 |
| 20080218186 | Image sensing integrated circuit test apparatus and method - An image sensing integrated circuit test device can include a plurality of conductive leads for making electrical contact with at least one integrated circuit device under test. A light directing structure can direct light onto the at least one integrated circuit device under test. The light directing structure includes a top member disposed in a lateral direction and having at least one aperture formed therein. For each aperture, a blocking member can be attached to the top member and disposed in a longitudinal direction around the aperture. The blocking member can prevent light arriving through the aperture from propagating in the lateral direction. | 09-11-2008 |
| 20080218187 | Probe testing structure - A calibration structure for probing devices. | 09-11-2008 |
| 20080224720 | Support Member Assembly for Conductive Contact Members - Provided is a support member assembly suitable for use in a contact probe head comprising a support member formed with a plurality of holder holes for supporting conductive contact members in a mutually parallel relationship, and a reinforcing member integrally formed with the support member and extending in a part of the support member devoid of any holder holes. The reinforcing member increases the overall mechanical strength of the support member assembly, and prevents the thermal deformation of the support member. Because the holder holes are formed in the support member made of material suitable for forming holes, such as plastic material and ceramic material, the holder holes can be formed at high precision and at low cost. | 09-18-2008 |
| 20080231295 | DEVICE AND METHOD FOR ELECTRICAL CONTACTING SEMICONDUCTOR DEVICES FOR TESTING - A device and method are disclosed for electrical contacting of semiconductor devices for testing. One embodiment provides for testing semiconductor devices or integrated circuits, including a probe card with contact tips for the electrical contacting of the semiconductor devices. The electrical connection of at least one contact tip to the test system is adapted to be switched via a resistively switching memory cell. A resistively switching memory cell in the form of a nano switch is integrated in the electrical connection of the contact tip. | 09-25-2008 |
| 20080231296 | Test Apparatus for the Testing of Electronic Components - In the case of a test apparatus for testing electronic components which are present in an assembly, in particular in the form of strips, a slide-like contacting board supporting device ( | 09-25-2008 |
| 20080238451 | AUTOMATIC MULTIPLEXING SYSTEM FOR AUTOMATED WAFER TESTING - A parametric test system is for testing devices in dice in a semiconductor wafer, each die having a plurality of pads for electrically connecting to the device in the die. A tester of the system has a plurality of input/output lines for providing and receiving electrical signals during a device test. Multiplexer circuitry of the test system includes a plurality of networks of automated switches. The multiplexer circuitry is configured to receive electrical signals on the input lines from the tester and to provide the electrical signals to a wafer prober, wherein the multiplexer circuitry is configured to restrict how the electrical signals can be provided to the networks of automated switches. As a result of the multiplexer being configured to restrict how the electrical signals can be provided to the networks of automated switches, the configuration of the networks of automated switches can be simplified. | 10-02-2008 |
| 20080238452 | Vertical micro probes - Embodiments of the present invention improve probes and probe assemblies. In one embodiment the present invention includes a micro probe comprising a lower contact end including a lower tip, an upper contact end, and a curved intermediate region between the upper contact end and lower contact end. An angle stop is included between the lower contact end and the curved intermediate region, and the lower contact end, upper contact end, and curved intermediate region have a uniform thickness | 10-02-2008 |
| 20080238453 | High accuracy and universal on-chip switch matrix testline - A testline structure made for integrated circuit tests is presented. The structure includes an array of testline pads formed in the scribe line area or integrated circuit die area on a semiconductor substrate, a plurality of test devices formed under the pads area, and a select circuit selectively connecting one of the test devices. The testline structure of this invention enables access to a large number of test devices through the same number of pads as on a conventional testline and can be employed to conduct parametric, reliability, and functional tests on the same. A source measurement unit (SMU) in a conventional integrated circuit tester is employed to sense and force predetermined test conditions on the test device terminals and conduct accurate Kelvin tests on the selected device. A method of using this testline structure is also presented. | 10-02-2008 |
| 20080238454 | TESTER AND STRUCTURE OF PROBE THEREOF - A split-type probe is used to contact with an object under test to detect an electrical characteristic thereof. The probe provided by the present invention has a contact head used to contact with the object under test, and a first needle body and a second needle body. The first needle body is connected to the contact head to transmit a testing signal to the object under test for performing detection. In addition, the second needle body is also connected to the contact head to transmit a response signal generated by the object under test due to the testing signal to obtain the electrical characteristic of the object under test. | 10-02-2008 |
| 20080238455 | PROBING METHOD, PROBE APPARATUS AND STORAGE MEDIUM - A probing method measures electrical characteristics of an object to be inspected by bringing a probe needle to make a contact with an electrode pad of the object, the probe needle formed to be vertically pointing the object. The method includes the steps of: mounting the object on a mounting table; aligning the object and the probe needle; thereafter, contacting the probe needle with the electrode pad by moving the mounting table upwards, and then moving the mounting table vertically upwards while moving same horizontally to rend an oxide film formed on a surface of the electrode pad, so that a tip of the probe needle is stuck into the electrode pad and the probe needle and the electrode pad to conduct with each other. | 10-02-2008 |
| 20080238456 | SEMICONDUCTOR INSPECTION APPARATUS - A semiconductor inspection apparatus includes a force probe applying voltage to a semiconductor device, and a sense probe detecting voltage of the semiconductor device, in which the force probe is contacted with an electrode pad of the semiconductor device and the force probe and the sense probe are contacted with each other to measure electric characteristics of the semiconductor device, and the force probe and the sense probe are arranged substantially on the same line when seen from a vertical direction with respect to an electrode surface (principal surface) of the semiconductor device. | 10-02-2008 |
| 20080238457 | NANOSCALE FAULT ISOLATION AND MEASUREMENT SYSTEM - Disclosed is a fault isolation and measurement system that provides multiple near-field scanning isolation techniques on a common platform. The system incorporates the use of a specialized holder to supply electrical bias to internal circuit structures located within an area of a device or material. The system further uses a multi-probe assembly. Each probe is mounted to a support structure around a common reference point and is a component of a different measurement or fault isolation tool. The assembly moves such that each probe can obtain measurements from the same fixed location on the device or material. The relative positioning of the support structure and/or the holder can be changed in order to obtain measurements from multiple same fixed locations within the area. Additionally, the system uses a processor for providing layered images associated with each signal and for precisely aligning those images with design data in order to characterize, or isolate fault locations within the device or material. | 10-02-2008 |
| 20080238458 | METHOD OF DESIGNING A PROBE CARD APPARATUS WITH DESIRED COMPLIANCE CHARACTERISTICS - A probe card apparatus is configured to have a desired overall amount of compliance. The compliance of the probes of the probe card apparatus is determined, and an additional, predetermined amount of compliance is designed into the probe card apparatus so that the sum of the additional compliance and the compliance of the probes total the overall desired compliance of the probe card apparatus. | 10-02-2008 |
| 20080246498 | Test structure and probe for differential signals - A test structure including a differential gain cell and a differential signal probe include compensation for the Miller effect reducing the frequency dependent variability of the input impedance of the test structure. | 10-09-2008 |
| 20080252310 | HYBRID PROBE FOR TESTING SEMICONDUCTOR DEVICES - A novel hybrid probe design is presented that comprises a torsion element and a bending element. These elements allow the probe to store the displacement energy as torsion or as bending. The novel hybrid probe comprises a probe base, a torsion element, a bending element, and a probe tip. The probe elastically deforms to absorb the displacement energy as the probe tip contacts the DUT contact pad. The bending element absorbs some of the displacement energy through bending. Because the torsion element and the bending element join at an angle, a portion of the displacement energy is transferred to the torsion element causing it to twist (torque). The torsion element can also bend to accommodate the storage of energy through torsion and bending. Also, adjusting the position of a pivot can be manipulated to alter the energy absorption characteristics of the probe. One or more additional angular elements may be added to change the energy absorption characteristics of the probe. And, the moment of inertia for the torsion and/or bending elements can by manipulated to achieve the desired probe characteristics. | 10-16-2008 |
| 20080252311 | Verifying an assembly manufacturing process - Apparatus and method for performing a verification buy-off operation during an assembly manufacturing process, such as during printed circuit board (PCB) manufacturing. A processing device is configured to establish contact between a probe assembly and a first component of an assembly having a plurality of components loaded in predetermined positions but not yet electrically intercoupled, and to receive from the probe assembly a component value associated with the first component. Preferably, the processing device further determines whether the received component value is within a predetermined specification. The processing device preferably directs a user via a graphical user interface (GUI) to manipulate the probe assembly to a position proximate the first component. The GUI preferably provides a graphical representation of the assembly and a marker that identifies the location of the first component thereon. All of the components of the assembly are preferably verified individually prior to a full production run. | 10-16-2008 |
| 20080252312 | Apparatus for testing system-in-package devices - Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus of the illustrative embodiment comprises a test hive comprising: a plurality of test circuits corresponding in number to the number of cells in the tray; and a plurality of groups of test contacts, each of the groups of the test contacts being coupled to one of the test circuits and being oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells, the test hive being operable to simultaneously, electrically test all of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray. | 10-16-2008 |
| 20080252313 | Method for testing system-in-package devices - A method for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The method and apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time. | 10-16-2008 |
| 20080252314 | Apparatus for testing system-in-package devices - Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray: and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells. The lest hive is operable to simultaneously, electrically test at least a predetermined number of the number of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray. The apparatus also includes a sorter automatically operable to remove each SIP device that did not pass electrical testing with SIP devices that did pass electrical testing until a tray of electrically tested SIP devices is fully populated with SIP devices that did pass electrical testing. | 10-16-2008 |
| 20080252315 | ELECTRICAL COMPONENT HANDLER HAVING SELF-CLEANING LOWER CONTACT - An electrical component handler that tests electrical circuit components and includes a self-cleaning lower contact offers reduced yield loss and mean time between assists. A preferred embodiment of the electrical component handler includes multiple sets of upper and lower contacts, each set of which is spatially aligned to electrically contact a single device-under-test (DUT). Each DUT is seated in a test plate that transports the DUT to and from a test measurement position between the upper and lower contacts. The lower contact includes a contact tip that a biasing mechanism urges against the electrical component as it undergoes a test process and against a surface of the test plate as it transports the electrical component. The lower contact rubs against the test plate, thereby contributing to removal of contaminant material acquired by the contact tip during component handler operation. | 10-16-2008 |
| 20080252316 | Membrane probing system - A membrane probing assembly includes a probe card with conductors supported thereon, wherein the conductors include at least a signal conductor located between a pair of spaced apart guard conductors. A membrane assembly includes a membrane with contacts thereon, and supporting at least a signal conductor located between a pair of spaced apart guard conductors. The guard conductors of the probe card are electrically interconnected proximate the interconnection between the probe card and the membrane assembly. The guard conductors of the membrane assembly are electrically interconnected proximate the interconnection between the probe card and the membrane assembly. | 10-16-2008 |
| 20080258745 | Probe Guard - It is an object of the present invention to realize sure electrical connection between a contactor and an object to be inspected without influenced by heat, a reduction in the pre-heating time, and an enhanced throughput. | 10-23-2008 |
| 20080258746 | Probes for a Wafer Test Apparatus - A probe configured for use in the testing of integrated circuits includes a first end portion terminating in a foot ( | 10-23-2008 |
| 20080258747 | TEST EQUIPMENT FOR AUTOMATED QUALITY CONTROL OF THIN FILM SOLAR MODULES - Provided is a method and test system for identifying a defective region of a photovoltaic cell from among a plurality of photovoltaic cells collectively forming a thin film solar module. A probe includes a plurality of test fingers arranged to be substantially simultaneously placed adjacent to an electric contact provided to different regions of one or more of the plurality of photovoltaic cells, and each of the test fingers is to receive an electrical output from the different regions of the one or more photovoltaic cells. A light source emits light to be converted by the photovoltaic cells into the electrical output during testing. A measurement circuit measures a property of the electrical output received from the different regions of the photovoltaic cells and transmits a measured value signal indicative of the property measured by the measurement circuit. And a control unit receives the measured value signal and generates a visible display indicating that at least one of the different regions of the solar module is a defective region based at least in part on the measured value signal, and also indicates a location of the defective region on the solar module. | 10-23-2008 |
| 20080265918 | Object-clamping lid subassembly of a test socket for testing electrical characteristics of an object - The test-socket lid subassembly of the invention consists of a lid for locking the object in the socket unit and a pusher with a handle for clamping the object in the locked position. The pusher is separated from the lid and is inserted into the lid for pressing on the object to fix the latter in the socket only after the lid is locked in place. The pusher is made in the form of a threaded ring, which has an outer thread for engagement with the inner thread in the central opening of the lid member for movement in the direction perpendicular to the contact surface of the object. This provides uniform distribution of pressure on the test object that is locked in the socket subassembly. | 10-30-2008 |
| 20080265919 | SCALABLE WIDEBAND PROBES, FIXTURES, AND SOCKETS FOR HIGH SPEED IC TESTING AND INTERCONNECTS - We introduce a new Periodic micro coaxial transmission line (PMTL) that is capable of sustaining a TEM propagation mode up to THz band. The PMTL can be manufactured using the current photolithographic processes. This transmission line can be embedded in microscopic layers that allow many new applications. We use the PMTL to develop a wideband highly scalable connector that is then used in a Probe that can be used for connecting to microscopic scale Integrated Circuits with picoseconds High Speed Digital and near THz Analogue performance in various stages of development from R&D to production testing. These probes, in one embodiment, provide a thin pen-like vertical probe tip that matches the die pad pattern precisely that can be as agile as a high speed plotter pen, connecting on the fly to any die pattern on a wafer. This approach allows the most valuable part of the test, namely the wafer to remain stationary and safe, and the least costly part of the test, namely the probe to take most of the wear and tear. We further use the embedded PMTL to develop a modular, scaleable and fully automated Universal Test Fixture for testing chips in various stages of development mainly for digital IC chips that can be utilized in production lines with pick and place of chips on tape to test every chip before insertion into circuits. One embodiment includes a low profile wideband Signal Launcher and an alligator type RF Clip that can be used at the edge of PCB's directly for validation broads. The Signal Launcher is used to develop a new versatile Flush Top Test Fixtures for individual device testing in various stages of development from die, to packaged, to Module, to Circuit Boards. The PMTL can also provide Confined Field Interconnects (CFI) between various elements on semiconductor wafers to reduce parasitic and radiation losses and practically eliminating cross talk, thus, increasing the speed of digital IC's. The PMTL is also used to develop a Universal Test Socket, and a Hand Probe with performance up to 220 GHz. | 10-30-2008 |
| 20080265920 | PROBE CARD - Disclosed is a probe card providing an upper structure formed to be separatable from a lower structure and a lower structure including a lower substrate electrically connected with a plurality of the needles and a plurality of the lower terminals independently connected with the needles formed above the lower substrate. In particular, the lower structure of the probe card includes a needle fixing structure, a plurality of the needles fixed on the needle fixing structure, a lower substrate provided on the needle fixing structure while electrically connecting with the needles, and a plurality of the lower terminals formed on the upper surface of the lower substrate in order to be independently connected with the each needle. Meanwhile, the upper structure separatable from the lower structure includes a main substrate and a plurality of the upper terminals formed on the lower surface corresponding to the lower terminals. | 10-30-2008 |
| 20080265921 | PROBE CARD - A probe card includes a base wiring layer, a rewiring layer, and a contactor. The base wiring layer has a non-contactor area and a contactor area that projects to a higher level than the non-contactor area. The rewiring layer is formed on a surface of the base wiring layer so that the contactor area is higher than the non-contactor area. The contactor is provided on a surface of the rewiring layer in a contactor area thereof. | 10-30-2008 |
| 20080265922 | WAFER LEVEL INTERPOSER - Double-sided interposer assemblies and methods for forming and using them. In one example of the invention, an interposer comprises a substrate having a first surface and a second surface opposite of said first surface, a first plurality of contact elements disposed on said first side of said substrate, and a second plurality of contact elements disposed on said second surface of said substrate, wherein said interposer connects electronic devices via said first and said second plurality of contact elements. | 10-30-2008 |
| 20080272792 | Method and Device for Testing of Non-Componented Circuit Boards - The method according to the invention is used to determine deviations of circuit board test points of a series of circuit boards from the CAD data relating to these circuit boards, by scanning the surface of the circuit board by an imaging method and subjecting this image to automatic image analysis so that it may be compared with the CAD data. The CAD data are then suitably corrected so that, with the aid of the corrected CAD data, the circuit board may be tested in a finger tester, with test fingers of the finger tester being controlled on the basis of the deviations found. | 11-06-2008 |
| 20080272793 | Finger Tester for Testing Unpopulated Printed Circuit Boards and Method for Testing Unpopulated Printed Circuit Boards Using a Finger Tester - The present invention relates to a finger tester for the testing of non-componented printed circuit boards using at least two test fingers ( | 11-06-2008 |
| 20080272794 | METHOD OF MANUFACTURING A PROBE CARD - A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements. | 11-06-2008 |
| 20080278185 | ELECTRICAL CONTACT DEVICE AND ITS MANUFACTURING PROCESS - A method of making an electrical contact device includes the step of (a) preparing a substrate, (b) forming a dielectric layer on a surface of the substrate and forming a well on the dielectric layer by means of a non-etching technique, (c) forming a first sacrifice layer in the well, (d) forming a second sacrifice layer on the dielectric layer and the first sacrifice layer and defining a probe body contour and forming a probe body metal layer in the probe body contour and then repeating this step once or several times to form a probe structure, and (e) removing the sacrifice layers to obtain the desired electrical contact device having the substrate and the probe structure. | 11-13-2008 |
| 20080284454 | Test interface with a mixed signal processing device - The present invention relates to a test interface to which a mixed signal processing circuit is integrated, and more particularly to a test interface of a probe card or a DUT card to which a mixed signal processing circuit is integrated, and the mixed signal processing circuit is integrated to pin electronic channels of a tester and the operation process of the mixed signal processing circuit is integrated to the system software of the tester. | 11-20-2008 |
| 20080284455 | PROBE APPARATUS - A probe apparatus includes a load port for mounting therein a carrier having therein a plurality of substrates; a plurality of probe apparatus main bodies, each having a probe card having probes on its bottom surface; a substrate transfer mechanism for transferring the substrates between the load port and the probe apparatus main bodies, the substrate transfer mechanism being rotatable about a vertical axis and movable up and down. The substrate transfer mechanism has at least three substrates capable of moving back and forth independently. Further, at least two wafers are received from the carrier by the substrate transfer mechanism, and then are sequentially loaded into the probe apparatus main bodies. The prove apparatus a high throughput increasing a wafer transfer efficiency. | 11-20-2008 |
| 20080284456 | Test Apparatus of Semiconductor Devices - A test apparatus of a semiconductor device is provided. A signal pin can be electrically connected to a connector and can have a region for electrically connecting to a semiconductor device. The signal pin can be inserted into the connector, and the region of the signal pin for electrically connecting to a semiconductor device can be located on a portion of the signal pin that is not inserted into the connector. | 11-20-2008 |
| 20080290882 | PROBE NEEDLE PROTECTION METHOD FOR HIGH CURRENT PROBE TESTING OF POWER DEVICES - A test system, apparatus and method for applying high current test stimuli to a semiconductor device in wafer or chip form includes a plurality of probes for electrically coupling to respective contact points on the semiconductor device, a plurality of current limiters electrically coupled to respective ones of the plurality of probes, and a current sensor electrically coupled to the plurality of probes. The current limiters are operative to limit current flow passing through a respective probe, and the current sensor is operative to provide a signal when detected current in any contact of the plurality of probes exceeds a threshold level. | 11-27-2008 |
| 20080297182 | SEMICODUCTOR TESTING DEVICE WITH ELASTOMER INTERPOSER - A novel device for testing semiconductor chips is disclosed. A benefit with all the embodiments described herein is that the device may experience zero (or near zero) nascent force. The device may be comprised of a printed circuit board (PCB) that has at least one PCB piercing structure, a probe contactor substrate that has at least one substrate piercing structure, wherein the substrate piercing structure is electrically connected to a probe contactor, and an interposer that has at least one electrical via made of a conductive elastomer. When the PCB piercing structure and the substrate piercing structure pierce the elastomer, the PCB becomes electrically connected to the probe contactor. Instead of the piercing structure, the PCB or the probe contractor substrate may be adhered to the elastomer by an adhesive, such that the PCB becomes electrically connected to the probe contactor. The PCB piercing structure and the substrate piercing structure may include a flying lead wire, soldered pins or pressed pins. The adhesives may include, but are not limited to, screenable conductive surface mount adhesives. Finally, a diagnostic computer may be electrically connected to the PCB to assist in testing the semiconductor chips. | 12-04-2008 |
| 20080297183 | PROBE CARD HAVING COLUMNAR BASE PORTION AND METHOD OF PRODUCING THE SAME - A probe card includes a flat plate-shaped wiring board, a columnar base portion, and a thee-dimensional spiral contactor. The base portion is interposed between a wiring pattern of the wiring board and the bottom of the contactor. | 12-04-2008 |
| 20080297184 | SEMICONDUCTOR TEST APPARATUS - The present invention provides a semiconductor test apparatus that can reduce influence of noise in high-frequency measurement and that can be manufactured inexpensively by simplification of the constitution. A semiconductor test apparatus according to the present invention is one for use in an electrical test of a semiconductor wafer in which numerous integrated circuits each having electrode pads are incorporated. It comprises a probe card and a tester having a connection portion to the probe card. The probe card has numerous probes that can be connected to the electrode pads of the semiconductor wafer and a probe board having on one surface probe lands to which the probes are attached, having on the other surface tester lands corresponding to the probes, and having wiring paths each connecting the probe land and the tester land corresponding to each other. The tester is directly connected to the probe card as the connection portion contacts the tester lands. | 12-04-2008 |
| 20080297185 | Multi probe card unit, probe test device including the multi probe card unit, and methods of fabricating and using the same - A multi probe card unit, a probe test device including the multi probe card unit, and methods of fabricating and using the same are provided. The multi probe card unit may include at least one probe card including a first plurality of probes on a first surface of the at least one probe card and a second plurality of probes on a second surface of the at least one probe card. | 12-04-2008 |
| 20080297186 | MASSIVELY PARALLEL INTERFACE FOR ELECTRONIC CIRCUIT - Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. | 12-04-2008 |
| 20080303539 | Parametric testline with increased test pattern areas - An integrated circuit parametric testline providing increased test pattern areas is disclosed. The testline comprises a dielectric layer over a substrate, a plurality of probe pads over the dielectric layer, and a first device under test (DUT) formed in the testline in a space underlying the probe pads. The testline may also include a second DUT, which is formed in a space underlying the probe pads overlying the first DUT in an overlaying configuration. The testline may further include a polygon shaped probe pad structure providing an increased test pattern area between adjacent probe pads. | 12-11-2008 |
| 20080303540 | Probe card assembly - The invention relates to a probe card assembly comprising a stiffener ( | 12-11-2008 |
| 20080303541 | Method and Apparatus For Increasing Operating Frequency Of A System For Testing Electronic Devices - A test system includes a communications channel that terminals in a probe, which contacts an input terminal of an electronic device to be tested. A resistor is connected between the communications channel near the probe and ground. The resistor reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The channel may be terminated in a branch having multiple paths in which each path is terminated with a probe for contacting a terminal on electronic devices to be tested. Isolation resistors are included in the branches to prevent a fault at one input terminal from propagating to the other input terminals. A shunt resistor is provided in each branch, which reduces the input resistance of the terminal and thereby reduces the rise and fall times of the input terminal. The shunt resistor may also be sized to reduce, minimize, or eliminate signal reflections back up the channel. | 12-11-2008 |
| 20080309355 | VOLTAGE CLAMP CIRCUIT AND SEMICONDUCTOR DEVICE, OVERCURRENT PROTECTION CIRCUIT, VOLTAGE MEASUREMENT PROBE, VOLTAGE MEASUREMENT DEVICE AND SEMICONDUCTOR EVALUATION DEVICE RESPECTIVELY USING THE SAME - In a voltage clamp circuit, a normally-on type field-effect transistor having a negative threshold voltage has a drain connected to an input node, a source connected to an output node and grounded via a resistance element, and a gate supplied with an output voltage of a variable direct-current power supply. When a voltage at the output node becomes higher than a clamping voltage because of voltage drop of the resistance element, the field-effect transistor is tuned off. Accordingly, the output voltage is limited to be at most the clamping voltage. Thus, a response speed is higher than those of conventional voltage clamp circuits using diodes or the like. | 12-18-2008 |
| 20080309356 | Differential Measurement Probe Having a Ground Clip System for the Probing Tips - A differential measurement probe has a ground clip system for electrically coupling outer shielding conductors of differential probing tips together. In one embodiment, the probing tips independently move vertically relative to each other with the ground clip system secured to each of the outer shielding conductors of the probing tips. In a further embodiment, the probing tips move both vertically and horizontally and the ground clip system has a spring wire member that is secured to the probe. The spring wire member is formed with various sections having various angles to each other that allows one section to slidably engage one of the outer shielding conductors on one of the probing tips and another section to slidably engage the outer shielding conductor of the other probing tip. | 12-18-2008 |
| 20080309357 | Differential Measurement Probe Having a Ground Clip System for the Probing Tips - A differential measurement probe has a ground clip system for electrically coupling outer shielding conductors of differential probing tips together. In one embodiment, the probing tips independently move vertically relative to each other with the ground clip system secured to each of the outer shielding conductors of the probing tips. In a further embodiment, the probing tips move both vertically and horizontally and the ground clip system has a spring wire member that is secured to the probe. The spring wire member is formed with various sections having various angles to each other that allows one section to slidably engage one of the outer shielding conductors on one of the probing tips and another section to slidably engage the outer shielding conductor of the other probing tip. | 12-18-2008 |
| 20080309358 | Active wafer probe - A probe suitable for probing a semiconductor wafer that includes an active circuit. The probe may include a flexible interconnection between the active circuit and a support structure. The probe may impose a relatively low capacitance on the device under test. | 12-18-2008 |
| 20080315898 | Acquiring Test Data From An Electronic Circuit - Methods, systems, and computer program products are disclosed for acquiring test data from an electronic circuit by mounting a probe adjacent to a capture point on an electronic circuit board, capturing by the probe an electronic signal of the electronic circuit, digitizing by the probe the captured signal, and transmitting by the probe the digitized signal from the probe through a data communications connection to a remote device. Acquiring test data from an electronic circuit also includes storing by the probe the digitized signal in the probe. Acquiring test data from an electronic circuit may include processing by the probe the digitized signal. Acquiring test data from an electronic circuit also may include synchronizing acquisition of test data by the probe with acquisition of test data by one or more other probes. | 12-25-2008 |
| 20090002001 | INTEGRATED LIGHT CONDITIONING DEVICES ON A PROBE CARD FOR TESTING IMAGING DEVICES, AND METHODS OF FABRICATING SAME - A probe card is disclosed which includes a body, at least one housing in the body, the housing having at least one light opening, and at least one light conditioning device in the at least one light opening in the housing. A method of forming a probe card is also disclosed which includes forming an opening in a body of the probe card, positioning a housing having a light opening in the opening in the body of the probe card and positioning at least one light conditioning device in the light opening in the housing. | 01-01-2009 |
| 20090002002 | Electrical Testing System - Electrical testing system which is mainly used for testing double-sided printed board (DSB) (having terminals which are electrically connected with each other are separately provided on the two sides, respectively) is provided. The system includes a test board which is electrically contacted with the PCB, a test fixture which supports the test board and the PCB, testing probes which output an electrical signal, and a sensor which receives the electrical signal through the PCB and the test board. When the PCB is mounted on the test board, the electrical signal outputted from the testing probes sequentially is transmitted to the test board through the PCB, and based upon whether the sensor receives the electrical signal to thereby determine whether the terminals on the PCB corresponding to the testing probes are under the open circuit or the short circuit condition. | 01-01-2009 |
| 20090002003 | PROBE-TESTING DEVICE AND METHOD OF SEMICONDUCTOR DEVICE - A probe-testing device includes probe tips configured to apply inputs to pads of a semiconductor chip, wherein one of the probe tips is connected to a calibration pad for impedance adjustment and a calibration resistor is connected thereto. | 01-01-2009 |
| 20090002004 | Integrated compound nano probe card and method of making same - An integrated compound nano probe card is disclosed to include a substrate layer having a front side and a back side, and compound probe pins arranged in the substrate layer. Each compound probe pin has a bundle of aligned parallel nanotubes/nanorods and a bonding material bonded to the bundle of aligned parallel nanotubes/nanorods and filled in gaps in the nanotubes/nanorods. Each compound probe pin has a base end exposed on the back side of the substrate layer and a distal end spaced above the front side of the substrate layer. | 01-01-2009 |
| 20090002005 | Substrate Probe Card and Method for Regenerating Thereof - Provided are a substrate of a probe card for installing a plurality of probes thereon to inspect an object by contacting the probes to the object, and a method for repairing the substrate. The substrate includes main channels electrically connected to the probes; and at least one spare channel for replacing the main channels when at least one of the main channels is damaged. Therefore, when some of the main channels of the probe substrate are damaged, the damaged main channels can be repaired using the spare channels and then the probe substrate can be reused, thereby reducing costs required for unnecessary replacement. | 01-01-2009 |
| 20090002006 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MANUFACTURING APPARATUS - In one aspect of the present invention, a manufacturing method of a semiconductor device may include performing an electrical test on a plurality of electronic components on a wafer, generating a mapping data set including category information representing categories of the respective electronic components based on the electrical test result and position information representing positions of the respective electronic components in the wafer, forming bumps on the plurality of electronic components at wafer level in various bump layouts employed in accordance with the categories assigned to the respective electronic components, with reference to the mapping data set, and dicing the wafer to separate the plurality of electronic components into individual chips, after forming the bumps. | 01-01-2009 |
| 20090009197 | PROBE FOR ELECTRICAL TEST - A probe for electrical test comprises an arm region extending in a first direction, and a tip region leading to one side in a second direction intersecting the first direction of the arm region, and has a plate form making a direction interesting the first and second directions a thickness direction. The tip region includes a pedestal portion leading to the arm region and a contact portion leading to the pedestal portion, and the contact portion includes a base portion forming a part of the pedestal portion and a projecting portion leading to the base portion and projecting from the pedestal portion in the second direction. By this, damage to the contact portion is prevented. | 01-08-2009 |
| 20090009198 | PROBING DEVICE - A probing device includes a rack that has an outer support member supporting a circuit layer and a center support member supporting a probe assembly. When the tester touching down the circuit layer of the probing device from the top side, the outer support member of the rack bears this touchdown stress. When the probes of the probe holder touching down the electronic components of an IC wafer under test, the center support member of the rack bears the reaction force from the IC wafer. | 01-08-2009 |
| 20090015275 | Ultra-Fine Area Array Pitch Probe Card - A system and a method of testing a semiconductor die is provided. An embodiment comprises a printed circuit board connected to a space transformation layer, which is connected to a substrate. The substrate uses through silicon vias and a redistribution layer to reduce the pitch of the connections beyond the historical limitations. A probe head using Cobra-style probe pins is connected to the redistribution layer through C4 bumps. | 01-15-2009 |
| 20090015276 | PROBE ASSEMBLY AND METHOD FOR PRODUCING IT - A method of producing a probe assembly which uses thermal energy of a laser light for bonding a plurality of connection pads provided on a probe board and a probe disposed on each connection pad. In the neighborhood of at least one of the connection pads on the probe board, a dummy connection pad with no probe adhered is formed in order to uniform the thermal energy by irradiation of each bonding portion of each connection pad and the corresponding probe. | 01-15-2009 |
| 20090015277 | DEVICE FOR TESTING ELECTRONIC COMPONENTS, IN PARTICULAR ICS, HAVING A SEALING BOARD ARRANGED INSIDE A PRESSURE TEST CHAMBER - In a device for testing electronic components, in particular ICs, under particular pressure conditions, the pressure test chamber comprises contact elements ( | 01-15-2009 |
| 20090021272 | INSPECTION APPARATUS, PROBE CARD AND INSPECTION METHOD - By allowing an electrical conduction between a probe and an electrode by a fritting phenomenon before inspection, simplification of circuit configuration and shortening of inspection time is achieved. A fritting circuit is formed in a probe card of an inspection apparatus for each probe pair consisting of two probes. A capacitor is connected to each fritting circuit. Each fritting circuit is connected in parallel to a power supply circuit having a charging power supply. Each capacitor is charged at one time by the power supply circuit. The probe pair is brought into contact with an electrode of a wafer, and a high-voltage is applied to the probe pair by a power charged in the capacitor, thereby achieving an electrical connection between each probe and the electrode by a fritting phenomenon. Then, an inspection of electrical characteristics is performed by using an electric inspection signal transmitted to each probe. | 01-22-2009 |
| 20090021273 | On-wafer test structures - A test structure for characterizing integrated circuits on a wafer includes a differential cell outputting a differential mode signal in response to a differential mode input signal. The probe pads of the test structure are arrayed linearly enabling placement of the test structure in a saw street between dies. | 01-22-2009 |
| 20090027071 | PROBE TAP - A probe tap that monitors data or signals occurring within a device is disclosed. The probe tap can be used to monitor signals, data, or other communications between components of the device. The probe tap can be connected to traces, pins, or other aspects or components of a device and collects data that can be analyzed. The probe tap can include one or more leads that can be removably connected with or between components of a device. The collected data can be provided to an analyzer for analysis. A pod can be included in the probe tap that is used to prepare the data for analysis by the analyzer. Alternately or additionally, the pod can be included in the analyzer. | 01-29-2009 |
| 20090033346 | GROUP PROBING OVER ACTIVE AREA PADS ARRANGEMENT - A group probing over active area (POAA) pads arrangement includes a chip having a set of bonding pads, at least a first set of probing pads and a second set of probing pads. Each of the first set of probing pads and the second set of probing pads are electrically connected to one of the corresponding bonding pads, respectively. And each of the first set of probing pads and the second set of probing pads are interlaced in a diagonal line pattern. According to a concept of grouping and interlacing the probing pads, each bonding pad obtains at least two probing pads. Therefore times of test probing performed on each probing pad are reduced and repeated probe's pressures toward inter metal dielectric (IMD) layers underneath the probing pads are consequently reduced. | 02-05-2009 |
| 20090033347 | Measuring board for electronic device test apparatus - A performance board able to secure low loss, low reflection, stable transmission characteristics even when using a high frequency signal to test an electronic device and able to suppress signal leakage to the outside and entry of noise, provided with a base board having a signal pattern electrically connected with a socket formed on its front surface, a coaxial connector to which a coaxial cable electrically connecting the performance board and test apparatus is connected, passing through the base board from the back surface toward the front surface, and having a front exposed part of the center contact bent and electrically connected to the signal pattern, and a cover member covering the front exposed part of the center contact and correcting the impedance of the front exposed part. | 02-05-2009 |
| 20090033348 | ELECTRICAL SIGNAL CONNECTOR - A probe card which can be used for testing narrow-pitched chips or multi-chips, and causes no faulty connections between probes and pads or between probes and a circuit board even in a high temperature environment such as in a burn-in test is provided. For this purpose, probe units in which multiple film probes are supported by support rods in a stacked or parallel-arranged manner are placed and fixed in each of the openings in a grid support. A plurality of fixing devices protruding from the grid support at a side to be connected to the circuit board are provided to be inserted in corresponding holes in the circuit board to fix the grid support to the circuit board. There is no or subtle difference between an outer diameter of an inserting section of the fixing device and an inner diameter of the hole in the circuit board around the center of the circuit board with the inserting section inserted in the hole, and the difference is larger at the rest of the area of the circuit board. | 02-05-2009 |
| 20090033349 | PROBE ASSEMBLY - An inexpensive probe assembly is provided which is applicable to narrow pad arrangements of LSI circuit designs, while closely-arranged wiring patterns near probe terminals is distributed effectively on an inspection substrate. A probe assembly is provided which is fabricated by etching metallic foil adhering to a resin film to form a conductive pattern including probing function on the resin film, and stacking or parallel-arranging a plurality of the resin films with probing function, the probe assembly used for inspecting circuits on a semiconductor chip by making probe tips collectively contact electrode pads on the chip, characterized in that the probe assembly includes an electrical terminal which is connected to the probe via the conductive pattern and is made to contact with a connecting land of the circuit board at an opposite side in a first direction (vertical direction) on the same plane as the probe. | 02-05-2009 |
| 20090039903 | Contact load measuring apparatus and inspecting apparatus - An inspecting apparatus is provided for inspecting electrical characteristics of an object (W) to be inspected, such as a semiconductor wafer. The inspecting apparatus is provided with a placing table ( | 02-12-2009 |
| 20090039904 | Probe card, production method thereof and repairing method of probe card - A probe card | 02-12-2009 |
| 20090039905 | COMPOSITE CONDUCTIVE SHEET, METHOD FOR PRODUCING THE SAME, ANISOTROPIC CONDUCTIVE CONNECTOR, ADAPTER, AND CIRCUIT DEVICE ELECTRIC INSPECTION DEVICE - Disclosed herein are a composite conductive sheet that has rigid conductors movable in a thickness-wise direction of an insulating sheet without falling off from the insulating sheet and is easy to handle by itself, a production process thereof, and an anisotropically conductive connector, an adaptor device and an electrical inspection apparatus for circuit devices, which are each equipped with this composite conductive sheet. | 02-12-2009 |
| 20090039906 | CIRCUIT BOARD APPARATUS FOR WAFER INSPECTION, PROBE CARD, AND WAFER INSPECTION APPARATUS - Disclosed herein are a circuit board device for wafer inspection having high connection reliability, and a probe card and a wafer inspection apparatus, which are equipped with this circuit board device for wafer inspection. The circuit board device for wafer inspection has a board body and a connector device provided on the board body and obtained by stacking a plurality of connector units on each other, wherein each of the connector units has a first anisotropically conductive elastomer sheet, a composite conductive sheet, a second anisotropically conductive elastomer sheet and a pitch converting board, the composite conductive sheet has an insulating sheet, in which a plurality of through-holes have been formed, and rigid conductors respectively arranged into the through-holes in this insulating sheet so as to protrude from both surfaces of the insulating sheet, and in each of the rigid conductors, terminal portions having a diameter greater than the diameter of the through-hole are formed on both ends of a body portion inserted into the through-hole in the insulating sheet in order for the conductor to be provided movably in the thickness-wise direction of the insulating sheet. | 02-12-2009 |
| 20090039907 | PROBE CARD FOR SEMICONDUCTOR TEST - A probe card for testing semiconductor devices is disclosed, which can precisely test semi-conductor chips, in which probes, probe bars, and a probe block housing of the probe card are improved, such that the durability of each part of the probe card is increased. The probe card comprises: a probe for absorbing and dispersing elasticity; a probe bar for receiving the probe and preventing the probe from bending; and a probe block housing for mounting probe blocks connected in parallel with each other. Each probe block is formed as the probe bars are assembled thereto. | 02-12-2009 |
| 20090039908 | MICROSTRUCTURE INSPECTING APPARATUS AND MICROSTRUCTURE INSPECTING METHOD - A microstructure inspecting apparatus for evaluating a characteristic of at least one microstructure having a movable section formed on a substrate, includes: a probe, which electrically connects with pads formed on the microstructure, for obtaining an electric signal of the microstructure; a plurality of nozzles, positioned in the vicinity of the movable section of the microstructure, for discharging or sucking a gas; a nozzle flow rate controller for controlling a flow rate of the gas discharged from or sucked into the plurality of nozzles; and an evaluation unit for detecting a displacement of the movable section of the microstructure by using the electric signal obtained through the probe, wherein the displacement is made by the gas discharged from or sucked into the plurality of nozzles, and evaluating the characteristic of the microstructure based on the detected result. | 02-12-2009 |
| 20090045826 | Measuring probe with optical cable - Housing of measuring part of probe is made out of electrically non-conductive material, most common plastic; | 02-19-2009 |
| 20090045827 | Multi-Site Probe - Various probe substrates for probing a semiconductor die and methods of use thereof are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first matrix array of conductor pins and a second matrix array of conductor pins on a probe substrate. The second matrix array of conductor pins is separated from the first matrix array of conductor pins by a first pitch along a first axis selected to substantially match a second pitch between a first semiconductor die and a second semiconductor die of a semiconductor workpiece. | 02-19-2009 |
| 20090045828 | Fine Pitch Testing Substrate Structure And Method Of Manufacturing The Same - The present invention provides a newly designed testing substrate for solving the problem with respect to fine pitches, and a method of manufacturing the testing substrate. The wiring space within the fine pitch can be enlarged by means of a circuit design with through holes, blind vias and stack vias, in association with process technologies for fine lines, blind vias, buried vias and filling vias. The manufactured testing substrate comprises a resting substrate and a probe base, being applicable to the test for IC's or packaged articles. | 02-19-2009 |
| 20090051377 | Probe card and method for assembling the same - A probe card and a method for assembling the same, the probe card comprises a base plate, a plurality of probes, a fixing ring, and a fixing member. The fixing ring is provided with a hole and the outer wall of its bottom is used for connecting the probes. The fixing ring is spaced from the probes in a distance so that when the fixing ring is inserted through a hole of the base plate, the terminal ends of main bodies of the probes are located under the hole while the anterior ends are electronically connected with the base plate or outer circuit. The fixing member is inserted through the hole of the fixing ring, the terminal end of which protrudes out of the hole so that a micro strip line is formed between the terminal end of the fixing member and the terminal ends of the probes. | 02-26-2009 |
| 20090051378 | Air Bridge Structures And Methods Of Making And Using Air Bridge Structures - A probe card assembly, according to some embodiments of the invention, can comprise a tester interface configured to make electrical connections with a test controller, a plurality of electrically conductive probes disposed to contact terminals of an electronic device to be tested, and a plurality of electrically conductive data paths connecting the tester interface and the probes. At least one of the data paths can comprise an air bridge structure trace comprising an electrically conductive trace spaced away from an electrically conductive plate by a plurality of pylons. | 02-26-2009 |
| 20090051379 | METHOD OF TREATING AND PROBING A VIA - A method of treating a via connected with a substrate and a method of probing the via are disclosed. A pattern of a lead-free solder paste is applied around a hole of the via without completely covering a pad of the via. The paste is reflowed to form a pattern of a lead-free solder on a pad that covers only a portion of a surface area of the pad and is positioned around the hole. The solder may be substantially symmetrically positioned around the hole. A flux generated during reflow is insufficient to plug the hole. The lead-free solder can be probed by a blade probe including collinear first and second edges and having a preferred orientation relative to the pattern of the lead-free solder. | 02-26-2009 |
| 20090051380 | LRL VECTOR CALIBRATION TO THE END OF THE PROBE NEEDLES FOR NON-STANDARD PROBE CARDS FOR ATE RF TESTERS - A method and apparatus for radio frequency vector calibration of s-parameter measurements to the tips of the wafer probe needles of an automatic test equipment production tester. The method involves a modified Line-Reflect-Line (LRL) calibration routine that uses a Thru-Reflect-Line to LRL shift to eliminate the need for a precisely characterized reflect standard used during a conventional LRL calibration. The method further involves de-embedding the non-ideal effects of the non-zero length thru standard used during the calibration routine to improve measurement accuracy of the tester. The apparatus may involve the use of RF relays to allow multiple wafer probe needles to share RF test ports. | 02-26-2009 |
| 20090058438 | WAFER, TEST SYSTEM THEREOF, TEST METHOD THEREOF AND TEST DEVICE THEREOF - A wafer, a test system thereof, a test method thereof and a test device thereof are provided. The present invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer. | 03-05-2009 |
| 20090058439 | ELECTRONIC DEVICE TEST SYSTEM - When the number of DUTs carried on a loader buffer and scheduled to be held by contact arms at the next test is less than N, a DUT at a contact arm corresponding to a missing position at the loader buffer among the N number of DUTs being held for execution of a current test is held as it is without being ejected. While holding this DUT, the DUTs carried at the loader buffer for execution of the next test are picked up and the test is executed in that state. | 03-05-2009 |
| 20090058440 | PROBE ASSEMBLY, METHOD OF PRODUCING IT AND ELECTRICAL CONNECTING APPARATUS - A probe assembly for use in electrical measurement of a device under test. The probe assembly comprises a plate-like probe base plate with bending deformation produced in a free state without load, and a plurality of probes formed on one face of the probe base plate to project from the face. All the tips of the probes are positioned on the same plane parallel to an imaginary reference plane of the probe base plate. | 03-05-2009 |
| 20090058441 | ELECTRICAL TEST PROBE - A probe for electrical test comprises a plate-shaped main portion having a base end to be attached to a support board and a tip end opposite the base end, and a probe tip portion arranged at the tip end of the main portion and having a probe tip to contact an electrode of a device under test, the main portion being made of a tenacity material. The main portion includes a conductive material extending from the base end to the tip end and at least part of which is buried within the tenacity material, and the tenacity material has higher resiliency than that of the conductive material while the conductive material has higher conductivity than that of the tenacity material. As a result, disorder of a signal provided via the probe is decreased without losing elastic deformation. | 03-05-2009 |
| 20090058442 | PROBER FOR TESTING COMPONENTS - A prober for testing components comprises a lower frame, over which a probe holder plate is disposed at a distance therefrom for receiving test probes that make contact with the components to be tested and to which a displacement device is connected. A substrate carrier is disposed in the space between the frame and the probe holder plate, and the probe holder plate is provided with an opening, below which the substrate carrier can be displaced. To expand the scope of application of probers used for testing components, all those components of the prober that surround the substrate are made from a non-magnetic material. | 03-05-2009 |
| 20090058443 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, METHOD OF TESTING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND PROBE CARD USED FOR BURN-IN STRESS AND D/S TESTS - According to one embodiment of the invention, a semiconductor chip includes: a test target circuit to which a given burn-in stress is applied; and a burn-in counter that is configured: to acquire a first parameter indicating a test voltage applied to the test target circuit and a second parameter indicating a temperature of the test target circuit; to estimate the given burn-in stress from the first parameter and the second parameter; and to output burn-in stress information corresponding to the estimated burn-in stress. | 03-05-2009 |
| 20090066349 | PROBE SYSTEM - A probe system including a body, a testing apparatus, a probe card, and a strengthening mechanism is provided. The testing apparatus is disposed above the body. The probe card is disposed between the testing apparatus and the body. The strengthening mechanism is disposed between the probe card and the testing apparatus to have the probe card leaned against it. The strengthening mechanism has at least one elastic element. | 03-12-2009 |
| 20090066350 | WIRELESS INTERFACE PROBE CARD FOR HIGH SPEED ONE-SHOT WAFER TEST AND SEMICONDUCTOR TESTING APPARATUS HAVING THE SAME - A wireless interface probe card includes a substrate member and a transmission member. The substrate member has a plurality of probe terminals arranged at a constant pitch. The probe terminals may directly contact a plurality of pads arranged at a constant pitch on each of a plurality of semiconductor chips arranged on a wafer to perform a test of the semiconductor chips arranged on the wafer. The transmission member is arranged on the substrate member, wirelessly receives a test signal and provides the received test signal to the pads of the wafer through the probe terminals, and wirelessly and externally transmits an electrical characteristic signal provided from the pads of the wafer through the probe terminals. | 03-12-2009 |
| 20090066351 | ELECTROCHEMICALLY FABRICATED MICROPROBES - Multilayer test probe structures are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments each probe structure may include a plurality of contact arms or contact tips that are used for contacting a specific pad or plurality of pads wherein the arms and/or tips are configured in such away so as to provide a scrubbing motion (e.g. a motion perpendicular to a primary relative movement motion between a probe carrier and the IC) as the probe element or array is made to contact an IC, or the like, and particularly when the motion between the probe or probes and the IC occurs primarily in a direction that is perpendicular to a plane of a surface of the IC. In some embodiments arrays of multiple probes are provided and even formed in desired relative position simultaneously. | 03-12-2009 |
| 20090072844 | WAFER INSPECTING SHEET-LIKE PROBE AND APPLICATION THEREOF - Disclosed herein are a sheet-like probe for wafer inspection, by which a good electrically connected state to a wafer can be surely achieved even when the pitch of electrodes to be inspected in the wafer is extremely small, and applications thereof. | 03-19-2009 |
| 20090072845 | LINK ANALYSIS COMPLIANCE AND CALIBRATION VERIFICATION FOR AUTOMATED PRINTED WIRING BOARD TEST SYSTEMS - A transmission line on a printed wiring board is tested and printed wiring board manufacturing variability is assessed. A response of the transmission line to a signal test pattern is measured. A network including a plurality of components connected by the transmission line is then simulated. The simulated network is based on the measured scattering parameters and virtual models representative of each of the components in the network. A system-level output response of the simulated network to a simulated input signal is analyzed, and the printed wiring board is characterized based on a comparison of the system-level output response to a printed wiring board performance metric threshold. | 03-19-2009 |
| 20090072846 | HIGH FREQUENCY DIFFERENTIAL TEST PROBE FOR AUTOMATED PRINTED WIRING BOARD TEST SYSTEMS - A differential test probe for a printed wiring board test system includes a probe body having a proximal end and a distal end. Each of a plurality of coaxial cables extending from the proximal end to the distal end. The plurality of coaxial cables each includes a center conductor having an axial aperture at the distal end. The differential test probe also includes a plurality of signal pins that are each mounted in the axial aperture of the center conductor of one of the plurality of coaxial cables to electrically couple the signal pin to the center conductor. A plurality of ground pins are coupled to the probe body and selectively arranged relative to the plurality of signal pins to provide multiple signal to ground paths between the plurality signal pins and the plurality ground pins. | 03-19-2009 |
| 20090072847 | Apparatus for testing a semiconductor device and a method of fabricating and using the same - Example embodiments provide for an apparatus for testing various kinds of semiconductor devices having different distances between probes. Example embodiments also provide for a method of fabricating and using said apparatus. In accordance with example embodiments, an apparatus for testing a semiconductor device may include at least one cable penetrating a plate and extending from a surface of the plate. The at least one cable may include at least one signal line and at least one ground line. The apparatus may also include a pair of probes connected to the at least one signal line and configured to contact a first pad of a semiconductor device and a second pad of the semiconductor device. In accordance with example embodiments, the apparatus for testing a semiconductor device may also include a control unit on the surface of the plate configured to control a distance between the pair of probes. | 03-19-2009 |
| 20090072848 | Electrical Contactor, Especially Wafer Level Contactor, Using Fluid Pressure - An electrical interconnect assembly and methods for making an electrical interconnect assembly. In one embodiment, an interconnect assembly includes a flexible wiring layer having a plurality of first contact elements and a fluid containing structure which is coupled to the flexible wiring layer. The fluid, when contained in the fluid containing structure, presses the flexible wiring layer towards a device under test to form electrical interconnections between the first contact elements and corresponding second contact elements on the device under test. In a further embodiment, an interconnect assembly includes a flexible wiring layer having a plurality of first contact terminals and a semiconductor substrate which includes a plurality of second contact terminals. A plurality of freestanding, resilient contact elements, in one embodiment, are mechanically coupled to one of the flexible wiring layers or the semiconductor substrate and make electrical contacts between corresponding ones of the first contact terminals and the second contact terminals. In another embodiment, a method of making electrical interconnections includes joining a flexible wiring layer and a substrate together in proximity and causing a pressure differential between a first side and a second side of the flexible wiring layer. The pressure differential deforms the flexible wiring layer and causes a plurality of first contact terminals on the flexible wiring layer to electrically connect with a corresponding plurality of second contact terminals on the substrate. | 03-19-2009 |
| 20090079448 | Method And Apparatus For Testing Devices Using Serially Controlled Resources - Methods and apparatus for testing devices using serially controlled resources have been described. Examples of the invention can relate to an apparatus for testing a device under test (DUT). In some examples, an apparatus can include an integrated circuit (IC) having a serialized input coupled to test circuits, the test circuits selectively communicating test signals with the DUT responsive to a test control signal on the serialized input. | 03-26-2009 |
| 20090079449 | Test Structures, Systems, and Methods for Semiconductor Devices - Test structures, systems, and methods for semiconductor devices are disclosed. In one embodiment, a test structure for a semiconductor device includes a winding disposed in at least one conductive material layer of the semiconductor device. At least a portion of the winding extends proximate a perimeter of the semiconductor device. The winding includes a first end and a second end. A first test pad is coupled to the first end of the winding, and a second test pad is coupled to the second end of the winding. | 03-26-2009 |
| 20090079450 | SEMICONDUCTOR TEST DEVICE - A semiconductor test device. In one embodiment, the test device includes a drill bit. The test device is configured to rotate the drill bit, at least after contacting the semiconductor device, for penetrating into the semiconductor device. | 03-26-2009 |
| 20090079451 | High frequency probe - A high frequency probe has contact tips located within the periphery of a terminal section of a coaxial cable and shielded by a ground conductor of the coaxial cable. | 03-26-2009 |
| 20090085590 | Method And Apparatus For Testing Devices Using Serially Controlled Intelligent Switches - Methods and apparatus for testing devices using serially controlled intelligent switches have been described. In some embodiments, a probe card assembly can be provided that includes a plurality of integrated circuits (ICs) serially coupled to form a chain, the chain coupled to at least one serial control line, the plurality of ICs including switches coupled to test probes, each of the switches being programmable responsive to a control signal on the at least one serial control line. | 04-02-2009 |
| 20090085591 | PROBE TIP INCLUDING A FLEXIBLE CIRCUIT BOARD - A probe tip for attaching to a device to be tested includes a flexible circuit board, at least one contact pad arranged to be able to be attached to at least one contact of a probe tip connector, at least one electrical component having first and second ends, and at least one test pad arranged to be able to be attached to the device to be tested. The at least one contact pad is connected to the first end of the at least one electrical component, and the at least one test pad is connected to the second end of the at least one electrical component. Each of the electrical components of the probe tip is connected to at least one contact pad and is connected to at least one test pad. | 04-02-2009 |
| 20090085592 | PROBING A DEVICE - An electronic device is moved into a first position such that terminals of the electronic device are adjacent probes for making electrical contact with the terminals. The electronic device is then moved horizontally or diagonally such that the terminals contact the probes. Test data are then communicated to and from the electronic device through the probes. | 04-02-2009 |
| 20090091342 | Node Extender for In-Circuit Test Systems - A node extender adaptor to enable existing in-circuit test systems to qualify printed circuit boards with a node count larger than the number of channels available on the in-circuit tester. The node extender adaptor routes signal channels within the in-circuit test platform to a probe from multiple probes in a test fixture. The probes connect to nets on a PCB undergoing qualification tests. The node extender adaptor sits atop test resources. A custom made test fixture attached onto the node extender adaptor. The node extender adaptor comprises multiple channel router line cards. Switches on the channel router line cards facilitate the switching of channels to one of the multiple probes. | 04-09-2009 |
| 20090091343 | METHOD FOR MAKING A CONDUCTIVE FILM AND A PROBE CARD USING THE SAME - A method for manufacturing a conductive film as well as the structure thereof and a probe card using the same are provided in the invention. The conductive film is substantially a stacked structure of a specific thickness formed by the adhering and stacking of at least an substrate in a vacuum environment by the use of surface processing and mechanical healing whereas each substrate has an array of metal micro-threads formed thereon, in which the plural metal micro-threads, each being wrapped in an insulating film, are arranged on the substrate to form the array in a unidirectional and single-layered manner by the use of a LIGA process and polymer thin film technology. In an exemplary embodiment, the insulating film can be a polymer thin film of high dielectric constant, being made of a material such as polydimethylsiloxane (PDMA) or polyimide (PI); and the metal micro-thread is made of a high conductivity and high strength Ni—Co alloy. Moreover, the so-formed conductive film can be cut into any desired dimensions by the use of an energy beam, such as laser beam, ion beam and plasma beam, etc. while combining the conductive film with a panel so as to be used for forming a probe card with large area detection ability that is low-cost, ease-to-maintain and capable of being adapted for wafers of various bonding pad arrangements. | 04-09-2009 |
| 20090096472 | Replaceable Probe Apparatus for Probing Semiconductor Wafer - A probe apparatus is provided with a plurality of probe tiles, an interchangeable plate for receiving the probe tiles, a floating plate being disposed between the respective probe tile and a receiving hole on the interchangeable plate, and a control mechanism providing multi-dimensional freedom of motions to control a position of the probe tile relative to the respective receiving hole of the interchangeable plate. A method of controlling the floating plate is also provided by inserting a pair of joysticks into two respective adjustment holes disposed on the floating plate and moving the pair of joysticks to provide translational motions (X-Y) and rotational (theta) motion of the floating plate, and turning the pair of jack screws clockwise and counter-clockwise to provide a translational motion (Z) and two rotational (pitch and roll) motions of the floating plate. | 04-16-2009 |
| 20090102495 | Vertical guided probe array providing sideways scrub motion - Improved probing of closely spaced contact pads is provided by an array of guided vertical probes that has a sideways scrub relative to the line of contact pads. With this orientation of scrub motion, the probes can be relatively thin along the contact line, and relatively thick perpendicular to the contact line. The thin dimension of the probes allows for probing closely spaced contact pads, while the thick dimension of the probes provides mechanical robustness and current carrying capacity. The probes have a predetermined curvature in a plane including the contact line, to help determine the amount of scrub motion during contact. In a preferred embodiment, an array of probes is provided for probing two closely spaced and parallel rows of contact pads, offset from each other by half the contact pad pitch. | 04-23-2009 |
| 20090102496 | TEST SYSTEM AND METHOD FOR REDUCING TEST SIGNAL LOSS FOR INTEGRATED CIRCUITS - An integrated circuit test system includes a probe card, a driver, a receiver, and a first switch. The driver is coupled to the probe card via a first signal line. The receiver is coupled to the probe card via a second signal line. The first switch is coupled between the probe card and the first signal line. After the driver outputs a test signal to a device under test via the first signal line, the first switch is turned off, and then the receiver reads the test signal via the second signal line. Thus, the test signal loss can be reduced. | 04-23-2009 |
| 20090108857 | Apparatus for testing concentration-type solar cells - There is disclosed an apparatus for testing concentration-type solar cells. The apparatus includes a light source for emitting light, a focusing unit for focusing the light emitted from the light source and turning the same into a light beam, a testing unit for testing any one of solar cells of a wafer; and a wafer-positioning unit for moving the wafer horizontally and vertically, thus brining a targeted one of the solar cells into contact with the testing unit. | 04-30-2009 |
| 20090108858 | METHODS AND SYSTEMS FOR CALIBRATING RC CIRCUITS - A calibration apparatus includes an RC integrator circuit. The calibration apparatus further includes a bandwidth setting controller to provide a bandwidth setting code indicating a reference bandwidth value for calibration of the RC integrator circuit and a capacitance code generator, coupled to the RC integrator circuit, to generate a capacitance code to adjust a capacitance of the RC integrator circuit using the bandwidth setting code and a current capacitance value of the RC integrator circuit. | 04-30-2009 |
| 20090108859 | TESTING CIRCUIT BOARD - The invention discloses a testing circuit board for placing a device under test and further testing the device under test according to a plurality of testing signals generated by a tester. The testing circuit board includes a circuit board and a plurality of sets of sockets. The circuit board includes a plurality of connecting holes. The plurality of sets of sockets are located on a plurality of connecting holes and electrically connects to the device under test via a plurality of connecting interfaces for transferring the plurality of testing signals to test the device under test. | 04-30-2009 |
| 20090108860 | VERSATILE MATERIALS PROBE - Disclosed is an electrical measurement probe including two probe blocks, each probe block having a connection face and a measurement face. Each probe block also includes a plurality of spring loaded pogo pins. Each pogo pin has a first end that extends to the connection face and a second end that protrudes from the measurement face. The two probe blocks are attached to a top plate. The top plate is attached to a face of each probe block opposite to the measurement face of the probe block. | 04-30-2009 |
| 20090115437 | HIGH TEMPERATURE RANGE ELECTRICAL CIRCUIT TESTING - An electrical circuit testing assembly that includes a mechanical reference that is relatively stationary as compared to a circuit under test. A probe support assembly is coupled to the mechanical reference and includes probes for contacting interconnect pads on the circuit under test. Optionally, the probe support structure is attached to the mechanical reference via a column that is thermally resistive. Also optionally, a testing circuitry support structure (e.g., a printed circuit board) is not rigidly attached to the mechanical reference or to the probe support structure, thereby permitting the testing circuitry support structure to float with respect to the probe support structure. | 05-07-2009 |
| 20090115438 | REMANUFACTURE OF ELECTRONIC ASSEMBLIES - A method for remanufacturing an electronic assembly allows the assembly to be disassembled, tested and reassembled despite certain components being permanently affixed to a housing of the assembly. The electronic assembly includes a circuit assembly within the housing. During remanufacture, a first portion of the housing is removed to expose a first side of the circuit assembly and a second portion of the housing is removed to expose a second side of the circuit assembly. When removing the second portion of the housing, one of the components of the circuit assembly may also be removed. During remanufacture a connector assembly including a replacement component substantially similar to the removed component, and including one or more pins connected to the replacement component and situated to mate with one or more empty sockets of the circuit assembly is used to facilitate testing of the assembly. | 05-07-2009 |
| 20090115439 | Methods for making contact device for making connection to an electronic circuit device and methods of using the same - Improved contact devices and methods for producing contact devices and using such contact devices to produce electronic devices are disclosed. A contact device having a plurality of nominally coplanar first contact elements makes electrical contact with corresponding nominally coplanar second contact elements of an electronic device such an integrated circuit or liquid crystal or other display when the contact device and the electronic device are positioned so that the plane of the first contact elements is substantially parallel to the plane of the second contact elements and relative displacement of the devices is effected in a direction substantially perpendicular to the plane of the first contact elements and the plane of the second contact elements. The contact device preferably consists of a stiff substrate having a major portion with fingers projecting therefrom in cantilever fashion, each finger having a proximal end at which it is connected to the major portion of the substrate and an opposite distal end and there being one or two contact elements on the distal end of each finger. | 05-07-2009 |
| 20090121731 | DIAGNOSTIC JUMPER - A jumper including a control module and a plurality of conduits connected to the control module is provided. A connector is connected to each of the conduits. The control module controls the flow of a communications medium through the conduits and the control module. | 05-14-2009 |
| 20090128171 | Microstructure Probe Card, and Microstructure Inspecting Device, Method, and Computer Program - An inspecting method which is for a microstructure with a movable portion and executes a highly precise inspection without damaging a probe or an inspection electrode by supressing the effect of a needle pressure in contacting the probe to the inspection electrode is provided. | 05-21-2009 |
| 20090128172 | CALIBRATION BOARD FOR ELECTRONIC DEVICE TEST APPARATUS - A calibration board mounted on a socket when calibrating an electronic device test apparatus for testing an IC by bringing ball contacts of the IC into electrical contact with contact terminals of the socket includes calibration terminals for electrically contacting the contact terminals; and a board comprising an insulating member and provided with the calibration terminals, wherein the calibration terminals have spherical members sticking out from the board toward the contact terminals so as to correspond to the shapes of the contact terminals. | 05-21-2009 |
| 20090128173 | TESTING SYSTEM AND METHOD - An exemplary testing system for measuring an electronic device includes a main controller for generating a control signal, a signal generator for outputting a predetermined test input signal according to the control signals, an instrument unit comprising a plurality of instruments, and a testing port comprising a plurality of probes. The probes are configured for connecting corresponding testing points of the electronic device to the signal generator and the instruments. The predetermined test input signal is transmitted to the electronic device via the testing port, the instrument unit processing a test result signals outputted by the electronic device and outputting a result data, and the main controller receiving the result data and computing whether the result data is within a predetermined range. A related testing method is also provided. | 05-21-2009 |
| 20090128174 | Probe card using thermoplastic resin - Disclosed is a probe card using thermoplastic resin. The probe card includes: a printed circuit board; a probe head that includes a plurality of terminals disposed on one surface thereof, the terminals being electrically connected to the printed circuit board; and a plurality of probe tips electrically connected to a plurality of the terminals and disposed on the other surface of the probe head, whereas the other surface of the probe head is formed of thermoplastic resin. According to the probe card, it is possible to reduce an inferior goods rate by protecting the probe head even during an etching process. | 05-21-2009 |
| 20090128175 | PROBE UNIT SUBSTRATE - A ceramic substrate has, on its surface, a multilayer wiring division, on which micro cantilever type probes are fixed. The multilayer wiring division has the first conductor layer, which includes through-hole junction pads, flatness improvement rings surrounding the through-hole junction pads and a grounding region further surrounding the flatness improvement rings. Since the flatness improvement rings are located around the through-hole junction pads, the surface of the first insulating layer, which is located above the first conductor layer, is free from severe undulation even near the through-hole junction pads. Accordingly, the multilayer wiring division has less irregularity in shape as a whole, and thus the probe mounting pads on the surface of the second insulating layer do not slope but keep almost horizontal. The probe unit substrate according to the invention has an advantage of less surface undulation and having non-sloping probe mounting pads without using a complicated manufacturing process. | 05-21-2009 |
| 20090128176 | HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF - The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer. | 05-21-2009 |
| 20090134891 | IC TESTER - An object of the invention is to implement an IC tester wherein an analog test module can be provided at a test head while maintaining flexibility of the test head. The IC tester comprises an analog test module for testing an analog signal against the device under test. The analog test module comprises a main substrate, connected to the device under test, a first sub-substrate connected to the main substrate, the first sub-substrate comprising first analog circuits and first digital circuits electrically connected to the first analog circuits, wherein an analog test is conducted by the first analog circuits, and the first digital circuits, and a second sub-substrate connected to the main substrate, the second sub-substrate comprising second analog circuits and second digital circuits electrically connected to the second analog circuits, wherein an analog test is conducted by the second analog circuits, and the second digital circuits. | 05-28-2009 |
| 20090134892 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes power supply pads of two or more kinds, switches each of which is connected between adjacent two of the power supply pads to allow short-circuiting them, and at least one control line connected to control terminals of the switches according to the kinds of the power supply pads connected to the switches. | 05-28-2009 |
| 20090134893 | Test Instrument Probe with MEMS Attenuator Circuit - One or more micromachined (MEMS) switches switch attenuators, such as resistors, into or out of a signal path, such as of a test instrument. The MEMS switches can be fabricated on the same substrate as the attenuators, or the switches or attenuators can be mounted on the same substrate as the others are fabricated. An instrument probe includes attenuators and MEMS switches that are controlled by the instrument and/or by a control circuit in the probe. Optionally, the probe includes reactive elements, such as capacitors, and MEMS switches to compensate for electrical characteristics of the probe and/or probe lead, and the probe or a test instrument automatically sets the MEMS switches to connect appropriate ones of the reactive elements to a signal path within the probe. | 05-28-2009 |
| 20090140756 | PROBE MEMBER FOR WAFER INSPECTION, PROBE CARD FOR WAFER INSPECTION AND WAFER INSPECTION EQUIPMENT - Disclosed herein are a probe member for wafer inspection, a probe card for wafer inspection and a wafer inspection apparatus, by which a good electrically connected state can be surely achieved, positional deviation by temperature change can be prevented, and the good electrically connected state can be stably retained even when a wafer has a diameter of 8 inches or greater, and the pitch of electrodes to be inspected is extremely small. | 06-04-2009 |
| 20090140757 | Microdisplay Assemblies and Methods of Packaging Microdisplays - Microdisplay assemblies, methods of packaging microdisplays, and methods of testing microdisplays are disclosed. In accordance with one embodiment, a microdisplay assembly includes a support and a microdisplay disposed on the support. The microdisplay includes a semiconductor workpiece mounted to the support and an optical device region disposed over the semiconductor workpiece. A plurality of contacts is disposed over a portion of the semiconductor workpiece, wherein each of the plurality of contacts comprises a protruding feature. | 06-04-2009 |
| 20090146672 | Double Ended Contact Probe - It is an object of the present invention to provide a double-ended contact probe that can be improved in productivity to ensure that the contact members are stably movable with respect to each other, and electrically connected to each other. The double-ended contact probe comprises first and second conductive members | 06-11-2009 |
| 20090146673 | Manufacturing method of probe card and the probe card - A manufacturing method for probe card according to the present invention includes following processes. A film is formed on the surface of a circuit board. A connecting terminal and joint member are formed by etching the film, and the surface of the joint member is polished. An inspection contacting structure is assembled. The inspection contacting structure is moved proximity to a circuit board. The lower surface of a contactor and joint member are attached so as to contact the front end of a probe penetrating and passing through the contactor to the connecting terminal. | 06-11-2009 |
| 20090146674 | INSPECTION APPARATUS - An inspection apparatus includes an electrical connection member which is configured to remove flux attached to a part to be inspected of an object to be inspected, a base member which is provided with the electrical connection member, a driving member which is configured to move the base member relative to the object to be inspected, a control member which is configured to control an operation of the driving member, and an inspection start-up member which is configured to send an operation start signal to the control member, when the operation start signal is sent from the inspection start-up member to the control member, the base member is moved by the driving member, and the electrical connection member is brought into contact with the part to be inspected of the object to be inspected a predetermined number of times, by a control of the control member. | 06-11-2009 |
| 20090153159 | Probing Adapter for a Signal Acquisition Probe - A probing adapter has a support member receiving a probing tip assembly having probing arms. The probing tip assembly is mounted to the support member via a rotational joint having elastomeric member disposed in the probing arms with each of the probing arms having a pivot point disposed away from the rotational joint. Each of the probing arms supports a removable probing tip substrate having a probing tip at one end electrically coupled via an electrical signal conductor to an electrical connector at the other end. Substrate retention clips secure the removable probing tip substrates to the probing arms. A probing tip positioning member is mounted to the probing arms for varying the distance between the probing tips on the removable probing tip substrates. | 06-18-2009 |
| 20090153160 | CIRCUIT BOARD TEST CLAMP - A circuit board test clamp is configured to test a circuit board via a tester having a probe. The circuit board test clamp includes a clamping element configured to clamp on the circuit board and a testing element mounted on the clamping element. The testing element includes a first test probe and a second test probe. When the circuit board is clamped by the clamping element, the first test probe electrically contacts a test point of the circuit board, and the second test probe is electrically connected to the probe of the tester. | 06-18-2009 |
| 20090153161 | Probe Holder and Probe Unit - A probe holder is for containing a plurality of probes for inputting and outputting an electrical signal to and from a circuitry when the probes come in contact with the circuitry. The probe holder includes a distal end for holding the probes; a proximal end that supports the distal end; and a flexure-causing unit between the distal end and the proximal end to cause a flexure of the distal end relative to the proximal end. | 06-18-2009 |
| 20090153162 | Sharing conversion board for testing chips - The invention relates to a device interface board for testing chips, which is cooperatively installed with one of a plurality of probe cards. Each of the plurality of probe cards is provided with a specified wiring area and a first public signal area, the specified wiring area being electrically connected with the first public signal area. The first public signal area of each of the plurality of probe cards is located in a same particular area, and the specified wiring area of each of the plurality of probe cards is electrically connected with a testing jig and is different depending on a different testing jig. The device interface board comprises a chip test area and a second public signal area, in which the chip test area is used to carry a chip under test and is electrically connected with the second public signal area, whereby, through electrical connection between the device interface board and the first public signal area of each of the plurality of probe cards, test signals are transferred between the testing jig and the chip under test, and testing of chips under test having the same model are accomplished between different testing jigs. | 06-18-2009 |
| 20090153163 | CIRCUIT BOARD HAVING BYPASS PAD - An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided. | 06-18-2009 |
| 20090153164 | Contactor Assembly for Integrated Circuit Testing - The present invention provides a contactor assembly ( | 06-18-2009 |
| 20090153165 | High Density Interconnect System Having Rapid Fabrication Cycle - An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles. | 06-18-2009 |
| 20090153166 | Apparatus and Method for Terminating Probe Apparatus of Semiconductor Wafer - A probe apparatus and method of terminating a probe that probes a semiconductor device with a signal cable from a tester side by side at a proximal end of the probe and a distal end of the signal cable. In one embodiment, the probe apparatus includes: a chassis; a dielectric block mounted in the chassis for retaining the probe, the probe extending on the chassis from a proximal end of the probe to the dielectric block, extending through the dielectric block, and projecting from the dielectric block towards the semiconductor device at a distal end of the probe; and a terminating apparatus, mounted in the chassis, for terminating the proximal end of the probe with a distal end of the signal cable side by side. | 06-18-2009 |
| 20090153167 | Chuck for holding a device under test - A chuck includes a conductive element that contacts a device under test in a location on the chuck. | 06-18-2009 |
| 20090160466 | SELF-ISOLATING MIXED DESIGN-RULE INTEGRATED YEILD MONITOR - Assessing open circuit and short circuit defect levels in circuits implemented in state of the art ICs is difficult when using conventional test circuits, which are designed to assess continuity and isolation performance of simple structures based on individual design rules. Including circuit blocks from ICs in test circuits provides a more accurate assessment of defect levels expected in ICs using the circuit blocks. Open circuit defect levels may be assessed using continuity chains formed by serially linking continuity paths in the circuit blocks. Short circuit defect levels may be assessed by using parallel isolation test structures formed by linking isolated conductive elements in parallel to buses. Forming isolation connections on a high metal level enables location of shorted elements using voltage contrast on partially deprocessed or partially fabricated test circuits. | 06-25-2009 |
| 20090160467 | Connection unit, a board for mounting a device under test, a probe card and a device interfacing part - A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board. | 06-25-2009 |
| 20090167332 | ELECTRICAL PROBE - Methods, devices, and systems for probing electrical circuits without loading the circuits are described herein. One embodiment of an electrical probe includes a coaxial cable having an inner conductor and an outer conductor, an extension portion of the inner conductor extending beyond the outer conductor at a probe end of the cable. The electrical probe includes a conductive whisker having a first portion separated from and extending a distance along the extension portion such that the first portion and the extension portion form a first capacitor and a second portion having a probe tip for receiving an input test signal from a circuit node under test. | 07-02-2009 |
| 20090167333 | Wafer level testing - A wafer comprises a kerf region and a test chip. The kerf is a region in a wafer designated to be destroyed by chip dicing. The test chip is located within the kerf region and is configured to provide parametric data for a wafer fabrication process of a head. The test chip comprises a shield portion of a first shield layer electrically coupled to an element, a first pad within a second shield layer electrically coupled to the element, and a second pad within the second shield layer electrically coupled to the shield portion. | 07-02-2009 |
| 20090167334 | Controlled Impedance Structures for High Density Interconnections - An interconnection structure suitable for use as an IC package, probe head or other electrical termination of high density where uninterrupted controlled impedance is desired is described. | 07-02-2009 |
| 20090174420 | TEST APPARATUS, PROBE CARD, AND TEST METHOD - There is provided a test apparatus for testing a device under test. The test apparatus includes a plurality of drivers that respectively output a plurality of test signals to a same terminal of the device under test so as to supply, to the same terminal of the device under test, a multiple-valued signal that is generated by combining together the plurality of test signals, and a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers. Here, each of the plurality of probe pins has a top end portion to be electrically connected to the same terminal of the device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, and the top end portion of each probe pin is kept electrically open while the test apparatus is not testing the device under test. | 07-09-2009 |
| 20090174421 | Vertical Probe and Methods of Fabricating and Bonding the Same - Disclosed is a vertical probe and methods of fabricating and bonding the same. The probe is comprised of a contactor equipped with two tips, a connector electrically linking with a measuring terminal of a measurement system, And a bump connecting the contactor to the connector and buffing physical stress to the contactor. | 07-09-2009 |
| 20090174422 | Probe Card and Manufacturing Method Thereof - A probe card usable at a higher temperature and a manufacturing method thereof are provided. Each of the junction interfaces of the contact probes and the electrode pads is made from the same metal material, wherein each of the junction interfaces is irradiated with ions in vacuum to remove impurities, followed by positioning so as to associate each of the junction interfaces while maintaining a vacuum state. Therefore, mutual bonding of the bonds in the respective junction interfaces is achieved to associate the junction interfaces with one another at normal temperature, where it is not necessary to form a melting layer having a low melting point between the contact probes and the electrode pads in such a case as using the melting layer to join them. Accordingly, if a metal material having a high melting point is used for the contact probes and the electrode pads, the contact probes and the electrode pads do not melt until high temperature is reached, which makes it possible to provide a probe card usable at a higher temperature. | 07-09-2009 |
| 20090174423 | Bond Reinforcement Layer for Probe Test Cards - A probe card assembly includes a substrate and a plurality of probes bonded to a surface of the substrate. The probe card assembly also includes a reinforcing layer provided on the surface of the substrate. The reinforcing layer is in contact with a lower portion of each of the probes, where a remaining portion of each of the probes is free from the reinforcing layer. The reinforcing layer may be a composite reinforcing layer that includes multiple layers of material to achieve a particular result. According to one embodiment of the invention, the reinforcing layer includes a powder layer disposed on the substrate and an adhesive layer formed on the powder layer. The composite reinforcing layer may be compliant to allow the probes to flex and move as intended, without limiting deflection capability. The composite reinforcing layer may be removable to allow access to probes for repair. | 07-09-2009 |
| 20090179657 | Printed circuit board for coupling probes to a tester, and apparatus and test system using same - In one embodiment, a printed circuit board (PCB) has a first side and a second side. The second side is opposite the first side. The PCB has a plurality of first contacts that provide an interface to a tester. The PCB also has a plurality of second contacts. The second contacts are provided on the second side of the PCB and provide an interface to probes of a probe layout. The PCB also has a plurality of electrical routes, with at least some of the electrical routes coupling multiple ones of the second contacts to single ones of the first contacts. | 07-16-2009 |
| 20090179658 | PROBER FOR TESTING DEVICES IN A REPEAT STRUCTURE ON A SUBSTRATE - A prober for testing devices in a repeat structure on a substrate is provided with a probe holder plate, probe holders mounted on the plate, and a test probe associated with each holder. Each test probe is displaceable via a manipulator connected to a probe holder, and a substrate carrier fixedly supports the substrate. Testing of devices, which are situated in a repeat structure on a substrate, in sequence without a substrate movement and avoiding individual manipulation of the test probes in relation to the contact islands on the devices, is achieved in that the probe holders are fastened on a shared probe holder plate and the probe holder plate is moved in relation to the test substrate. | 07-16-2009 |
| 20090179659 | CLOSED-GRID BUS ARCHITECTURE FOR WAFER INTERCONNECT STRUCTURE - An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board. A set of spring contacts or probes link each contact pad to a separate one of the I/O pads on the wafer. | 07-16-2009 |
| 20090184725 | PROBE CARD ASSEMBLY WITH INTERPOSER PROBES - A probe test card assembly for testing a device under test includes interposer probes to connect a printed circuit board to a substrate. The probe test card assembly includes a printed circuit board, a substrate and a substrate holder. A plurality of test probes is connected to the substrate for making electrical contact with the device under test. A plurality of interposer probes is attached to the substrate for providing electrical connections between the substrate and the printed circuit board. The substrate holder holds the substrate in position with respect to the printed circuit board so that the interposer probes contact the printed circuit board. The interposer probes may be arranged in interposer probe groups to facilitate maintenance and replacement of the interposer probes. Hardstop elements may also be used to protect the interposer probes. | 07-23-2009 |
| 20090184726 | PROBE CARD AND METHOD OF MANUFACTURING THE SAME - Provided is a probe card and method of fabricating the same. This method comprises forming soldering bumpers electrically connected to conductive patterns on a substrate, forming probes connected to the conductive patterns and supported by the soldering bumpers, and then melting the soldering bumpers to fixing the probes to the substrate. Forming the soldering bumpers includes a step of forming the soldering bumpers in the same pattern and size by means of a photolithography process. | 07-23-2009 |
| 20090184727 | Space Transformer, Manufacturing Method of the Space Transformer and Probe Card Having the Space Transformer - Provided is a probe card of a semiconductor testing apparatus, including a printed circuit board to which an electrical signal is applied from external, a space transformer having a plurality of probes directly contacting with a test object, and interconnectors connecting the printed circuit board to the probes of the space transformer. The space transformer includes substrate pieces which the probes are installed on one sides of, and a combination member joining and unifying the substrate pieces together so as to form a large-area substrate with the substrate pieces on the same plane. This probe card is advantageous to improving flatness even with a large area, as well as testing semiconductor chips formed on a wafer in a lump. | 07-23-2009 |
| 20090189620 | COMPLIANT MEMBRANE PROBE - A probe test head for a high density pin count integrated circuit, includes: a flexible membrane; an array of conductive structures, each one of the structures including a mechanically compliant probe tip affixed to the membrane, such that an attachment point enables mechanical actuation of the probe tip through a conductive member parallel to the membrane. A method for fabrication and measurement apparatus are provided. | 07-30-2009 |
| 20090189621 | PROBE DEVICE - A probe device for testing a semiconductor chip includes a substrate and a balun formed on the substrate. The balun includes first and second differential ports and a single-ended port. The probe device includes first and second probe tips respectively coupled to the first and second differential ports. | 07-30-2009 |
| 20090189622 | Probe For Testing Integrated Circuit Devices - A device for providing electrical contact comprises a first reciprocating conductive body having a first abutting body at one end, a second reciprocating conductive body having a second abutting body at one end and a resilient means biasing the first reciprocating conductive body and the second reciprocating conductive body in opposing directions axially away from each other. The first abutting body is slidably abutting the second abutting body, thereby providing electrical conductivity between the first reciprocating conductive body and the second reciprocating body. In another embodiment, the first reciprocating conductive body, the second reciprocating body and at least one securing means are disposed within one of plurality of through holes of an elastic non-conductive housing body. The elastic non-conductive housing body biases the first reciprocating conductive body and the second reciprocating conductive body in opposing directions axially from each other. | 07-30-2009 |
| 20090189623 | Differential waveguide probe - A wafer probe comprises a contact conductively interconnected with the wall of a waveguide channel and supported by a substrate that projects from an end of a waveguide channel. | 07-30-2009 |
| 20090189624 | Interposer and a probe card assembly for electrical die sorting and methods of operating and manufacturing the same - An interposer and a probe card assembly for electrical die sorting is provided. The assembly may include probes electrically contacting pads of dies on a substrate, a first wiring unit including a first wire on and electrically contacting the probes, an interposer unit including interposers on the first wiring unit and electrically contacting the first wire, and a second wiring unit including a second wire on the interposer unit and electrically contacting the interposers. At least one interposer includes a conductive member, a first connection member adjacent to a first end of the conductive member so as to electrically connect the conductive member to the first wire, a second connection member adjacent to a second end of the conductive member so as to electrically connect the conductive member to the second wire, and at least one protrusion member on an external surface of the conductive member between the first and second connection members. | 07-30-2009 |
| 20090189625 | Method and System for Continuity Testing of Conductive Interconnects - In accordance with one embodiment of the present disclosure, a method for testing electronics includes forming at least a portion of an electrical circuit by electrically coupling a plurality of indicators in series with respect to each other such that each indicator is operable to substantially simultaneously indicate an electrical characteristic of a respective one or more of a plurality of conductive interconnects. Respective ones of the plurality of conductive interconnects are coupled to a respective pair of a plurality of reception nodes of the electrical circuit such that each conductive interconnect is coupled to the electrical circuit in parallel with a respective one of a plurality of indicators. The method also includes determining, based at least in part on the electrical characteristics indicated by at least three of the plurality of indicators, whether two of the plurality of conductive interconnects are electrically shorted together. | 07-30-2009 |
| 20090201038 | TEST HEAD FOR FUNCTIONAL WAFER LEVEL TESTING, SYSTEM AND METHOD THEREFOR - A test head, system and method allowing functional wafer level testing of a test wafer, a die under test or a wafer under test, including at least one chip. The test head includes a semiconductor wafer and a series of protrusions in the semiconductor wafer. Each protrusion of the series of protrusions includes an electrical interconnection on a bottom surface of the semiconductor wafer, and a corresponding probe tip protruding from a top surface of the semiconductor wafer for establishing an electrical connection with a solder bump of the test wafer. The series of protrusion probe tips includes a pitch range of about 1 μm to about 100 μm. | 08-13-2009 |
| 20090201039 | PROBING SYSTEM FOR INTEGRATED CIRCUIT DEVICE - A probing system for integrated circuit device, which transmits testing data/signal between an automatic test equipment (ATE) and an integrated circuit device, is disclosed. The probing system comprising a test head having a first transceiving module; a test station having a test unit couple to the test head to perform test operation; a communication module having a second transceiving module configured to exchange data with the first transceiving module; an integrated circuit device having at least one core circuit being tested; and at least one test module having a self-test circuit couple to the core circuit and the communication module for performing the core circuit self-testing. | 08-13-2009 |
| 20090206856 | WAFER BURN-IN SYSTEM WITH PROBE COOLING - The present disclosure relates to a wafer burn-in system having a device cooling a probe card and thereby restraining heat accumulation in the probe card. The disclosed wafer burn-in system includes a probe station and a tester. The probe station includes a burn-in chamber, a probe head, and a wafer stage. The probe head has a probe card installed on the lower surface of the probe head. A cooling device restrains heat accumulation in the probe card, e.g., by generating airflow around the probe card. The wafer stage of the burn-in chamber fixes a wafer loaded on the upper surface of the wafer stage and elevates the wafer for contact with the probe card. The tester connects to the probe station through a general purpose interface bus (GPIB) to convey test signals to and from the probe head, and to control operation of the cooling device. The tester activates the cooling device, e.g., activates air blowers to generate airflow forcibly around the probe card and thereby restrain heat accumulation in the probe card during a burn-in process performed in the burn-in chamber. | 08-20-2009 |
| 20090212795 | Probe card with segmented substrate - A probe card for testing of semiconductor dice is provided. The probe card includes a mounting plate and a plurality of substrate segments supported by the mounting plate. | 08-27-2009 |
| 20090212796 | DEVICE, SYSTEM AND METHOD FOR TESTING AND ANALYZING INTEGRATED CIRCUITS - This invention relates to a semiconductor device for testing and analyzing integrated circuits ( | 08-27-2009 |
| 20090212797 | Probe card - The present invention provides a probe card that is easily assembled and maintained and configured to prevent the controlled level of a space transformer from changing due to various causes such as a thermal deformation during a test process. The probe card includes an installation member where probe tips are provided and a printed circuit hoard (PCB) disposed on the installation member. A reinforcement member is fixed to a top surface of the PCB, and a contact member is disposed between the PCB and the reinforcement member. The contact member and the installation member are fixed by means of a connect member inserted into an insert hole formed at the PCB, and a control bolt provided for controlling the level of the installation member is inserted into control holes formed at the installation member, the PCB, and the reinforcement member sequentially in a bottom-to-top direction. Due to a convex-up top surface of the contact member, the contact member continues to contact the reinforcement member even though the installation member and the contact member are inclined while controlling the level of the installation member. | 08-27-2009 |
| 20090212798 | PROBE CARD, MANUFACTURING METHOD OF PROBE CARD, SEMICONDUCTOR INSPECTION APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A silicon substrate is used as a mold, and thin films such as metal films and polyimide films are sequentially stacked on the silicon substrate by using photolithography techniques, thereby forming a probe sheet having contact terminals having a pyramidal shape or a truncated pyramidal shape disposed at distal ends of cantilever beam structures. A fixing substrate is further fixed to the probe sheet, and then, the formed probe sheet is sequentially stacked and formed on the silicon substrate, the substrate is fixed, and the silicon substrate and predetermined polyimide films are removed by etching, thereby forming the group of contact terminals with the cantilever beam structures at a time. | 08-27-2009 |
| 20090212799 | METHODS AND APPARATUS THAT SELECTIVELY USE OR BYPASS A REMOTE PIN ELECTRONICS BLOCK TO TEST AT LEAST ONE DEVICE UNDER TEST - In one embodiment, apparatus for testing at least one device under test (DUT) includes a tester input/output (I/O) node, a DUT I/O node, a remote pin electronics block, a bypass circuit, and a control system. The remote pin electronics block provides a test function and is coupled between the tester I/O node and the DUT I/O node. The bypass circuit is coupled between the tester I/O node and the DUT I/O node and provides a signal bypass path between the tester I/O node and the DUT I/O node. The signal bypass path bypasses the test function provided by the remote pin electronics block. The control system is configured to enable and disable the bypass circuit. Methods for using this and other related apparatus to test one or more DUTs are also disclosed. | 08-27-2009 |
| 20090212800 | ELECTRICAL CONNECTING APPARATUS - The object of the present invention is to prevent an operator from touching electronic elements arranged on an upper surface of a probe assembly of an electrical connecting apparatus at the time of carrying the electrical connecting apparatus and to restrict bowing of the probe assembly caused by the temperature difference between the upper surface and the lower surface of the probe assembly. An electrical connecting apparatus | 08-27-2009 |
| 20090212801 | METHOD OF MAKING HIGH-FREQUENCY PROBE, PROBE CARD USING THE HIGH-FREQUENCY PROBE - A high frequency probe preparation method for making a high frequency probe for high frequency testing to assure signal integrity by means of making a sleeve assembly subject to the size of a predetermined bare needle and then sleeving bare needle by the sleeve assembly to form a high-frequency probe is disclosed to include the steps of: a) providing an insulated tube, and b) forming a conducting layer on the outer surface of the insulated tube which having a metal layer for grounding. The insulated tube and the conducting layer constitute the sleeve assembly. The metal layer is formed by means of physical deposition, chemical deposition, mixture of physical and chemical deposition or electrochemical deposition. | 08-27-2009 |
| 20090219042 | Probe card - A probe card includes a plurality of probes that contacts a plurality of electrodes provided in the semiconductor wafer and that inputs or outputs an electrical signal in or from the electrodes, a probe head that holds the probes, a substrate having a wiring which is provided near the surface of the substrate facing the probe head so as to be contactable with the probe head and is connected to the probes, a core layer formed of a material which is buried in the substrate and has a coefficient of thermal expansion lower than that of the substrate, and a connecting member that electrically connects at least some of the probes with an external device via the wiring. | 09-03-2009 |
| 20090219043 | Probe Card - A probe card includes probes that are made of a conductive material and come into contact with a semiconductor wafer to receive or output an electric signal; a probe head that holds the probes; a substrate that has a wiring pattern corresponding to a circuit structure for generating a signal for a test; a reinforcing member that reinforces the substrate; an interposer that is stacked on the substrate for connection of wires of the substrate; a space transformer that is stacked between the interposer and the probe head and transforms intervals among the wires; and a plurality of first post members that have a height greater than the thickness of the substrate, and are embedded in a portion of the substrate on which the interposer is stacked. | 09-03-2009 |
| 20090219044 | Calibration technique for measuring gate resistance of power MOS gate device at wafer level - This invention discloses a method for calibrating a gate resistance measurement of a semiconductor power device that includes a step of forming a RC network on a test area on a semiconductor wafer adjacent to a plurality of semiconductor power chips and measuring a resistance and a capacitance of the RC network to prepare for carrying out a wafer-level measurement calibration of the semiconductor power device. The method further includes a step of connecting a probe card to a set of contact pads on the semiconductor wafer for carrying out the wafer-level measurement calibration followed by performing a gate resistance Rg measurement for the semiconductor power chips. | 09-03-2009 |
| 20090230981 | INCREASING THERMAL ISOLATION OF A PROBE CARD ASSEMBLY - A probe card assembly can include an electrical interface to a test system for testing electronic devices such as semiconductor dies. The probe card assembly can also include probes located at a first side of the probe card assembly. The probes, which can be electrically connected to the electrical interface, can be configured to contact terminals of the electronic devices in the test system while the probe card assembly is attached to the test system. The probe card assembly can be configured to impede thermal flow from the probe card assembly to the test system at places of physical contact between the probe card assembly and the test system while the probe card assembly is attached to the test system. | 09-17-2009 |
| 20090230982 | CONTACT FOR ELECTRICAL TEST, ELECTRICAL CONNECTING APPARATUS USING IT, AND METHOD OF PRODUCING THE CONTACT - A contact comprises a contact body at least provided with an arm region extending in the right-left direction, and a tip region extending downward from the front end portion of the arm region. The tip region is provided with a pedestal portion integrally continuous to the lower edge portion on the front end side of the arm region, and a contact portion projecting downward from the lower end portion of the pedestal portion and having a tip to be brought into contact with an electrode of a device under test at the lower end. The pedestal portion includes an underside region having at least four inclined faces located around the contact portion when the tip region is seen from below, and inclined such that a portion closer to the side of the contact portion becomes lower. | 09-17-2009 |
| 20090237096 | Compensation Tool For Calibrating An Electronic Component Testing Machine To A Standardized Value - A compensation tool and process is provided for calibrating each test position located at a plurality of test modules of an electronic testing machine to a standardized value. Each test module is located on an angularly spaced radial line extending from an associated central axis and has a plurality of contacts for testing electronic components. The compensation tool can include a body having an axis of rotation coaxially alignable with the central axis for rotation to different angular positions, and a component-support member operably associated with the body for indexing movement to selectively align with different contacts associated with each test position located at each of the plurality of test modules. The component-support member can include a pocket for receiving an electronic component with terminated ends extending outwardly to allow electrical contact and testing of each test position located at each the plurality of test modules. | 09-24-2009 |
| 20090237097 | TEST INTERCONNECT - According to an example embodiment, a contact cell includes a first element that is flexible and electrically conductive, and that is structured to have at least one bend along an entire length of the first element. The contact cell further includes a second element that is flexible and electrically conductive, and that is structured to have at least one bend along an entire length of the second element. The contact cell further includes a tie that is electrically non-conductive, and that is affixed to the first element and affixed to the second element such that the first element and second element are physically and electrically separated from each other. | 09-24-2009 |
| 20090237098 | WAFER TESTING SYSTEM INTEGRATED WITH RFID TECHNIQUES AND THESTING METHOD THEREOF - This invention provides a wafer testing system and testing method thereof. The wafer testing system comprises a wafer storage section, a prober, a tester, an RFID middleware unit, an EDA system and an MES system. The wafer storage section stores a multiplicity of carriers, each of which is provided with at least a RFID tag. The prober comprises a RFID reader to read a tag information. The tester sends a test signal to the prober for implementing the wafer test so as to generate a test result and calls an interface program to convert the test result into a file conformed with a specific data format. The RFID middleware unit receives the tag information and calls related applications to process the tag information so as to generate a wafer information. The EDA system receives the file of the specific data format converted from the interface program and calculates thereof to generate a wafer yield information after wafer test. The MES system integrates the wafer information from the RFID middleware unit with the yield information from the EDA system so as to allow monitoring the wafer manufacturing process and testing yield rate in a real-time manner. | 09-24-2009 |
| 20090237099 | Probe card substrate with bonded via - The present invention is directed to a probe head having a probe contactor substrate with at least one slot that passes through the probe contactor substrate, at least one probe contactor adapted to test a device under test, with the probe contactor being coupled to the a top side of the probe contactor substrate and electrically connected to a terminal also disposed on top of the probe contactor substrate, and a space transformer having at least one bond pad coupled to a top side of the space transformer, and a bond interconnect which electrically couples the bond pad to the terminal through the slot in the probe contactor substrate. | 09-24-2009 |
| 20090237100 | Electronic Device Test Apparatus and Method of Mounting of Performance Board in Electronic Device Test Apparatus - An electronic device test apparatus comprising: a test apparatus body for testing IC devices formed on a wafer for electrical characteristics; a probe card for electrically connecting the IC devices and the test apparatus body; a prober for pushing the wafer against the probe card so as to electrically connect the IC devices and the probe card; an abutting mechanism extending toward the back surface of the probe card and abutting against the back surface of the probe card; and a lock mechanism fixing the extension of the abutting mechanism in the state with the abutting mechanism abutting against the back surface of the probe card. | 09-24-2009 |
| 20090243639 | Circuit for Multi-Pads Test - The present invention relates to a circuit for multi-pads test, which is used for testing a plurality of pads. The circuit comprises one or more testing circuits, a plurality of testing switches, and a plurality of pad switches. The plurality of testing switches is coupled between the testing circuits and the plurality of pads, respectively; the plurality of pad switches is coupled between the pads, respectively. Thereby, by coordination of the plurality of pad switches and the plurality of testing switches, the number of testing probes of the testing apparatus for testing the pads can be reduced, the design difficulty of the testing apparatus can be reduced, and thus the costs can be reduced. | 10-01-2009 |
| 20090243640 | CONDUCTIVE CONTACT PIN AND SEMICONDUCTOR TESTING EQUIPMENT - In a conductive contact pin brought into contact with the external electrode of a semiconductor device to conduct a test on the electrical characteristics of the semiconductor device, an upper plunger | 10-01-2009 |
| 20090243641 | DISPLAY DEVICE - An array substrate is provided with thereon a display area in which plural pixels are arranged in a matrix shape. Output-side mounting terminals for a source driving circuit chip, which is COG-mounted on a frame area on the outside of the display area, have a plural-row zigzag arrangement. Inspection terminals individually provided in correspondence to the output-side mounting terminals have a zigzag arrangement opposite to the zigzag arrangement of the output-side mounting terminals in a terminal-row direction. Additionally, the output-side mounting terminals and the inspection terminals are disposed below the source driving circuit chip. | 10-01-2009 |
| 20090251159 | Device and method for analyzing defects, particularly for items made of plastics - A device for analyzing defects, particularly for items made of plastics, such as battery casings and the like, comprising at least one probe, which is adapted to be moved closer to, or to come into contact with, the item made of plastics to be tested, the probe being provided with a plurality of elements to which a high voltage is applied. | 10-08-2009 |
| 20090251160 | SEMICONDUCTOR INTEGRATED CIRCUIT WAFER, SEMICONDUCTOR INTEGRATED CIRCUIT CHIP, AND METHOD OF TESTING SEMICONDUCTOR INTEGRATED CIRCUIT WAFER - A semiconductor integrated circuit wafer includes: a plurality of semiconductor integrated circuit regions each of which includes a semiconductor integrated circuit formed thereon; a scribe region which separates the semiconductor integrated circuit regions adjacent to each other; a build in self test (BIST) circuit which is provided in the scribe region and inspects the semiconductor integrated circuit; a connection wiring which is formed ranging from the scribe region to the semiconductor integrated circuit region and connects the semiconductor integrated circuit and the BIST circuit; a BIST switching signal input pad which is provided in the semiconductor integrated circuit region; and a BIST switching circuit which is provided in the semiconductor integrated circuit region and is driven by a driving signal input from the BIST switching signal input pad, the BIST switching circuit including: an input-output pad which connects with the semiconductor integrated circuit; a circuit wiring which connects the input-output pad with the semiconductor integrated circuit; and a switch element which is provided at a middle position of the circuit wiring and is driven by the driving signal input from the BIST switching signal input pad. | 10-08-2009 |
| 20090251161 | Module for Test Device for Testing Circuit Boards - A module for a tester for the testing of circuit boards is described. Such testers have a basic grid on which an adapter and/or a translator may be arranged in order to connect contact points of the basic grid with circuit board test points of a circuit board to be tested. The module comprises a support plate and a contact board. The contact board is formed by a rigid circuit board section which is described as the basic grid element, and at least one flexible circuit board section. Provided on the basic grid element are contact points which each form part of the contact points of the basic grid. The basic grid element is mounted at an end face of the support plate, and the flexible circuit board section is bent in such a way that at least part of the other section of the contact board is parallel to the support plate. Each of the contact points of the basic grid element is in electrical contact with conductor paths running in the contact board and extending from the basic grid element into the flexible circuit board section. | 10-08-2009 |
| 20090251162 | Wireless Test Cassette - A base controller disposed in a test cassette receives test data for testing a plurality of electronic devices. The base controller wirelessly transmits the test data to a plurality of wireless test control chips, which write the test data to each of the electronic devices. The wireless test control chips then read response data generated by the electronic devices, and the wireless test control chips wirelessly transmit the response data to the base controller. | 10-08-2009 |
| 20090261849 | Low Force Interconnects For Probe Cards - A probe test card assembly for testing of a device under test includes a printed circuit board, a substrate and a substrate support structure. The substrate support structure holds the substrate in position with respect to the printed circuit board. The substrate support structure may include one or more alignment members, one or more hard stop members and/or a support plate attached to the printed circuit board for positioning the substrate with respect to the printed circuit board. The one or more alignment members may extend through the printed circuit board and be connected to the one or more printed circuit board stiffener members. The probe test card assembly may also employ a proximity detection feature to indicate when the substrate is in a particular position with respect to the printed circuit board. | 10-22-2009 |
| 20090261850 | Probe card - Disclosed is a probe card capable of simplifying the manufacturing process and the repair work. The probe card includes a printed circuit board including a substrate through hole; at least one probe substrate disposed on the printed circuit board; at least one probe including a probe body supported by the probe substrate and a probe lead part extending from the probe body to an inside of the substrate through hole in the printed circuit board; and a guide block disposed between the printed circuit board and the probe substrate, and including a block through hole through which the probe lead part passes, wherein the probe is fixed to the probe substrate by moving the guide block in a Y axis direction so that the probe lead part is bent in the Y axis direction. | 10-22-2009 |
| 20090267624 | METHOD AND APPARATUS FOR ELECTRICAL TESTING - A test apparatus and device under test has a probe that can be located very close to contact pads and that requires very few solder connections. In addition, the probe can be configured to meet any appropriate and desired electrical specification while still using a same circuit board. There is no need to attach discrete components to a circuit board. Thus, by using a configurable probe, a single circuit board may be used with multiple probes or a reconfigurable probe to test for compliance with a variety of different electrical specifications having different requirements. | 10-29-2009 |
| 20090267625 | Probe for testing a device under test - A probe measurement system for measuring the electrical characteristics of integrated circuits or other microelectronic devices at high frequencies. | 10-29-2009 |
| 20090267626 | PROBING APPARATUS AND PROBING METHOD - There is provided a probing apparatus capable of modifying an existing probing apparatus having a single loading port to one having dual loading ports while saving the space without increasing a foot print thereof and also capable of increasing an inspection efficiency by cooperating with an automatic transfer line for the apparatus having a single loading port. The probing apparatus includes a prober chamber in which a wafer is inspected and a loader chamber having: a first and a second loading ports positioned to be spaced apart from each other at the side of a prober chamber, each of the loading ports mounting thereon a cassette accommodating therein a plurality of waters; and a wafer transfer unit for transferring the wafers between the loading ports and the prober chamber. The loading ports are arranged along a route where the cassette is transferred by an automatic transfer device. | 10-29-2009 |
| 20090267627 | METHOD OF EXPANDING TESTER DRIVE AND MEASUREMENT CAPABILITY - A probe card assembly can comprise an interface, which can be configured to receive from a tester test signals for testing an electronic device. The probe card assembly can further comprise probes for contacting the electronic device and electronic driver circuits for driving the test signals to ones of the probes. | 10-29-2009 |
| 20090273357 | CONTACT FOR ELECTRICAL TEST OF ELECTRONIC DEVICES, METHOD FOR MANUFACTURING THE SAME, AND PROBE ASSEMBLY - A contact for an electrical test comprises a first area to be bonded to a board, a second area extending in the right-left direction from the lower end portion of the first area, a third area projecting downward from the tip end portion of the second area, and a low light reflective film having lower light reflectance than that of the first area. The third area has a probe tip to be contacted an electrode of an electronic device. The low light reflective film is formed on a surface of at least the bonding part of the first area to the board and its proximity. | 11-05-2009 |
| 20090273358 | METHOD AND APPARATUS FOR ENHANCED PROBE CARD ARCHITECTURE - A technique for distributing power to a plurality of dies uses a probe card. The probe card can include a plurality of regulators, each regulator accepting a bulk power input and producing a regulated output. The regulated output can be controlled by a programmable controller that accepts a tester-controlled power input and adjusts the regulated outputs as a function of the tester-controlled power input. | 11-05-2009 |
| 20090278558 | CONNECTING DEVICE FOR ELECTRONIC TESTING SYSTEM - A connecting device for an electronic testing system of an electronic device includes a base, a sliding track, a holder, a plurality of connectors, and a driver. The sliding track is positioned on the base. The holder is slidably fixed to the sliding track. The plurality of connectors are fixed in the holder and the electronic device is connected to the electronic testing system. The driver is located on the base and moves the holder along the sliding track, connecting or disconnecting the plurality of connectors to the connection port of the electronic device. | 11-12-2009 |
| 20090278559 | Inspection device and inspection method - A first conductive contact connecting a first electrode of an inspection circuit board and one external electrode of a semiconductor integrated circuit is arranged in a fixed member. A second conductive contact connecting a second electrode of a wiring board and the other external electrode of the semiconductor integrated circuit is arranged in a movable member. A third conductive contact connecting one third electrode of the inspection circuit board and the other third electrode of the wiring board is arranged in the movable member. The other third electrode is connected to the second electrode. When the movable member moves to the contacting position, the second conductive contact makes contact with the other external electrode, and the third conductive contact makes contact with the one third electrode. | 11-12-2009 |
| 20090284272 | PROBE DEVICE AND METHOD OF REGULATING CONTACT PRESSURE BETWEEN OBJECT TO BE INSPECTED AND PROBE - Contact pressure between a wafer and a probe is maintained at an appropriate level. A probe card | 11-19-2009 |
| 20090284273 | METHOD FOR ASSEMBLING ELECTRICAL CONNECTING APPARATUS - A method for assembling an electrical connecting apparatus having a support member, a probe board, and spacers arranged between the support member and the probe board. A height of at least either each abutting part of the support member or each abutting part of the probe board facing the abutting part is measured, and a length of each of the plurality of spacers is measured. Based on measurement values obtained by these measurements, a spacer appropriate for maintaining tips of numerous probes provided on the probe board on the same plane is selected for each pair of the both abutting parts. | 11-19-2009 |
| 20090284274 | Full-Wafer Test And Burn-In Mechanism - Assemblies include a substrate, such as a printed circuit board, with a first array of contact pads disposed thereon; a guide ring structure disposed on the substrate and at least partially surrounding the first array of contact pads; a translator socket disposed on the first array of contact pads, the translator socket adapted to receive the tester side of a translated wafer; a thermally conductive, conformal, heat spreading cushion adapted to be disposed over the backside of a wafer; a cover plate adapted to fit over the first array of contact pads, align with the guide ring structure, contain within it the various components disposed over the first array of contact pads, and removably attach to the substrate; and a bolster plate adapted to removably attach to a second side of the substrate. In a further aspect a translated wafer is disposed over the translator socket such that the tester side of the translator is in contact with the translator socket; and the heat spreading cushion is disposed over the backside of the translated wafer. In a still further aspect, the substrate includes signal communication means, such as but not limited to, an edge connector adapted to couple to various controller circuits, which are typically disposed on a printed circuit board. | 11-19-2009 |
| 20090284275 | CONDUCTIVE FILM STRUCTURE, FABRICATION METHOD THEREOF, AND CONDUCTIVE FILM TYPE PROBE DEVICE FOR IC - A method for forming a conductive film structure is provided, which includes providing a flexible insulating substrate, forming a conductive film overlying the flexible insulating substrate, patterning the conductive film to form a plurality of micro-wires overlying the flexible insulating substrate, wherein the micro-wires are extended substantially parallel to each other, forming an insulating layer overlying the flexible insulating substrate and the micro-wires, and winding or folding the flexible insulating substrate along an axis substantially parallel to an extending direction of the micro-wires to form a conducting lump. | 11-19-2009 |
| 20090284276 | PROBE CARD - A probe card is disclosed that includes a board having a first surface and a second surface facing away from each other and a through hole formed between the first and second surfaces; and a probe needle having a penetration part and a support part. The penetration part is placed in the through hole without contacting the board and projects from the first and second surfaces of the board. The support part is integrated with a first one of the end portions of the penetration part and connected to one of the first and second surfaces of the board. The support part has a spring characteristic. The penetration part is configured to have a second one of its end portions come into contact with an electrode pad of a semiconductor chip at the time of conducting an electrical test on the semiconductor chip. | 11-19-2009 |
| 20090289644 | APPARATUS AND METHOD FOR TESTING KEYBOARD OF MOBILE PHONE - An apparatus for testing a keyboard of a mobile phone, includes a testing controller, a key triggering device, an analog to digital (A/D) converter, and a switch assembly connected to the key triggering module. The switch assembly includes a plurality of switches. The key triggering device includes a key triggering module connected to the keyboard. The testing controller sends a controlling signal to trigger a key of the keyboard to turn on a switch corresponding to the key, triggering the key, and comparing activating information of the switch to the key value from the mobile phone to determine if the result is correct. | 11-26-2009 |
| 20090289645 | Methods And Apparatus For Multi-Modal Wafer Testing - Access to integrated circuits of a wafer for concurrently performing two or more types of testing, is provided by bringing a wafer and an edge-extended wafer translator into an attached state. The edge-extended wafer translator having wafer-side contact terminals and inquiry-side contact terminals disposed thereon, a first set of wafer-side contact terminals being electrically coupled to a first set of inquiry-side contact terminals, and a second set of wafer-side contact terminals being electrically coupled to a second set of inquiry-side contact terminals. The edge-extended wafer translator having a central portion generally coextensive with the attached wafer, and an edge-extended portion extending beyond the boundary generally defined by the outer circumferential edge of the wafer. A first set of pads of at least one integrated circuit is electrically coupled to the first set of wafer-side contact terminals, and a second set of pads of the integrated circuit is electrically coupled to the second set of wafer-side contact terminals. The edge-extended wafer translator may be shaped such that its edge-extended portion is not coplanar with the central portion thereof. | 11-26-2009 |
| 20090289646 | TEST PROBE - A test probe pin is disclosed. The test probe has a plurality of probes, each of which has a probe tip surface coated with a nano-film of conducting polymer, and the thickness of the nano-film is about 1-20 nm. The probes coated with the nano-film are installed on a test fixture for testing IC components, so that the probes can efficiently provide excellent no-clean property and stabler electro-conductivity for lowering the cleaning frequency of the probes, enhancing the yield of IC component testing, increasing the utility rate of the test fixture, reducing the total testing cost, elongating the usage lifetime of the test probe, and reducing the cost of probe material. Thus, due to the nano-film of conducting polymer, the probes made of metal material can provide almost the same electro-conductivity as a traditional probe by only plating a gold layer of one fifth of original thickness, so that the cost of whole probe material can be reduced. | 11-26-2009 |
| 20090289647 | INTERCONNECT SYSTEM - A test contact may include a first portion having an open-ended rounded shape. The first portion may define an opening therethrough. The test contact may include a second portion having a curved structure. The first portion and the second portion may be formed integrally, and the second portion may be configured to contact a portion of a device lead. | 11-26-2009 |
| 20090289648 | COAXIAL FOUR-POINT PROBE FOR LOW RESISTANCE MEASUREMENTS - Various exemplary embodiments provide probes, systems and methods for measuring an effective electrical resistance/resistivity with high sensitivity. In one embodiment, the measuring system can include an upper probe set and a similar lower probe set having a sample device sandwiched there-between. The device-under-test (DUT) samples can be sandwiched between two conductors of the sample device. Each probe set can have an inner voltage sense probe coaxially configured inside an electrically-isolated outer current source probe that has a large contact area with the sample device. The measuring system can also include a computer readable medium for storing circuit simulations including such as FEM simulations for extracting a bulk through-plane electrical resistivity and an interface resistivity for an effective electrical z-resistivity of the DUT, in some cases, having sub-micro-ohm resistance. | 11-26-2009 |
| 20090289649 | TESTER WITH LOW SIGNAL ATTENUATION - A tester with low signal attenuation and suitable for measuring an electrical characteristic of a subject to be tested includes a circuit board and a first probe. The circuit board has a first surface and a second surface respectively having a first signal transmission line and a second signal transmission line. The first probe has a contact end contacting the subject to be tested and a first signal end and a second signal end respectively connecting the first signal transmission line and the second signal transmission line. The first probe receives a testing signal from the first signal transmission line through the first signal end and transmits the testing signal from the contact end to the subject to be tested, such that the subject to be tested generates a response signal, and the first probe transmits the response signal to the second signal transmission line through the second signal end. | 11-26-2009 |
| 20090295415 | TESTING OF MULTIPLE INTEGRATED CIRCUITS - A testing system includes a tester probe and a plurality of integrated circuits. Tests are broadcast to the plurality of integrated circuits using carrierless ultra wideband (UWB) radio frequency (RF). All of the plurality of integrated circuits receive, at the same time, test input signals by way of carrierless UWB RF and all of the plurality of integrated circuits run tests and provide results based on the test input signals. Thus, the plurality of integrated circuits are tested simultaneously which significantly reduces test time. Also the tests are not inhibited by physical contact with the integrated circuits. | 12-03-2009 |
| 20090309620 | TANDEM HANDLER SYSTEM AND METHOD FOR REDUCED INDEX TIME - A system for testing with an automated test equipment (ATE) includes a tester having at least one test resource, a tandem handler, and a mux relay that switchably connects the test resource, via parallel connections, to either one of dual sockets at each instant of testing. The handler has first and second manipulator arms. Each arm operates as to a particular one of the respective sockets, to retrieve a next device to be tested and position the device in the socket (while testing is performed on a device in the other socket), to disposition the device from the socket once testing is completed as to the device in the socket, and thereafter repeat until all staged devices for testing have been tested (or an interruption of testing otherwise occurs). The mux relay switches between sockets in response to the tandem handler acting as a master and the tester as slave. Upon completion of testing via the test resource as to an applicable pin of one socket, the test resource is switchably connected via the mux relay to a functionally same applicable pin of the other socket. The tandem handler controls the mux and test commencement by test result/end-of-test signals. The tandem handler logically and mechanically operates itself, the mux relay, and the tester logically and functionally for the dual socket arrangement. Control/master of the tester by the tandem handler allows for negligible index time and reduced downtime of testing. Certain handler elements, such as transports, stages, and so forth, are duplicated along dual test progression paths for respective sockets. Other elements, including logic and control, are common for the dual paths. | 12-17-2009 |
| 20090315576 | PROBE CARD ASSEMBLY AND TEST PROBES THEREIN - Disclosed are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and contains therein a core that is wrapped by an insulation layer. | 12-24-2009 |
| 20090315577 | PROBE CARD ASSEMBLY - Disclosed is a probe card assembly including a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and the probe base. Each of the power probe and the signal probes further contains therein a core that is wrapped by an insulation layer. | 12-24-2009 |
| 20090315578 | PROBE AND PROBE CARD FOR INTEGRATED CIRCUIT DEVICES USING THE SAME - A vertical probe comprises a linear body, a tip portion connected to one side of the linear body, and at least one slot positioned on the linear body. In particular, the vertical probe includes a depressed structure having a plurality of slots positioned on the linear body in parallel and on one side of the linear body. The present application also provides a probe card for integrated circuit devices comprising an upper guiding plate having a plurality of fastening holes, a bottom guiding plate having a plurality of guiding holes and a plurality of vertical probes positioned in the guiding holes. The vertical probe includes a linear body positioned in the guiding holes, a tip portion connected to one side of the linear body and at least one slot positioned on the linear body. | 12-24-2009 |
| 20090315579 | HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF - The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer. | 12-24-2009 |
| 20090322360 | TEST SYSTEM FOR IDENTIFYING DEFECTS AND METHOD OF OPERATING THE SAME - A test system provides defect information rapidly and systematically. The test system includes a plurality of test units arranged in a matrix, a plurality of bit lines and a plurality of word lines. Each test unit has a first terminal and a second terminal. Each second terminal of the test unit is electrically connected to a ground point. The first terminals of the test units are electrically connected to the bit lines. The word lines are coupled to the test units. Defects in the each test unit can be identified by providing voltages to the bit lines and the word lines. Accordingly, defects in various devices of an integrated circuit can be detected rapidly and systematically by applying signals to the test system. | 12-31-2009 |
| 20090322361 | PROBE OF DETECTOR - A probe of a detector includes a shield, an anode member, and a cathode member. The shield includes a top wall and a plurality of sidewalls extending down from the sides of the top wall. A first through hole and a second through hole are defined in the top wall. The anode member includes a first mounting portion, a first pin, and a first connecting portion connected between the first mounting portion and the first pin. The cathode member includes a second mounting portion, a second pin, and a second connecting portion connected between the second mounting portion and the second pin. The first and second mounting portions are respectively rotating within the first and second through holes to adjust corresponding ends of the first and second pins to come in contact with the electronic component. | 12-31-2009 |
| 20090322362 | Test pad structure, a pad structure for inspecting a semiconductor chip and a wiring subtrate for a tape package having the same - A test pad structure may include a plurality of test pads and a plurality of connection leads. A plurality of the test pads may be sequentially arranged from a wiring pattern on a substrate and arranged in rows parallel with one another. The plurality of the test pads may include a first group of test pads having at least one pad arranged in a first row and a second group of test pads having at least two pads. A plurality of the connection leads may extend from end portions of the wiring pattern to be connected to the plurality of test pads. A plurality of the connection leads may include at least one inner lead passing between the at least two pads of the second group of the test pads arranged in a second row closest to the first group of the test pads. The at least one inner lead may be connected to at least one pad of the at least two pads of the second group of the test pads arranged in a third row next to the second row. | 12-31-2009 |
| 20090322363 | OPERATION VOLTAGE SUPPLY METHOD FOR SEMICONDUCTOR DEVICE - The voltage application probe and the voltage measurement probe are connected to the voltage application pad and the voltage measurement pad of the semiconductor device. The voltage application pad and the voltage measurement pad are connected by the conductor, measuring the voltage applied to the voltage application pad through the voltage measurement probe. The voltage compensation circuit in the voltage development device operates to make the voltage applied to the voltage application pad equal to the set voltage for the voltage development device. Even when the resistance between the voltage application probe and the voltage application pad increases, the accurate setting voltage is applied to the voltage application pad. | 12-31-2009 |
| 20100001748 | Probe Card - A probe card includes a flat wiring board having a wiring pattern corresponding to a circuit structure for generating a signal for a test, an interposer that is stacked on the wiring board and relays wirings of the wiring board, a space transformer that is stacked on the interposer and fastened thereto by an adhesive, transforms a space between the wirings relayed by the interposer, and leads the wirings out to a surface opposite a surface facing the interposer, and a probe head that is stacked on the space transformer and houses and holds a plurality of probes. | 01-07-2010 |
| 20100001749 | Method and Apparatus For Multi-Planar Edge-Extended Wafer Translator - An apparatus, suitable for coupling a pads of integrated circuits on wafer to the pogo pins of a pogo tower in a test system without the need of a probe card, includes a body having a first surface and a second surface, the body having a substantially circular central portion, and a plurality of bendable arms extending outwardly from the central portion, each bendable arm having a connector tab disposed at the distal end thereof; a first plurality of contact terminals disposed on the second surface of the central portion of the body, the first plurality of contact terminals arranged in pattern to match the layout of pads on a wafer to be contacted; at least one contact terminal disposed on the first surface of the plurality of connector tabs; and a plurality of electrically conductive pathways disposed in the body such that each of the first plurality of contact terminals is electrically connected to a corresponding one of the contact terminals on the first surface of the connector tabs. | 01-07-2010 |
| 20100013503 | DC TEST RESOURCE SHARING FOR ELECTRONIC DEVICE TESTING - A test system can include contact elements for making electrical connections with test points of a DUT. The test system can also include a DC test resource and a signal router, which can be configured to switch a DC channel from the DC test resource between individual contact elements in a group of contact elements. | 01-21-2010 |
| 20100013504 | PROBE APPARATUS, A PROCESS OF FORMING A PROBE HEAD, AND A PROCESS OF FORMING AN ELECTRONIC DEVICE - A probing apparatus includes a set of conductors configured to contact a surface of a workpiece simultaneously. A processor activates subsets of the conductors to determine a four-point-probe parameter, wherein the subset is less than the set of conductors. Another subset determines another four-point-probe parameter. The set of conductors remain in contact with the surface of the workpiece during and between activating each subset. A process of forming a probe head includes a probe substrate and associated conductive leads. An insulating layer is formed over the probe substrate and patterned to expose the leads. Conductors, connected to the leads, are formed over the insulating layer and define a probing area of at least 250 cm | 01-21-2010 |
| 20100013505 | PROBE CARD FOR INSPECTING SOLID STATE IMAGING DEVICE - The present invention is provided to quickly and efficiently inspect a plurality of CCD sensors. In the present invention, a plurality of openings is formed in a circuit board of a probe card. A plurality of vertical-type probe pins is connected to a lower surface of the circuit board. A guide board is installed at the lower surface of the circuit board, and respective probe pins are inserted into respective guide holes of the guide board. The guide board is made of a transparent glass board. During an inspection, inspection light emitted from a test head passes through the openings of the circuit board and the guide board, so that it is irradiated onto the plurality of CCD sensors on the substrate. Since the plurality of probe pins can be arranged at a narrow pitch without blocking the inspection light, adjacent CCD sensors on the substrate can be inspected simultaneously. | 01-21-2010 |
| 20100013506 | PROBE PAD, SUBSTRATE HAVING A SEMICONDUCTOR DEVICE, METHOD OF TESTING A SEMICONDUCTOR DEVICE AND TESTER FOR TESTING A SEMICONDUCTOR DEVICE - In an embodiment, a semiconductor device is tested using a probe pad that includes a probing region with which a probe needle makes contact, and a sensing region bordering an edge of the probing region. Electrical signals are applied, and measured results indicate the probe needle's location relative to a test position on the semiconductor device. | 01-21-2010 |
| 20100019786 | Method and Apparatus for Nano Probing a Semiconductor Chip - Various methods and apparatus for electrically probe testing a semiconductor chip with circuit perturbation are disclosed. In one aspect, a method of testing is provided that includes contacting a first nano probe to a conductor structure on a first side of a semiconductor chip. The semiconductor chip has plural circuit structures. A external stimulus is applied to a selected portion of the first side of the semiconductor chip to perturb at least one of the plural circuit structures. The semiconductor chip is caused to perform a test pattern during the application of the external stimulus. An electrical characteristic of the semiconductor chip is sensed with the first nano probe during performance of the test pattern. | 01-28-2010 |
| 20100019787 | CONFIGURATION OF SHARED TESTER CHANNELS TO AVOID ELECTRICAL CONNECTIONS ACROSS DIE AREA BOUNDARY ON A WAFER - A process or apparatus for testing a plurality of semiconductor dies on a semiconductor wafer utilizing a tester configured to test the dies in groups can include controlling as a logical whole provision of first test signals through a plurality of first communications channels to first probes organized into a plurality of N first probe die groups each configured to contact a different one of the dies of the wafer. One of the first communications channels can be a first common communications channel connected to probes in X of the N first probe die groups but not to probes in Y of the N first probe die groups. X can be at least two and Y can be at least one. The process can also include controlling as a logical whole provision of second test signals through a plurality of second communications channels to second probes organized into a plurality of second probe die groups each configured to contact a different one of the dies of the wafer. One of the second communications channels can be a second common communications channel connected to probes in all of the second probe die groups and probes in each of the Y of the first probe die groups. | 01-28-2010 |
| 20100019788 | ELECTRICAL TESTING APPARATUS FOR TESTING AN ELECTRICAL TEST SAMPLE AND ELECTRICAL TESTING METHOD - An electrical testing apparatus for testing an electrical test sample. The apparatus includes a conductor substrate ( | 01-28-2010 |
| 20100019789 | SYSTEM FOR MULTIPLE LAYER PRINTED CIRCUIT BOARD MISREGISTRATION TESTING - A test apparatus for determining layer-to-layer misregistration of a multiple layer printed circuit board having an electrical test pattern formed on an inner layer and an electrical test reference formed on an outer layer with the reference electrically connected to the pattern. The apparatus includes a holder for the board, an electrical input device that moves into and out of connection with the reference when the board is in the holder, with the input device adapted to provide a signal to the reference, and an electrical output probe configured to move into and out of electrical connection with the pattern when the board is in the holder. The output probe is adapted to receive at least one signal from the pattern when a signal is provided to the reference, such that the signal received by the output probe conveys layer-to-layer misregistration between the inner layer and the outer layer. | 01-28-2010 |
| 20100019790 | TEST HANDLER HAVING SIZE-CHANGEABLE TEST SITE - A test handler ( | 01-28-2010 |
| 20100026327 | Electrical Signal Connector - An electrical signal connector which may be used for testing narrow-pitched chips or multi-chips, and causes no faulty connections between probes and pads or between probes and a circuit board even in a high temperature environment such as in a burn-in test is provided. The electrical signal connector has a probe unit in which a plurality of resin-made film probes, corresponding to one or more pads on a semiconductor chip to be tested, are supported in parallel on a plurality of support plates; a first probe holder of grid structure provided with a plurality of openings; and a second probe holder of the same configuration as that of the first probe holder, the second probe holder having projections at intersection points in the grid structure. The first and second probe holders are fastened to the circuit board with the projections of the second probe holder inserted in corresponding holes of the circuit board and the first probe holder being fastened to the circuit board with screws. No or very little difference exists between an outer diameter of an inserting section of the projection and an inner diameter of the corresponding hole in the circuit board in the vicinity of the center of the circuit board and larger difference exists therebetween in the rest of areas of the circuit board. | 02-04-2010 |
| 20100026328 | INSPECTING METHOD AND PROGRAM FOR OBJECT TO BE INSPECTED - An inspecting method for an object to be inspected is provided to bring probes of a probe card into electrical contact with a predetermined number of devices of target devices of the object at a time to inspect electrical characteristics of the target devices by moving a mounting table for mounting thereon the object under the control of a control unit. Upon completion of the inspection of the target devices, if inspection errors have occurred in specific devices of the target devices in a regular pattern, the target devices are re-examined, and when the re-examination is carried out, a contact position between the probe card and the object is displaced from a contact position in a previous inspection by a distance of at least one device to inspect electrical characteristics of the number of devices of the target devices at a time. | 02-04-2010 |
| 20100026329 | TEST APPARATUS AND ELECTRONIC DEVICE - Provided is a test apparatus that tests a device under test including an external interface circuit that transfers signals between an internal circuit inside a device and the outside of the device, the test apparatus comprising a pattern generating section that inputs, to the external interface circuit, a test pattern for testing the external interface circuit; an interface control section that causes the external interface circuit to loop back and output the test pattern; and an interface judging section that judges acceptability of the external interface circuit based on the test pattern looped back and output by the external interface circuit. | 02-04-2010 |
| 20100033199 | HOLDING MEMBER FOR INSPECTION, INSPECTION DEVICE AND INSPECTING METHOD - Installed in a probe device is a holding member for inspection which can be mounted on a chuck. The holding member for inspection includes a support plate capable of mounting thereon a chip in which the power device is formed; pins for positioning the chip mounted on the support plate; and a metal film formed on a surface of the support plate in a range from a mounting area on which the chip is mounted to an exposed area on which the chip is not mounted. When inspecting the power device, the chip is fixed onto the mounting area in the holding member for inspection, one probe pin is brought into contact with a terminal on a top surface of the chip; and another probe pin is brought into contact with the metal film in the exposed area. | 02-11-2010 |
| 20100039128 | Method and Apparatus for Detecting a Crack in a Semiconductor Wafer, and a Wafer Chuck - A method for detecting a crack in a semiconductor wafer, which includes an electrical device and a connecting pad electrically coupled with the electrical device, is described. The crack is detected by an acoustic detector being acoustically coupled to the semiconductor wafer during contacting the contacting pad with a probe. | 02-18-2010 |
| 20100039129 | PROBE CARD - Provided is a probe card. The probe card includes a ceramic substrate including a signal line, and a plurality of probe pins formed on the ceramic substrate, and including probe bodies having one end connected to the signal line and probe tips formed at other end of the probe body. The probe body is divided into a first section adjacent to the signal line and second section adjacent the probe tips. The first section is united by an insulating support, and the second sections are divergently arranged to position the probe tips at different measurement regions, respectively. | 02-18-2010 |
| 20100039130 | INSPECTING METHOD, INSPECTING APPARATUS AND COMPUTER READABLE STORAGE MEDIUM HAVING PROGRAM STORED THEREIN - A probe card of an inspecting apparatus is provided with a flitting circuit to cause a flitting by applying voltages to a pair of probes being in contact with an electrode of a substrate to electrically conduct the probes to the substrate, and a switching circuit to electrically connect the probe pair to the flitting circuit to freely switch polarities of the voltages to be applied to the probe pair. The polarities of the voltages to be applied to the probes are changed every time a flitting operation is performed for the electrode of the substrate, so that a trouble of unevenness in quantity of an adhered material on the probes can be eliminated. | 02-18-2010 |
| 20100039131 | SYSTEM AND METHOD FOR MODULATION MAPPING - An apparatus for providing modulation mapping is disclosed. The apparatus includes a laser source, a motion mechanism providing relative motion between the laser beam and the DUT, signal collection mechanism, which include a photodetector and appropriate electronics for collecting modulated laser light reflected from the DUT, and a display mechanism for displaying a spatial modulation map which consists of the collected modulated laser light over a selected time period and a selected area of the IC. | 02-18-2010 |
| 20100039132 | Probing Apparatus - A probe for probing an electrical device under test is provided. The probe comprises a camera positioned adjacent a probing tip of the probe. Visual information captured by the camera is displayed on a display device. The camera may be mounted in multiple locations as desired by a user and additionally, multiple cameras may be used with the probe to allow for more viewing angles. | 02-18-2010 |
| 20100045313 | METHOD FOR TESTING INTEGRATED CIRCUITS MOUNTED ON A CARRIER - A method for testing integrated circuits mounted on a carrier includes the step of securing the carrier. The carrier is displaced into an operative position in which the integrated circuits are in physical and electrical communication with a diagnostic probe. Test signals are generated in test circuitry in electrical communication with the diagnostic probe and communicated to the integrated circuits with the diagnostic probe. The test signals are received at the test circuitry via the diagnostic probe. The test signals are made available to a controller via a communications link and an automated server and displayed with the controller. | 02-25-2010 |
| 20100045314 | TEST STAGE FOR A CARRIER HAVING PRINTHEAD INTEGRATED CIRCUITRY THEREON - This invention provides for a test stage for a printhead integrated circuit tester for testing operation of printhead integrated circuits mounted on a carrier. The test stage includes a support structure. A fixture is arranged on the support structure and is configured to receive and locate the carrier. A clamping mechanism is arranged on the fixture. The clamping mechanism has at least one clamp assembly for clamping the carrier to the test stage. A controller controls operation of the clamping mechanism. | 02-25-2010 |
| 20100045315 | DIAGNOSTIC PROBE ASSEMBLY FOR PRINTHEAD INTEGRATED CIRCUITRY - The invention provides for a diagnostic probe assembly for a tester which is used to diagnose printhead integrated circuits. The probe assembly includes a support assembly and a controller board mounted on the support assembly and having a processor configured to generate test signals for testing a printhead integrated circuit. A routing board is in operative signal communication with the controller board and is configured to multiplex the generated test signals for respective dies of the printhead integrated circuits. The probe assembly also includes a probe interface in signal communication with the routing board and configured for relaying the multiplexed test signals to and from the respective dies. | 02-25-2010 |
| 20100045316 | METHOD FOR INSPECTING ELECTROSTATIC CHUCKS WITH KELVIN PROBE ANALYSIS - A method of inspecting an electrostatic chuck (ESC) is provided. The ESC has a dielectric support surface for a semiconductor wafer. The dielectric support surface is scanned with a Kelvin probe to obtain a surface potential map. The surface potential map is compared with a reference Kelvin probe surface potential map to determine if the ESC passes inspection. | 02-25-2010 |
| 20100045317 | HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF - The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer. | 02-25-2010 |
| 20100045318 | HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF - The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer. | 02-25-2010 |
| 20100045319 | WAFER AND TEST METHOD THEREOF - A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer. | 02-25-2010 |
| 20100052707 | Probe Card - A probe card includes probes that come into contact with a semiconductor wafer to receive or output an electric signal; a probe head that holds the probes; a substrate that has a wiring pattern corresponding to a circuit structure for generating a signal for a test; a reinforcing member that reinforces the substrate; an interposer that is stacked on the substrate and includes a housing having connection terminals resilient in an axial direction thereof and hole portions each housing one of the connection terminals; and a space transformer that is stacked between the interposer and the probe head and transforms intervals among the wires. | 03-04-2010 |
| 20100052708 | Tester for RF Devices - For testing an RF device, such as an RF receiver/decoder chip that receives an RF signal via an antenna terminal and outputs a digital code at an output terminal, an inexpensive non-RF programmable tester is used. The programmable tester is a commercially available tester that need only generate and receive non-RF digital and analog signals. The RF signals needed for the testing of the RF device are totally supplied by RF generators on a single printed circuit board, external to the commercial tester housing. The board contains controllable RF generating circuitry whose possible output amplitudes and frequencies need be only those necessary for testing the particular DUT. The frequencies may be changed by switching in different crystal resonators mounted on the board. | 03-04-2010 |
| 20100052709 | WING-SHAPED SUPPORT MEMBERS FOR ENHANCING SEMICONDUCTOR PROBES AND METHODS TO FORM THE SAME - Example wing-shaped support members for enhancing semiconductor device probes and methods to form the same are disclosed. A disclosed example semiconductor device probe includes a finger having a first end and a second end. The example probe further includes a tip having a base and a pointed end. The base is joined to the first end of the finger and the tip tapers from the base to the pointed end. The probe also includes a support member on the tip to increase a rigidity of the tip. | 03-04-2010 |
| 20100052710 | Probe Card - The present invention discloses a probe card for testing a wafer. The probe card comprises a printed circuit board for transmitting test signals, a fastened ring arranged at the downside of the printed circuit board, and a plurality of needles passing through the fastened ring, each needle having one end connecting to circuits of the printed circuit board, and having a tip portion at the other end connecting to a pad of the wafer, where each needle has at least one bent portion between the fastened ring and the tip portion, to absorb stress between the needle and the pad. | 03-04-2010 |
| 20100052711 | PROBE CARD AND MANUFACTURING METHOD OF THE SAME - There is provided a method of manufacturing a probe card, the method including: providing a first substrate including a plurality of probe pin patterns for forming a probe pin and at least one first stress relieving groove for relieving thermal stress; forming the probe pin by filling a metal material in the plurality of probe pin patterns; bonding a surface of the first substrate where the probe pin is formed onto a surface of a second substrate; and transferring the probe pin onto the second substrate by heating the first and second substrates bonded together. | 03-04-2010 |
| 20100052712 | TEST APPARATUS FOR TESTING CIRCUIT BOARD - The disclosure relates to a test apparatus for testing a circuit board. The circuit board includes a connector and a plurality of test points connected to the connector via a plurality of lines and the connector of the circuit board is connected to the plurality of lines via a plurality of corresponding signal pins. The test apparatus includes a circuit, a connector, a plurality of probes, and a tester. The circuit includes a plurality of test points and lines connecting to the test points correspondingly. The connector is coupled to the connector of the circuit board. The plurality of probes contact with the test points of the test apparatus. The tester sends test-signals to the connector of the circuit board via the lines correspondingly, receives test-information on the test points of the circuit board via the connectors, analyzes the test-information, and generates a test-result of the circuit board. | 03-04-2010 |
| 20100052713 | DISPLAY DEVICE AND TEST PROBE FOR TESTING DISPLAY DEVICE - A display device is provided with a light detection unit that detects the intensity of ambient light and is capable of automatically controlling the luminosity of an illumination unit and/or the luminosity of the display device on the basis of the intensity of ambient light detected by the light detection unit. Moreover, the display device makes it possible to easily conduct a test on light-sensor characteristics. | 03-04-2010 |
| 20100052714 | PROBE CARD COOLING ASSEMBLY WITH DIRECT COOLING OF ACTIVE ELECTRONIC COMPONENTS - A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation. | 03-04-2010 |
| 20100052715 | HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF - The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer. | 03-04-2010 |
| 20100052716 | ENCLOSED PROBE STATION - An enclosed probe station comprises a chuck assembly, a supporting member and an enclosure. The chuck assembly is configured to support a device under test. The supporting member is configured to secure a probe used to contact the device under test. The enclosure forms an interior space in which the chuck assembly and the supporting member are disposed. | 03-04-2010 |
| 20100060303 | ELECTRICAL CIRCUIT DIAGNOSTIC TOOL - Diagnosing electrical circuit faults can be accomplished with a variety of tools. Voltmeters are frequently used to measure voltage to determine whether a short is present, but are not well-suited for finding intermittent faults caused by corroded connectors or excessive voltage drop under operating loads. Measuring a static voltage without load using a voltmeter can yield misleading results. A diagnostic tool that is simple to use and that yields a definitive result is preferred in certain applications such as automotive electrical system diagnosis due to the varying skill level of technicians and the variation in field conditions in automotive shops. A simple, inexpensive diagnostic tool that can be used with minimal or no training allows rapid diagnosis of circuit faults that result from a the inability of a measured circuit to supply a minimum current at a minimum voltage. | 03-11-2010 |
| 20100060304 | PROBE WITH PRINTED TIP - The probe with printed tip consists of a substrate having a plurality of probe tips connected to its end edge, a plurality of test paths, each connected to one of the probe tips and extending along the substrate, and at least one of the test paths including an electrical component adjacent to the test path's probe tip. The electrical component may be a resistor. The probe tips may have a width equal to the thickness of the substrate. The probe tips may consist of a plurality of probe tip layers. The invention also includes a method of probing signals transmitted over target transmission lines on a target board. The disclosure also includes a method of manufacturing the claimed invention. | 03-11-2010 |
| 20100060305 | INSPECTING APPARATUS FOR SOLAR CELL AND INSPECTING METHOD USING THE SAME - An inspecting apparatus for a solar cell and an inspecting method are provided. The inspecting apparatus for the solar cell includes a head unit having a plurality of probe units, a rotation unit rotating the head unit according to an interval of cells of the solar cell, a controller controlling a rotation angle of the head unit by controlling the rotation unit, and a wire unit connected to the head unit to be electrically connected to the probe units. | 03-11-2010 |
| 20100066393 | HIGH DENSITY INTERCONNECT SYSTEM FOR IC PACKAGES AND INTERCONNECT ASSEMBLIES - An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad. | 03-18-2010 |
| 20100066394 | INSPECTION UNIT - An inspection unit includes: a metal block having a through hole; a contact probe for grounding which is coaxially arranged in through hole; and a coil spring having electrical conductivity at least on a surface thereof and provided between an inner peripheral face of the through hole and an outer peripheral face of the contact probe. The coil spring includes: a first coil part a part of which is in contact with the inner peripheral face of the through hole; and a second coil part a part of which is in contact with the outer peripheral face of the contact probe. | 03-18-2010 |
| 20100073018 | ADJUSTABLE PROBE HEAD - An adjustable probe head consists of a probe head enclosing a plurality of test paths with a header that is attached to one of its opposing sides and electrically connected to the test paths. The header may be removably attached to the probe head. The probe head may enclose a board with an attached integrated circuit unit, and there may be a power cable and a signal cable connected to the board. There may be a clip that removably retains the probe head by releasably engaging with at least one of a plurality of slots on the sides of the probe head. The invention also includes a method of acquiring signals from an electrical device mounted on a test board. The electrical device may be a double data rate memory module. | 03-25-2010 |
| 20100073019 | APPARATUS FOR OBTAINING PLANARITY MEASUREMENTS WITH RESPECT TO A PROBE CARD ANALYSIS SYSTEM - A system and method of mitigating the effects of component deflections in a probe card analyzer system may implement three-dimensional comparative optical metrology techniques to model deflection characteristics. An exemplary system and method combine non-bussed electrical planarity measurements with fast optical planarity measurements to produce “effectively loaded” planarity measurements. | 03-25-2010 |
| 20100073020 | Probe of electrical measuring instrument - Disclosed is a probe of an electrical measuring instrument including a handle and at least one loop antenna coupled to the handle. A plane defined by the loop antenna is oriented to face an object to be inspected, to detect electrical characteristics in the vicinity of the object. Enhanced accessibility of the probe with respect to the object to be inspected results in an improvement in the accuracy of measured electrical characteristics information and use convenience of the probe by an inspector. | 03-25-2010 |
| 20100079159 | METHOD AND APPARATUS FOR PROVIDING A TESTER INTEGRATED CIRCUIT FOR TESTING A SEMICONDUCTOR DEVICE UNDER TEST - Methods and apparatus for providing a tester integrated circuit (IC) for testing a semiconductor device under test (DUT) are described. Examples of the invention can relate to an apparatus for testing a semiconductor device under test (DUT). In some examples, the apparatus can include an integrated circuit (IC) coupled to test probes configured to contact pads on the DUT, the IC including a plurality of dedicated test circuits coupled to programmable logic, the programmable logic responsive to programming data to form a tester for testing the DUT from at least one of the dedicated test circuits. | 04-01-2010 |
| 20100079160 | Probe Interface for electrostatic discharge testing of an integrated circuit - A system, probe interface, and method to test an integrated circuit with an electrostatic discharge signal. The probe interface includes a pulse generation circuit, ground plane, and a relay matrix, while the integrated circuit includes a plurality of contact points. The probe interface is configured proximate to the integrated circuit and the relay matrix is configured to electrically connect at least one of an operative signal, the pulse generation circuit, or the ground plane to a contact point of the integrated circuit. The probe interface is thus configured to provide a shortened path for at least one of the electrostatic discharge signal from the probe interface to the integrated circuit, or to the ground plane from the integrated circuit. The probe interface may selectively electrically connect to up to about thirty-two contact points of the integrated circuit, while the system may include up to about four probe interfaces. | 04-01-2010 |
| 20100085069 | Impedance optimized interface for membrane probe application - In a membrane probing apparatus, the impedance of the interface between coaxial cables connected to the test instrumentation and the membrane supported co-planar waveguide that conductively connects to the probe's contacts is optimized by eliminating a ground plane in the interface board. | 04-08-2010 |
| 20100090715 | ACTIVE DEVICE ARRAY SUBSTRATE - An active device array substrate has a display area and a peripheral circuit area and further includes a plurality of pixel units, a plurality of signal lines, a plurality of testing pads and a first dielectric layer. The pixel units are arranged in the display area in an array. The signal lines and the testing pads are arranged in the peripheral circuit area. The first dielectric layer covers the testing pads. A testing method of the active device array substrate is that firstly removing a part of the first dielectric layer to expose a testing pad(s) desired to electrically contact with a testing tool. In other words, before the testing, the testing pads are electrically insulated from the exterior to prevent the pixel units from the electrostatic charges damage and thus the circuit stability of the active device array substrate can be improved. | 04-15-2010 |
| 20100097085 | SOCKET, MODULE BOARD, AND INSPECTION SYSTEM USING THE MODULE BOARD - The socket of the present invention includes a lid having a first protrusion on the reverse side, and a first terminal connected electrically to the first protrusion, and a main body having a second terminal on the upside, and a third terminal connected electrically to the second terminal on the reverse side, in which an electronic component is contained in the main body, and the first terminal and the second terminal are connected electrically in the space enclosed and fixed by the lid. The inspection system of the present invention includes a socket of the present invention, and an evaluation board for connecting a third terminal of the socket electrically to the inspection apparatus of the electronic component, and propagating an inspection signal. | 04-22-2010 |
| 20100097086 | APPARATUS AND METHOD FOR ACTIVE VOLTAGE COMPENSATION - A voltage compensation assembly adapted for apparatus having a prober for contacting the electronic elements on a substrate is described. The voltage compensation assembly includes a controller connected to the prober and adapted for active voltage compensation, and a voltage measuring unit connected to the controller and for measuring a voltage on the substrate. | 04-22-2010 |
| 20100102837 | CONNECTION BOARD, PROBE CARD, AND ELECTRONIC DEVICE TEST APPARATUS COMPRISING SAME - A probe card is provided which includes: probe needles electrically contacting input/output terminals of an IC device formed on a semiconductor wafer W; a mount base on which the probe needles are mounted; a support column supporting the mount base, a circuit board having interconnect patterns electrically connected to the probe needles via bonding wires; and a base member and stiffener for reinforcing the probe card. The mount base and the circuit board are noncontact. | 04-29-2010 |
| 20100102838 | CONTACTOR AND METHOD OF PRODUCTION OF CONTACTOR - A contactor includes: a silicon layer composing a part of beam part with a rear end side provided at a base part and with a front end side sticking out from the base part; SiO | 04-29-2010 |
| 20100102839 | FOUR-WIRE OHMMETER CONNECTOR AND OHMMETER USING SAME - A four-wire ohmmeter connector includes a pair of elongated members spaced apart from each other by an interconnecting web. A pair of elongated contacts are mounted on forwardly projecting portions of each of the elongated members. An insulative housing surrounds the elongated members, contacts and web. The contacts mounted on one of the elongated members are connected through separate wires to a positive probe, and the contacts mounted on the other of the elongated members are connected through separate wires to a negative probe. The elongated members are inserted into respective terminal apertures of a four-wire ohmmeter. A pair of semi-cylindrical conductive sleeves are aligned with each of the apertures, and they make contact with and compress the respective contacts that are inserted into the aperture. | 04-29-2010 |
| 20100109688 | PRINTING OF REDISTRIBUTION TRACES ON ELECTRONIC COMPONENT - A probe substrate for use in testing semiconductor devices can include a base substrate that can have first electrical terminals at a first pitch. One or more redistribution layers on the base substrate can include droplets of a conductive material that form redistribution traces extending from the first terminals to second electrical terminals at a second pitch different from the first pitch. | 05-06-2010 |
| 20100109689 | PROBE CARD ASSEMBLY AND TEST PROBES THEREIN - Discloses are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base disposed in a central portion of the main body and a plurality of test probes connected between the probe base and the main body. Each of the test probes has a tip extending from the probe base for contacting a wafer under test. The test probes include at least one power probe, at least one signal probe and a plurality of ground probes. Each of the test probes has a middle section interposed between the main body and the probe base. Each of the test probes except the ground probes has a naked middle section coated with an insulating film but not sheltered by an insulating sleeve. | 05-06-2010 |
| 20100109690 | Tcp-type semiconductor device and method of testing thereof - A TCP-type semiconductor device has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film. Each lead has: a first terminal portion including a first end that is one end of the each lead and connected to the semiconductor chip; and a second terminal portion including a second end that is the other end of the each lead and located on the opposite side of the first terminal portion. I a terminal region including the second terminal portion of the each lead, the plurality of leads are parallel to each other along a first direction, the plurality of leads include a first lead and a second lead that are adjacent to each other, and the first lead and the second lead are different in a position of the second end in the first direction. | 05-06-2010 |
| 20100109691 | Low Profile Probe Having Improved Mechanical Scrub and Reduced Contact Inductance - A vertically folded probe is provided that can provide improved scrub performance in cases where the probe height is limited. More specifically, such a probe includes a base and a tip, and an arm extending from the base to the tip as a single continuous member. The probe arm is vertically folded, such that it includes three or more vertical arm portions. The vertical arm portions have substantial vertical overlap, and are laterally displaced from each other. When such a probe is vertically brought down onto a device under test, the probe deforms. During probe deformation, at least two of the vertical arm portions come into contact with each other. Such contact between the arm portions can advantageously increase the lateral scrub motion at the probe tip, and can also advantageously reduce the probe inductance. | 05-06-2010 |
| 20100109692 | APPARATUS, SYSTEM AND METHOD FOR TESTING ELECTRONIC ELEMENTS - An electronic element testing apparatus for use with a number of probes. Each probe has a lower pole and an upper pole. The apparatus includes: a first plate having a first side and a second side, the first side having an array of lower pole regions disposed thereabout, each lower pole region configured to receive a lower pole of a probe; and a plurality of signal conductor regions disposed proximate the array of lower pole regions, each signal conductor region arranged to provide a non-cable electrical path between a lower pole region and a switching circuit. The switching circuits are operable to sequentially connect each electronic element to a testing circuit via the upper and lower poles. | 05-06-2010 |
| 20100117667 | Method and means for optical detection of internal-node signals in an integrated circuit device - A continuous-wave laser beam is chopped to form pulses synchronized to the activity of a device under testing and/or to acquisition electronics. Chopping the laser beam to reduce the duty-cycle of the beam allows the power delivered to the device during the actual probing time interval to be increased while maintaining a lower average power. Chopping the laser beam improves the signal-to-noise ratio of the continuous-wave laser voltage probing measurements. Chopping the laser beam improves the performance of the continuous-wave laser based laser voltage probing system, which may be used for measuring the internal signals of an operating integrated circuit device. | 05-13-2010 |
| 20100123470 | PROBE WITH BIDIRECTIONAL ELECTROSTATIC ACTUATION - A probe system that has a probe body comprising at least three arms extending from a central region and a probe tip centrally located on the probe body in the central region. A substrate is proximate the probe body opposite the probe tip. A first electrode is positioned to provide a centrally positioned voltage across the probe body and the substrate and a second electrode set is positioned radially outward from the first electrode, to provide an outer voltage across at least one of the at least three arms and the substrate. The probe structure may have, for example, four arms. Methods of actuating the probe tip are provided. | 05-20-2010 |
| 20100123471 | Digital Communications Test System for Multiple Input, Multiple Output (MIMO) Systems - A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with N×N MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set. | 05-20-2010 |
| 20100123472 | Probe card and test method using the same - A test method of a semiconductor device using a probe card includes the steps of performing a self-test and performing a normal-mode test. In the self-test, a quality of the semiconductor device is examined while connecting the first probe needle to the first signal terminal of the semiconductor device, and using the tester connected to the connection terminal. In the normal-mode test, a quality of the semiconductor device is examined while connecting the second probe needle to the second signal terminal of the semiconductor device, and using the tester connected to the connection terminal. | 05-20-2010 |
| 20100123473 | A TEST POINT STRUCTURE FOR RF CALIBRATION AND TEST OF PRINTED CIRCUIT BOARD AND METHOD THEREOF - A point structure for RF calibration and testing of a PCB is provided. The point structure includes a test pad, an antenna connection pad, and a device mounting pad. The test pad is connected to a circuit unit of the PCB, and a ground pad is connected with a ground of the PCB. A contact probe apparatus for performing RF calibration and testing is connected to the test pad and the ground pad. The antenna connection pad is connected to an antenna unit. The device mounting pad is connected with the test pad and the antenna connection pad. An antenna device is mounted on the device mounting pad. The test pad, the ground pad, the antenna connection pad, and the device mounting pad are separated from one another. Since the point structure can replace an RF switch, a circuit area on the PCB may be reduced, a mounting space may be secured, and a manufacturing cost may be reduced. | 05-20-2010 |
| 20100123474 | INSPECTION APPARATUS AND METHOD - There are provided an inspection apparatus and method that can locally perform sample temperature regulation, so that the sample drift can be suppressed. There are included a sample stage | 05-20-2010 |
| 20100127721 | TEST PROBE STRUCTURE - The present disclosure provides a method for testing an integrated circuit having a load impedance. The method includes generating a first test signal having a first frequency and a second test signal having a second frequency, wherein the second frequency is greater than the first frequency, transmitting the first test signal to a substrate having a board circuit operable to process the first signal, transmitting the second test signal to a substrate, wherein the substrate includes an impedance matching circuit operable to transform the load impedance of the integrated circuit into a desired impedance for the second frequency, and sending the first and second test signals to the integrated circuit via the substrate. | 05-27-2010 |
| 20100127722 | CIS Circuit Test Probe Card - A CIS test probe card with an optic assembly is disclosed. At least one embodiment relates to the optic assembly being located close to the CIS test probe card to collimate a light before it is projected through the CIS test probe card to the wafer. At least one embodiment relates to a change in the geometric configuration of the hole(s) and the probe(s) in the CIS test probe card. Small holes corresponding to the CIS chips in a one-on-one fashion can be implemented, such that each small hole is located over a corresponding CIS chip. | 05-27-2010 |
| 20100141285 | APPARATUS FOR DETERMINING AND/OR MONITORING A PROCESS VARIABLE - The invention relates to an apparatus for determining and/or monitoring at least one process variable of a medium ( | 06-10-2010 |
| 20100141286 | INTEGRATED CIRCUIT WITH IMPROVED TEST CAPABILITY VIA REDUCED PIN COUNT - An integrated circuit that supports testing of multiple pads via a subset of these pads includes at least two sections. Each section has multiple pads and multiple test access circuits coupled to these pads. For each section, one pad is designated as a primary pad and the remaining pads are designated as secondary pads. For each section, the test access circuits couple the secondary pads to the primary pad such that all of the pads in the section can be tested by probing just the primary pad. Each test access circuit may be implemented with a simple switch. A controller generates a set of control signals for the test access circuits in all sections. These control signals enable and disable the test access circuits such that all of the sections can be tested in parallel, and the pads in each section can be tested in a sequential order. | 06-10-2010 |
| 20100148808 | METHODS AND APPARATUS TO ANALYZE ON-CHIP CONTROLLED INTEGRATED CIRCUITS - Methods and apparatus for analyzing an integrated circuit are disclosed. An example method includes supplying power to an on-chip supply power regulator of integrated circuit, instructing the on-chip supply power regulator to output a circuit supply signal having a desired minimum voltage level for the integrated circuit, instructing the integrated circuit to initiate an on-chip self-test process, analyzing the results of the on-chip self-test process, and repeating the process after stepping down the voltage of the circuit supply signal level. | 06-17-2010 |
| 20100148809 | PROBE CARD FOR TESTING SEMICONDUCTOR DEVICE, PROBE CARD BUILT-IN PROBE SYSTEM, AND METHOD FOR MANUFACTURING PROBE CARD - A probe card is includes a wafer and a plurality of needle patterns penetrating the wafer. The needle patterns are configured to supply an electrical signal for testing a separate wafer. The probe card may be mounted to a printed circuit board in a manner in which conductive patterns of the probe card are electrically connected to conductive terminals of the printed circuit board. The needle patterns may protrude from a lower end of the wafer and be formed so that an interval between needle patterns is the same as an interval between pads of a wafer to be tested. | 06-17-2010 |
| 20100148810 | PROBE DEVICE, PROCESSING DEVICE, AND PROBE TESTING METHOD - Provision of a probe device, a processing device and a probe test capable of performing an efficient wafer probe test. A probe device, comprising a plurality of measuring stages to which a plurality of probe cards for inspecting semiconductor wafers are connected, respectively; a first conveying portion for conveying a semiconductor wafer to a first measuring stage to which a first probe card is connected; a first inspection control portion for controlling the inspection of the semiconductor wafer by the first probe card; a receiving portion for receiving stage information including information showing nonuse of the first measuring stage from a processing device; a second conveying portion for conveying the semiconductor wafer to a second measuring stage, to which a second probe card different from the first probe card is connected, according to the received stage information; and a second inspection control portion for controlling the inspection of the semiconductor wafer by the second probe card. | 06-17-2010 |
| 20100148811 | Probe card, and apparatus and method for testing semiconductor device using the probe card - A probe card transmitting electrical test signals between a tester and a semiconductor device includes a main circuit board configured to receive and transmit electrical signals from the tester, an interface unit electrically connected to the main circuit board, the interface unit including a signal line and a signal connection terminal, and at least one probe unit connected to the interface unit, the probe unit being detachable and including a plurality of probe needles arranged in a pattern corresponding to a pattern of electrode pads of the semiconductor device. | 06-17-2010 |
| 20100148812 | SEMICONDUCTOR DEVICE INCLUDING CHIP - A semiconductor device in which a chip | 06-17-2010 |
| 20100156446 | METHOD OF INSPECTING A SUBSTRATE - A method of inspecting a substrate includes measuring a first current flowing between a first region and a second region of the substrate using a first probe. A second current flowing between the first region and the second region of the substrate may be measured using a second probe including a material different from that of the first probe. By comparing the first and second currents, it can be determined whether there is a change in a physical composition of the substrate and a change in a physical configuration of the substrate between the first region and the second region. Thus, when the current change is induced by the change in a physical configuration of the substrate, a determination error that the contaminants on the semiconductor substrate may exist based on the current change may be prevented. | 06-24-2010 |
| 20100156447 | Method for Calibrating a Transmission Line Pulse Test System - Calibration method for calibrating transient behaviour of a TLP test system. The system comprises a TLP generator, probe needles, nominally impedance matched transmission lines and measurement equipment, connected between the transmission lines and the TLP generator, for detecting transient behaviour of a device under test by simultaneously capturing voltage and current waveforms as a result of generated pulses. The calibration method comprises (a) applying the TLP test system on an open and capturing first voltage and current waveforms; (b) applying the TLP test system on a calibration element having a known finite impedance and a known transient response and capturing second voltage and current waveforms; (c) transforming the captured first and second current and voltage waveforms to the frequency domain, and (d) determining calibration data for the transient behaviour of the TLP test system on the basis of the transformed first and second voltage and current waveforms. | 06-24-2010 |
| 20100164517 | CONDUCTIVE FILM STRUCTURE, FABRICATION METHOD THEREOF, AND CONDUCTIVE FILM TYPE PROBE DEVICE FOR ICS - A method for forming a conductive film structure is provided, which includes: providing an insulating substrate having a surface; forming a plurality of trenches in the surface of the insulating substrate, wherein the trenches are extended substantially parallel to each other; disposing the insulating substrate into a plating solution and plating conducting layers within the trenches to form a plurality of micro-wires; and stacking a plurality of the insulating substrates or winding or folding the insulating substrate along an axis substantially parallel to an extended direction of the micro-wires to form a conducting lump. | 07-01-2010 |
| 20100164518 | PROBE CARD - A probe card is provided that is capable of accurately ensuring the flatness and the parallelism with respect to a predetermined reference surface. A point (Q) of application of force applied from a leaf spring ( | 07-01-2010 |
| 20100164519 | TESTING OF ELECTRONIC CIRCUITS USING AN ACTIVE PROBE INTEGRATED CIRCUIT - A method and apparatus are provided for transmission/reception of signals between automatic test equipment (ATE) and a device under test (DUT). A probe card has a plurality of associated proximate active probe integrated circuits (APIC) connected to a plurality of probes. Each APIC interfaces with one or more test interface points on the DUT through probes. Each APIC receives and processes signals communicated between the ATE and the DUT. Low information content signals transmitted from the ATE are processed into high information content signals for transmission to the probe immediately adjacent the APIC, and high information content or time critical signals received by the APIC from the DUT are transmitted as low information content signals to the ATE. Because the APIC is immediately adjacent the probe there is minimum loss or distortion of the information in the signal from the DUT. | 07-01-2010 |
| 20100164520 | METHOD AND APPARATUS FOR TESTING INTEGRATED CIRCUIT - An embodiment of a method for testing an integrated circuit comprises a first step for determining at least one of a group selected from whether or not the chuck top receiving the integrated circuit exists near a probe card which transmits and receives electrical signals to and from the integrated circuit, whether or not the integrated circuit is under testing, and whether or not the probe card has a given temperature, and a second step for adjusting power for heating to be supplied to a heating element provided in the probe card according to the determination result in the first step. | 07-01-2010 |
| 20100164521 | Parametric Testline with Increased Test Pattern Areas - An integrated circuit parametric testline providing increased test pattern areas is disclosed. The testline comprises a dielectric layer over a substrate, a plurality of probe pads over the dielectric layer, and a first device under test (DUT) formed in the testline in a space underlying the probe pads. The testline may also include a second DUT, which is formed in a space underlying the probe pads overlying the first DUT in an overlaying configuration. The testline may further include a polygon shaped probe pad structure providing an increased test pattern area between adjacent probe pads. | 07-01-2010 |
| 20100171519 | PROBE AND PROBE CARD FOR INTEGRATED CIRCUIT DEVICES USING THE SAME - A vertical probe comprises a linear body, a tip portion connected to one side of the linear body, and at least one slot positioned on the linear body. In particular, the vertical probe includes a depressed structure having a plurality of slots positioned on the linear body in parallel and on one side of the linear body. The present application also provides a probe card for integrated circuit devices comprising an upper guiding plate having a plurality of fastening holes, a bottom guiding plate having a plurality of guiding holes and a plurality of vertical probes positioned in the guiding holes. The vertical probe includes a linear body positioned in the guiding holes, a tip portion connected to one side of the linear body and at least one slot positioned on the linear body. | 07-08-2010 |
| 20100176828 | REVERSIBLE TEST PROBE AND TEST PROBE TIP - A reversible test probe and test probe tip. In one embodiment, a test probe tip is reversible relative to a test probe body. The reversible probe has a first probe tip at a first end and a second probe tip at a second end. The test probe body has an opening operable to receive the first probe tip and the second probe tip. When the first probe tip is positioned in the opening, the first probe tip is electrically coupled to a metal device in the test probe body. When the second probe tip is positioned in the opening, the second probe tip is electrically coupled to a metal device in the test probe body. In another embodiment, a test probe having two test probe tips is reversible relative to a test lead. | 07-15-2010 |
| 20100176829 | PROBE AND PROBE CARD - A probe comprises: contact parts to be electrically connected to input/output terminals of an IC device built in a semiconductor wafer under test; interconnect parts at the front ends of which the contact parts are provided; a plurality of beam parts on the top surface of which the interconnect parts are provided along the longitudinal direction; and a base part supporting the plurality of beam parts all together in a cantilever fashion, the beam parts are supported by the base part at a rear end region of the beam parts, and grooves are provided between the adjoining beam parts in the rear end region. | 07-15-2010 |
| 20100176830 | RELAY CIRCUIT TESTER DEVICE - A circuit tester device for testing continuity and polarity of vehicle relay circuits may include a housing and a plug carried by the housing. The circuit tester device may also have a battery lead adapted to connect to a battery terminal, and a ground lead adapted to connect to a ground. Further, the circuit tester device may have circuitry including three or more circuits connected between the battery and ground leads. Each circuit may have in series a first resistor, a first status indicator, a first diode, a test terminal, a second diode, a second status indicator and a second resistor. Each test terminal may be connected to a respective one of the pins. The circuitry may also have one or more load circuits tapped into one of the circuits between the first and second diodes. The load circuits may include in series a test switch and a load terminal. | 07-15-2010 |
| 20100182027 | TEST LEAD PROBE WITH RETRACTABLE INSULATIVE SLEEVE - The present invention is directed to a test probe having an indexable probe tip. In one embodiment, an insulative sleeve extends from the test probe and surrounds a portion of the exposed probe tip. The insulative sleeve is moveable relative to the probe tip and may be indexable to at least two positions. For instance, the insulative sleeve locks into a first position to provide a first length of the probe tip exposed from the insulative sleeve, and the insulative sleeve locks into a second position to provide a second length of the probe tip exposed from the insulative sleeve. | 07-22-2010 |
| 20100182028 | Probe Card - A probe card is disclosed, which has a conductive layer additionally provided on an insulating seat of a probe stand and the conductive layer is electrically connected to a ground circuit on the probe card via a conductive pin being fed through the insulating seat. A conductive wire is wound surrounding the intermediate segment of the probe, one end of the conductive wire is electrically connected to the ground circuit of the circuit board, and the other end of the conductive wire is electrically connected to the conductive layer of the probe stand. Thus, due to that an additional ground portion of the conductive layer is provided on the conductive wire wound surrounding the probe, a loop inductance of the probe in the insulating seat can be reduced such that accuracy of test data of the probe can be enhanced. | 07-22-2010 |
| 20100182029 | ELECTRICAL TESTING DEVICE AND ELECTRICAL TESTING METHOD FOR ELECTRONIC DEVICE - An electrical testing device has a first probe that electrically contacts with an inspection device, a second probe that is electrically connected to the first probe and electrically contacts with an external terminal of a test object, a cylinder that houses the first probe and second probe, and into which and out of which a fluid flows between the first probe and second probe, and a fluid pressure regulator that controls the fluid pressure in the cylinder. The fluid pressure in the cylinder controls the contact force between the first probe and the inspection device and the contact force between the second probe and the external terminal. | 07-22-2010 |
| 20100182030 | Knee Probe Having Reduced Thickness Section for Control of Scrub Motion - An improved knee probe for probing electrical devices and circuits is provided. The improved knee probe has a reduced thickness section to alter the mechanical behavior of the probe when contact is made. The reduced thickness section of the probe makes it easier to deflect the probe vertically when contact is made. This increased ease of vertical deflection tends to reduce the horizontal contact force component responsible for the scrub motion, thereby decreasing scrub length. Here “thickness” is the probe thickness in the deflection plane of the probe (i.e., the plane in which the probe knee lies). The reduced thickness probe section provides increased design flexibility for controlling scrub motion, especially in combination with other probe parameters affecting the scrub motion. | 07-22-2010 |
| 20100182031 | Layered Probes With Core - The present invention is a probe for testing an electrical device under test comprising a core layer that is highly conductive. | 07-22-2010 |
| 20100194415 | PROBE NEEDLE MATERIAL, PROBE NEEDLE AND PROBE CARD EACH USING THE SAME, AND INSPECTION PROCESS - Disclosed is a probe needle material used for producing a probe needle which is used in contact with an inspection object to inspect electrical characteristics of the inspection object, comprising not less than 0.1% by volume but not more than 3.5% by volume of at least one compound selected from the group consisting of titanium boride, zirconium boride, hafnium boride, niobium boride, tantalum boride, chromium boride, titanium carbide, zirconium carbide, hafnium carbide, vanadium carbide, niobium carbide, tantalum carbide, zirconium oxide, hafnium oxide and chromium oxide and the balance of a tungsten alloy mainly consisting of tungsten. | 08-05-2010 |
| 20100201386 | PROBE BOARD, TEST FIXTURE, METHOD FOR MAKING A PROBE BOARD, AND METHOD FOR TESTING A PRINTED CIRCUIT BOARD (PCB) - Probe board for testing a target Printed Circuit Board, PCB ( | 08-12-2010 |
| 20100201387 | Safety-Enhanced Component and Circuit Tester - Circuit testers used with digital logic and its associated components are described. The circuit testers better protect the user, better protect the equipment, and provide testers in a form that is easy and safe to use. The tester includes a body member with a hand guard or hand protector and that includes a trigger switch, a fuse housing, a probe, and a second lead connector. All components are rated for at least the maximum voltage and current expected for the device. The hand guard serves as a physical barrier to any exposed voltages. The trigger switch provides for secure placement of the test lead and probe before energizing the circuit or component. To protect the equipment being tested, the maximum desired current to the test location can be identified and a properly-sized fuse installed in the fuse housing, protecting the existing equipment being tested from further damage by excessive currents. | 08-12-2010 |
| 20100201388 | ELECTRICAL PROBE - Methods, devices, and systems for probing electrical circuits without loading the circuits are described herein. One embodiment of an electrical probe includes a coaxial cable having an inner conductor and an outer conductor, an extension portion of the inner conductor extending beyond the outer conductor at a probe end of the cable. The electrical probe includes a conductive whisker having a first portion separated from and extending a distance along the extension portion such that the first portion and the extension portion form a first capacitor and a second portion having a probe tip for receiving an input test signal from a circuit node under test. | 08-12-2010 |
| 20100207649 | IN SITU AND REAL TIME MONITORING OF INTERCONNECT RELIABILITY USING A PROGRAMMABLE DEVICE - In one embodiment, the reliability of the L2 power and/or ground sub-arrays of contacts of a functional integrated circuit device is verified by applying a reference voltage to a selected contact in sub-array and sequentially measuring the voltage at other contacts in the sub-array. If the voltage levels are greater than a threshold voltage level then the functional integrated circuit device is verified as being reliable. | 08-19-2010 |
| 20100207650 | TEST APPARATUS AND TEST METHOD - Provided is a test apparatus for testing a device under test, comprising a multi-strobe generating section that generates, for each prescribed test cycle, a multi-strobe that includes a plurality of strobes arranged at prescribed time intervals; a data detecting section that detects a logic value of a response signal output by the device under test, according to each strobe; and a data width detecting section that detects a data width indicating a period during which the logic value of the response signal matches a prescribed expected value, based on each change point of a logic value output by the data detecting section. | 08-19-2010 |
| 20100207651 | TEST ACCESS COMPONENT FOR AUTOMATIC TESTING OF CIRCUIT ASSEMBLIES - A reliable and durable method of testing of printed circuit boards is presented. Test access components are placed in contact regions for providing electrical connectivity between test probes and the printed circuit board. In some cases, a test access component may be a surface mount resistor. The test access component may provide two points of contact for test probes to make electrical and mechanical contact with the printed circuit board. Test access components may also provide for increased durability of testing, allowing for a greater number of test contacts to be made between test probes and printed circuit boards than were previously possible. | 08-19-2010 |
| 20100207652 | METHOD FOR WAFER TEST AND PROBE CARD FOR THE SAME - A method of testing a wafer capable of minimizing the asymmetrical thermal deformation of a probe card when a wafer is tested using a probe card and of minimizing the number of times of tests to effectively test a large area wafer and a probe card for the same is presented. For the wafer test method for testing semiconductor chips on a wafer using a probe card, the method includes creating virtual repeating units corresponding to N semiconductor chips, wherein the N is natural number larger than or equal to 2, arranging the plurality of repeating units on the wafer and moving the probe card or the wafer N times and testing the semiconductor chips on a wafer, wherein the semiconductor chips in the repeating units are sequentially tested one by one per each touchdown. Also, the probe cards to realize above mentioned method have been described. | 08-19-2010 |
| 20100213956 | PROBE FOR CURRENT TEST, PROBE ASSEMBLY AND PRODUCTION METHOD THEREOF - A probe for current test comprising: a probe body having a plate-like connection portion whose end face becomes a connection face to a probe board; a solder layer formed on at least one side face of said connection portion; and a guide portion formed on the connection portion, penetrating the connection portion in its thickness direction from the one side face with the solder layer formed to the other side face, and when the solder layer is melted, capable of guiding a portion thereof to the other side face. | 08-26-2010 |
| 20100213957 | APPARATUS FOR TESTING ELECTRONIC DEVICES - An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer. | 08-26-2010 |
| 20100219852 | PROBE CARD - A probe card includes a probe head that holds a plurality of probes; a flat wiring board that has a wiring pattern corresponding to a circuit structure; an interposer that is stacked on the wiring board and relays wirings of the wiring board; a space transformer that is placed between the interposer and the probe head, transforms a space between the wirings relayed by the interposer, and leads the transformed wirings out to a surface facing the probe head; and a plurality of post members that are formed in a substantially columnar shape with a height larger than a sum of a thickness of the wiring board and a thickness of the interposer, and embedded to pierce through the wiring board and the interposer in a thickness direction such that one of end surfaces of each post member comes into contact with the space transformer. | 09-02-2010 |
| 20100219853 | Method of Testing a Display Panel and Apparatus for Performing the Method - In a test method of a display panel, a test signal and a test voltage are generated according to a test control signal. A display area of the display panel is tested based on the test signal and the test voltage. A driving voltage line and an on/off voltage line formed on the display panel are tested based on the test signal and the test voltage. | 09-02-2010 |
| 20100225342 | PROBE CARD AND MICROSTRUCTURE INSPECTING APPARATUS - A probe card | 09-09-2010 |
| 20100225343 | Probe card, semiconductor testing device including the same, and fuse checking method for probe card - A probe card according to an exemplary aspect of the present invention includes: a force terminal supplied with a first power supply voltage; a probe needle that supplies a voltage corresponding to the first power supply voltage to a semiconductor integrated circuit to be tested; a fuse connected in series on a first signal line which connects the force terminal and the probe needle; and a fuse check circuit that supplies a voltage different from the first power supply voltage supplied from the force terminal, to a first node located on a signal line between the probe needle and one end of the fuse. The circuit configuration enables checking of a connection state of a fuse prior to product inspection. This makes it possible to perform semiconductor testing with high reliability. | 09-09-2010 |
| 20100225344 | PROBING APPARATUS WITH GUARDED SIGNAL TRACES - A probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces. | 09-09-2010 |
| 20100237886 | PROBE CARD - A probe card is provided. The probe card can serialize, analogise and divide a digital signal by a parallel-to-serial converter, a parallel-to-serial converter, and a power divided unit respectively. The probe card can increase signal channels, and is not restricted by signal channels of a tester to test more DUTs simultaneously. Moreover, the probe card has fine impedance matching and channels separating to raise testing efficiency and reduce signal loss. | 09-23-2010 |
| 20100244866 | SYSTEM FOR TESTING AN INTEGRATED CIRCUIT OF A DEVICE AND ITS METHOD OF USE - A method of testing an integrated circuit of a device is described. Air is allowed through a fluid line to modify a size of a volume defined between the first and second components of an actuator to move a contactor support structure relative to the apparatus and urge terminals on the contactor support structure against contacts on the device. Air is automatically released from the fluid line through a pressure relief valve when a pressure of the air in the fluid line reaches a predetermined value. The holder is moved relative to the apparatus frame to disengage the terminals from the contacts while maintaining the first and second components of the actuator in a substantially stationary relationship with one another. A connecting arrangement is provided including first and second connecting pieces with complementary interengaging formations that restricts movement of the contactor substrate relative to the distribution board substrate in a tangential direction. | 09-30-2010 |
| 20100244867 | Structures and Processes for Fabrication of Probe Card Assemblies with Multi-Layer Interconnect - Based upon a layout of a semiconductor wafer comprising a plurality of integrated circuits at pre-defined locations, each integrated circuit comprising a set of electrical connection pads, a probe chip contactor is established, having a unit standard cell on the probe side of the probe chip to correspond to each of the arranged integrated circuits. The unit standard cell is stepped and repeated for the probe side of the probe chip contactor, to establish a wafer scale standard cell layout. The opposite contact side of the probe chip contactor is connectable to a central structure, e.g. a Z-block or PC board, typically comprising a fixed array of vias with fixed X, Y, and Z locations. The routing of contact side of the probe chip contactor is preferably routed automatically, such as implemented on one or more computers, to provide electrical connections between the substrate through vias and the Z-block through vias. | 09-30-2010 |
| 20100244868 | Wireless Clamp-on Current Probe - A Wireless Clamp-on Current Probe and an embedded system which includes a digital RF transceiver allows for remote test and measurement equipment to receive data from a current probe without regard to cabling issues such as size, physical wear, weight, cost, electrical noise, losses and more. Such a current probe may be used in environments and situations not previously explored. The probe may be controlled and queried by wired serial communication means or by means of an integrated radio frequency (RF) transceiver. The RF transceiver may utilize a proprietary communication protocol or a standard wireless communication protocol such as ZigBee, Bluetooth or any of the IEEE communication standards. | 09-30-2010 |
| 20100244869 | PROBE FOR ELECTRICAL INSPECTION, METHOD FOR FABRICATING THE SAME, AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE - An aspect of the present disclosure, there is provided An electrical inspection probe, including, a leading end portion of the electrical inspection probe, the leading end portion contacting with a solder bump located outward the electrical inspection probe, a base material configured at the leading end portion, the base material being constituted with a conductive material, a gold layer on a surface of the base material at least in the leading end portion, a rhodium layer on a surface of the gold layer at least in the leading end portion, and a ruthenium layer on a surface of the rhodium layer at least in the leading end portion. | 09-30-2010 |
| 20100244870 | DOPANT PROFILE MEASUREMENT MODULE, METHOD AND APPARATUS - An apparatus comprises: a first signal source; a dopant profile measurement module (DPPM) configured to receive a portion of the signal from the signal source; a probe tip connected to the reflective coupler; a load connected in parallel with the probe tip; and a second signal source connected to a load, wherein the signal source is configured to provide an amplitude-modulated (AM) signal to the probe tip. A method is also described. | 09-30-2010 |
| 20100253374 | Method and apparatus for Terminating A Test Signal Applied To Multiple Semiconductor Loads Under Test - Apparatus for terminating a test signal applied to multiple semiconductor loads under test is described—for example apparatus for interfacing a test signal between a tester and a semiconductor device under test (DUT). In some examples, a probe card assembly may include at least one probe substrate each having test probes configured to contact test features of a DUT; a wiring substrate, coupled to the at least one probe substrate, having a connector configured for coupling with a source termination of a tester; a signal path formed on and/or in the wiring substrate and the at least one probe substrate, the signal path having a trace and trace stubs fanning out from the trace, an input of the trace being coupled to the connector and outputs of the trace stubs being coupled to the test probes; and a resistive termination coupled between the trace and at least one potential. | 10-07-2010 |
| 20100253375 | ANCHORING CARBON NANOTUBE COLUMNS - A technique for anchoring carbon nanotube columns to a substrate can include use of a filler material placed onto the surface of the substrate into area between the columns and surrounding a base portion of each of the columns. | 10-07-2010 |
| 20100253376 | LEAK DETECTOR COMPRISING A POSITION DETERMINING SYSTEM FOR THE HAND-OPERATED PROBE - The leak detector comprises a basic unit that is connected to a probe by a hose. The probe tip is placed against test zones of the test object. In case that test gas escapes from the test object, this is detected by a test gas detector in the base unit. According to the disclosure, a position determining system is provided which comprises a transmitter, a receiver that is disposed inside the probe, and a supply and evaluation unit. Thereby, the presence of the probe tip in the individual test zones is monitored and confirmed. | 10-07-2010 |
| 20100253377 | ACTIVE WAFER PROBE - A probe suitable for probing a semiconductor wafer that includes an active circuit. The probe may include a flexible interconnection between the active circuit and a support structure. The probe may impose a relatively low capacitance on the device under test. | 10-07-2010 |
| 20100259287 | SEMICONDUCTOR TEST EQUIPMENT - A test head ( | 10-14-2010 |
| 20100259288 | APPARATUS AND METHOD FOR TERMINATING PROBE APPARATUS OF SEMICONDUCTOR WAFER - A probe apparatus and method of terminating a probe that probes a semiconductor device with a signal cable from a tester side by side at a proximal end of the probe and a distal end of the signal cable. In one embodiment, the probe apparatus includes: a chassis; a dielectric block mounted in the chassis for retaining the probe, the probe extending on the chassis from a proximal end of the probe to the dielectric block, extending through the dielectric block, and projecting from the dielectric block towards the semiconductor device at a distal end of the probe; and a terminating apparatus, mounted in the chassis, for terminating the proximal end of the probe with a distal end of the signal cable side by side. | 10-14-2010 |
| 20100264946 | TEST AND MEASUREMENT INSTRUMENT AND METHOD OF CONFIGURING USING A SENSED IMPEDANCE - A test and measurement instrument including a port including a plurality of connections; an impedance sense circuit configured to sense an impedance coupled to a connection of the plurality of connections; and a controller configured to setup the test and measurement instrument in response to a sensed impedance from the impedance sense circuit. | 10-21-2010 |
| 20100264947 | CLOSED-GRID BUS ARCHITECTURE FOR WAFER INTERCONNECT STRUCTURE - An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board. A set of spring contacts or probes link each contact pad to a separate one of the I/O pads on the wafer. | 10-21-2010 |
| 20100264948 | DIFFERENTIAL SIGNAL PROBING SYSTEM - A probe measurement system comprises a probe with a linear array of probe tips enabling a single probe to be used when probing a test structure with a differential signal | 10-21-2010 |
| 20100295569 | RF PERFORMANCE TEST STRUCTURE WITH ELECTRONIC SWITCH FUNCTION - An RF performance test structure is applied to test RF performance of an RF element via an RF measuring instrument. The RF performance test structure includes an antenna element, an RF test point and an electronic circuit switch chip. The RF test point connects to the RF measuring instrument. The electronic circuit switch chip has a first switch control input side, a second switch control input side, an RF signal input side connected to the RF element, a first RF signal output side connected to the antenna element, and a second RF signal output side connected to the RF test point. The first switch control input side and the second switch control input side respectively receive different signals in order to selectably transmit RF signals that are generated from the RF element and are received by the RF signal input side to the antenna element or the RF measuring instrument. | 11-25-2010 |
| 20100301884 | THIN-FILM PROBE SHEET AND METHOD OF MANUFACTURING THE SAME, PROBE CARD, AND SEMICONDUCTOR CHIP INSPECTION APPARATUS - A semiconductor chip inspection apparatus largely reduces occurrence of damage due to foreign matter in an inspection process and improves durability at the same time of miniaturization is provided. As to a highly accurate thin-film probe sheet which performs: a contact to electrode pads arranged at a narrow pitch and a high density along with integration of semiconductor chip; and an inspection of semiconductor chips, by providing two layers of metal films selectively removable in a step-like shape in a periphery region of fine contact terminal having sharp tips and arranged at a high density and a narrow pitch at the same level as electrode pads, an upper periphery of the contact terminals is covered with an insulating film, and a large space region is formed. | 12-02-2010 |
