Class / Patent application number | Description | Number of patent applications / Date published |
324755000 | Internal of or on support for device under test (DUT) | 62 |
20080197867 | SOCKET SIGNAL EXTENDER - A socket signal extender (SSE), and a system and method of testing an assembled device under test (DUT) board employing an SSE. In one embodiment, the SSE includes a cover having a portion configured to fit within a test socket. The portion is free of logic and includes electrical conductors configured to provide an electrical connection to contacts of the test socket. | 08-21-2008 |
20080218188 | JIG FOR PRINTED SUBSTRATE INSPECTION AND PRINTED SUBSTRATE INSPECTION APPARATUS - In a jig for inspection for inspecting a printed substrate in which a wiring part is formed on at least one surface, the jig comprises a base part which has a surface area larger than a surface area of at least the printed substrate targeted for inspection and is arranged as opposed to one surface of the printed substrate, and plural probe pins aligned and arranged at a predetermined distance mutually, any top end of the probe pin abutting on the wiring part of the printed substrate. | 09-11-2008 |
20080231297 | Method for calibrating semiconductor device tester - A method for calibrating a semiconductor device tester is disclosed. In accordance with method of the present invention, a timing is calibrated using a programmable delay device and calibration boards so as to remove a timing difference between channels and compensate a linearity of the programmable delay device for an adjustment of a timing by building and using a database of the round trip delay actually generated during the test. | 09-25-2008 |
20080252317 | Apparatus for testing system-in-package devices - Apparatus for testing System-In-Package (SIP) devices is described. The apparatus utilizes industry standard JEDEC trays and transports the trays into a tester. | 10-16-2008 |
20080265923 | Leadframe Configuration to Enable Strip Testing of SOT-23 Packages and the Like - A reduced width tie bar and a common lead hold a die paddle of each integrated circuit SOT-23 package to a leadframe within a strip of leadframes after isolating signal leads from the leadframe. Strip testing of most devices in the SOT-23 lead packages may then be performed. The common lead may be at the center of an edge of the SOT-23 package. Also the common lead may be any one of the leads of the SOT-23 package. The reduced width tie bar may be downstream of the epoxy encapsulation flow for better package integrity. | 10-30-2008 |
20080278186 | PIPELINE TEST APPARATUS AND METHOD - A pipeline test apparatus is provided. The pipeline test apparatus includes a test board. A plurality of stages of sockets are installed on the test board. Each socket is configured to be connected to a device under test (DUT). The sockets of each stage are connected to one of a plurality of different testing devices. Each testing device is configured to perform a unique test on all the DUTs of a corresponding stage. | 11-13-2008 |
20080290883 | Testboard with ZIF connectors, method of assembling, integrated circuit test system and test method introduced by the same - This invention discloses a test board with detachably adjustable ZIF connectors. The test board comprises a test substrate, a plurality of ZIF connectors and a plurality of detachably adjustable fastening means for assembling and disassembling the ZIF connectors on the test substrate. The test substrate has a first surface, a second surface and a plurality of first through-holes perpendicular to the first surface. Pairs of first electrical pads are provided on the first surface adjacent to both sides of first through-holes. A plurality of second electrical pads are provided on the second surface of the test substrate for electrically connecting the first electrical pads. The ZIF connectors are arranged on the first surface of the substrate. Each ZIF connector has a plurality of parallel second through-holes arranged from the top to the bottom of the connector and pairs of electrical terminals are disposed on the bottom of each ZIF connector for contacting the first electrical pads of the test substrate. The detachably adjustable fastening means are disposed through the first and second through-holes to assembling and disassembling the ZIF connectors on the first surface of the substrate. | 11-27-2008 |
20080290884 | Probe card assembly with ZIF connectors, method of assembling, wafer testing system and wafer testing method introduced by the same - This invention discloses a probe card assembly with adjustable ZIF connectors. The probe card assembly comprises a substrate, a plurality of ZIF connectors and a plurality of adjustable fastening means for assembling and disassembling the ZIF connectors on the substrate. The substrate is a disc-like plate, having a first surface, a second surface, a plurality of concave sections disposed on the second surface and a plurality of first through holes perpendicular to the first surface. The first through holes are circularly arranged toward the substrate center. Pairs of first contacts are provided on the first surface adjacent to both sides of first through holes. A plurality of terminals are protruded from the second surface of the substrate for contacting and testing the wafer. The ZIF connectors are also circularly arranged toward the substrate center. Each ZIF connector has parallelly arranged second through holes from the top to the bottom of the connector and pairs of contact terminals for contacting the first contacts of the substrate. The adjustable fastening means are disposed from the concave section through the first and second through holes to assembling and disassembling the ZIF connectors on the first surface of the substrate. | 11-27-2008 |
20080315899 | Test Apparatus for Testing a Semiconductor Device, and Method for Testing the Semiconductor Device - A test apparatus for testing a semiconductor device having contact pads on its top and its back, and to a method for testing the semiconductor device is disclosed. In one embodiment, the test apparatus has a test socket which is mounted on a test printed circuit board. Internal through-contact elements of the test socket can be used to test contact pads on the top of the semiconductor device. The contact pads on the back of the semiconductor device can be connected for the purpose of testing the semiconductor device using external through-contact elements which are arranged outside of the locating seat. | 12-25-2008 |
20080315900 | HIGH TEMPERATURE CERAMIC SOCKET CONFIGURED TO TEST PACKAGED SEMICONDUCTOR DEVICES - A test socket assembly is for use in testing integrated circuits. A single piece socket is formed substantially of an insulating material and having a plurality of holes formed therein configured to receive a plurality of electrically conductive springs. Each hole of the single piece socket has therein a separate one of the electrically conductive springs. A test socket includes a plurality of pins configured to receive leads of an integrated circuit, the pins of the test socket extending into the plurality of holes of the single piece socket with each pin engaging a spring, wherein the single piece socket is positioned on a circuit board with the plurality of holes being in alignment with electrical contacts on the circuit board such that the plurality of springs are electrically interconnecting the contacts and the plurality of pins. The single -piece socket is comprised substantially of a high-temperature insulating material, such as ceramic. | 12-25-2008 |
20080315901 | MULTILAYER WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME AND PROBE APPARATUS - The present invention provides a multilayer wiring board in which resistive elements each of whose error from a desired value is smaller than in a conventional case are built, a method for manufacturing the same, and a probe apparatus utilizing the multilayer wiring board. The present invention is based on a basic concept of forming a flat surface on a surface of a multilayer wiring layer on which a resistive element material is to be deposited and depositing the resistive element material on the flat surface. The multilayer wiring board comprises a multilayer wiring layer on whose surface convexo-concave is formed, a dummy layer burying the convexo-concave within a desired area of the surface of the multilayer wiring layer and having an approximately flat surface, a resistance material layer made of an electrical resistance material deposited on the dummy layer and at an area going beyond the dummy layer, and a wire made of a conductive material deposited on the resistance material layer and ranging from the area going beyond the dummy layer to a part of the flat surface area of the dummy layer, wherein a resistive element is formed at an area of the resistance material layer that the wire does not reach. | 12-25-2008 |
20080315902 | TEST DEVICE, TEST CARD, AND TEST SYSTEM - A test device to be connected to a multi-card slot of an electronic apparatus performs test for connection between a card inserted into the multi-card slot and the multi-card slot with a plurality of connection terminals. The test device includes a test card and a connection unit. The test card includes a plurality of contact portions to be connected to all of the plurality of connection terminals of the multi-card slot and is inserted into the multi-card slot. The connection unit includes the plurality of cards and connects the plurality of cards to the test card. | 12-25-2008 |
20090002007 | Universal cover for a burn-in socket - In one embodiment, the present invention includes a universal cover to be adapted to burn-in sockets, where at least some of the burn-in sockets have different dimensions. In this way, the universal cover enables an actuator plate of an actuator system having a fixed configuration of actuation members to open and close burn-in socket covers of different form factors. Other embodiments are described and claimed. | 01-01-2009 |
20090009199 | SYSTEMS AND METHODS FOR TESTING PACKAGED MICROELECTRONIC DEVICES - Systems and methods for testing packaged microelectronic devices are disclosed herein. One such system for testing a packaged microelectronic device includes a test socket configured to receive the device for testing and a tester interface including a plurality of test contacts aligned with external contacts of the device when the device is received within the test socket. The system further includes a mask proximate to the test socket and the test contacts. The mask includes a plurality of apertures arranged in a pattern corresponding to the plurality of test contacts and corresponding at least in part to the array of external contacts when the device is received within the test socket. The apertures include (a) first apertures sized to allow the corresponding test contacts to extend completely through the mask, and (b) one or more second apertures sized to allow the corresponding test contacts to extend only partially through the mask. | 01-08-2009 |
20090015278 | APPARATUS TO MONITOR SUBSTRATE VIABILITY - An apparatus for detecting and reporting a condition is described. The apparatus is an electronic package comprising a substrate with electrically conducting lines electrically connected to an integrated chip, and to a source of voltage. The integrated circuit chip is mounted onto a substrate and electrically connected to at least one electrically conducting line. A sensor, combined with a signal generator, connected to the substrate, is operable to generate an electrical signal upon detection of a condition selected from a condition of the substrate and a condition of an electrical connection to the substrate. The signal generator, after immediately receiving the aforesaid electrical signal from the sensor, emits the warning signal. The warning signal of indicated of an existing defect or a condition which can lower the longevity of the total electronic package. | 01-15-2009 |
20090015279 | Socket, and test apparatus and method using the socket - An apparatus for testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the apparatus comprises a test board comprising first pads on a predetermined surface; a socket configured to electrically connect the test object to the test board; and a handler configured to transport the test object to the socket. The socket comprises a first connection unit configured to be electrically connected to the first connection terminals of the test object and a second connection unit configured to be electrically connected to the second connection terminals of the test object. | 01-15-2009 |
20090021274 | ELECTRICAL CONNECTING APPARATUS - An electrical connecting apparatus comprises a plurality of plate-shaped probes. Each probe has a cut-off portion opening on its inside surface side and both sides in the thickness direction of the probe and is engaged with a dropout preventing member disposed in a plate-shaped housing at the cut-off portion, thereby being prevented from dropping out of the housing. | 01-22-2009 |
20090027072 | APPARATUS FOR TESTING CHIPS WITH BALL GRID ARRAY - An exemplary an apparatus for testing chips with ball grid array comprised of a number of solder balls is provided. The apparatus includes a main printed circuit board, a supporting board and a testing device. The main printed circuit board has a edge connector. The supporting board defines a number of electrically conductive through holes arranged in an array corresponding to the ball grid array. One end of each of the electrically conductive through holes is configured for electrically connection to the main printed circuit board, the other end of the electrically through holes is configured for receiving and electrically connecting the corresponding solder ball of the ball grid array. The testing device has a socket connector for insertion of the edge connector therein. The testing device is configured for testing the chip. | 01-29-2009 |
20090045829 | Wafer holder for wafer prober and wafer prober equipped with same - It is an object of the present invention to provide a wafer prober wafer holder that is highly rigid and increases the heat insulating effect, thereby improving positional accuracy, thermal uniformity, and chip temperature ramp-up and cooling rates, as well as a wafer prober device equipped therewith. | 02-19-2009 |
20090058444 | METHOD AND APPARATUS FOR RELATIVE TESTING OF INTEGRATED CIRCUIT DEVICES - A method includes loading a plurality of integrated circuit devices into a tester. At least one parameter is determined for each of the integrated circuit devices using the tester. At least one relative acceptance criterion associated with the parameter is determined based on the determined parameters for the plurality of integrated circuit devices. A pass/fail status of each of the integrated circuit devices is determined using the relative acceptance criterion. | 03-05-2009 |
20090066352 | Making And Using Carbon Nanotube Probes - Columns comprising a plurality of vertically aligned carbon nanotubes can be configured as electromechanical contact structures or probes. The columns can be grown on a sacrificial substrate and transferred to a product substrate, or the columns can be grown on the product substrate. The columns can be treated to enhance mechanical properties such as stiffness, electrical properties such as electrical conductivity, and/or physical contact characteristics. The columns can be mechanically tuned to have predetermined spring properties. The columns can be used as electromechanical probes, for example, to contact and test electronic devices such as semiconductor dies, and the columns can make unique marks on terminals of the electronic devices. | 03-12-2009 |
20090085593 | Test socket - A support block has a first face, a second face opposed to the first face, and first and second through holes communicating between the first face and the second face, and is formed with resin material. The first face, the second face, and the first and second through holes are covered with an electrically conductive plated coating. First and second probes are electrically connected to terminals of a device to be tested provided on a side of the first face and to terminals connected to a testing apparatus provided on a side of the second face. The first probe is provided in the first through hole and is electrically connected to the plated coating on the first through hole, the second probe is provided in the second through hole and is electrically connected to the plated coating on the second through hole. A pattern for defining a first region electrically connected to the first probe via the plated coating and a second region electrically connected to the second probe via the plated coating is formed by partially removing the plated coating on the first face and the second face, where the second region is electrically isolated from the first region. Electrodes of an electronic component are respectively connected to the first and second regions. | 04-02-2009 |
20090128177 | ATTACHMENT FOR SOCKET AND SEMICONDUCTOR DEVICE-TESTING UNIT HAVING THE SAME - To provide an attachment for a socket which can cope with automatic testing of the IC devices, and which can enhance the radiation of heat from the IC devices despite of its reduced size, as well as to provide a semiconductor device-testing unit having the same. An attachment | 05-21-2009 |
20090140758 | TEST CARRIER - A test carrier includes an insert body, a first latch assembly including one or more first latches pivotally attached to the insert body, and a second latch assembly including one or more second latches pivotally attached to the insert body. The second latch assembly is configured to engage with an external connection terminal array of an electronic component during testing thereof. A method of testing a semiconductor device and a system for testing a semiconductor device are also provided. | 06-04-2009 |
20090140759 | IC socket having contact devices with low impedance - A contact device ( | 06-04-2009 |
20090153168 | HI-FIX BOARD, TEST TRAY, TEST HANDLER, AND METHOD FOR MANUFACTURING PACKAGED CHIPS - A hi-fix board, a test tray, a test handler, and a packaged chip manufacturing method are provided. The hi-fix board includes: test sockets to which packaged chips to be tested are connected; and a main frame in which the test sockets are disposed in at least one first area to form an a×b matrix (where a and b are integers greater than 0) and the test sockets are disposed in at least one second area to form a c×d matrix (where c is an integer greater than a and d is an integer greater than 0). By allowing the test tray to contain more packaged chips at a time and minimizing a difference in length between a horizontal direction and a vertical direction, it is possible to reduce the index time. By allowing all the packaged chips contained in a test tray to be subjected to a testing process at the same time, it is possible to reduce the time for the testing process and to enhance the stability. | 06-18-2009 |
20090160468 | SYSTEM FOR TESTING AN INTEGRATED CIRCUIT OF A DEVICE AND ITS METHOD OF USE - A cartridge, including a cartridge frame, formations on the cartridge frame for mounting the cartridge frame in a fixed position to an apparatus frame, a contactor support structure, a contactor interface on the contactor support structure, a plurality of terminals, held by the contactor support structure, for contacting contacts on a device, and a plurality of conductors, held by the contactor support structure, connecting the interface to the terminals. | 06-25-2009 |
20090160469 | ELECTRIC CONNECTING APPARATUS - In an electrical connecting apparatus, a thermal deformation restriction member, a reinforcing plate, and an auxiliary member are made of materials having smaller thermal expansion coefficients in this order, and a wiring board supporting a probe assembly is coupled with the reinforcing plate. The auxiliary member has a void inside the coupling region with the reinforcing plate. The void receives the deformed part when the center portion of the wiring board is deformed toward the reinforcing plate. Thus, the thermal deformation restriction member, the reinforcing plate, and the auxiliary member function as a three-layer bimetal having a sandwich structure, and the thermal deformation of the wiring board is restricted effectively. | 06-25-2009 |
20090206857 | SINGULATED BARE DIE TESTING FIXTURE - A flexible redistribution membrane and a piece of silicon rubber is used in a testing fixture for testing a singulated bare die. The silicon rubber is used as a cushion under the flexible redistribution membrane against the downward pressure from the bare die during testing so that the top pads of the flexible redistribution membrane can be electrically tight coupling to bottom pads of the bared die to be tested. | 08-20-2009 |
20090206858 | DIAGNOSIS BOARD ELECTRICALLY CONNECTED WITH A TEST APPARATUS FOR TESTING A DEVICE UNDER TEST - There is provided a test apparatus having a test head containing test modules for sending/receiving signals to/from a device-under-test, a device mounting section having a socket for mounting the device-under-test and a performance board placed on the test head to connect each terminal of the test module with each terminal of the device-under-test via the device mounting section, and the performance board has a plurality of sub-boards each containing a part of a plurality of wires for connecting the test module with the device-under-test and a fixing section for attaching and fixing the plurality of sub-boards in a body to the test head. | 08-20-2009 |
20090212802 | Test system with high frequency interposer - An interposer with a conductive housing is disclosed. Conductive members pass through insulators positioned in openings in the conductive housing. The conductive housing may be grounded, providing a closely spaced ground structure for signal conductors passing through the conductive housing and therefore providing a desirable impedance to signals carried by the conductive members. Such an interposer may be used in a test system to couple high speed signals between instruments that generate or measure test signals and devices under test. | 08-27-2009 |
20090224786 | RADIO FREQUENCY TESTING SYSTEM AND TESTING CIRCUIT UTILIZED THEREBY - A radio frequency (RF) testing system ( | 09-10-2009 |
20090256582 | TEST CIRCUIT BOARD - A test circuit board used for disposing at least one device under test is disclosed. The circuit board transmits a plurality of testing signals generated by a tester to test the device under test. The test circuit board includes a circuit board, a plurality of transforming slots, a plurality of connecting slots and a plurality of connecting lines. The transforming slots, the connecting slots and the connecting lines are located on the circuit board. The connecting lines are located on the circuit board according to a predetermined manner. | 10-15-2009 |
20090267628 | Circuit board test system and test method - A circuit board system is adapted to check a DUT (Device Under Test) and a communication device on a DUT board, check the connection between DUT and communication device and check connections of parts mounted on DUT board. The system, which tests a circuit board used when a DUT is tested using a tester, has a socket into which DUT is removably inserted; a communication device mounted thereon; first wires electrically connecting first signal terminals of DUT and the tester; and second wires electrically connecting second signal terminals of DUT, which are not electrically connected to the first signal terminals, and signal terminals of the communication device. A shorting board is inserted into the socket in place of DUT when the circuit board is tested, the shorting board having short-circuit wires electrically connecting the first wires and the second wires. | 10-29-2009 |
20090267629 | Contact for interconnect system in a test socket - The present invention generally relates to testing of IC devices, and more specifically to a contact ( | 10-29-2009 |
20090273359 | ELECTRICAL TESTING APPARATUS HAVING MASKED SOCKETS AND ASSOCIATED SYSTEMS AND METHODS - An apparatus for forming a temporary electrical connection with a microelectronic component and associated systems and methods are disclosed herein. Embodiments of the apparatus can include a base, a plurality of electrical contacts coupled to the base, and a nest attached to the base. The nest includes a plurality of contact compartments aligned with peripheral leads of the microelectronic component and at least partially covering the contacts. Individual contact compartments are masked to prevent a corresponding contact from electrically contacting the peripheral leads of the microelectronic component. In one embodiment, the masked contact compartments are used as a guide zone to guide individual peripheral leads when the microelectronic component is seated at or unseated from the support surface. In an additional or alternative embodiment, the masked contact compartments are used to selectively isolate contacts, for example, from supply or ground electrical potentials. | 11-05-2009 |
20090278560 | CIRCUIT BOARD TEST CLAMP - A circuit board test clamp includes a clamping element, and at least one test element. The clamping element includes two clamping boards and a elastic connecting portion integrally formed. The least one test elements each includes a probe and a test connector. The connecting portion connects two end portions of the clamping board. Opposite clamping ends of the clamping board resiliently meet to provide clamping force. At least one test elements are formed on the clamping board; wherein upon a condition that the circuit board is clamped by the clamping element, the test probe is capable of electrically contacting a test point of the circuit board, and the test connector is capable of electrically connecting to the probe of the tester. | 11-12-2009 |
20090322364 | TEST INTERPOSER HAVING ACTIVE CIRCUIT COMPONENT AND METHOD THEREFOR - A device under test (DUT) is tested via a test interposer. The test interposer includes a first set of contacts at a first surface to interface with the contacts of a load board or other interface of an automated test equipment (ATE) and a second set of contacts at an opposing second surface to interface with the contacts of the DUT. The second set of contacts can have a smaller contact pitch than the contact pitch of the first set of contacts to facilitate connection to the smaller pitch of the contacts of the DUT. The test interposer further includes one or more active circuit components or passive circuit components to facilitate testing of the DUT. The test interposer can be implemented as an integrated circuit (IC) package that encapsulates the circuit components. | 12-31-2009 |
20100001750 | Methods and Apparatus For Single-Sided Extension of Electrical Conductors Beyond the Edges of a Substrate - An apparatus for providing electrical pathways between one or more unsingulated integrated circuits and one or more test circuits external to the integrated circuits, includes a flexible substrate having a first major surface and a second major surface, a plurality of first contact structures disposed in a central portion of the first surface of the flexible substrate, a plurality of second contact structures disposed in a peripheral annular region of the first surface of the flexible substrate, and a plurality of first electrically conductive pathways, each of the plurality of first electrically conductive pathways coupled to a respective first and second contact structure, wherein the second surface is free from first contact structures, second contact structures, and first electrically conductive pathways. | 01-07-2010 |
20100001751 | TRANSFER MECHANISM FOR TARGET OBJECT TO BE INSPECTED - A transfer mechanism for a target object includes at least two insulating wire materials disposed spaced from each other to transverse a mounting table, at least two pairs of supporting bodies horizontally disposed at outsides of the mounting table, for stretching said at least two wire materials in parallel with a mounting surface of the mounting table, and at least two grooves formed on the mounting surface of the mounting table to respectively receive therein said at least two wire materials by said at least two pairs of supporting bodies. The transfer mechanism further includes a first elevation driving mechanism for vertically moving said wire materials between said grooves and above of the mounting surface through said pairs of supporting bodies, wherein the target object is transferred between a carrying mechanism and the mounting table through said at least two wire materials. | 01-07-2010 |
20100013507 | Panel Circuit Structure - A panel circuit structure for transmitting electrical signals to an active area is provided. The panel circuit structure includes a first transmission pad, a first test pad, a second transmission pad, a second test pad, and a third transmission pad, which are connected to a driving element. The first transmission pad, the first test pad, the second transmission pad, and the second test pad transmit electrical signals to the active area via the first transmission lines and second transmission lines. The first transmission pads and the second transmission pads are disposed at a first end of the driving element while the third transmission pad is disposed at a second end of the driving element. The first and second test pads are disposed outside the coverage area of the driving element. | 01-21-2010 |
20100026330 | TESTBOARD WITH ZIF CONNECTORS, METHOD OF ASSEMBLING, INTEGRATED CIRCUIT TEST SYSTEM AND TEST METHOD INTRODUCED BY THE SAME - A testboard with ZIF connectors is disclosed. The testboard comprises a test substrate, a plurality of ZIF connectors and a plurality of detachably adjustable fastening means. Each ZIF connector has a plurality of second through-holes, and pairs of electric terminals are deposed on the bottom of each ZIF connector where each pair of electric terminals has a radial shape for contacting the test substrate. Each fastening means is disposed through the first through-holes and the second through-holes through the middle of each ZIF connector for adjusting the ZIF connectors on the test substrate in better contact and for replacing each ZIF connector on the test substrate with a replacement ZIF connector where the second through-holes are arranged to one another in a spaced interval along a longitudinal direction, and each ZIF connector has a ratio of its longitudinal length to its spaced interval ranging from 3:1 to 5:1. | 02-04-2010 |
20100085070 | CARRIER TRAY FOR USE WITH PROBER - A carrier tray for use with a prober is arranged to allow the prober to measure or test not only semiconductor wafers but also semiconductor packages and accurately position each of different-shaped semiconductor packages. A carrier tray includes a lowermost tray and an uppermost tray interposing therebetween an intermediate tray. The lowermost and uppermost trays and are each of a circular shape having a diameter D | 04-08-2010 |
20100102840 | TEST APPARATUS ADDITIONAL MODULE AND TEST METHOD - A test apparatus includes: test modules that communicate with the device under test to test the device under test; additional modules connected between the device under test and the test modules, each additional module performing a communication with the device under test; the communication being at least one of a communication performed at a higher speed and a communication performed with a lower latency, in comparison with a communication performed by the test modules; a test head having a plurality of connectors that connect the test modules and the additional modules, respectively, the test modules and the additional modules are mounted on the test head; a performance board placed on the test head that connects between at least a part of terminals of the plurality of connectors and the device under test. The test modules are connected to the additional modules without through the performance board. | 04-29-2010 |
20100109693 | Auto probe device and method of testing liquid crystal panel using the same - An auto probe device used in a method of testing a plurality of signal lines of a liquid crystal panel is disclosed. | 05-06-2010 |
20100117668 | Test Board and Test System - The test board includes at least one first interface configured to electrically connect the test board with a test controller, at least one second interface configured to electrically connect the test board with at least one electrical device to be tested, respectively. The test board further includes at least one electrical component, and a bus system electrically connected to the first interface and one or more of the second interface and the electrical component. | 05-13-2010 |
20100141287 | TEST OF ELECTRONIC DEVICES AT PACKAGE LEVEL USING TEST BOARDS WITHOUT SOCKETS - An embodiment test system is proposed; the test system is used to test electronic devices each one having a case with a plurality of terminals for example, of the BGA type. The test system includes a set of (one or more) test boards. Each test board includes a plurality of banks of electrically conductive receptacles, each one for resting a corresponding electronic device; each receptacle is adapted to receive a terminal of the corresponding electronic device. A set of (one or more) boxes is arranged in operation above the test boards. Each box defines an expandable chamber for a conditioning fluid; particularly, the box includes a rigid body, a flexible membrane of a thermally conductive material facing the test boards, an inlet, and an outlet. Means is provided for controlling a temperature of the conditioning fluid (for example, a heat exchanger). The test system further includes means for forcing the conditioning fluid to circulate under pressure through the chambers, so as to expand the flexible membranes downwardly; the expanded flexible membranes press the electronic devices against the test boards to lock the electronic devices mechanically on the test boards and to condition the electronic devices thermally. | 06-10-2010 |
20100141288 | TESTING INTEGRATED CIRCUITS ON A WAFER USING A CARTRIDGE WITH PNEUMATIC LOCKING OF THE WAFER ON A PROBE CARD - An embodiment of a cartridge is proposed for testing integrated circuits on a wafer with the wafer that has a wafer front surface with a plurality of terminals of the integrated circuits. The cartridge includes a probe card, which has a card front surface with a plurality of probes for contacting the terminals of the integrated circuits electrically, and a card back surface opposite the card front surface. Locking means is provided for locking the wafer on the probe card. The locking means includes one or more through-holes that cross the probe card from the card front surface to the card back surface; sealing means is arranged on the card front surface around the probes and the through-holes. In this way, a substantially airtight chamber is defined by the probe card, the sealing means and the wafer when the wafer front surface abuts against the sealing means. Coupling means is arranged on the card back surface. The coupling means is used to couple the cartridge with pneumatic means for creating a depression in the chamber, by removing air from the chamber through the through-holes; the same coupling means is also used to seal the airtight chamber when the cartridge is decoupled from the pneumatic means. | 06-10-2010 |
20100164522 | SIGNAL TESTING APPARATUS - A signal testing apparatus includes a number of first switches, a second switch, and a testing terminal. Each first switch includes a static contact, a first dynamic contact, and a second dynamic contact. The second switch includes a static contact and a number of dynamic contacts. When the static contact and the first dynamic contact of each first switch are connected to each other, a computer interface is connected to a peripheral equipment interface. When the static contact and the second dynamic contact of each first switch are connected to each other, the computer interface is disconnected to the peripheral equipment interface, the static contact of the second switch is capable of selectively connected to one of the dynamic contacts of the second switch, to selectively test a signal output from a corresponding pin of the computer interface. | 07-01-2010 |
20100188112 | INSPECTION SOCKET - An inspection socket connects electrode terminals of an object to be inspected to wirings of a wiring board. The inspection socket includes: a metal block formed with first holes; contact probes provided in the first holes and including at least a contact probe for RF signals, the contact probes provided with plungers capable of moving in an axial direction at distal ends of the contact probes; and an insulating board securing the contact probes and formed with second holes through which the plungers are passed, the insulating board provided with a GND member around the contact probe for RF signals. | 07-29-2010 |
20100194416 | ELECTRICAL CONNECTING APPARATUS - An embodiment of an electrical connecting apparatus comprises a probe base plate and a plurality of contacts provided with tips to be pressed against electrodes of a device under test and arranged on the underside of the probe base plate. The distance dimensions from an imaginary plane parallel to the probe base plate to the tips of the contacts are made the greater toward the center of the probe base plate. | 08-05-2010 |
20100213958 | SYSTEMS AND METHODS FOR PROVIDING A SYSTEM-ON-A-SUBSTRATE - This relates to systems and methods for providing a system-on-a-substrate. In some embodiments, the necessary components for an entire system (e.g., a processor, memory, accelerometers, I/O circuitry, or any other suitable components) can be fabricated on a single microchip in “bare die” form. The die can, for example, be coupled to suitable flash memory through a substrate and flexible printed circuit board (“flex”). In some embodiments, the flex can extend past the substrate, die, or both, to allow additional, relatively large components to be coupled to the flex. In some embodiments, the die can be coupled to the flash memory through the flex and without a substrate. In some embodiments, component test points can be placed on the flash memory side of the substrate. | 08-26-2010 |
20100213959 | Test section unit, test head and electronic device testing apparatus - A test section unit provided to a test head body includes a plurality of sockets to be attached with electronic devices to be tested and a performance board as a main substrate. All of the sockets are provided with the performance board without an intervening a socket board. | 08-26-2010 |
20100213960 | Probe Card Test Apparatus And Method - A probe card analyzer mounts on a probe card in a wafer prober and a use a fixture in the wafer probe and switch electronics in place of an ATE head. Methods of testing can confirm that probe cards are operating within their specifications over large temperature ranges and the mechanical force ranges seen in real manufacturing environments. This reduces the cost and improves the accuracy and speed of analyzing probe cards and improves diagnosing problems with probe cards. | 08-26-2010 |
20100231248 | SOCKET, AND TEST APPARATUS AND METHOD USING THE SOCKET - An apparatus for testing electric characteristics of a test object including first connection terminals on a bottom surface and second connection terminals on a top surface, the apparatus comprises a test board comprising first pads on a predetermined surface; a socket configured to electrically connect the test object to the test board; and a handler configured to transport the test object to the socket. The socket comprises a first connection unit configured to be electrically connected to the first connection terminals of the test object and a second connection unit configured to be electrically connected to the second connection terminals of the test object. | 09-16-2010 |
20100244871 | SPACE TRANSFORMER CONNECTOR PRINTED CIRCUIT BOARD ASSEMBLY - Space transformer connectors for coupling printed circuit boards and/or other electrical connections are disclosed. A scalar design of a multilayer space transformer connector allows for a variety of pad-array field connections. A conductive elastomer interface provides for repeated and consistent coupling and decoupling of the space transformer connector. | 09-30-2010 |
20100244872 | INSPECTION SOCKET AND METHOD OF PRODUCING THE SAME - An inspection socket configured to connect an electrode terminal of an object to be inspected and a wiring of a wiring board, includes: a metal block including a first surface to be opposed to the object to be inspected and a second surface to be opposed to the wiring board, and provided with a through hole connecting the first surface and the second surface in a first direction, an inner wall of the through hole having a part which is not rectilinear in the first direction; and a contact probe for grounding provided in the through hole, and being connected to the inner wall of the through hole, at least in vicinity of the part which is not rectilinear. | 09-30-2010 |
20100244873 | APPARATUS AND METHOD OF TESTING SINGULATED DIES - An exemplary die carrier is disclosed. In some embodiments, the die carrier can hold a plurality of singulated dies while the dies are tested. The dies can be arranged on the carrier in a pattern that facilities testing the dies. The carrier can be configured to allow interchangeable interfaces to different testers to be attached to and detached from the carrier. The carrier can also be configured as a shipping container for the dies. | 09-30-2010 |
20100244874 | TEST STRUCTURE AND PROBE FOR DIFFERENTIAL SIGNALS - A test structure including a differential gain cell and a differential signal probe include compensation for the Miller effect reducing the frequency dependent variability of the input impedance of the test structure. | 09-30-2010 |
20100259289 | Detecting Open Ground Connections in Surface Mount Connectors - A device may include a current source for connecting to a printed circuit board. The device may also include a first FET switch pack and a second FET switch pack for connecting to the surface mount connector of the printed circuit board. Additionally, the device may include a FET controller connected to the first FET switch pack and the second FET switch pack. The FET controller may be utilized for connecting a first FET and a second FET to the first region of the surface mount connector. The FET controller may be configured for supplying the current to the first region of the surface mount connector to produce at least one continuous heat signature characteristic of an improperly connected ground pin. A thermal monitoring module may be used to identify the improper physical connection. | 10-14-2010 |
20100289513 | TEST SOCKET ASSEMBLY HAVING HEAT DISSIPATION MODULE - A test socket assembly ( | 11-18-2010 |
20100301886 | TEST BOARD - A test board is provided. The test board includes a power connecting interface, diode modules, a power module a detecting module, and a processor. The power connecting interface includes power pins, wherein each of the power pins is electrically connected to a motherboard power socket to receive a power signal. Each of the diode modules is electrically connected to one of the power pins and includes at least one diode. The power module is electrically connected to the diode modules to receive the power signal through each of the diode modules. The detection module is electrically connected to points between the diode modules and the power connecting interface to generate a detection result according to the voltage between each diode module and the power connecting interface. The processor is used to determine the connecting state between the power pin and the corresponding motherboard power socket according to the detection result. | 12-02-2010 |