| Entries |
| Document | Title | Date |
|---|
| 20080213933 | METHODS OF FABRICATING A LARGE AREA TRANSDUCER ARRAY - Methods of fabricating a tiled transducer array are disclosed. Embodiments of the methods include fabricating a wafer comprising a plurality of transducers, dicing the wafer to form individual transducers, testing the individual transducers to identify a plurality of known good transducers, preparing a substrate having a front side and a backside wherein the backside of the substrate comprises a plurality of connectors, positioning the plurality of known good transducers on the front side of the substrate and aligning the plurality of transducers in a horizontal direction and a vertical direction to form a transducer array, and electrically coupling the connectors on the substrate to the plurality of known good transducers, wherein the connectors are arranged such that each of the plurality of known good transducers may be electrically coupled to an electronic device disposed on the backside of the substrate, through a respective one or more of the plurality of connectors. | 09-04-2008 |
| 20080233672 | METHOD OF INTEGRATING MEMS STRUCTURES AND CMOS STRUCTURES USING OXIDE FUSION BONDING - A method to fabricate a device including a micro-electro-mechanical system structure and a monolithic integrated circuit comprises using a first wafer as a first substrate, fabricating the micro-electro-mechanical system structure on the first substrate, and forming a first oxide layer over the micro-electro-mechanical system structure. The method further comprises using a second wafer as a second substrate, fabricating the monolithic integrated circuit on the second substrate, and forming a second oxide layer over the monolithic integrated circuit. The first wafer and the second wafer are arranged so that the first oxide layer opposes the second oxide layer. The micro-electro-mechanical system structure is aligned with the monolithic integrated circuit, the first oxide layer is contacted with the second oxide layer; and bonded with the second oxide layer. | 09-25-2008 |
| 20090186440 | METHODS, APPARATUS, AND ROLLERS FOR CROSS-WEB FORMING OF OPTOELECTRONIC DEVICES - Apparatus and methods for forming optoelectronic devices such as an array of light emitting diodes or photovoltaic cells in one embodiment a roll-to-roll process in which a uniquely configured roller having a raised spiral coating surface is aligned with a plurality of first electrodes disposed on an angle on a substrate for coating a plurality of spaced-apart angled coated strips of optoelectronic materials along the cross-web direction of the substrate. | 07-23-2009 |
| 20090215213 | Microelectromechanical device having a common ground plane and method for making aspects thereof - The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common ground plane layer; depositing a DC electrode region through the dielectric layer to contact the common ground plane layer; and depositing a conducting layer on the DC electrode region so that regions of the conducting layer contact the DC electrode region, so that the common ground plane layer provides a common ground for the regions of the conducting layer | 08-27-2009 |
| 20090317930 | Method for producing a structure comprising a mobile element by means of a heterogeneous sacrificial layer - First and second sacrificial materials are deposited on a substrate. The first and second patterns are respectively formed in the first and second sacrificial materials. The first pattern made from the first sacrificial material is arranged on the second pattern made from a second sacrificial material. The first pattern leaves an area of predefined width free on the periphery of a top surface of the second pattern. The active layer covers at least the whole of the side walls of the first and second patterns and said predefined area of the second pattern. The active area is patterned so as to allow access to the first sacrificial material. The first and second sacrificial materials are selectively removed forming a mobile structure comprising a free area secured to the substrate by a securing area. | 12-24-2009 |
| 20100035373 | Method for manufacturing a sensor device with a stress relief layer - A method for packaging a sensor device having a sensitive structure integrated on a semiconductor chip is provided. When molding the device package, an inward extending section of the mold maintains an access opening to the sensor. A buffer layer is arranged on the chip between the inward extending section and the sensitive structure. The buffer layer protects the sensitive structure from damage by the inward extending section and acts as a seal while casting the housing. The buffer layer also covers at least part of the semiconductor electronic components of the circuitry integrated onto the chip. By covering these components, mechanical stress, as it is e.g. caused by different thermal expansion coefficients of the packaging and the chip, can be reduced. | 02-11-2010 |
| 20110003421 | METHOD OF FORMING MONOLITHIC CMOS-MEMS HYBRID INTEGRATED, PACKAGED STRUCTURES - A method of forming Monolithic CMOS-MEMS hybrid integrated, packaged structures includes the steps of providing: providing at least one semiconductor substrate having a CMOS device area including dielectric layers and metallization layers; applying at least one protective layer overlying the CMOS device area; forming at least one opening on the protective layer and patterning the dielectric and metallization layers to access the semiconductor substrate; forming at least one opening on the semiconductor substrate by etching the dielectric and metallization layers; applying at least one filler layer in the at least one opening on the semiconductor substrate; positioning at least one chip on the filler layer, the chip including a prefabricated front face and a bare backside; applying a first insulating layer covering the front face of the chip providing continuity from the semiconductor substrate to the chip; forming at least one via opening on the insulating layer covering the chip to access at least one contact area; applying at least one metallization layer overlying the insulating layer on the substrate and the chip connecting the metallization layer on the substrate to the at least one another contact area on the chip; applying a second insulating layer overlying the metallization layer on the at least one chip; applying at least one interfacial layer; applying at least one rigid substrate overlying the interfacial layer; and applying at least one secondary protective layer overlying the rigid substrate. | 01-06-2011 |
| 20110111544 | MEMS MIRROR SYSTEM FOR LASER PRINTING APPLICATIONS - A MEMS mirror for a laser printing application includes providing a CMOS substrate including a pair of electrodes, and providing a reflecting mirror moveable over the substrate and the electrodes. Voltages applied to the electrodes create an electrostatic force causing an end of the mirror to be attracted to the substrate. A precise position of the mirror can be detected and controlled by sensing a change in capacitance between the mirror ends and the underlying electrodes. | 05-12-2011 |
| 20120094417 | DIODE ENERGY CONVERTER FOR CHEMICAL KINETIC ELECTRON ENERGY TRANSFER - An improved diode energy converter for chemical kinetic electron energy transfer is formed using nanostructures and includes identifiable regions associated with chemical reactions isolated chemically from other regions in the converter, a region associated with an area that forms energy barriers of the desired height, a region associated with tailoring the boundary between semiconductor material and metal materials so that the junction does not tear apart, and a region associated with removing heat from the semiconductor. | 04-19-2012 |
| 20140199799 | METHOD AND STRUCTURE FOR ADDING MASS WITH STRESS ISOLATION TO MEMS STRUCTURES - A method and structure for adding mass with stress isolation to MEMS. The structure has a thickness of silicon material coupled to at least one flexible element. The thickness of silicon material can be configured to move in one or more spatial directions about the flexible element(s) according to a specific embodiment. The apparatus also includes a plurality of recessed regions formed in respective spatial regions of the thickness of silicon material. Additionally, the apparatus includes a glue material within each of the recessed regions and a plug material formed overlying each of the recessed regions. | 07-17-2014 |
| 20140206122 | Open Cavity Plastic Package - A method for manufacturing open cavity integrated circuit packages, the method comprising: placing a wire-bound integrated circuit in a mold; forcing a pin to contact a die of the wire-bound integrated circuit by applying a force between the pin and the mold; injecting plastic into the mold; allowing the plastic to set around the integrated circuit to form a package having an open cavity defined by the pin; and removing the open cavity integrated circuit package from the mold. A mold for forming a package for an integrated circuit sensor device, comprising: a bottom part for supporting an integrated circuit die; a top part that is operable to be placed on top of said bottom part to form a cavity into which a plastic material can be injected to form the package, wherein the top part of the mold comprises a spring-loaded pin arrangement comprising a cover that covers a sensor area on the integrated circuit die and provides for an opening when the plastic material is injected. | 07-24-2014 |
| 20150294926 | Module Comprising a Semiconductor Chip - A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element. | 10-15-2015 |
| 20150368095 | DOUBLE-SIDE PROCESS SILICON MOS AND PASSIVE DEVICES FOR RF FRONT-END MODULES - A method for forming integrated circuit includes providing a first semiconductor substrate having a front surface and a back surface that is opposite to the front surface. One or more first trenches are in the first semiconductor substrate from the front surface side, the first trenches being characterized by a first depth. One or more second trenches are formed in the first semiconductor substrate from the front surface side, the second trenches being characterized by a second depth which greater than the first depth. A horizontal isolation layer is formed parallel to the front surface and at a third depth from the front surface. The method also includes forming a first recessed region extending in the first semiconductor substrate from the back surface side to the horizontal isolation layer that results in a thinned semiconductor region having a thickness substantially equal to the third depth. The method further includes forming a bulk dielectric layer covering the back surface side of the first semiconductor substrate. | 12-24-2015 |
| 20160039667 | METHOD TO PACKAGE MULTIPLE MEMS SENSORS AND ACTUATORS AT DIFFERENT GASES AND CAVITY PRESSURES - A method for fabricating a multiple MEMS device includes providing a semiconductor substrate having a first and second MEMS device, and an encapsulation wafer with a first cavity and a second cavity, which includes at least one channel. The first MEMS is encapsulated within the first cavity and the second MEMS device is encapsulated within the second cavity. These devices is encapsulated within a first encapsulation environment at a first air pressure, and encapsulating the first MEMS device within the first cavity at the first air pressure. The second MEMS device within the second cavity is then subjected to a second encapsulating environment at a second air pressure via the channel of the second cavity. | 02-11-2016 |
| 20160155935 | PROCESS FOR NiFe FLUXGATE DEVICE | 06-02-2016 |
| 20170233247 | LOW COST WAFER LEVEL PROCESS FOR PACKAGING MEMS THREE DIMENSIONAL DEVICES | 08-17-2017 |
