Entries |
Document | Title | Date |
20080201587 | ANTICIPATORY POWER MANAGEMENT FOR BATTERY-POWERED ELECTRONIC DEVICE - Methods and apparatus for managing power consumption of a battery-powered electronic device are disclosed. According to one embodiment, power management can take action to reduce power consumption to accommodate estimated power requirements. According to another embodiment, power management can notify a user when a power deficiency is anticipated. According to still another embodiment, power management can advise a user to charge a battery of the battery-powered electronic device. According to still another embodiment, a user can influence power management by user selections. | 08-21-2008 |
20080201588 | SEMICONDUCTOR DEVICE AND METHOD FOR REDUCING POWER CONSUMPTION IN A SYSTEM HAVING INTERCONNECTED DEVICES - A system includes a plurality of memory devices connected in-series that communicate with a memory controller. A memory device designated by an ID number performs operations at a normal power consumption level. The other devices not designated perform signal forwarding operations at a reduced power consumption level. The designated memory device enables its internal clock generator to generate all clocks necessary for operations. The non-designated memory devices generate clocks to perform partial operations for forwarding commands to next memory devices. In another example, memory devices do not forward the input command to the next memory device when there is no ID match. In another example, a memory device transmits the command replacing the content thereof with a static output when there is an ID match. Such partial clock generation, non-forwarding of commands and replacing the command contents will cause the system to operate at the reduced power consumption level. | 08-21-2008 |
20080209242 | MODEM CARD CONFIGURED TO COMPENSATE FOR POWER SUPPLY - A modem card includes a connector configured to be detachably connected to a computer. The card also includes electronics configured to be powered by a power supply located in the computer and to transmit wireless signals to a communications network at a transmit power. The electronics are configured to vary the transmit power such that the transmit power does not exceed a maximum transmit power. Increases in the transmit power cause a drop in the voltage of the power. The electronics are also configured to determine an adjusted maximum transmit power. The adjusted maximum transmit power is a transmit power at which the signals can be transmitted to the communications system without the voltage dropping below a shut-down voltage. The electronics are also configured to reduce the value of the maximum transmit power to a value that that is less than or equal to the value for the adjusted maximum transmit power. | 08-28-2008 |
20080209243 | Scheduling processor voltages and frequencies based on performance prediction and power constraints - A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them. | 08-28-2008 |
20080215902 | METHOD AND APPARATUS FOR NEGOTIATING POWER BETWEEN POWER SOURCING EQUIPMENT AND POWERABLE DEVICES - The present invention provides a power negotiation protocol that enables PDs and PSEs to negotiate the amount of inline power that a PD consumes and the corresponding PSE provides. This power negotiation allows the PDs provide fine-grained power consumption level to PSEs, and the PSEs are able to manage inline power efficiently using the negotiation protocol of the present invention. The PDs can ask the PSEs for more power when needed rather than having to constantly reserve the maximum amount of power they can consume at all times. Similarly, the PDs can release reservation of excess power when their respective power requirements decrease. The PSEs can limit the amount of power that can be consumed by the PD, thereby providing the ability for an administrator to control how much power a given PD can consume. | 09-04-2008 |
20080222436 | POWER SUPPLY VOLTAGE REGULATOR CIRCUIT AND MICROCOMPUTER - A power supply voltage regulator circuit including a power supply circuit which switches to a first through a fourth state; the first state being the state wherein voltage is supplied to neither a normal circuit nor a backup system circuit based on the combination of logic for the normal circuit power control signal, the second state being the state wherein a primary power supply voltage is supplied to the normal circuit and a secondary power supply voltage is supplied to the backup system circuit, the third state being the state wherein voltage is not supplied to the normal circuit and the secondary power supply voltage is supplied to the backup system circuit, the fourth state being the state wherein the primary power supply voltage is supplied to both the normal circuit and the backup system circuit. | 09-11-2008 |
20080229127 | Method and System for Estimating Processor Utilization from Power Measurements - A method and system for estimating processor utilization from power measurements provides an estimate of processor utilization that can be computed outside of the processor and operating system. Measurements of the processor power consumption are gathered over short intervals in a histogram. The idle power consumption of the processor is determined, and a threshold value higher than the idle power consumption level is computed from the idle power consumption. The number of histogram counts for bins greater than the threshold is normalized to the total number of measurements, providing a fractional value that corresponds to the processor utilization over the measurement interval. The fractional value can then be used in a power management algorithm that adjusts the frequency and optionally the voltage of the processor or group of processors based on their utilization. | 09-18-2008 |
20080229128 | System and Computer Program Product for Dynamically Managing Power in MicroProcessor Chips According to Present Processing Demands - A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary. | 09-18-2008 |
20080235526 | POWER-SAVING CLOCKING TECHNIQUE - A method and system for providing a clock signal having reduced power consumption is provided, called the hybrid clock system. The hybrid clock system uses a PLL for high-speed data transfers, but provides a power-saving mode for transferring data while consuming less power. In the normal mode, the hybrid clock system contains a reference clock that operates at a low frequency that drives a PLL. The PLL multiplies the reference clock frequency to a much higher frequency, and supplies the clock signal to a data transfer circuit. In the power-saving mode, the hybrid clock system turns off the PLL and connects the reference clock directly to the data transfer circuit. | 09-25-2008 |
20080235527 | Operation of computer display using auxiliary display controller - A computing apparatus includes a display, a Central Processing Unit (CPU) having active and switched-off operational states and an auxiliary display controller, which is active when the CPU is in the switched-off operational state. The computing apparatus further includes a switch, which is operative to connect the CPU to the display when the CPU is in the active operational state, so as to display first information produced by the CPU, and to connect the auxiliary display controller to the display when the CPU is in the switched-off operational state, so as to display second information produced by the auxiliary display controller. | 09-25-2008 |
20080244289 | Hybrid Operating System for Battery Powered Computing Systems - Systems, methods, and/or techniques (“tools”) for hybrid operating systems for battery powered computing systems are described herein. The hybrid operating systems (OS) may include a full-power OS component that enables the computing system to operate in a full-power mode, and a low-power OS component that enables the computing system to operate in a low-power mode. In the full-power mode, the computing system consumes a first amount of electrical power, while in the low-power mode, the computing system consumes less electrical power. The computing system may include a processor that consumes a given power amount of power, and a low-power core processor that consumes less power than the processor. | 10-02-2008 |
20080244290 | POWER SAVING DEVICE CONTROLLED BY CONTROLLER OR DISK - This is a disk array device comprising means for operating a plurality of controller modules or disks, means for determining the a future operating state, based on operation history of the controller module or the disk and setting means for setting an operating state of the controller module or disk in such a way as to reduce its power consumption, based on the future operating state of the controller module or disk. | 10-02-2008 |
20080250257 | Energy efficient memory access technique for single ended bit cells - A method for conserving power in a device. The method generally includes the steps of (A) generating a polarity signal by analyzing a current one of a plurality of data items having a plurality of data bits, the polarity signal having an inversion bit indicating that the current data item is to be stored in one of (i) an inverted condition and (ii) a non-inverted condition relative to a normal condition such that a majority of the data bits have a first logic state, wherein reading one of the data bits having the first logic state consumes less power than reading one of the data bits having a second logic state, (B) selectively either (i) inverting the current data item or (ii) not inverting current the data item based on the inversion bit and (C) storing the current data item in a plurality of single-ended bit cells in the device. | 10-09-2008 |
20080263375 | Method And System For Managing Activities In A Battery Powered Device - A method for managing activities in a battery powered device includes receiving activity information, a start time that is different from a present time, and either a duration or an end time for performing the desired activity. The method also includes determining a required energy amount needed for performing the desired activity, determining an available energy amount for the battery powered device, determining a projected energy consumed by the battery powered device from the present time to the start time, and determining a residual energy of the battery powered device based on a difference of the device's available energy amount and a sum of the required energy and projected energy consumed by the battery powered device from the present time to the start time. An indication is provided that includes information relating to the desired activity and to whether the determined residual energy is sufficient to perform the desired activity. | 10-23-2008 |
20080263376 | Frequency and voltage scaling architecture - A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others. | 10-23-2008 |
20080270810 | Electronic device with flexible processing system - An electronic device comprising a host module and a wireless module each comprising a processing unit, wherein the electronic device is configurable to be operated in a low processing mode by performing processing functions for the electronic device using the processing unit of the wireless module. | 10-30-2008 |
20080276106 | Data Conversion Apparatus and Data Conversion Method - It is aimed, for example, to reduce an amount of power consumption of an operation concerning data encryption or decryption and to make it difficult to perform a power analysis. In the case an exclusive OR operation between 32-bit input data and a 32-bit key is performed to obtain output data of 32 bits, the input data is kept in an input shift register | 11-06-2008 |
20080282097 | METHOD FOR INDICATING A POWER SWITCH OF A COMPUTER AND DEVICE THEREOF - A device for indicating the power switch of a computer is disclosed in the invention, which is applied in portable computers and indicates the position of a power switch of a portable computer when the computer is in shutdown status. The portable computer comprises at least a monitor and a main system, wherein an indicating device is also disposed in the portable computer; the indicating device includes a detecting unit, an illuminating element, and a controller. The detecting unit detects whether the monitor and the main system have been unclosed and separated from each other; if the detection result is “true”, a trigger signal is exported. The illuminating element is disposed in the proximity of the power switch on the portable computer. The controller accepts the trigger signal and adjusts the illumination of the illuminating element. | 11-13-2008 |
20080282098 | Semiconductor memory device and error correction method therof - A semiconductor memory device comprising: a memory array having a data area and a check code area; refresh control means which controls a refresh operation in a data holding state; operation means which executes an encoding operation for generating the check code using a bit string in the data area, and executes a decoding operation for performing the error detection/correction of the data using the check code; encode control means for controlling an encode process in which in a change to the data holding state, a first and second code are written in the check code area; and decode control means for controlling a decode process in which at the end of the data holding state, first and second bit error correction based on each code are alternately performed, and the first and the second bit error correction are performed at least twice respectively. | 11-13-2008 |
20080282099 | INFORMATION PROCESSING APPARATUS AND POWER SAVING CONTROL METHOD - According to one embodiment, an information processing apparatus includes a sound controller which reproduces a sound signal, and a sound driver which controls a drive of the sound controller. The sound driver includes a volume full-mute determination unit which determines whether or not the apparatus is set in a volume full-mute state of making zero sound output volume, and a control unit which determines whether or not the apparatus is set in a volume full-mute state by using the volume full-mute determination unit when a sound signal reproduce request is made while the sound controller has transferred to a power saving mode, and maintains the sound controller in a power saving mode when the apparatus is set in a volume full-mute state. | 11-13-2008 |
20080288795 | METHOD AND SYSTEM FOR REDUCING POWER CONSUMPTION OF STORAGE SYSTEM SERVING AS TARGET DURING REMOTE COPYING EMPLOYING JOURNAL - A second storage system comprises a restore control unit for controlling restoration processing, in which a data element in a journal stored in a journal storage area is written into a secondary logical volume, and a storage device control unit for controlling a storage device in the second storage system. The restore control unit is provided with a function for suspending the restoration processing. A first value indicating the usage condition of the journal storage area in the second storage system is obtained, and the restore control unit suspends the restoration processing in accordance with the obtained first value. The storage device control unit then executes power saving on a storage device relating to the secondary logical volume. | 11-20-2008 |
20080288796 | MULTI-PROCESSOR CONTROL DEVICE AND METHOD - A multi-processor control device according to an example of the invention comprises a cooperative control unit which determines priorities of requests issued from processors to a shared resource which are used to suppress a total power consumption of the processors within a range in which performance constraints of programs executed by the processors are satisfied, and determines a frequency of each of the processors so as to suppress the total power consumption within the range in which the performance constraint of the each program is satisfied, a first control unit which issues requests from the processors to the shared resource in accordance with priorities determined by the cooperative control unit, and a second control unit which controls the frequency of each of the processors in accordance with the frequency determined by the cooperative control unit. | 11-20-2008 |
20080294919 | ETHERNET LOW POWER PARTIAL FUNCTIONALITY COMMUNICATION LINK - Methods and devices for a low power partial functionality communication link having an Ethernet mode of operation and a low power partial functionality mode of operation. The communication link may process only frames containing predefined data types while in the low power partial functionality mode. | 11-27-2008 |
20080301477 | Power Saving in Signal Processing in Receivers - A method of receiving a signal in bursts comprising frames each including payload data and error correction data received in separate time periods, the bursts being separated by time intervals during which power is saved by disabling at least some signal processing components of the receiver, Signal processing components of the receiver are disabled to save power before all the error correction data for all the frames in the burst is received. | 12-04-2008 |
20080301478 | Electronic Device and Method for Controlling Current - An electronic device comprises a voltage regulator supplying a current to a load such as a micro-controller unit. The load controls the current provided to the load from the voltage regulator. Preferably, the load controls the level of current supplied to the load upon start-up, thereby avoiding power surges being drawn by the load. | 12-04-2008 |
20080307240 | POWER MANAGEMENT ELECTRONIC CIRCUITS, SYSTEMS, AND METHODS AND PROCESSES OF MANUFACTURE - An electronic circuit including a power managed circuit ( | 12-11-2008 |
20080307241 | Microcontroller circuit and power saving method thereof - A microcontroller circuit provides proper clocks to a central processing unit of a microcontroller and peripherals according to a power saving mode and operating conditions of the peripherals. The microcontroller circuit comprises a prescaler, a second multiplexer, a central processing unit, a first switch, a second switch, a first peripheral, and an execution unit. The execution unit is installed in the central processing unit and used for controlling the first switch and the second switch. The switches control the transmission of clocks according to the power saving mode operated by the microcontroller circuit, so that the central processing unit and each peripheral can work with a proper clock to reduce power use. | 12-11-2008 |
20080307242 | COMPUTER SYSTEM POWER SOURCE WITH IMPROVED LIGHT-LOAD EFFICIENCY - Embodiments of the present invention provide a system that supplies power in a computer system. The system includes a power adapter coupled to a source of electrical power and a set of a set of power consumers coupled to a power bus in the computer system. A full-power mechanism coupled between the power adapter and the power bus supplies power for the power consumers while the computer system is operating in a full-power mode. A low-power mechanism coupled between the power adapter and the power bus in parallel with the power mechanism supplies power for the power consumers while the computer system is in operating in a low-power mode. | 12-11-2008 |
20080307243 | Anticipatory Power Management for Battery-Powered Electronic Device - Methods and apparatus for managing power consumption of a battery-powered electronic device are disclosed. According to one embodiment, power management can take action to reduce power consumption to accommodate estimated power requirements. According to another embodiment, power management can notify a user when a power deficiency is anticipated. According to still another embodiment, power management can advise a user to charge a battery of the battery-powered electronic device. According to still another embodiment, a user can influence power management by user selections. | 12-11-2008 |
20090006875 | Media Device Power Conservation - Power is dynamically conserved in a device by analyzing past processing performance of the device and predicting the amount of power required for future execution. In an example embodiment, a video frame is analyzed to determine what portion of the video frame was needed to render data. If less than the full video frame was needed, at least one power conservation technique is applied to the device for subsequent rendering of data. Power conservation techniques include adjusting the operating frequency of circuitry utilized to render data, adjusting the voltage applied to circuitry utilized to render data, and/or turning off/on circuitry utilized to render data. | 01-01-2009 |
20090006876 | STORAGE SYSTEM COMPRISING FUNCTION FOR REDUCING POWER CONSUMPTION - For at least one of storage unit, processor and cache memory which are I/O process-participating devices related to I/O command process, when a load of one or more I/O process-participating devices or a part thereof is a low load equal to or less than a predetermined threshold value, a processing related to a state of one or more of the I/O process-participating devices or a part thereof is redirected to another one or more I/O process-participating devices or a part thereof, and the state of the one or more I/O process-participating devices or a part thereof is shifted to a power-saving state. | 01-01-2009 |
20090013200 | DATA PROCESSING APPARATUS AND DATA PROCESSING APPARATUS CONTROL METHOD - A data processing apparatus includes a receiving unit configured to receive data, a first processing unit configured to perform predetermined processing on the received data, a second processing unit configured to perform the predetermined processing on the received data, a first control unit configured to perform control so that the data processing apparatus operates in one of a first operation mode for supplying power to both the first processing unit and the second processing unit and a second operation mode for discontinuing a supply of power to the first processing unit while supplying power to the second processing unit, and a second control unit configured to perform control so that the first processing unit performs the predetermined processing if the data processing apparatus operates in the first operation mode and that the second processing unit performs the predetermined processing if the data processing apparatus operates in the second operation mode. | 01-08-2009 |
20090019297 | Semiconductor device - Semiconductor device reduces power consumption of total display system. A display memory | 01-15-2009 |
20090024856 | Systems, methods and devices for limiting current consumption upon power-up - Embodiments are described including those for controlling peak current consumption of a multi-chip memory package during power-up. In one embodiment, each memory device of the multi-chip package includes a power level detector used to compare an internal voltage signal to a threshold. A current limiter controls the ramping rate of the internal voltage signal in response to the power level detector as the internal voltage signal ramps up towards the threshold. | 01-22-2009 |
20090024857 | Reducing Power Consumption of Mirrored RAID Subsystems - Power consumption reduction of a mirrored RAID storage subsystems is disclosed, wherein data are mirrored to a secondary mirror disk system, the secondary mirror disk system alternates between an operational stage and a power-save stage, wherein data to be mirrored to the secondary mirror disk system is saved in a substantially always operational pre-stage storage if the secondary mirror disk system is in a power save stage and subsequently moved from the pre-stage storage to the secondary mirror disk system when the secondary mirror disk system is operational. | 01-22-2009 |
20090031154 | POWER SAVING METHOD IN NAS AND COMPUTER SYSTEM USING THE METHOD - Provided is a computer system which includes plurality of computers including a first, second, and third computers, and a storage device coupled to the plurality of computers via a network, in which: the first computer is configured to: access data in a storage area of the storage device; cut, based on settings information and loads on the plurality of computers, at least a part of electric power supplied to the first computer; and send, before cutting the at least a part of electric power supplied to the first computer, a takeover request to the second computer; and the second computer accesses the data within the storage area after receiving the takeover request. With the configuration as described above, power consumption in NAS is reduced. | 01-29-2009 |
20090044032 | Method, Apparatus and Computer Program Product Providing Instruction Monitoring for Reduction of Energy Usage - A method is disclosed to operate a power advisor. The method includes, reading a first instruction set; reading a data bus; and reading register value(s) stored in at least one data register. This information is analyzed for energy usage purposes. If a set of instruction can provide the same result with a lower energy usage, the first instruction set is replaced with the lower power usage instruction set. An apparatus and computer program product are also disclosed. | 02-12-2009 |
20090049316 | SYSTEM AND METHOD OF MODIFYING POWER USE WITHIN AN INFORMATION HANDLING SYSTEM - A system and method of modifying power use within an information handling system is disclosed. In one form, a method of managing power within an information handling system is disclosed. The method can include establishing a threshold power level of a first information handling system, and detecting a first power demand of a first operating state in excess of the threshold power level. The method can also include detecting a request to invoke a first forced reduced power state of the first information handling system, and determining a first alternative power state different from the threshold power level and the first forced reduced power state. The method can further include initiating the first alternative power state. | 02-19-2009 |
20090049317 | Managing Power in a Parallel Computer - Managing power in a parallel computer, the parallel computer including a power supply and a plurality of compute nodes, the plurality of compute nodes powered by the power supply through a plurality of DC-DC converters, each DC-DC converter supplying current to an assigned group of compute nodes, each DC-DC converter having a current sensor. Embodiments include monitoring, by the current sensor, an amount of current supplied by that DC-DC converter to its assigned group of compute nodes; determining, by at least one DC-DC converter, that the amount of current supplied is greater than a predefined threshold value; sending, by the at least one DC-DC converter to the plurality of compute nodes, a global interrupt, including notifying the plurality of compute nodes to reduce power consumption; and reducing, by the plurality of compute nodes in accordance with power consumption ratios, power consumption of the compute nodes. | 02-19-2009 |
20090049318 | METHOD AND SYSTEM FOR CONTROLLING POWER IN A CHIP THROUGH A POWER-PERFORMANCE MONITOR AND CONTROL UNIT - A system and method for controlling power and performance in a microprocessor system includes a monitoring and control system integrated into a microprocessor system. The monitoring and control system includes a hierarchical architecture having a plurality of layers. Each layer in the hierarchal architecture is responsive to commands from a higher level, and the commands provide instructions on operations and power distribution, such that the higher levels provide modes of operation and budgets to lower levels and the lower levels provide feedback to the higher levels to control and manage power usage in the microprocessor system both globally and locally. | 02-19-2009 |
20090055665 | Power Control of Servers Using Advanced Configuration and Power Interface (ACPI) States - A method of managing power consumption by a plurality of blade servers within a processing system. The speed of at least one of the plurality of blade servers is reduced in response to the processing system reaching a power or thermal threshold. At least one of the plurality of blade servers is identified as not being critical to maintain in a working state and the critical blade server is put in a sleep state. A satellite management controller may control blade server power consumption and heat generation in various ways that combine processor speed-stepping and control of processor sleep states. Known sleep states save more power than speed-stepping by turning off the processor and/or volatile memory. The processor speed and sleep-states of at least one non-critical blade server, and optionally the processor speed of a critical processor, may be changed in order to control the power consumption below a power threshold or control the temperature below a thermal threshold. | 02-26-2009 |
20090055666 | POWER SAVINGS FOR A NETWORK DEVICE - An example embodiment is illustrated to reduce power consumed by inactive connections. This embodiment may include detecting a connection condition signifying a requirement for an active connection between one network device and another network device. Thereafter, an enable instruction may be retrieved based upon the detecting of the connection condition, and a port may be enabled based upon the retrieved enable instruction resulting in increased electrical power consumption by a port component. The electrical power consumption may be increased relative to a prior level of electrical power consumption in which the port is disabled. | 02-26-2009 |
20090063880 | System and Method for Providing a High-Speed Message Passing Interface for Barrier Operations in a Multi-Tiered Full-Graph Interconnect Architecture - A method, computer program product, and system are provided performing a Message Passing Interface (MPI) job. A first processor chip receives a set of arrival signals from a set of processor chips executing tasks of the MPI job in the data processing system. The arrival signals identify when a processor chip executes a synchronization operation for synchronizing the tasks for the MPI job. Responsive to receiving the set of arrival signals from the set of processor chips, the first processor chip identifies a fastest processor chip of the set of processor chips whose arrival signal arrived first. An operation of the fastest processor chip is modified based on the identification of the fastest processor chip. The set of processor chips comprises processor chips that are in one of a same processor book or a different processor book of the data processing system. | 03-05-2009 |
20090063881 | Low-overhead/power-saving processor synchronization mechanism, and applications thereof - A low-overhead/power-saving processor synchronization mechanism, and applications thereof. In an embodiment, the present invention provides a processor having a load-linked register. The processor implements instructions related to the load-linked register. A first instruction, when executed by the processor, causes the processor to load a first value specified by the first instruction in a first register of a register file and to load a second value in the load-linked register. A second instruction, when executed by the processor, causes the processor to suspend execution of a stream of instructions associated with the load-linked register if the second value in the load-linked register is unaltered until the second value in the load-linked register is altered. A third instruction, when executed by the processor, causes the processor to conditionally move a third value to a memory location specified by the third instruction and to move a value representing the state of the load-linked register to the third register. | 03-05-2009 |
20090063882 | Power Saving Apparatus and Method for a Portable Appliance - A power saving apparatus and method for a portable appliance to automatically enter into power saving mode when the portable appliance is turned off. The invention provides a power saving apparatus and method for a portable appliance to prevent the dam age of electronic elements and damage to saved data caused by the vibration from moving the portable appliance. | 03-05-2009 |
20090070605 | System and Method for Providing Memory Performance States in a Computing System - A system and method is disclosed for providing memory performance states in a computing system. The operating system power management component of the computing system establishes a set of performance states, with each performance state being defined by a number of factors, including the core frequency of memory. The operating system power management component also defines the number of memory performance states that are supported by the computing system and the number of supported memory performance states that are available for use by the computing system. Whether a supported memory performance state is available is dependent upon a measure of the power being consumed by the computing system, the thermal output of the computing system, or both measures. | 03-12-2009 |
20090070606 | Apparatus and method for dynamic backlight-control - An apparatus and a method for dynamic backlight-control in an electronic device are provided. The apparatus includes a battery power-level detection unit and a controlling unit. The battery power-level detection unit is used for detecting the power level of a battery in the electronic device. The controlling unit is coupled to a backlight unit of a display device in the electronic device and the battery power-level detection unit for adjusting the illumination of the backlight unit according to the power level of the battery and an image-content lightness of an image inputted into the display device. | 03-12-2009 |
20090070607 | Methods and apparatuses for reducing step loads of processors - Methods and apparatuses for reducing step loads of processors are disclosed. Method embodiments comprise examining a number of instructions to be processed by a processor to determine the types of instructions that it has, calculating power consumption by in an execution period based on the types of instructions, and limiting the execution to a subset of instructions of the number to control the quantity of power for the execution period. Some embodiments may also create artificial activity to provide a minimum power floor for the processor. Apparatus embodiments comprise instruction type determination logic to determine types of instructions in an incoming instruction stream, a power calculator to calculate power consumption associated with processing a number of instructions in an execution period, and instruction throttling logic to control the power consumption by limiting the number of instructions to be processed in the execution period. | 03-12-2009 |
20090070608 | ELECTRONIC CONTROL UNIT AND SIGNAL MONITORING CIRCUIT - An electronic control unit has a microcomputer and a signal monitoring circuit. When a brake pedal is pressed down and an analog signal from a brake pedal sensor is changed in a low power consumption operation mode of the microcomputer, the signal monitoring circuit operates cyclically, When the signal monitoring circuit starts the operation, a capacitor is charged with a constant current for only a charging time stored in a memory. When a comparator detects that the analog signal is lower than the charge voltage of the capacitor, a wakeup signal is output from the comparator to the microcomputer to cause the microcomputer to operate in the normal operation mode. The charging time is pre-stored in a memory of the microcomputer. | 03-12-2009 |
20090070609 | POWER THROTTLING APPARATUS - Disclosed is an apparatus which deactivates both the AC as well as the DC component of power for various functions in a CPU. The CPU partitions dataflow registers and arithmetic units such that voltage can be removed from the upper portion of dataflow registers when the software is not utilizing same. Clock signals are also prevented from being applied to these non-utilized components. As an example, if a 64 bit CPU (processor unit) is to be used with both 32 and 64 bit software, the mentioned components may be partitioned in equal sized upper and lower portions. The logic signal for activating the removal of voltage may be obtained from a software-accessible architected control register designated as a machine state register in some CPUs. The same logic may be used in connection with removing voltage and clocks from other specialized functional components such as the floating point unit when software instructions do not presently require same. | 03-12-2009 |
20090077398 | Workload Apportionment According to Mean and Variance - An improved method is provided for managing workload on a multi-server computer system. In one embodiment, a subset of servers is selected according to an anticipated net workload. The remaining servers in the system may be powered off to conserve energy and prolong equipment life. Workload is dynamically apportioned among the subset of servers at selected intervals to more uniformly distribute the mean and variance of the workload among the subset of servers. More particularly, the mean and the variance for each of a plurality of workload units are equally weighed in determining a ranking of the workload units. The workload units may be ordered according to a mathematical combination of the mean and variance, such as the sum or product of mean and variance for each workload unit. The workload units are allocated among the subset of servers in according to rank, such as by assigning the workload units to the servers in a reverse round-robin fashion according to rank. Predictive power management schemes such as DVS and DVFS may then be used to control power to the servers. | 03-19-2009 |
20090077399 | CONTROLLING APPARATUS, CONTROLLING METHOD, COMPUTER READABLE MEDIUM, IMAGE FORMING APPARATUS AND INFORMATION PROCESSING APPARATUS - The controlling apparatus is provided with: a memory that stores application software; a setting part that sets an operational manner related to power consumption of an apparatus running the application software, corresponding to the application software stored in the memory; and a controller that controls the power consumption of the apparatus according to the operational manner set by the setting part. | 03-19-2009 |
20090077400 | POWER CONTROL SYSTEM - A power mode designating unit of a main system outputs an operation mode designating signal to a sub system. Upon shifting from the normal operation mode to the power-saving mode, a control unit of the sub system outputs a power-saving mode shift enable signal indicating that shifting to the power-saving mode is possible to a power control unit of the sub system. When the operation mode designating signal designates the power-saving mode and the power-saving mode shift enable signal indicates that shifting to the power-saving mode is possible, the power control unit supplies a power-saving mode voltage to the control unit. | 03-19-2009 |
20090077401 | BUFFERING TECHNIQUES FOR POWER MANAGEMENT - Buffering techniques for power management are described. A method may comprise modifying a power state for a communications sub-system and a computing sub-system from a higher power state to a lower power state, storing packets of information in a buffer for the communications sub-system during a communications idle duration period, generating a variable receive threshold value for the buffer, and transferring the stored packets of information from the buffer to the computing sub-system based on a variable receive threshold value. Other embodiments are described and claimed. | 03-19-2009 |
20090077402 | Voltage-controlled device, method and computer device capable of dynamically regulating voltage and effectively saving energy - The invention provides a voltage-controlled device, method and computer device capable of dynamically regulating voltage and effectively saving energy. The voltage-controlled device receives a VID from a CPU, determines a core voltage according to a load line defined therein, and supplies the core voltage to the CPU. The voltage-controlled device has a load line register set and a write logic. The load line register set has a plurality of registers, and the values of which represent the defined load line. The write logic changes the values of the registers in the load line register set according to a write signal. | 03-19-2009 |
20090077403 | Integrated device, layout method thereof, and program - An integrated device includes at least one data processing device and at least one memory macro accessible by the data processing device. The data processing device and the memory macro are laid out so that a memory address and a power consumption have a correlation. | 03-19-2009 |
20090083558 | Storage apparatus and power saving method thereof - This storage apparatus includes an access history storage unit for storing, when there is a write request for writing data into the data storage unit or a read request for reading data stored in the data storage unit, history of the write request or read request as access history, an operational information storage unit for storing operational information showing whether the data storage unit is operating, an access prediction unit for predicting whether the data storage unit will be accessed based on the access history, and an operational control unit for performing operational control of pre-starting the data storage unit when the data storage unit is shut off and the access prediction unit predicts that the data storage unit will be accessed, or stopping the data storage unit when the data storage unit is operating and the access prediction unit predicts that the data storage unit will not be accessed. | 03-26-2009 |
20090083559 | ELECTRONIC DEVICE AND METHOD OF CONTROLLING POWER THEREOF - In an electronic device having a plurality of processing elements PEs that operate in synch with a clock signal, each of the plurality of PEs generates its own operating clock signal in accordance with a clock enable signal that is input together with data from an outside or from a PE of a preceding stage, processes the input data in response to this operating clock signal, outputs this processed data to a PE of a succeeding stage and outputs the clock enable signal to the PE of the succeeding stage, and halts generation of its own operating clock signal when output of the processed data is completed following completion of processing of the data. | 03-26-2009 |
20090089597 | INFORMATION PROCESSING DEVICE, METHOD OF CONTROLLING THE DEVICE, COMPUTER READABLE MEDIUM, AND SECURITY SYSTEM - An information processing device includes a power control section and a function-suppressing section. The power control section switches between a predetermined mode and a low-power mode on the basis of a pre-specified setting condition relating to power consumption of the information processing device. The low-power mode is lower in electricity consumption quantities than the predetermined mode. When switching from the low-power mode to the predetermined mode in a period of operation of an external security apparatus, the function-suppressing section suppresses a part of functions of the device in the predetermined mode. | 04-02-2009 |
20090094469 | MULTI-FUNCTION PERIPHERAL, POWER SUPPLY APPARATUS, AND POWER SUPPLY CONTROL METHOD - A digital multi-function peripheral includes a multi-function peripheral unit that has plural functions, a switching power supply unit connected to a commercial power supply as a main power supply for the multi-function peripheral unit, and an electrical storage device charged in advance as an auxiliary power supply for the multi-function peripheral unit. The digital multi-function peripheral further includes a control circuit that monitors a load current flowing to the multi-function peripheral unit, supplies electric power from the electrical storage device to the multi-function peripheral unit instead of electric power from the switching power supply unit when the load current is smaller than a threshold set as an allowable lower limit of power efficiency of the switching power supply unit, and supplies the electric power from the switching power supply unit to the multi-function peripheral unit when the load current increases to be equal to or larger than the threshold. | 04-09-2009 |
20090094470 | Method and apparatus for power reduction in iterative decoders - There are provided a method, an apparatus and a computer program product for reducing power consumption in an iterative decoder. The apparatus includes a memory device and an iteration termination device. The memory device is for storing a bit number difference indicating a number of bits that are different between a decoded codeword for a current iteration and a decoded codeword for a previous iteration, for each iteration of the iterative decoder prior to a maximum number of iterations. The iteration termination device is for comparing the bit number difference to a pre-specified bit number difference threshold value, incrementing a confidence value when the bit number difference exceeds the pre-specified bit number difference threshold value, and terminating further iterations of the iterative decoder when the confidence value exceeds a pre-specified confidence threshold value. | 04-09-2009 |
20090094471 | VIDEO PROCESSING APPARATUS AND CONTROL METHOD THEREOF - A video processing apparatus and a control method thereof are provided. The video processing apparatus includes: a processing unit which processes a video signal for display; a clock generating unit which generates a system clock for driving the processing unit and outputs the system clock to the processing unit; a power supply unit which supplies power to the processing unit; and a controller which counts a power supply time using a clock generated from the system clock. The controller compares the counted power supply time with a predetermined reference time, and controls power supplied to the processing unit from the power supply unit. | 04-09-2009 |
20090100279 | COMPUTER PROVIDING MOTION PICTURE MODE AND METHOD OF SETTING UP SYSTEM-MODE WHILE PLAYING MOTION PICTURES - The present invention relates to a computer providing a motion picture mode including at least one storage unit configured to store system state information when the computer enters the motion picture mode and to store motion picture data, the storage unit including a random access memory (RAM) and a hard disk drive (HDD), a graphic processing unit configured to process image data and to display processed data on a screen, an audio outputting unit configured to process and output audio signals, and a control unit configured to control modules included in the computer and a system mode of the computer. The control unit is configured to determine whether conditions for entering the motion picture mode have been satisfied, and to change the system mode to the motion picture mode if the conditions for the motion picture mode are satisfied. | 04-16-2009 |
20090119522 | INFORMATION-PROCESSING APPARATUS, PACKET PROCESSING METHOD, AND COMPUTER PROGRAM PRODUCT - A processor includes a communication control unit for communicating with an external network device via a connecting unit. A power control unit switches a power mode between a normal power mode and a power saving mode. A packet processing unit includes a first determining unit that determines whether a packet processing is needed for a packet received when the power saving mode is set and a second determining unit that determines, when it is determined that the packet processing is needed, whether the packet processing is available. The power control unit switches the power mode based on a result of determination by the second determining unit. | 05-07-2009 |
20090125736 | Home appliance and controlling method of the same - The present invention is related to a home appliance such as a dish washer, a laundry machine, a refrigerator, etc. One embodiment of a home appliance according to the present invention comprises a control panel and a controller. The controller panel may include a power switch which allows a user to input a command for switching on or off a power of the appliance and an input device which allows the user to input a command in connection with an operation of the appliance. | 05-14-2009 |
20090132837 | System and Method for Dynamically Selecting Clock Frequency - A system and method for dynamically changing the clock frequency of a system clock is disclosed. The invention includes selecting a peripheral interface clock signal from a plurality of currently active peripheral interface clock signals, each operating at a particular frequency. The selected peripheral interface clock signal operates at the highest frequency of the plurality of currently active peripheral interfaces clock signals. Once selected, the frequency of the system clock is set equal to the frequency of the selected peripheral interface clock signal. | 05-21-2009 |
20090132838 | System and Method for Power Management of A Storage Enclosure - A system and method for power management of storage enclosures are disclosed. A system may include a storage enclosure and a host communicatively coupled to the storage enclosure. The storage enclosure may include at least one storage resource and a management module. The host may be configured to: (a) communicate data to the at least one storage resource via a particular transmission protocol; (b) communicate a power down command via the particular transmission protocol to the storage enclosure, the power down command operable to transition the storage enclosure from a high-power state to a low-power state; and (c) communicate a power up command via the particular transmission protocol to the storage enclosure, the power up command operable to transition the storage enclosure from the low-power state to the high-power state. | 05-21-2009 |
20090132839 | Method and device to handle denial of service attacks on wake events - A method and device may selectively resume a computing device from a low power state according to a security policy. The security policy may be embedded in the hardware of the computing device and may be enforced even when the device is in a low power state. Such a policy may provide protection from hacker and virus based denial of service attacks using a flood of packets formatted to provide a wake event request. Other embodiments are described and claimed. | 05-21-2009 |
20090132840 | CROSS-LAYER POWER MANAGEMENT IN A MULTI-LAYER SYSTEM - A method for cross-layer power management in a multi-layer system includes determining whether there is a service level violation for an application running on a hardware platform. Power consumption of the hardware platform is controlled in response to the service level violation. | 05-21-2009 |
20090132841 | Processor Accessing A Scratch Pad On-Demand To Reduce Power Consumption - The present invention provides processing systems, apparatuses, and methods that access a scratch pad on-demand to reduce power consumption. In an embodiment, an instruction fetch unit initiates an instruction fetch. When a scratch pad is enabled, an instruction is retrieved from the scratch pad in parallel with a translation of a virtual address to a physical address. If the physical address is associated with the scratch pad, the retrieved instruction is provided to an execution unit. Otherwise, the scratch pad is disabled to reduce power consumption and the instruction fetch is re-initiated. When the scratch pad is disabled, an instruction is retrieved from another instruction source, such as an instruction cache, in parallel with the translation of the virtual address to the physical address. If the physical address is associated with the scratch pad, the scratch pad is enabled and the instruction fetch is re-initiated. | 05-21-2009 |
20090138735 | ELECTRONIC APPARATUS HAVING SIGNAL PROCESSING CIRCUIT SELECTIVELY ENTERING POWER SAVING MODE ACCORDING TO OPERATION STATUS OF RECEIVER LOGIC AND RELATED METHOD THEREOF - An electronic apparatus with power saving functionality is disclosed. The electronic apparatus has a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a receiver logic for processing at least a satellite signal generated from a global navigation satellite system (GNSS) to obtain resultant data; and a power saving determination logic for monitoring an operation status of the receiver logic and generating a first control signal according to the operation status. The second signal processing circuit includes a processing logic for receiving the resultant data from the receiver logic for further signal processing; and a power saving trigger logic for controlling the processing logic to enter a power saving mode from a normal mode when receiving the first control signal from the power saving control logic. | 05-28-2009 |
20090138736 | POWER MANAGEMENT METHOD FOR HANDHELD ELECTRONIC DEVICE - A power management method for a handheld electronic device is provided. In the present method, a G-sensor is used for detecting a normal vector of a plane of the handheld electronic device. The normal vector is then determined whether being directed toward a downward direction. When the normal vector is determined as being directed toward the downward. Accordingly, the handheld electronic device can be controlled to enter the power saving mode timely according to the positioned state of the device without going through complicated procedures such as operating a menu, so as to provide a more intuitive and convenient way for power management. | 05-28-2009 |
20090144570 | SYSTEM AND METHOD FOR PREVENTING USER O.S. IN VMM SYSTEM FROM DEENERGIZING DEVICE BEING USED BY SERVICE O.S. - A call from a user operating system (UOS) to BIOS to configure a connected device into a reduced energy consumption mode is routed through a virtual machine monitor (VMM). The VMM determines whether a service O.S. (SOS) is in need of the device and if so the VMM informs the UOS that the device has been configured as ordered, while allowing the SOS to complete its task with the device. If the SOS is not in need of the device, or at the completion of the SOS task with the device, the VMM passes the call to ACPI/BIOS to configure the device in the demanded energy consumption mode. | 06-04-2009 |
20090144571 | INTEGRATED CIRCUIT APPARATUS - An integrated circuit apparatus may include: a plurality of power domains to which power voltage is separately supplied; a plurality of circuit macros belonging to a plurality of the power domains respectively; a plurality of power switches to conduct or to substantially block power coming from a power circuit and going to the plurality power domains, respectively; and a power-controlling unit including a controller to control the plurality of power switches, a power domain register to store power domain data which corresponds to a plurality of external interrupt signals that are indicative of power domains that are to be activated; and an interrupt handler to respond to the external interrupt signals by delivering the power domain data corresponding to the external interrupt signals to the controller, the controller being operable to turn on/off the power switches corresponding to the power domain data, respectively. | 06-04-2009 |
20090150692 | PORTABLE ULTRASOUND SYSTEM WITH VARIABLE POWER CONSUMPTION - Power is conserved in a portable, ultrasound imaging device ( | 06-11-2009 |
20090150693 | METHOD FOR POWER CAPPING WITH CO-OPERATIVE DYNAMIC VOLTAGE AND FREQUENCY SCALING - A co-operative mechanism in which a service processor and a host CPU (with an OS running thereupon) work together to implement both power capping and utilization-based power savings, and with negligible side effects. Preferably, a 2-level modulation scheme is employed to undertake both power capping and energy savings simultaneously. Preferably, a frequency governor in the OS running on a host processor saves power by modulating p-states based on a shared table, thus avoiding SMIs. The range of the p-states in the shared table is adjusted to implement power capping in conjunction with power sensors in the system. This adjustment can be done either by a service processor, which can monitor total energy consumption, or an OS or software running on the host processor, which can read energy consumption from the service processor and adjust the shared table. | 06-11-2009 |
20090150694 | INFORMATION PROCESSING APPARATUS AND POWER SUPPLY CONTROL METHOD - According to one embodiment, an information processing apparatus includes a housing, a power supply incorporated in the housing, a conversion unit which converts a voltage supplied from the power supply, a detection unit which detects a voltage supplied from the power supply, and a control unit which, when the voltage detected by the detection unit has become less than or equal to a specific threshold value, controls the power supply so as to lower not only a voltage output from the conversion unit by a specific percentage but also a voltage supplied to the detection unit by a specific percentage. | 06-11-2009 |
20090164812 | Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics - A method, system and program are provided for dynamically reconfiguring a pipelined processor to operate with reduced power consumption without reducing existing performance. By monitoring or detecting the performance of individual units or stages in the processor as they execute a given workload, each stage may use high-performance circuitry until such time as a drop in the throughput performance is detected, at which point the stages are reconfigured to use lower-performance circuitry so as to meet the reduced performance throughput requirements using less power. By configuring the processor to back off from high-performance designs to low-performance designs to meet the detected performance characteristics of the executing workload warrant, power dissipation may be optimized. | 06-25-2009 |
20090164813 | TECHNIQUES TO MANAGE POWER BASED ON MOTION DETECTION - Techniques to manage power based on motion detection are described. For example, a mobile computing device may include a radio module having a communications failure event detector operative to detect a communications failure event, a motion detector operative to detect motion, and a processor coupled to the radio module and the motion detector. The processor operative to execute a scan control module to determine the mobile computing device is moving or stationary, and control scanning operations by the radio module in accordance with the determination. Other embodiments are described and claimed. | 06-25-2009 |
20090164814 | Hardware driven processor state storage prior to entering a low power mode - A data processing apparatus comprising: a processor for processing data, said processor comprising memory interface logic for controlling transfer of data to a memory, said processor being powered in a first power domain; a memory for storing data processed by said processor said memory being powered in a second power domain; a system bus coupled to said processor and said memory and operable to transfer data between said processor and said memory in response to memory transfer requests issued upon said system bus by said memory interface logic during normal processing operation of said processor and said memory; wherein said processor is responsive to a low power request indicating said data processing apparatus should enter a low power mode to: control transfer of state data indicating a current state of said processor to said memory via said system bus using said memory interface logic, said state data being sufficient data to restore said processor to an equivalent program state following exit from said low power mode; store said state data in said memory; and power down said first power domain. | 06-25-2009 |
20090164815 | DATA TRANSFER CONTROLLING DEVICE AND IC CARD - A data transfer controlling device is mounted in an IC card having: a communication device for data communication with an external device; a memory device for storing data received from and transmitted to the external device; and an operation processing device for controlling the memory device and the communication device, and controls a data transfer process. The controlling device comprises: a status information acquiring section for acquiring status information including at least error detection information from the communication device; a determination section for determining whether or not the data transfer process can be executed based on the status information acquired by the status information acquiring section when the data transfer process is being executed; and a data transfer process executing section for executing the data transfer process in accordance with a result of determination as to whether or not the data transfer process can be executed by the determination section. | 06-25-2009 |
20090164816 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - When a packet received in a deep sleep mode matches a packet stored in a WOL-pattern storage region, a network portion performs reply processing suited for the matched packet after returning a power supply mode of a power supply unit from the deep sleep mode to a normal mode. When the packet received in the deep sleep mode matches a packet stored in a proxy-response-pattern storage region, the network portion performs reply processing suited for the matched packet while maintaining the power supply mode of the power supply unit at the deep sleep mode. | 06-25-2009 |
20090172431 | METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION FOR ISOCHRONOUS DATA TRANSFERS - A method and article for reducing power consumption for isochronous data transfers are described. The method may include receiving packets of data having multimedia information with empty spaces. The packets of data may be stored in a first buffer having a first buffer size allocated for a universal serial bus processing stack. The empty spaces may be removed from the packets of data and the packets of data having the empty spaces removed may be copied to a second buffer having a second buffer size allocated for a media information processing stack. Other embodiments are described and claimed. | 07-02-2009 |
20090172432 | Power management in electronic systems - In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system. | 07-02-2009 |
20090172433 | Powering on devices via intermediate computing device - Methods and apparatus relating to powering on devices via an intermediate computing device are described. In an embodiment, a request for data by a first device may be detected at a second device. The second device may determine a third device that stores the requested data and cause it to be turned on if the third device is in a reduced power consumption state. Other embodiments are also disclosed. | 07-02-2009 |
20090172434 | Latency based platform coordination - In some embodiments, an electronic apparatus comprises at least one processor, a plurality of components, and a policy engine comprising logic to receive latency data from one or more components in the electronic device, compute a minimum latency tolerance value from the latency data, and determine a power management policy from the minimum latency tolerance value. | 07-02-2009 |
20090172435 | METHOD OF MINIMIZING ELECTRIC POWER CONSUMPTION IN NON-BEACON NETWORK - Disclosed herein is a method of minimizing electric power consumption in a non-beacon network including a parent node which maintains an active state only for a specific period in each predetermined cycle, and a child node which attempts to communicate for periods only when data is generated. When data that must be transmitted to the child node exists, the child node notifies the parent node that there is data to be transmitted. The child node periodically transmits the same message to the parent node until the parent node maintains an initial active state. If the parent node is switched into an active state and receives the data transmission notification message, the parent node commands the child node to transmit data. The child node transmits the data to the parent node. Thereafter, the parent node notifies the child node that the reception of data is normally performed. | 07-02-2009 |
20090172436 | ENERGY SAVING METHOD AND ELECTRONIC DEVICE USING THE SAME - An electronic device for selectively reproducing information. The electronic device includes a display, a power supply for supplying power, a switch, and a processor. The switch is connected to the display and the power supply. The processor is connected to the switch. When the processor identifies that the selected information is audio type, the processor turns off the switch to disconnect an electrical connection between the power supply and the display. A power saving method for reducing the energy consumption of the electronic device is also provided. | 07-02-2009 |
20090177902 | REDUCING POWER CONSUMPTION OF A MICROPROCESSOR - Methods and apparatus, including computer program products, implementing and using techniques for reducing the power consumption of a microprocessor. One or more signal transitions in an instruction set of a microprocessor are profiled. A probability of occurrence is assigned to each instruction in the instruction set. A binary operation code is assigned to each instruction, based on the probability of occurrence for the instruction. The instructions having the highest probability of occurrence are assigned operation codes that require fewer signal transitions. As a result, the power consumption of the microprocessor is reduced. | 07-09-2009 |
20090187776 | SERVER POWER CONSUMPTION CONTROLLER, AND METHOD AND COMPUTER PROGRAM FOR CONTROLLING SERVER POWER CONSUMPTION - The power consumption controller of the present invention controls the power consumption of a physical server having a virtual server at an appropriate value. A management server determines an unused CPU budget from the difference between the total amount of the loads of respective virtual servers and a hypervisor and the total CPU budget of the physical server. The management server determines the drive frequency of the CPU inside the physical server based on the unused CPU budget. The management server changes a CPU allocation budget related to the respective virtual servers and the hypervisor in accordance with the determined drive frequency. The hypervisor controls the CPU allocation budget and drive frequency in accordance with an indication from the management server. Consequently, the power consumption of the physical server is controlled. | 07-23-2009 |
20090187777 | INCREASING WORKLOAD PERFORMANCE OF ONE OR MORE CORES ON MULTIPLE CORE PROCESSORS - A processing node that is integrated onto a single integrated circuit chip includes a first processor core and a second processor core. The processing node also includes an operating system executing on either of the first processor core and the second processor core. The operating system may monitor a current utilization of the first processor core and the second processor core. The operating system may cause the first processor core to operate at performance level that is lower than a system maximum performance level and the second processor core to operate at performance level that is higher than the system maximum performance level in response to detecting the first processor core operating below a utilization threshold. | 07-23-2009 |
20090193272 | Storage system and power consumption reduction method for the same - In a storage system that includes two or more file servers each including an arbitrary number of operating virtual file servers, a management server: holds a load information table regarding a load on each virtual file server for each time period and redundancy information table for the storage system; judges, with reference to the load information table and redundancy information table, whether or not the loads on the virtual file servers can be handled by a smaller number of file servers than the number of currently-operating file servers; selects, if the judgment result is positive, a power-off target file server and makes another file server fail over a virtual file server in the power-off target file server; and turns off the power-off target file server. | 07-30-2009 |
20090193273 | ELECTRONIC CONTROL SYSTEM WITH CONTROLLERS AND POWER SUPPLY UNIT - An electronic control unit has a primary microcomputer producing a supply control signal or a cutoff control signal, a secondary microcomputer, and a power supply unit receiving the signal from the primary microcomputer through a signal line. Each signal has a level changing with time. The supply unit detects a level change of the signal line as a line transmission signal and performs pattern judgment for the level pattern of the line transmission signal. When the level pattern of the line transmission signal matches with a registered pattern of one control signal, the supply unit starts supplying or cuts off electric power to the secondary microcomputer. In response to the level pattern of the line transmission signal different from a registered pattern of any control signal, the supply unit invalidates the level change of the signal line to continue the power supply or cutoff. | 07-30-2009 |
20090193274 | System And Method of Coherent Data Transfer During Processor Idle States - Systems and methods of managing power provide for placing a processor in a non-snoopable state, where the processor is associated with a system memory. One or more data transfers between a controller and the system memory can be serviced while the processor is in the non-snoopable state. In one embodiment, it is determined that the processor has flushed an internal cache of the processor to the system memory before placing the processor in the non-snoopable state. | 07-30-2009 |
20090199026 | Saving energy based on storage classes with corresponding power saving policies - An example of the invention classifies disks drives based on their purpose and associating power-saving policies in multiple classes. The system implements Power On Demand, where a reduced power mode is enabled for every individual component of a storage subsystem. In addition, an embodiment of this invention extends a few power modes used in the prior art and allows almost infinite number of power modes when instructing a disk drive (via its I/O interface such as a SCSI or fibre channel interface) to enter a certain power saving mode. Furthermore, an embodiment of invention teaches a system and methods to save power in a disk system comprising a plurality of disk controllers and a plurality of disk drives, arranged in a plurality of arrays, where each array includes several (e.g., 4-16) disk drives. | 08-06-2009 |
20090204826 | Method for Power Conservation in Virtualized Environments - A system and method for enabling power conservation when making placement and relocation decisions. More specifically, a virtualized environment power conservation module enables power conservation when making placement and relocation decisions within a virtual environment. The virtualized environment power conservation module assigns virtual machines among a group of physical hosts in order to minimize the net power consumption. The virtualized environment power conservation module makes use of server power profile or real time power consumption data to make power consumption aware Virtual Machine assignment decisions. In certain embodiments, a server system exposes real power consumption (e.g. System Watts, Cumulative kWh. etc.) via system management interfaces. Additionally, in certain embodiments, the server systems may expose real power consumption via standard power profiles. These systems leverage PMBus-enabled power supplies to read the power metric information. | 08-13-2009 |
20090204827 | SYSTEM AND METHOD FOR ENERGY SAVINGS ON A PHY/MAC INTERFACE FOR ENERGY EFFICIENT ETHERNET - A system and method for energy savings on a PHY/MAC interface for energy efficient Ethernet. Power savings for a PHY due to low-link utilization can also be realized in the higher layer elements that interface with the PHY. In one embodiment, subrating is implemented on a MAC/PHY interface to match a subrating of the PHY with a remote link partner. This subrating is less than the full capacity rate and can be zero. | 08-13-2009 |
20090204828 | HYBRID TECHNIQUE IN ENERGY EFFICIENT ETHERNET PHYSICAL LAYER DEVICES - A hybrid technique in energy efficient Ethernet (EEE) physical layer devices (PHYs). A hybrid approach is defined that combines multiple low power modes. In one embodiment, the hybrid approach uses low power idle (LPI) and subset PHY techniques that can be selectively activated. | 08-13-2009 |
20090210727 | APPARATUS AND METHOD TO MANAGE POWER IN A COMPUTING DEVICE - A method to manage power in a computing device comprising a controller assembly and a storage assembly comprising a plurality of data storage devices, by selecting a processor parameter, establishing a threshold processor parameter value, establishing a threshold over-parameter time interval, selecting a data storage device parameter, and establishing a nominal data storage device parameter value. The method determines an actual processor parameter value. If the actual processor parameter value is less than or equal to the threshold processor parameter value, the method operates each of the plurality of data storage devices using the nominal data storage device parameter value. If the actual processor parameter value is greater than the threshold processor parameter value, then the method determines an actual over-parameter time interval. If the actual processor parameter value is greater than the threshold processor parameter value, and if the actual over-parameter time interval is greater than the threshold over-parameter time interval, then the method operates each of the plurality of data storage devices using a data storage device parameter value less than the nominal data storage device parameter value. | 08-20-2009 |
20090210728 | Circuits and Methods for Sleep State Leakage Current Reduction - A circuit for reducing sleep state current leakage is described. The circuit includes a hardware unit selected from at least one of a latch, a flip-flop, a comparator, a multiplexer, or an adder. The hardware unit includes a first node. The hardware unit further includes a sleep enabled combinational logic coupled to the first node, wherein a value of the first node is preserved during a sleep state. | 08-20-2009 |
20090210729 | Automated Power Management of a Peripheral Device - Based on bounds of a period of reduced operation for a base device, a base device generates a power management message for transmission to a peripheral device. In the power management message, the base device inserts bounds of a period of reduced operation for the peripheral device. As a result, the periods of reduced operation conserve battery power in both devices and the two devices may reestablish a communications channel upon reaching the end of the period of reduced operation and resuming normal operations. | 08-20-2009 |
20090210730 | METHOD AND SYSTEM FOR POWER CONSERVATION IN A HIERARCHICAL BRANCH PREDICTOR - A method and system for power conservation in a hierarchical branch predictor system are provided. The method includes addressing multiple branch predictors, each of the branch predictors having various sizes of hierarchical storage and storing information about previously encountered branch instructions. In response to receiving a first branch prediction from one of the branch predictors, the method includes comparing the first branch prediction with previously stored branch predictions to determine the existence of a branch prediction loop, the branch prediction loop including a sequence of branch predictions that repeat as long as constituent predictions of the branches remain unchanged. Upon determining that a branch prediction loop exists, the method includes associating the branch prediction loop with the branch predictors that provided each branch prediction, and activating power saving to the branch predictors that are not associated with the branch prediction loop. | 08-20-2009 |
20090210731 | CIRCUIT FOR AND METHOD OF MINIMIZING POWER CONSUMPTION IN AN INTEGRATED CIRCUIT DEVICE - A method of minimizing power consumption in an integrated device is disclosed. The method comprises providing a plurality of circuit blocks having circuits for performing logic functions, wherein each circuit block consumes power in a static state; coupling one of a plurality of operating voltages to each circuit block of the plurality of circuit blocks; enabling a reduction of power consumed by a first set of circuit blocks by way of a first power reduction signal; and enabling a reduction of power consumed by a second set of circuit blocks by way of a second power reduction signal. A circuit for minimizing power consumption in a device is also disclosed. | 08-20-2009 |
20090210732 | INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING THE SAME - This invention provides an information processing apparatus which includes a first storage unit and a second storage unit and implements a function of causing the first storage unit and the second storage unit to store data redundantly while maintaining a power saving mode even upon receiving an access request from an external apparatus in the power saving mode, and a method of controlling the same. To accomplish this, upon receiving an HDD access request in the power saving mode, the information processing apparatus operates after transiting to an HDD access mode in which only minimum necessary functions are activated without activating the main CPU. The contents of the HDD changed during the HDD access mode are stored as history information. Upon transiting from the power saving mode to the normal operating mode, the data in another HDD is updated in accordance with the history information, thereby implementing a mirroring function. | 08-20-2009 |
20090217065 | POWER MANAGEMENT BASED ON POLICY - A machine's power usage may be managed by a power-management policy. When a program makes a request that involves use of one of the machine's power-consuming devices, the policy may take into account factors such as the program's status, where the status indicates the program's relative level of justification to consume power. A component may intercept a request to use a device before the request reaches the driver, and may deflect requests that, if carried out, are not consistent with power usage policy. Infrastructure supports the use of policies that determine whether a particular device's power state will be changed. | 08-27-2009 |
20090217066 | CONTROLLING CONNECTION STATUS OF NETWORK ADAPTERS - A method, medium and implementing processing system are provided for controlling the number of Ethernet adapters connected in an EtherChannel depending upon the current bandwidth requirements of the system. This system reduces power consumption, inter alia, wherever possible while not sacrificing performance or flexibility of an EthernetChannel. An exemplary embodiment EtherChannel's total bandwidth utilization is monitored and controlled. When the bandwidth utilization is a predetermined amount less than or more than a predetermined threshold level, power supplied to one or more of the physical Ethernet adapters that are part of the EtherChannel is adjusted, i.e. reduced or increased, accordingly. In another embodiment, in systems where ethernet devices support different levels of power, the power supplied to one or more adapters can be systematically incrementally reduced or increased in response to reduced or increased bandwidth utilization. | 08-27-2009 |
20090217067 | Systems and Methods for Reducing Power Consumption in a Redundant Storage Array - A method for reducing power consumption in a mirrored disk array including first disk resources mirrored with second disk resources is provided. A write request to write particular data to the mirrored disk array is received. In response to receiving the write request, the first disk resources are spun to write the particular data to the first disk resources, and the particular data is stored to a cache memory without spinning the second disk resources. Subsequent to storing the particular data to the first disk resources and storing the particular data to the cache memory, the second disk resources are spun to write the particular data from the cache memory to the second disk resources. | 08-27-2009 |
20090228727 | METHOD AND PROGRAM FOR SETTING MICROPROCESSOR POWER SUPPLY VOLTAGE - A determining unit determines the state of the microprocessor. A setting unit sets a power supply voltage to be supplied to the microprocessor according to the state of the microprocessor determined by the determining unit. A power supply circuit supplies the power supply voltage set by the setting unit, to the microprocessor via a power supply line. The determining unit determines repeatedly the state of the microprocessor at preset timing, and the setting unit resets the power supply voltage every time the determination is performed by the determining unit. | 09-10-2009 |
20090235097 | Data Center Power Management - An exemplary method for managing power consumption of a data center includes monitoring power consumption of a data center, assessing power consumption with respect to a billing equation for power, based on the assessment, deciding whether to implement a power policy where the power policy reduces instantaneous power consumption by the data center and increases a load factor wherein the load factor is an average power consumed by the data center divided by a peak power consumed by the data center over a period of time. Various other methods, devices, systems, etc., are also disclosed. | 09-17-2009 |
20090240964 | Method and apparatus for holistic power management to dynamically and automatically turn servers, network equipment and facility components on and off inside and across multiple data centers based on a variety of parameters without violating existing service levels - The present invention provides a METHOD AND APPARATUS FOR HOLISTIC POWER MANAGEMENT TO DYNAMICALLY AND AUTOMATICALLY TURN SERVERS, NETWORK EQUIPMENT AND FACILITY COMPONENTS ON AND OFF INSIDE AND ACROSS MULTIPLE DATA CENTERS BASED ON A VARIETY OF PARAMETERS WITHOUT VIOLATING EXISTING SERVICE LEVELS. This method and apparatus pertains specifically to a method and apparatus for power management in data centers and large server environments. | 09-24-2009 |
20090249093 | Design Structure for Selecting Processors for Job Scheduling Using Measured Power Consumption - In a design structure for allocating a plurality of parts of a computational system to a computational job, a set of requirements necessary to execute the job is determined. A set of parts of the plurality of parts is assembled so that the set of parts is capable of meeting the set of requirements and so that a part is added to the set of parts based on a determination that the addition of the part will minimize power consumption by the set of parts. The set of parts are caused to execute the job. | 10-01-2009 |
20090249094 | POWER-AWARE THREAD SCHEDULING AND DYNAMIC USE OF PROCESSORS - Techniques and apparatuses for providing power-aware thread scheduling and dynamic use of processors are disclosed. In some aspects, a multi-core system is monitored to determine core activity. The core activity may be compared to a power policy that balances a power savings plan with a performance plan. One or more of the cores may be parked in response to the comparison to reduce power consumption by the multi-core system. In additional aspects, the power-aware scheduling may be performed during a predetermined interval to dynamically park or unpark cores. Further aspects include adjusting the power state of unparked cores in response to the comparison of the core activity and power policy. | 10-01-2009 |
20090249095 | User driven power conservation in processor-based systems - A processor-based system may receive user inputs to determine how to achieve power conservation needs or preferences of the user. The user may supply inputs in terms of preferences and how power conservation might be achieved. In addition, the user may provide needs or goals for the system in terms of operating life while under battery power. The system may then develop a plan to achieve those needs and preferences and, in some embodiments, may offer that plan up to the user for approval. | 10-01-2009 |
20090249096 | ENERGY EFFICIENT DATA TRANSMISSION - A method and apparatus for data transmission at energy efficient rates. An embodiment of an apparatus includes a port for the transfer of data. The port has an active state in which the port may transmit or receive data and an inactive state in which the port does not transmit or receive data. The apparatus further includes logic to control the transfer of data. The logic places the port into the active state for a first time period for the transfer of data and places the port into the inactive state for a second time period. The logic further prevents transfer of data during the inactive state. | 10-01-2009 |
20090254767 | Energy Management - A data processing apparatus and methods are disclosed. The data processing apparatus comprises: data processing elements operable to process data; an energy management unit operable to generate energy management information indicative of an energy state of at least one of the data processing elements when processing said data; and logic operable to receive said energy management information and to generate energy management information items associating said energy state with the processing of said data. The information items can provide visibility of how the Energy State of the data processing elements vary in response to the processing of data. Providing this visibility of the Energy State can advantageously enable more detailed the energy management to be performed and the Energy State of the data processing elements to be optimized. | 10-08-2009 |
20090254768 | Non-Identical Power Supply Units for Higher Efficiency in Redundant Mode - A power supply system for a server includes a first power supply, a second power supply, a first variable slope circuit, and a second variable slope circuit. The first power supply unit is adapted to activate if a load is below a predetermined level, and adapted to deactivate if the load is above the predetermined level. The second power supply unit is adapted to activate if the load is above the predetermined level, and adapted to deactivate if the load is below the predetermined level. The first and second variable slope circuits are adapted to receive information about the load applied to the power supply units. The first variable slope circuit is adapted to deactivate the first power supply unit if the load is above the predetermined level. The second variable slope circuit is to deactivate the second power supply unit if the load is below the predetermined level. | 10-08-2009 |
20090254769 | Power Profiling Application for Managing Power Allocation in an Information Handling System - A method, system, and software instructions for allocating power in a information handling system are operable to respond to a power profiling request by transitioning a processing resource to a first power consumption state and obtaining and storing a first power consumption value. The first power consumption value is then retrieved and used to allocate power to the first processing resource in response to a power on request. The first power consumption state may be a state in which power consumption approximates a maximum power consumption. The processing resource may be further transitioned to a second power consumption state and a second power consumption value obtained. The second power consumption state may be a reduced performance state. Thereafter, responsive to determining that the system lacks sufficient power budget to fulfill a pending request for power, the processing resource is throttled and power is allocated using the second power consumption value. | 10-08-2009 |
20090259861 | POWER MANAGEMENT IN A DATA PROCESSING DEVICE HAVING MASTERS AND SLAVES | 10-15-2009 |
20090265567 | METHOD, APPARATUS AND SYSTEM FOR REDUCING POWER CONSUMPTION INVOLVING DATA STORAGE DEVICES - The invention provides a method, apparatus and system for reducing power consumption involving data storage devices. One embodiment involves a process for storing data in a first memory, and in response to the first memory exceeding a first threshold, migrating the data from the first memory to a second memory. In response to the second memory exceeding a second threshold, the process then involves migrating the data from the second memory to the third memory, wherein the second memory is sized and configured to store data targeted for the third memory to intelligently maintain a portion of the third memory in an inactive state. | 10-22-2009 |
20090265568 | SYSTEM AND METHOD FOR MANAGING ENERGY CONSUMPTION IN A COMPUTE ENVIRONMENT - A system, method and computer readable medium are disclosed for reducing power consumption in clusters, grids, on-demand centers, and so forth. The principles disclosed herein can reduce both direct and indirect power consumption while maintaining either full cluster performance or adequate SLA based cluster performance. The method includes receiving at least one state data point regarding power consumption or temperature of at least one resource within the compute environment. Using intelligent policies to control power consumption, the method implements and interfaces with power managements facilities within the cluster, grid or on-demand center to either implement policies, make dynamic changes, make predictions or actions, and so forth to reduce one or more of the direct or indirect power consumption associated with a compute environment. The method can analyze current workload, future workload or both in taking energy saving actions in the environment. An aspect can also involve reporting state information and updating algorithms based on historical experience or outside sources of information such as the news or weather. | 10-22-2009 |
20090271643 | REAL-TIME INFERENCE OF POWER EFFICIENCY METRICS FOR A COMPUTER SYSTEM - Some embodiments of the present invention provide a system that measures a power efficiency of a computer system. During operation, the system collects telemetry data from a set of sensors within the computer system. Next, the system determines a power consumption of the computer system from the telemetry data and determines a number of input/output operations per second (IOPS) for the computer system from the telemetry data. Finally, the system computes an IOPS per watt metric from the power consumption and the number of IOPS. | 10-29-2009 |
20090271644 | ENERGY EFFICIENT METHOD TO WAKE HOST SYSTEM FOR CHARGING BATTERY POWERED PORTABLE DEVICES VIA BUS POWERED EXTERNAL I/O PORTS - Optimized bus powered peripheral battery charging includes a circuit to initiate a change in an advanced configuration and power interface (ACPI) state in a controller allowing charging of a peripheral device battery, the circuit including a signal converter coupled between an input port and the controller to sense when a the peripheral device battery is coupled to an input port and to restrict the controller from changing ACPI state multiple times for a given peripheral device battery coupling; and a ground loop detector coupled in parallel to the signal converter between the input port and the controller to allow the controller to know that the peripheral device battery has maintained being coupled to the input port. | 10-29-2009 |
20090271645 | Management apparatus, storage apparatus and information processing system - Proposed are a management apparatus, a storage apparatus, and an information processing system capable of improving the storage apparatus performance and power saving efficiency. This management apparatus connected to a storage apparatus arranged in a power supply range set with a threshold value of power supplied externally includes a control unit configured to control, based on electric energy used for operating one or more conducting parts that are energized through supply of external power and subject to power saving control and the power threshold value, the power supplied to the one or more conducting parts in conducting part units. | 10-29-2009 |
20090276647 | STORAGE DEVICE POWER CONSUMPTION STATE - In an embodiment, an apparatus is provided that includes circuitry to determine, at least in part, whether respective idle conditions have been satisfied for respective storage devices. If the circuitry determines, at least in part, that at least one respective storage device comprised in the respective storage devices satisfies at least one respective idle condition, the circuitry is also to issue at least one request that the at least one respective storage device enter, independently from at least one other respective storage device comprised in the respective storage devices, a respective relatively lower power consumption state compared to a respective relatively higher power consumption state. Of course, many alternatives, modifications, and variations are possible without departing from this embodiment. | 11-05-2009 |
20090276648 | QUAD-STATE POWER-SAVING VIRTUAL STORAGE CONTROLLER - A method, system and computer program product for reducing the collective power consumption of a plurality of storage devices including a plurality of associated storage volumes is provided. The storage volumes are grouped by a last access time according to a plurality of ranks. The plurality of ranks corresponds to a level of power consumption based on device activity. A volume of the plurality of storage volumes is moved between the plurality of ranks according to an access pattern of the volume. | 11-05-2009 |
20090276649 | METHOD, SYSTEM, AND PRODUCT FOR COMPUTATIONAL DEVICE POWER-SAVINGS - A user may invoke energy savings in the operation of a computational device performing a processing task. The device performs the processing task in the invoked energy savings mode and determines an energy amount expended by the device in performing the processing task in the energy savings mode, creating a net energy savings value as a difference between the energy amount expended and a standard energy expenditure amount predicted as required for the computational device to perform the processing task in high-performance mode. The device displays the net energy savings value to the user, with the user continuing the invoking of the energy savings mode or engaging another performance mode for the computational device as a function of the displaying. | 11-05-2009 |
20090276650 | INFORMATION PROCESSING APPARATUS AND METHOD FOR CONTROLLING INFORMATION PROCESSING APPARATUS - An information processing apparatus includes a storage unit configured to store data, a supply unit configured to supply electric power to the storage unit, a determination unit configured to determine whether to cause the information processing apparatus to operate in a power saving mode, a measuring unit configured to measure an elapsed time after a power source of the information processing apparatus is turned on and until the determination unit determines to cause the information processing apparatus to operate in a power saving mode, and a control unit configured to control the supply unit to decrease electric power supplied from the supply unit to the storage unit at a timing determined based on the elapsed time and a predetermined reference time, in case that the determination unit determines to cause the information processing apparatus to operate in a power saving mode. | 11-05-2009 |
20090282272 | Organizing Databases for Energy Efficiency - Embodiments of the invention provide techniques for optimizing database queries for energy efficiency. In general, a query optimizer is configured to compare energy requirements of query plans, and to select a query plan requiring minimal energy to execute. In one embodiment, the query optimizer may also compare time performance of the query plans, and may select a query plan by matching to a user preference for a relative priority between energy requirements and time performance. | 11-12-2009 |
20090282273 | Method and System For Data Migration - A method and system for migrating source data from one or more databases to a destination database, wherein the destination database is selected based on power consumption of the destination database. A data migration server determines which destination database should be selected by selecting a number of candidates and comparing the power consumed, the available space and the maximum monthly power consumption limit. A user intervention policy is created to evaluate which data should be moved to a destination database. A “payback period” is calculated to determine the amount of time that will elapse before savings are realized. | 11-12-2009 |
20090282274 | Managing Power Consumption In A Data Center - Managing power consumption in a data center including reporting, by a circuit breaker communications device of one of the circuit breakers to the management module, a current power load of the circuit breaker, the report transmitted from the circuit breaker communications device through a power supply communications device of a power supply currently providing power to a particular computing device and through an out-of-band communications link to the management module, upon receiving the report of the current power load, determining, by the management module, whether the current power load of the circuit breaker is greater than a predetermined threshold; and if the current power load of the circuit breaker is greater than the predetermined threshold, reducing, by the management module, power consumption through the circuit breaker of the particular computing device. | 11-12-2009 |
20090282275 | DEVICE AND A METHOD FOR MANAGING POWER CONSUMPTION OF A PLURALITY OF DATA PROCESSING UNITS - A device and a method for managing power consumption of a plurality of data processing units. A scheduler ( | 11-12-2009 |
20090282276 | Peripheral device - A peripheral device for a host computer comprises:
| 11-12-2009 |
20090282277 | LOW-POWER IDLE MODE FOR NETWORK TRANSCEIVER - Low-power idle mode for network transceivers. In one aspect, a method for reducing power consumption of a transceiver connected to a communication network includes entering a low-power idle mode, and in this mode, repeatedly turning off a transmitter of the transceiver and turning on the transmitter according to a pattern, where the pattern has been customized based on characteristics of the receiver. Turning off the transmitter conserves power consumed by the transceiver. | 11-12-2009 |
20090292933 | ENHANCING POWER EFFICIENCY IN A WIRELESS INTERNET CARD - A wireless internet card to support enhancing power efficiency. The wireless internet comprises a front end comprising shared frequency resources. The wireless internet card also comprises a first wireless block and a second wireless block. While the first wireless block is in low-power mode, the second wireless block may get access to the shared radio frequency resources without waking-up the first wireless block thus enhancing the power efficiency. The second wireless block sends a request to the first wireless block to use shared radio frequency resources. A coexistence block coupled to the second wireless block and the first wireless block may wait for a time duration to elapse after the request is received and may allow the second wireless block to use the shared radio frequency resources if the time duration is elapsed. | 11-26-2009 |
20090300384 | Reducing Power Consumption While Performing Collective Operations On A Plurality Of Compute Nodes - Methods, apparatus, and products are disclosed for reducing power consumption while performing collective operations on a plurality of compute nodes that include: receiving, by each compute node, instructions to perform a type of collective operation; selecting, by each compute node from a plurality of collective operations for the collective operation type, a particular collective operation in dependence upon power consumption characteristics for each of the plurality of collective operations; and executing, by each compute node, the selected collective operation. | 12-03-2009 |
20090300385 | Reducing Power Consumption While Synchronizing A Plurality Of Compute Nodes During Execution Of A Parallel Application - Methods, apparatus, and products are disclosed for reducing power consumption while synchronizing a plurality of compute nodes during execution of a parallel application that include: beginning, by each compute node, performance of a blocking operation specified by the parallel application, each compute node beginning the blocking operation asynchronously with respect to the other compute nodes; reducing, for each compute node, power to one or more hardware components of that compute node in response to that compute node beginning the performance of the blocking operation; and restoring, for each compute node, the power to the hardware components having power reduced in response to all of the compute nodes beginning the performance of the blocking operation. | 12-03-2009 |
20090300386 | Reducing power consumption during execution of an application on a plurality of compute nodes - Methods, apparatus, and products are disclosed for reducing power consumption during execution of an application on a plurality of compute nodes that include: powering up, during compute node initialization, only a portion of computer memory of the compute node, including configuring an operating system for the compute node in the powered up portion of computer memory; receiving, by the operating system, an instruction to load an application for execution; allocating, by the operating system, additional portions of computer memory to the application for use during execution; powering up the additional portions of computer memory allocated for use by the application during execution; and loading, by the operating system, the application into the powered up additional portions of computer memory. | 12-03-2009 |
20090300387 | OPERATION METHOD OF STORAGE APPARATUS, STORAGE APPARATUS AND STORAGE SUBSYSTEM - Proposed is an operation method for seeking a power interruption operation target in which MTBF will become longest. When a target value regarding a power interruption time and a target value regarding a power interruption count per 24 hours is input from an administrator to a management computer, the management computer calculates the MTBF after one year and the annual power consumption for each of the input target values, and, as a power interruption operation target in which the MTBF will become longest in one year, a target value regarding a power interruption time and a target value regarding a power interruption count are respectively selected among multiple target values in which the MTBF will become longest based on each of the calculation results, and displayed on a screen of an output unit. | 12-03-2009 |
20090307508 | Optimizing the Efficiency of an Organization's Technology Infrastructure - This disclosure is directed to a method and system for optimizing a technology infrastructure of an organization. It includes a step or component for collecting source data from various aspects of technology infrastructure. It also includes a step or component for processing the source data to generate information regarding the technology infrastructure. It further includes creating goals regarding the optimization process of the technology infrastructure based on the information from the processed source data and generating a report wherein the goals are presented. The optimization of the technology infrastructure may include migrating non-core operating systems of hardware to consistent operating systems, leveraging the hardware and maximizing the CPU and storage utilization of the remaining core hardware in order to reduce the number of locations in the organization to thereby decrease the operating and fixed costs of organization the power consumption of the organization its associated environmental impact. | 12-10-2009 |
20090313490 | Power controller in information processor - A power controller ( | 12-17-2009 |
20090319811 | STORAGE APPARATUS AND DISK DEVICE CONTROL METHOD - In a storage apparatus, an MPU acquires a value of power capable of being used to transition a HDD from a power-saving state to an access-enabled state, receives an access command via a host I/F, determines whether or not it is possible to respond to the access command using one or more HDD in the access-enabled state from among the HDD configuring a LU, and when it is determined that it is possible to respond, selects, from HDD in the power-saving state in the access command-targeted LU, one or more HDD, which are capable of transitioning to the access-enabled state using power in a range of usable power values, and which can make a response possible, as a target to be preferentially transitioned to the access-enabled state. | 12-24-2009 |
20090327773 | SERIAL ATA (SATA) POWER OPTIMIZATION THROUGH AUTOMATIC DEEPER POWER STATE TRANSITION - A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process. | 12-31-2009 |
20090327774 | COORDINATED LINK POWER MANAGEMENT - A method, apparatus, and system for coordinated link power management. Some embodiments of a method include receiving an exit latency for each of a group of link states for a link, with a device being coupled to an interconnect via the first link. A latency tolerance value is determined and communicated, and a platform latency is received. The method further provides for determining a link budget for the device, the link budget indicating an amount of time available for an exit from a link state for the device; and selecting one of the link states based at least in part on the link budget. | 12-31-2009 |
20090327775 | USER IMPOSED POWER CONSTRAINTS ON WEB SERVER BASED ON USER PREFERENCES - Web application users are able to specify power constraints for remote web servers. These may be based on individual performance needs and energy-conservation desires. They enable the user to exercise control over the amount of energy that the web server expends in serving the needs of the user. The invention may employ such features as vertical scaling using power capacity on demand (CUoD) type functionality. The method includes providing a user-interactive interface to enable the user to indicate a preference for power restrictions with respect to its web requests. The user then instructs the web site provider to reduce power consumption in response to the user's request. The user specifies a reduction in overall power consumption for the user's needs, such as instructing the web service provider to use an energy-conserving server to handle the user's web requests, or specifying a acceptable delay or fulfilling the user's web requests. | 12-31-2009 |
20090327776 | MULTIPLE LOAD LINE VOLTAGE REGULATORS - Methods and apparatus relating to a multiple load line voltage regulators are described. In one embodiment, a voltage regulator may adjust an input voltage level based on information received from a load and current supplied to the load. Other embodiments are also disclosed and claimed. | 12-31-2009 |
20090327777 | POWER EFFICIENT HIGH FREQUENCY DISPLAY WITH MOTION BLUR MITIGATION - Some embodiments describe techniques that relate to power efficient, high frequency displays with motion blur mitigation. In one embodiment, the refresh rate of a display device may be dynamically modified, e.g., to reduce power consumption and/or reduce motion blur. Other embodiments are also described. | 12-31-2009 |
20090327778 | INFORMATION PROCESSING SYSTEM AND POWER-SAVE CONTROL METHOD FOR USE IN THE SYSTEM - A technique for determining task allocation for reducing power consumption of an entire system is disclosed. This system includes physical computers, a cooling apparatus for cooling the physical computers, and a power-saving control server for controlling the physical computers and cooling apparatus. The power-saving control server includes a virtual server layout generator which sets up a plurality of sets of task allocations with respect to the physical computers, a server power calculator for calculating power consumption of the physical computers in each task allocation, a physical computer profile used to estimate a heat release amount of the physical computers in each task allocation, a cooling power calculator which computes power consumption of the cooling apparatus, and a virtual server relocator which determines a task allocation with a total of calculated values of the server/cooling power calculators being minimized to be the optimum task allocation for the physical computers. | 12-31-2009 |
20100005326 | Profiling An Application For Power Consumption During Execution On A Compute Node - Methods, apparatus, and products are disclosed for profiling an application for power consumption during execution on a compute node that include: receiving an application for execution on a compute node; identifying a hardware power consumption profile for the compute node, the hardware power consumption profile specifying power consumption for compute node hardware during performance of various processing operations; determining a power consumption profile for the application in dependence upon the application and the hardware power consumption profile for the compute node; and reporting the power consumption profile for the application. | 01-07-2010 |
20100005327 | USB HOST CONTROLLER, INFORMATION PROCESSOR, CONTROL METHOD OF USB HOST CONTROLLER, AND STORAGE MEDIUM - A USB host controller includes: a suspend signal generating unit configured to generate a suspend signal for stopping the operation of a PLL circuit and output the signal to a physical layer including the PLL circuit if there is no communication between a USB device and a CPU in a first mode state of using a clock signal generated by the PLL circuit to transfer data between the USB device and the CPU; and a controller configured to generate the suspend signal for stopping the operation of the PLL circuit and output the signal to the physical layer in a connection waiting state in which the USB device is not connected and in a second mode state of transferring the data between the USB device and the CPU without using the clock signal generated by the PLL circuit. | 01-07-2010 |
20100011230 | LINK AGGREGATION WITH DYNAMIC BANDWIDTH MANAGEMENT TO REDUCE POWER CONSUMPTION - Embodiments of the present invention provide configurations and techniques for determining, by link aggregation logic, whether a load of network traffic communicated across a team of aggregated links allows inactivation of one or more aggregated links of the team, wherein the team of aggregated links is coupled with a plurality of network interface cards (NICs). On determining that the load of network traffic communicated across the team of aggregated links allows inactivation of the one or more aggregated links of the team, the link aggregation logic is configured to power off or place into a power save mode one or more NICs of the plurality of NICs corresponding to the one or more aggregated links. Other embodiments may be described and/or claimed. | 01-14-2010 |
20100011231 | ACCESS POINT ROTATION FOR SHARING POWER LOAD - Aspects of the disclosure provide a method for sharing power load in a network. The method includes identifying a first device to serve as an AP of the network in a next time interval, providing network information from a second device that presently serves as the AP to the first device. When the first device starts to serve as the AP of the network, the second device can be configured to enter into a power save state in order to reduce power consumption by the second device in the next time interval. | 01-14-2010 |
20100011232 | DIGITAL COMPONENT POWER SAVINGS IN A HOST DEVICE AND METHOD - A control arrangement, for example, in a digital component that forms part of a system, draws an input current for its operation and is configured for monitoring an interface for any one of a group of commands and, upon detecting an issued one of the group of commands, operates the component for executing the issued command in an operational mode, and during an idle time on the interface, the control arrangement exclusively monitors the interface for any one of the group of commands such that the input current is limited to a leakage current. The component may draw less than 1 milliamp of current during the idle mode. | 01-14-2010 |
20100017632 | Managing Power-Consumption - Managing power-consumption, for use in a storage system comprising first data stored on one or more storage devices is provided. A receiver receives a policy comprising a power-management parameter, a first parameter and a rule associated with the policy. An analyser, responsive to receipt of a policy, analyzes second data associated with the rule. A determiner, responsive to the analysis, determines third data in accordance with the second data. The third data is associated with migration of the first data. | 01-21-2010 |
20100017633 | MEMORY DEVICE, CONTROL DEVICE FOR MEMORY DEVICE, AND CONTROL METHOD FOR MEMORY DEVICE - According to one embodiment, a control device includes: a calculation module acquiring at least one of speed information, and calculating a process time taken to write data group when the acquired speed information is used, each of the speed information corresponding to different swing speed; a selection module selecting one of the speed information based on the acquired speed information and the process time thereof; and a control module controlling a memory medium driving module, controlling the writing module to write the data group when the memory medium driving module is in operation, storing the data group in the memory module when the memory medium driving module is not in operation, controlling the swing module on the basis of the selected speed information, and controlling the writing module to write the data group stored in the memory module. | 01-21-2010 |
20100023786 | SYSTEM AND METHOD FOR REDUCTION OF ELECTRICITY PRODUCTION AND DEMAND - A system and method of intermittently reducing power demand loads to postpone an activation of an incremental power supply source or hasten the deactivation of a power source. | 01-28-2010 |
20100023787 | CONTROLLING THE POWER UTILIZATION OF A COMPUTER SYSTEM BY ADJUSTING A COOLING FAN SPEED - Some embodiments of the present invention provide a system that controls a power utilization of a computer system by adjusting a cooling fan speed. During operation, a relationship between information related to the cooling fan speed and the power utilization is determined. Then, the cooling fan speed is adjusted based on the determined relationship to control the power utilization of the computer system. | 01-28-2010 |
20100023788 | Reducing Power Consumption by Offloading Applications - Methods of reducing power consumption in a computing device are described in which file sharing applications which are running in the background are offloaded onto a lower power subsystem and the rest of the computing device can be put into a low power state. The lower power subsystem runs application stubs which autonomously execute a subset of the operations performed by a file sharing application which was previously running on the computing device. Before the rest of the computing device goes into the low power state, application state information is passed to the lower power subsystem for use by the application stubs. In an example, the application stub may continue to download files whilst the rest of the computing device is in standby or is shutdown and the application state information may include details of the files that are to be downloaded. | 01-28-2010 |
20100037073 | Apparatus and Method for Selective Power Reduction of Memory Hardware - Apparatus and Method for Selective Power Reduction of Memory Hardware A method and apparatus are provided for managing delivery of power to one or more hardware memory devices in a computer system. The computer system is configured with a processor and at least two hardware memory devices. An energy exchange threshold for the computer system is set, and management of one or more of the hardware memory devices is employed when the computer system exceeds an energy exchange threshold. | 02-11-2010 |
20100037074 | POWER CONTROL FOR SERIAL BUS PERIPHERAL DEVICE - There is disclosed a method and a device connected to a serial bus, said method comprising transmitting a message that indicates a power requirement for a suspended mode of said serial bus; in response to a received authorization message, setting a first or a second operating state; entering said suspended mode; drawing a current in accordance with said indicated power requirement that may exceed a predetermined current limit if said operating state is said first state, and drawing a current at or below said predetermined current limit if said operating state is said second state. | 02-11-2010 |
20100042856 | Power saving method of portable internet device and portable internet device thereof, and instant messaging system using the same - The present invention discloses a power saving method of a portable Internet device, the portable Internet device and its instant messaging system. If a screen of the portable Internet device is in non-view state, for example, both backlight module and LCD panel are turned off, it means that a user is not viewing the screen, and thus the message update frequency of the instant messaging program is lowered to prevent unnecessary transmission and receiving of wireless signals, so as to reduce power comsumption of the portable Internet device. | 02-18-2010 |
20100042857 | SYSTEM AND METHOD FOR CONSERVING POWER APPLIED TO AN ELECTRICAL APPARATUS - A usage pattern identifies time periods when an electrical apparatus is likely to be powered-up or not in use. Power provided to an electrical apparatus is increased during time periods that the electrical apparatus is likely to be powered-up. Similarly, the power provided to the electrical apparatus is reduced or removed during time periods that the electrical apparatus is likely to be out of use or idle. The usage pattern is continually updated and refined by collecting usage data during user interaction with the electrical apparatus. | 02-18-2010 |
20100050004 | INTRODUCING SELECTIVE ENERGY EFFICIENCY IN A VIRTUAL ENVIRONMENT - In some embodiments, a method comprises hosting a virtual universe in which one or more avatars interact with one or more virtual objects. The method can also include presenting energy conservation options that reduce amounts of power consumed in rendering the avatars and virtual objects in the virtual universe, detecting a selection of the energy conservation options, and configuring logic for rendering the avatars and virtual objects according to the selected energy conservation options. The method can also comprise rendering, according to the selection of energy conservation options, the avatars and virtual objects in the virtual universe. | 02-25-2010 |
20100050005 | Display Device and Display Method - A display device includes: a display module; a storage module storing state setting information indicating whether setting of a power consumption state of the display module has been completed; an information readout module reading out the state setting information from the storage module at startup of the display module; a decision module deciding to set the power consumption state of the display module when the readout state setting information indicates non-setting; a display instruction module causing the display module to display a screen for setting the power consumption state in response to the decision to set the power consumption state; an input module inputting information for setting the power consumption state based on the screen displayed in the display module; and a state setting module setting the power consumption state based on the information inputted by the input module. | 02-25-2010 |
20100050006 | Communication apparatus, power supply control method, display apparatus, communication method, and computer program product - The detecting unit detects a disconnection of communications that have been established with a display apparatus. When the disconnection of the communications is detected, the message generating unit generates a confirmation message that confirms whether the communications should be reestablished. The transmitting unit transmits the confirmation message to the display apparatus. The receiving unit receives a reply message that indicates whether the communications should be reestablished from the display apparatus. The main power supply controlling unit shuts down the main power supply when the reply message indicates that the communications should not be reestablished, or when no reply message is received. | 02-25-2010 |
20100058082 | MAINTAINING NETWORK LINK DURING SUSPEND STATE - A low power processor in a computer is kept energized in a suspend state in which a main processor of the computer is deenergized. The low power processor maintains a network connection by sending keepalive packets as required by the network communication protocol. | 03-04-2010 |
20100058083 | Systems and Methods for Controlling Power Consumption of Power Supply of Electronic Devices - A method of controlling power consumption of a power supply of a device may include receiving a control signal that switches the device between first and second modes of operation; and switching the supply between corresponding first and second modes based on the received signal, the supply being configured to draw different amounts of power in the first and second modes. A power supply for supplying electrical power to a device may include power supply mode circuitry configured to place the supply into one of at least two power modes: a first mode in which the supply draws a first amount of power and a second mode in which the supply draws less power. An electronic device may include circuitry that generates a control signal, based on which the power supply mode circuitry selectively places the electrical power supply into one of a plurality of power modes. | 03-04-2010 |
20100058084 | Self-Tuning Power Management Techniques - Power management techniques include a method for power management of a processor chip which comprises the following steps. An initial operating level is set for the processor chip. After a predetermined time interval, slack is calculated. If the slack is greater than zero, the initial operating level is increased to a next higher level, otherwise the initial operating level is maintained. After the predetermined time interval, the slack is re-calculated and further includes accumulated slack. If the re-calculated slack is greater than zero, the operating level is increased to the next higher level if the processor chip is being operated at the initial operating level, otherwise the operating level is returned to the initial operating level if the processor chip is being operated at the next higher operating level. The steps to re-calculate the slack and either increase the operating level to the next higher level or return the operating level to the initial operating level are repeated. | 03-04-2010 |
20100058085 | Power-Saving Device and Method - A power-saving device and method are applicable to a first electronic device having at least one connection interface, and the first electronic device is coupled to a second electronic device via a bus. The power-saving device includes a detection circuit, a power control circuit, and a connection control circuit. The detection circuit is coupled to the connection interface, to detect a load state of the connection interface and generate a detection signal. The power control circuit controls power supplied to the first electronic device via the bus in response to a state of the detection signal. The connection control circuit controls a connection state of the bus according to the detection signal. | 03-04-2010 |
20100064154 | OPERATING SYSTEM (OS) VIRTUALISATION AND PROCESSOR UTILIZATION THRESHOLDS FOR MINIMIZING POWER CONSUMPTION IN MOBILE PHONES - A mobile phone that uses OS virtualization for minimizing power consumption in mobile phones is provided. Apparatus and methods may involve conserving processor power in a mobile phone according to the invention may include the following steps. A first step may be awakening a first processing core from a low power state in response to a first operating system (OS) thread. A following step may include processing the first OS thread using the first processing core. A next step may include determining whether utilization of the first processing core over a first time period has exceeded a predetermined threshold. The method may also include awakening a second processing core from a low power consumption state if utilization of the first processing core over a first time period has exceeded a predetermined threshold. | 03-11-2010 |
20100064155 | MANAGING DEPENDENCIES AMONG OBJECTS OF A SYSTEM FOR ENERGY CONSERVATION - Under the present solution, dependencies and relationships of objects are stored and are updatable by consumers and optionally manufacturers through a local UI or web interface. These dependencies and relationships are stored in a “collection profile” which describes the capabilities of objects. When a request to reduce energy is received the system can query the collection profile to determine the downstream effect of reducing energy to a single object. The collection profile will identify which other objects rely on that object and would also need to have energy reduced. Being able to identify these linkages and effects of changes across the system will be critical for good energy management. | 03-11-2010 |
20100070785 | EAS POWER MANAGEMENT SYSTEM - A system and method for managing the power consumption of power-consuming devices. A remote device manager transmits power save schedules to a local device manager over a communication network such as the internet. The local device manager transmits power save commands to one or more devices in a location such as a store, over a dedicated local communication network. The commands instruct one or more devices to activate or de-activate its power save mode according to the power save schedules. The commands could be dependent upon one or more trigger events. | 03-18-2010 |
20100077240 | METHODS AND APPARATUSES FOR REDUCING POWER CONSUMPTION OF FULLY-BUFFERED DUAL INLINE MEMORY MODULES - Methods and apparatuses are presented for reducing the power consumed in an in-line memory module. In some embodiments, the method may include monitoring a memory requirement of a computer system, the computer system comprising a plurality of memory modules. In the event that the memory requirement changes, unmapping at least one of the plurality of memory modules and maintaining a low power state for the at least one unmapped memory module. The method may further comprise selectively re-initializing the plurality of memory modules such that the at least one unmapped memory module remains in a low power state while the remainder of the plurality of memory modules are in a non-low power state. Where, in the event that the memory requirement changes again, the method also may comprise re-programming the memory controller with an identifier associated with the at least one unmapped memory module. | 03-25-2010 |
20100077241 | BUSINESS ENERGY MANAGEMENT BASED ON USER NETWORK ACCESS AND CALENDAR DATA - A method and computer program product for controlling energy utilization includes receiving user activities from each of a plurality of users into one or more software application, associating each user activity with a defined workspace having one or more remotely controllable electronic devices, and controlling energy utilization of the one or more electronic devices within each defined workspace according to the user activities associated with the defined workspace. Energy utilization is reduced in a defined workspace during a time period that there is no user activity associated with the workspace. Optionally, the step of receiving user activities may include detecting that a user has logged onto a remote computer that is not located within the defined workspace, or users inputting activities into a software application, such as one or more instances of an electronic calendar. | 03-25-2010 |
20100083017 | ENERGY-EFFICIENT TRANSITIONING AMONG DEVICE OPERATING MODES - Methods and devices are provided for managing the transitions between operating modes in a data device. In an illustrative example, a method includes storing, in a control system for a device, a value for a first interval of time. The value indicates a minimum interval of time required for the device to remain in a lower power operating mode to provide energy savings at least equal to an energy cost associated with transitioning between the lower power operating mode and a higher power operating mode. The method further includes receiving a signal that instructs the device to transition from the lower power operating mode to the higher power operating mode. The method also includes ensuring that the device has remained in the lower power operating mode for at least as long as the first interval of time before it transitions to the higher power operating mode. | 04-01-2010 |
20100083018 | FAN SPEED CONTROL OF SILICON BASED DEVICES IN LOW POWER MODE TO REDUCE PLATFORM POWER - In general, in one aspect, the disclosure describes running a cooling fan within a computer at low speed while the computer is in low temperature operations (e.g., idle). The operation of the cooling fan may reduce processor (CPU) temperature enough to decrease processor leakage power, offsetting the power consumption of the fan, and possibly resulting in a net system power reduction. The benefit at the platform level increases further when considering the low efficiency of voltage regulation (VR) in this lower power regime, and potentially reductions in other components (e.g., graphics processor). The optimal fan speed is the speed at which the overall system power is reduced the most (e.g., processor power savings is greater than fan power utilized). The optimal temperature may be determined dynamically during operation or may be determined in manufacturing and applied statically during operation. | 04-01-2010 |
20100083019 | MULTIPROCESSOR SYSTEM AND CONTROL METHOD THEREOF, AND COMPUTER-READABLE MEDIUM - A multiprocessor system configured to share processes by a main system having a first processor and a subsystem having a second processor, comprises a first shared memory configured to receive accesses from the main system and the subsystem, a second memory configured to receive access from the subsystem at a power saving mode, a stop unit configured to stop accesses from the main system and the subsystem to the first shared memory when the subsystem enters the power saving mode, and a switching unit configured to switch an access destination of the subsystem from the first shared memory to the second memory when the subsystem enters the power saving mode. | 04-01-2010 |
20100095140 | System and method for power reduction by sequestering at least one device or partition in a platform from operating system access - In some embodiments, the invention involves a system and method relating to managing power utilization in partitioned systems. In at least one embodiment, the present invention is intended to control the sleeping/wakefulness of devices, as necessary, to minimize power utilization of devices whose accesses are routed away. Inter-partition communication is used to utilize devices in a sequestered partition while devices in the OS partition are put into a sleep state to save power. Other embodiments are described and claimed. | 04-15-2010 |
20100095141 | Apparatus and method for a power control in a system using an embedded CPU - A portable communication apparatus is configured to perform a method for a power control of a Central Processing Unit (CPU) in a portable communication apparatus. The portable communication apparatus for a power control of the CPU includes a CPU for reporting an operation status of the CPU. The CPU is configured to change a power control level according to a control of an overhead determiner by using a pin and the overhead determiner for determining an overhead of the CPU by using the pin and for controlling the power control level of the CPU according to the overhead of the CPU. | 04-15-2010 |
20100100752 | System and Method for Managing Power Consumption of an Information Handling System - An AC-to-DC power adapter provides DC power to an information handling system at a first higher DC voltage or a second lower DC voltage based upon a power state of the information handling system. For example, approximately 19 Volts DC power is provided if the information handling system is in an on state or if the information handling system is charging a battery. Approximately 13 Volts DC power is provided if the information handling system is in a reduced power state, such as an ACPI S3 state, with a battery having a substantially full charge. | 04-22-2010 |
20100106987 | Method for pre-chassis power multi-slot blade identification and inventory - Systems and methods for a blade server to obtain the blade type and configuration of the chassis without requiring the blades to be fully powered. Using this method the user has the ability to acquire correct inventory and slot status of the chassis through the use of a low power auxiliary power state. The user is then able to apply the proper power budgeting and thermal algorithm requirements utilizing this information while minimizing the power consumption necessary to acquire such information. In addition, an intelligent search algorithm may be utilized to scan the blades for blade information thus further minimizing power consumption and decreasing the time needed to inventory the blades. | 04-29-2010 |
20100106988 | CONTROL METHOD WITH MANAGEMENT SERVER APPARATUS FOR STORAGE DEVICE AND AIR CONDITIONER AND STORAGE SYSTEM - To provide a system that can reduce the power consumption of an air conditioner and the power consumption of a storage device. A control method with a management server apparatus for a plurality of storage devices and an air conditioner includes calculating plural combinations of allocating the work amount to the plurality of storage devices, calculating the heating value of each storage device included in the plurality of storage devices for each of the plural combinations, calculating the quantity of heat conducted to the air conditioner, based on the heating value and positional information of the plurality of storage devices and the air conditioner, calculating the power consumption to cool the quantity of heat conducted to the air conditioner, selecting a combination included in the plural combinations based on the power consumption of the air conditioner, and issuing a move instruction of moving the data stored in a first storage device to a second storage device to the plurality of storage devices, based on the selected combination. | 04-29-2010 |
20100115303 | SYSTEM AND METHOD OF UTILIZING RESOURCES WITHIN AN INFORMATION HANDLING SYSTEM - A system and method of utilizing resources within an information handling system are disclosed. In a particular form, a method of utilizing an information handling system can include detecting an operating state controllable by a state controller configured to enable a plurality of operating environments including a host environment and a reduced power environment. The method can also include detecting an event operable to alter the operating state to enable an operating environment of the plurality of operating environments. According to an aspect, the operating environment can be used separate from a host system operable to enable the host environment. | 05-06-2010 |
20100115304 | POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES - Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed. | 05-06-2010 |
20100115305 | Methods and Apparatus to Provision Power-Saving Storage System - A power-saving computer system comprises a plurality of storage areas provided by one or more storage systems, including at least one first storage area which is always powered on and at least one second storage area which is periodically powered on and off according to a power control schedule. The at least one first storage area provides primary and secondary volumes of a first backup set that is scheduled as always paired. For a second backup set that is scheduled as normally suspended and resynchronized according to a backup schedule, a primary volume of the second backup set is included in the at least one first storage area and a secondary volume of the second backup set is included in the at least one second storage area. The at least one second storage area is powered on during every backup time for resynchronizing the second backup set according to the backup schedule. | 05-06-2010 |
20100115306 | METHOD AND SYSTEM FOR CONTROL OF ENERGY EFFICIENCY AND ASSOCIATED POLICIES IN A PHYSICAL LAYER DEVICE - Aspects of a method and system for physical layer control of energy efficiency and associated policies in a physical layer device. In this regard, operation of a PHY device may be controlled based on one or more energy efficient networking (EEN) control policies executed from within the PHY device. The one or more control policies may enable management of power consumption associated with communication of data via the PHY device. A mode of operation of the PHY device may be selected based on the control policy. One or more components of the PHY device may be reconfigured based on the selected mode of operation. The selected mode of operation may comprise a low power idle (LPI) mode of operation or a subset PHY mode of operation. The control policy may be executed within the PHY device utilizing hardware, software, and/or firmware within the PHY device. | 05-06-2010 |
20100115307 | METHOD AND SYSTEM FOR ENERGY EFFICIENT NETWORKING VIA PACKET INSPECTION - Aspects of a method and system for energy efficient networking via packet inspection are provided. In various embodiments of the invention, a network device may include one or more circuits operable to inspect one or both of ingress and/or egress packets in the network device. The one or more processors may be operable to predict traffic in the network device based on the inspection. The one or more processors may be operable to, based on the predicted traffic, control a mode of operation of the network device to manage power consumption in the network device. A downlink path within the network device may be configured based on inspection of packets conveyed along a corresponding uplink path. An uplink path within the network device may be configured based on inspection of packets conveyed along a corresponding downlink path. | 05-06-2010 |
20100115308 | COMMUNICATION DEVICE AND POWER SUPPLY METHOD - Provided is a communication device capable of efficiently performing a power supply control when reducing power consumption by reducing the time during which the power is supplied. In the device, a CPU power saving control unit ( | 05-06-2010 |
20100115309 | ANTICIPATION OF POWER ON OF A MOBILE DEVICE - A method of managing the power up of a device that has power down state; and at least two power up states, wherein the method includes the following steps:
| 05-06-2010 |
20100115310 | DISK ARRAY APPARATUS - A disk array apparatus includes: a plurality of storage units for storing data redundantly, the data of the at least one of the storage units being recoverable by the rest of the storage units; and a controller for controlling the storage units to have write data written into redundantly in response to a write command from the exterior, and controlling at least one of the storage units to assume an inactive state under a power saving mode and controlling the rest of the storage units to produce read out data in response to a read command from the exterior during the power saving mode. | 05-06-2010 |
20100115311 | PCI Express System and Method of Transiting Link State Thereof - A PCI Express system and a method of transitioning link state thereof. The PCI Express system includes an upstream component, a downstream component and a link. The upstream component and the downstream component transmit data to each other via the link. When at least one of the upstream component and the downstream component stops data transmission under a normal working state and if the system idle time period reaches a threshold idle time, then transiting the link into a second link state | 05-06-2010 |
20100115312 | TECHNIQUES FOR ENTERING A LOW-POWER LINK STATE - Techniques to cause a point-to-point link between system components to engage in a negotiation process that may lead to the link transitioning from an active state in which data may be transmitted between system components to a low power state where data may not be transmitted. The negotiation process may occur between each pair of nodes within an electronic system that are interconnected via point-to-point link. The negotiation may ensure that there are no pending transactions or transactions that may occur within an upcoming period of time. Through this negotiation each component acknowledges and agrees to transition the link to the low power state. | 05-06-2010 |
20100122099 | APPARATUS AND METHOD FOR CONTROLLING POWER CONSUMPTION IN A MULTI MODEM SYSTEM - An apparatus and a method for controlling power consumption in a system having a plurality of modems are provided. In the method, whether an interrupt is generated in each modem is detected. An amount of current consumption of the system at a processing point of the generated interrupt is determined. The amount of current consumption of the system is compared with a threshold, so that the processing point of the generated interrupt is controlled. | 05-13-2010 |
20100122100 | TILED MEMORY POWER MANAGEMENT - A tiled memory and a method of power management within the tiled memory provides efficient use of energy within a computer storage, which may be a spiral cache memory. The tiled memory is power-managed by placing tiles in a power-saving state, which may be a state in which storage circuits are powered-down and network circuits are powered-up, so that for serially-connected tiles, information can still be forwarded by a tile in the power-saving state. The tiles may be power managed under direction of a central controlled, which sends commands to the tiles to enter and leave the power-saving state, or the tiles may self-manage their power-saving state according to activity measured at the individual tiles. Activity may be measured at the tiles of a spiral cache by comparing a hit rate and a push back rate to corresponding thresholds. The measurements may be used with either tile-managed or centrally-managed techniques. | 05-13-2010 |
20100125743 | ELECTRONIC DEVICE FOR REDUCING POWER CONSUMPTION DURING OFF OF COMPUTER MOTHERBOARD - The present invention discloses an electronic device for reducing power consumption during power off of computer motherboard. When the computer motherboard is at S5 soft off state of ACPI, it will make the computer motherboard enter like G3 mechanical off state of ACPI. The electronic device will cut off a portion of electric components consuming stand-by power on the computer motherboard, and only supply the stand-by power to the electronic device itself. Only after the user pressed the power button, the electronic device will connect the stand-by power to the computer motherboard. | 05-20-2010 |
20100131783 | System and Method of Dynamically Switching Queue Threshold - A system and method of dynamically switching the threshold of a data queue, such as FIFO, is disclosed. The data queue has a first threshold and a second threshold, wherein the first threshold is greater than the second threshold. The data queue is dynamically switched between the first threshold and the second threshold according to different power state of a central processing unit (CPU). A system memory is requested to fill the data queue with data whenever amount of the data queue is less than the switched first/second threshold. | 05-27-2010 |
20100131784 | POWER SAVINGS FOR MULTI-THREADED PROCESSORS - Methods and apparatuses are presented that allow power savings on a processor executing a plurality of threads on a plurality of cores. The method may include providing a first timing signal to a processor, determining the power requirements of the processor, loading a symbol into a shift register, where the symbol may be associated with the power requirements of the processor, providing a second timing signal to the processor, where the second timing signal may include a gated representation of the first timing signal and the symbol. | 05-27-2010 |
20100131785 | POWER MANAGEMENT OF COMPUTERS - A method of controlling power consumption in a computer uses a power management program installed on the computer to detect the identities of processes running on the computer which maintain the computer in a high power state in the absence of input activity. The program compares the identity of the or each process running on the computer with a set of identities of previously identified processes and causes the computer to adopt a low power state if the detected identity of a process, or the detected identities of all the processes, running on the computer is/are in the set of previously identified processes. | 05-27-2010 |
20100138676 | Microprocessors with improved power efficiency - A microprocessor is arranged to process instructions at least some of which contain at least one immediate value which forms an operand of the function, wherein said immediate value is represented in a format which achieves a greater power efficiency than two's complement when said instructions are processed. | 06-03-2010 |
20100138677 | OPTIMIZATION OF DATA DISTRIBUTION AND POWER CONSUMPTION IN A DATA CENTER - The distribution of data among a plurality of data storage devices may be optimized, in one embodiment, by redistributing the data to move less-active data to lesser performing data storage devices and to move more-active data to higher performing data storage devices. Power consumption in the datacenter may be optimized by selectively reducing power to data storage devices to which less-active data, such as persistent data, has been moved. | 06-03-2010 |
20100138678 | POWER-SAVING DEVICE FOR POWER OVER ETHERNET AND CONTROL METHOD THEREFOR - A power-saving device for use with a Power-over-Ethernet technology includes a plurality of connecting ports, a time generator, a storage medium, a power control unit, and a micro controller. The connecting ports are electrically connected with respective powered devices for transmitting electrical power and data to respective powered devices. The time generator is used for generating time information. The storage medium is used for storing a power schedule table. The power control unit is electrically connected with the connecting ports for transmitting electrical power to the connecting ports. The micro controller is connected with the time generator, the storage medium and the power control unit. According to the power schedule table read out from the storage medium by the micro controller and the time information generated by the time generator, a power-outputting status of the power control unit is controlled by the micro controller. | 06-03-2010 |
20100146313 | POWER CONTROL - A method comprising: sensing an ambient temperature at an electronic apparatus; and switching between a first processing mode of the electronic apparatus and a second processing mode of the electronic device, in response to an increase in the ambient temperature above a threshold. | 06-10-2010 |
20100146314 | Power aware software pipelining for hardware accelerators - Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings. | 06-10-2010 |
20100146315 | Software Selectable Adjustment of SIMD Parallelism - Selective power control of one or more processing elements matches a degree of parallelism to requirements of a task performed in a highly parallel programmable data processor. For example, when program operations require less than the full width of the data path, a software instruction of the program sets a mode of operation requiring a subset of the parallel processing capacity. At least one parallel processing element, that is not needed, can be shut down to conserve power. At a later time, when the added capacity is needed, execution of another software instruction sets the mode of operation to that of the wider data path, typically the full width, and the mode change reactivates the previously shut-down processing element. | 06-10-2010 |
20100153758 | METHOD AND APPARATUS FOR OPTIMIZING POWER CONSUMPTION IN A MULTIPROCESSOR ENVIRONMENT - A method and apparatus for reducing net power consumption in a computer system includes identifying a plurality of processing states operable to execute a task. A processing state and current drain pattern is selected that is most power efficient. A selected processing state may include one or more processing elements of the computer system such as one or more processors or accelerators and indicates the manner in which one or more portions of the received task may be distributed among the processing elements of the computer system. The current drain pattern selected may be a constant current drain pattern or a pulsed current drain pattern and may be selected to optimize power consumption when executing the task among the one or more processing elements. | 06-17-2010 |
20100162014 | Low power polling techniques - Techniques are described to provide the capability to halt execution of a thread by a processor and potentially lower power consumption of the processor while responding to events in a timely manner. An operating system provided system call allows for identification of events that cause the execution of the thread to resume. A processor core uses a signal mask and translation unit that monitors for the identified events. In the event an event is detected, the thread unhalts and determines a manner to process the event. | 06-24-2010 |
20100162015 | ENERGY SAVING SUBSYSTEM FOR AN ELECTRONIC DEVICE - The instant invention broadly contemplates an energy saving subsystem comprising a secondary CPU that utilizes less power than a main CPU, thereby allowing an electronic device (e.g. a laptop PC) having the secondary CPU to use less power and run for longer periods of time on a limited power supply. Thus, the invention permits the electronic device to be utilized for extended periods and extends the battery life. | 06-24-2010 |
20100162016 | LOW POWER CONSUMPTION PROCESSOR - Provided is a low power consumption processor. The processor includes: a plurality of blocks; a memory storing instructions that control each of the plurality of blocks; and a multi power controller generates a signal that activates at least one of the plurality of blocks according to an address storing the instruction, and provides a normal power voltage or a reduction power voltage in response to the activation signal. | 06-24-2010 |
20100162017 | SYSTEMS AND METHODS FOR IMPLEMENTING STANDBY FUNCTIONALITY USING FIELD PROGRAMMABLE GATE ARRAYS - The disclosed embodiments relate to an electronic device comprising a logic circuit comprising a plurality of logic banks. In accordance with embodiments of the present technique, at least one of the plurality of banks is configured to provide standby functionality to the electronic device. The electronic device further comprises a power supply coupled to the logic circuit, configured to power the at least one bank without powering all of the plurality of banks. | 06-24-2010 |
20100169679 | CONTROLLING MULTILEVEL SHARED RESOURCES IN A COMPUTING DEVICE - A computing device is arranged to include a resource manager that controls access to all power resources on the device. The resource manager detects unused devices by counting the components that have requested usage and powers down unused resources, and for those resources offering multiple power levels, it guarantees that the operating level is no higher than is needed. | 07-01-2010 |
20100169680 | DISTRIBUTED TABLE-DRIVEN POWER MODE COMPUTATION FOR CONTROLLING OPTIMAL CLOCK and VOLTAGE SWITCHING - A method for computing the optimal power mode for a system-on-chip (SoC) in which both the clock and Vdd settings are controlled. Information from hardware blocks is synthesized into a global power mode for the entire SoC. The clocks can be disabled or enabled, and Vdd voltages can be disabled, set at a nominal operating level, and set at a retention level in which the state of memory and registers is retained. | 07-01-2010 |
20100169681 | METHOD AND SYSTEM FOR REDUCING POWER CONSUMPTION OF ACTIVE WEB PAGE CONTENT - A method and system for reducing power consumption of active web page content includes identifying those threads associated with active advertisement components of the web page and synchronizing the wakeup periods of such threads such that the total number of wakeups over a given period is reduced. | 07-01-2010 |
20100169682 | NETWORK APPARATUS - An apparatus includes a switching unit to output data input from an input unit to an output unit to which the data is to be output, and an input control unit, wherein input units included in a same group among a plurality of input units each have a buffer to store data received from another apparatus; a multiplexer connected to the buffer and to a buffer in another input unit in the same group, and capable of selectively outputting data; and an input data processing portion connected to the multiplexer and performing specific input data processing on data input from the multiplexer and outputting data after the specific input data processing to the switching unit, wherein the input control unit controls a data output selection of the multiplexer and controls supply of power or supply of a clock signal to the multiplexer and the input data processing portion. | 07-01-2010 |
20100174928 | Optimizer Mechanism to Increase Battery Length for Mobile Devices - An optimizer mechanism to increase battery length for mobile devices is provided. An operational state of a data processing system, e.g., a mobile device, is adjusted so as to achieve a target time period of operation when the data processing system is using a depleting power supply. A predicted power consumption of individual processes executing on the data processing system is determined and a remaining amount of power that the depleting power supply can provide is also determined. A subset of processes whose execution can be suspended is determined so that the data processing system can operate for the target period of time based on the predicted power consumption of the individual processes and the amount of power that the depleting power supply can provide. The identified subset of processes are placed in a suspended execution state. | 07-08-2010 |
20100174929 | Method and Systems for Power Consumption Management of a Pattern-Recognition Processor - Disclosed are methods and devices, among which is a device that includes a pattern-recognition processor. In some embodiments, the pattern-recognition processor includes a first block of feature cells coupled to a decoder via a first plurality of local input conductors, a first block-disabling circuit, and a plurality of global input conductors. The pattern-recognition processor further includes a second block of feature cells coupled to the decoder via a second plurality of local input conductors, a second block-disabling circuit, and the plurality of global input conductors. | 07-08-2010 |
20100174930 | Mobile device having organic light emitting display and related display method for power saving - After receiving a web page containing several templates from a web server, a mobile device converts an original color in a selected template of the web page into a new color. Then the mobile device displays the color-converted web page on a display unit which may be formed of OLED. Colors of a background template and a text template can be converted into a low brightness color such as black and a high brightness color such as white, respectively. Therefore, when such a web page is displayed on a mobile device, power consumption is effectively reduced. In another embodiment, the web server may perform a color conversion before sending web pages to the mobile device. | 07-08-2010 |
20100174931 | MANAGING ELECTRIC POWER CONSUMPTION BY CONFIGURING ELEMENTS OF A DISTRIBUTED COMPUTING SYSTEM - A method and system for managing electric power consumption by elements of a distributed computing system comprises: determining one or more system metrics that relate to electric power usage as consumed by elements of a configured distributed environment; determining a system value in response to the one or more system metrics, the value determined according to one or more value criteria; and, while in-progress applications are being run in the computing environment, evaluating one or more potential changes in the distributed computing environment and determining an alternate system value based on the changes; and, re-configuring elements of the distributed computing environment dynamically while the computing environment is operating, in accordance with a determined alternate system value. The re-configuring elements step is in accordance with a potential change operative to alter electric power consumption. | 07-08-2010 |
20100185882 | Computer System Power Management Based on Task Criticality - A method, apparatus, and program product are provided for managing power consumption in a computer system based on the degree with which performance of tasks can be degraded in order to save power. A criticality value controls the degree with which performance of a task may be degraded is associated with tasks within a computer system. Power consumption of the computer system is then managed based on the criticality values associated with tasks executing within the computer system. A reduction in computer system power consumption can be realized by degrading the performance of non-critical tasks, which is accomplished by reducing the power consumed by at least a portion of the computer system. Power can also be reduced by scheduling non-critical tasks to portions of the computer system and reducing power consumption of other portions of the computer system. | 07-22-2010 |
20100185883 | POWER MANAGEMENT FOR LARGE MEMORY SUBSYSTEMS - A power management system is provided. The system includes a permanent storage medium that has a plurality of storage segments that are individually controllable. A power manager analyzes requirements of programs that access the permanent storage medium and selectively enables or disables a subset of the storage segments in order to mitigate power consumption of the storage medium. | 07-22-2010 |
20100191990 | VOLTAGE-BASED MEMORY SIZE SCALING IN A DATA PROCESSING SYSTEM - A memory has bits that fail as power supply voltage is reduced to reduce power and/or increase endurance. The bits become properly functional when the power supply voltage is increased back to its original value. With the reduced voltage, portions of the memory that include non-functional bits are not used. Much of the memory may remain functional and use is retained. When the voltage is increased, the portions of the memory that were not used because of being non-functional due to the reduced power supply voltage may then be used again. This is particularly useful in a cache where the decrease in available memory due to power supply voltage reduction can be implemented as a reduction in the number of ways. Thus, for example an eight way cache can simply be reduced to a four way cache when the power is being reduced or endurance increased. | 07-29-2010 |
20100191991 | System and Method for Using an On-DIMM Remote Sense for Performance and Power Optimization - A system includes a dual in-line memory module and a system board. The dual in-line memory module includes a plurality of dynamic random access memory devices, and a system management interface. The system management interface is configured to measure a first voltage provided to the dynamic random access memory devices, and configured to digitize the first voltage. The system board includes a test module and a voltage regulator. The test module is configured to receive the digitized first voltage via a connector pin between the dual in-line memory module and the system board, and configured to compare the first voltage to a first threshold voltage. The voltage regulator is configured to adjust a remote sense target voltage for the system management interface when the first voltage is less than the first threshold voltage. | 07-29-2010 |
20100191992 | WIRELESS COMMUNICATION APPARATUS AND POWER MANAGEMENT METHOD FOR THE SAME - A wireless communication apparatus is adapted for communication between a host and a communication device. The wireless communication apparatus includes a host transmission interface adapted to be coupled to the host, a host transmission interface controller coupled to the host transmission interface, a wireless transmission interface adapted for communicating with the communication device so as to receive packet data therefrom, a wireless transmission interface controller coupled to the wireless transmission interface, and a processor coupled between the host transmission interface controller and the wireless transmission interface controller. The processor is operable to control a power state of the host transmission interface controller to enter a power consuming mode selected in accordance with a traffic volume. | 07-29-2010 |
20100205467 | Low-power system-on-chip - A system-on-chip comprises a power-off domain block; and a power-on domain block that analyzes externally transferred data during a power-down state of the power-off domain block, wherein the power-on domain block executes an operation of the power-off domain block or a wake-up operation, based on an analyzed result of the externally transferred data. | 08-12-2010 |
20100211808 | Data storage devices and power management methods thereof - A data storage device includes a data storage medium and a controller. The controller is configured to control at least one of a reading, erasing, and writing operation on the data storage medium. The controller includes an interface and a power management unit. The interface is configured to exchange at least one of a command, an address, and data with a host. The power management unit is configured to change the power mode of the interface into a power saving mode if: a command input from the host is not executed, data transfer is not actually executed in executing the command, or status information is not reported after the command is executed. | 08-19-2010 |
20100218013 | TIME-BASED STORAGE ACCESS AND METHOD OF POWER SAVINGS AND IMPROVED UTILIZATION THEREOF - The invention provides a method and system for time-based storage access, the method includes associating a plurality of storage volumes with specific periods of time during which they can be accessed, adjusting user fees based on access time periods of storage volumes, packing the plurality of storage volumes in available storage bins in the system based on periods of access for the plurality of storage volumes, wherein volumes with overlapping or similar periods of access are packed into a same storage bin if possible, and switching a storage bin to off or a reduced power state during periods when the storage volumes placed in the storage bin are not required, to reduce power consumption. | 08-26-2010 |
20100218014 | Power Management To Maximize Reduced Power State For Virtual Machine Platforms - Power management in a virtual machine environment that includes at least one virtual machine platform providing a plurality of virtual machines, and a plurality of separate (user) computers, each connected to a respective one of the virtual machines in a typical virtual machine distribution environment. There is also provided a function, independent of the connections of the user computers to the virtual machines, for determining if each of said computers connected to the virtual machines is in an active state together with a function for switching the virtual machine platform into a reduced power consumption state in the platform when all of the computers connected to virtual machines are in a non-active state. | 08-26-2010 |
20100218015 | POWER MANAGEMENT INDEPENDENT OF CPU HARDWARE SUPPORT - A system including power savings modes, the system including a processor that supports bus semantics in its hardware for a power state of a first level, wherein the first level is lowest power level the processor is able to enter, a system core logic module coupled to the processor, and a memory, coupled to the system core logic module, storing instructions, which when executed by the system, causes the system core logic to be notified of an impending processor idle state that is compatible with the latency required for system core logic power savings modes and wherein, in response to being notified of an impending processor idle state, the system core logic implements thread, core, or package level power saving idle modes lower than supported by the first level based on a latency hierarchy and independent of normal power saving bus semantics. | 08-26-2010 |
20100218016 | IMAGE PROCESSING APPARATUS - An image processing apparatus includes a volatile storing unit, a nonvolatile storing unit, a processing control unit, a transfer unit and a power controlling unit. The processing control unit controls image processing and writes a result of the control as history information into the volatile storing unit. The transferring unit transfers the history information from the volatile storing unit to the nonvolatile storing unit. The power controlling unit transfers the history information to the transferring unit transfer when detecting an abnormality of the processing control unit based on a communication with the processing control unit, and stops a supply of a power after a passage of a certain time since the detection of the abnormality. | 08-26-2010 |
20100218017 | NETWORK APPARATUS AND METHOD FOR CONTROLLING NETWORK APPARATUS - A CPU of a network apparatus (MFP) counts, based on packets received in a certain period of time, the number of terminal apparatuses from among a plurality of terminal apparatuses that can communicate with the network apparatus. When the counted number of terminal apparatuses is less than the threshold value of the number of available hosts (Th), the network apparatus is controlled to shift into a power-saving state. | 08-26-2010 |
20100229009 | Applying power to a network interface - A host device capable of communicating with an external network. The host device may comprise a power-application unit and a network interface. The power-application unit may receive from a power-supply unit a first power-supply output having a first voltage level and a second power-supply output having a second voltage level. The power-application unit may be controllable for producing selectively a first power-application output having a third voltage level from the first power-supply output and a second power-application output having a fourth voltage level from the second power-supply output. The network interface may transmit data to and receive data from an external network, and may be powered at least in part by the first and second power-application outputs. | 09-09-2010 |
20100229010 | COMPUTER SYSTEM, METHOD FOR CONTROLLING THE SAME, AND PROGRAM - A computer system | 09-09-2010 |
20100235659 | SYSTEM AND METHOD FOR CONTROLLING USE OF POWER IN A COMPUTER SYSTEM - In one embodiment, a power adapter comprises a power supply to output power for powering a powered device. The power adapter outputs information indicative of an amount of power output by the power supply for use by the powered device to control the amount of power used by the powered device. | 09-16-2010 |
20100235660 | LOW POWER COMPUTER WITH MAIN AND AUXILIARY PROCESSORS - An architecture for a computer includes a primary processor that consumes power at a first rate, that is operated when the computer is in an high power mode and that is not powered when the computer is in a low power mode. A primary graphics processor communicates with the primary processor, is operated when the computer is in the high power mode and is not powered when the computer is in the low power mode. A secondary graphics processor communicates with a secondary processor. The secondary processor consumes power at a second rate that is less than the first rate. The secondary processor and the secondary graphics processor are operated when the computer is in the low power mode. | 09-16-2010 |
20100241881 | Environment Based Node Selection for Work Scheduling in a Parallel Computing System - A method, apparatus, and program product manage scheduling of a plurality of jobs in a parallel computing system of the type that includes a plurality of computing nodes and is disposed in a data center. The plurality of jobs are scheduled for execution on a group of computing nodes from the plurality of computing nodes based on the physical locations of the plurality of computing nodes in the data center. The group of computing nodes is further selected so as to distribute at least one of a heat load and an energy load within the data center. The plurality of jobs may be additionally scheduled based upon an estimated processing requirement for each job of the plurality of jobs. | 09-23-2010 |
20100241882 | System and Method for Tunneling Control over a MAC/PHY Interface for Legacy ASIC Support - A system and method for tunneling control over a MAC/PHY interface for legacy ASIC support. Energy efficient Ethernet control or status information can be communicated over a MAC/PHY interface using control codes that are embedded in sequence ordered sets. These sequence ordered sets would not affect the data flow and can be tunneled within an existing interface (e.g., XAUI, XFI, xxMII or derivative interfaces) without generating errors. | 09-23-2010 |
20100250980 | METHODS FOR REDUCING POWER CONSUMPTION AND DEVICES USING THE SAME - A method for reducing power consumption of a device with an embedded memory module is provided. The device includes comprises a processor, an embedded memory module, a software module, a power supplying unit, and an auxiliary logic. The embedded memory module is accessed by the processor and partitioned into a plurality of memory blocks in accordance with a first predetermined rule. The software module comprises an instruction set and a data set. The software module is segmented into a plurality of segments in accordance with a second predetermined rule. The power supplying unit provides power to the plurality of memory blocks. The auxiliary logic controls the power supplying unit. The power supplied to a memory block is switched on or off in accordance with a condition. | 09-30-2010 |
20100250981 | DYNAMIC MEMORY VOLTAGE SCALING FOR POWER MANAGEMENT - In the context of computer systems, the present invention broadly contemplates the ability to dynamically adjust the voltage and frequency of DRAM memory modules that are dual-voltage tolerant based on system performance. The invention allows a computer system to dynamically scale the memory voltage between a lower and a higher voltage, thereby allowing the system to save power when the system is idle or in low usage, but also allowing the system to realize the full memory performance when running more intensive applications. | 09-30-2010 |
20100250982 | CONSERVING POWER IN A PLATFORM SUPPORTING NETWORK INTERFACES - A computer system may comprise a platform in which a processing block may be provisioned. The processing block may determine an optimal compression ratio such that the optimal compression ratio may cause a minimum of a total power to be consumed by the computer platform. The total power may comprise total compression power consumption and total transmission power consumption. The processing block may generate compressed frames from a plurality of frames generated by an application. The compressed frames may be generated by encoding the plurality of frames using the optimal compression ratio. The processing block may select a network interface from multiple network interfaces supported by the computer system to transmit the compressed frames. | 09-30-2010 |
20100250983 | POWER SAVING CONTROL SYSTEM - A power saving control system includes a power supply, a voltage conversion unit, an electrical switch, a control chip having a general programmable input output (GPIO) pin and a basic input system (BIOS) chip. The power supply is configured for supplying a voltage. The voltage conversion unit is connected to the power supply to receive the voltage and configured for converting the voltage into a working voltage of an electronic element, and outputting the working voltage. The electrical switch is connected between the voltage conversion unit and an input terminal of the electronic element. The control chip is connected to the electrical switch. The BIOS chip is connected to the control chip to control the electrical switch to be turned on or off via controlling an output value of the GPIO pin of the control chip to control the electrical element to work. | 09-30-2010 |
20100250984 | ELECTRONIC DEVICE AND POWER SAVING METHOD THEREOF - The present invention discloses an electronic device and power saving method thereof. In an embodiment, when the electronic device operates in a power-saving mode, which means an area on a screen of the electronic device is not a currently in-focus window-based interface, the area is adjusted to have reduced backlight brightness. Thus, not only the power consumed by the screen is reduced but also user experience can be maintained. In another embodiment, when the electronic device operates in a power-saving mode, display parameters for an image shown in the currently in-focus window-based interface are changed without adversely affecting the power-saving effect, so that the currently in-focus window-based interface has higher display definition than other areas do. | 09-30-2010 |
20100262848 | POWER CONSUMPTION MANAGEMENT IN A NETWORK DEVICE - A method includes buffering an initial amount of data of a data set transmitted from a MAC. When an amount of time for data associated with the data set to fill a PHY buffer approaches an amount of time for the far-end PHY to transition from the second far-end PHY power state to the first far-end PHY power state, buffering a remaining amount of data of the data set transmitted from the MAC and transmitting the data to a far-end PHY after the far-end PHY transitions between a second and first far-end PHY power state. When the amount of time for data associated with the data set to fill the buffer exceeds the amount of time for the far-end PHY to transition from the second to the first far-end PHY power state, transmitting a data delay indicator to the MAC to preempt the MAC from transmitting the remaining amount of data. | 10-14-2010 |
20100262849 | ELECTRONIC DEVICE FOR REDUCING POWER CONSUMPTION DURING SLEEP MODE OF COMPUTER MOTHERBOARD AND MOTHERBOARD THEREOF - A power-saving electronic device for use with a computer motherboard in a “suspend to memory” state is disclosed. The power-saving electronic device enables compulsory interruption of power supply to a south bridge chip and a super input output (SIO) chip of the computer motherboard in the “suspend to memory” state, such as an S3 state of Advanced Configuration and Power Interface (ACPI), so as to save power. After a user presses a power switch, the power-saving electronic device enables the south bridge chip and SIO chip to be powered on by a standby power supplied thereto and enables the computer motherboard to remain capable of awakening and resuming from the S3 state. | 10-14-2010 |
20100262850 | Power Budget Controller and Related Method for Ethernet Device - A power budget controller for an Ethernet device is disclosed. The Ethernet device is connected with another Ethernet device through a cable. The power budget controller includes a length estimation unit, a power selection unit and a link monitoring unit. The length estimation unit is utilized for generating a detection signal to the cable and for estimating length of the cable according to a refection waveform of the detection signal. The power selection unit is coupled to the length estimation unit, and utilized for adjusting a transmission power of the Ethernet device according to an estimation result of the cable length. The link monitoring unit is coupled to the power selection unit, and utilized for monitoring a link status of the Ethernet device to determine whether the transmission power is selected correctly. | 10-14-2010 |
20100262851 | NETWORK APPARATUS WITH POWER SAVING CAPABILITY AND POWER SAVING METHOD APPLIED TO NETWORK MODULE - A network apparatus with power saving capability includes a network block, a cable-connection status detection circuit and a control circuit. The network block is used for providing a network communication function. The cable-connection status detection circuit is used for detecting the cable-connection status between the network block and the link partner to generate a detecting result. The control circuit is coupled between the network block and the cable-connection status detection circuit, and implemented for controlling the network block to switch between a first operation mode and a second operation mode according to the detecting result. The power consumption of the network block operating in the first operation mode is higher than the power consumption of the network block operating in the second operation mode. | 10-14-2010 |
20100268971 | METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION DURING WIRELESS DATA TRANSFER - Apparatus for reducing power consumption during wireless data transfer between a host device and another device is disclosed. The apparatus comprises a plurality of wireless modules, each of the plurality of wireless modules comprising a different wireless protocol, each wireless protocol having a different transmission range and data transfer rate. The apparatus also comprises a processor having a determination module. The determination module is configured to determine which of the plurality of wireless protocols is able to be used for the wireless data transfer, and which of the different wireless protocols able to be used for the wireless data transfer has a power consumption that is the lowest of the wireless protocols able to be used for the wireless data transfer, the wireless protocol so determined being used for the wireless data transfer. A corresponding method is also disclosed. | 10-21-2010 |
20100275044 | CACHE ARCHITECTURE WITH DISTRIBUTED STATE BITS - Embodiments that that distribute replacement policy bits and operate the bits in cache memories, such as non-uniform cache access (NUCA) caches, are contemplated. An embodiment may comprise a computing device, such as a computer having multiple processors or multiple cores, which has cache memory elements coupled with the multiple processors or cores. The cache memory device may track usage of cache lines by using a number of bits. For example, a controller of the cache memory may manipulate bits as part of a pseudo least recently used (LRU) system. Some of the bits may be in a centralized area of the cache. Other bits of the pseudo LRU system may be distributed across the cache. Distributing the bits across the cache may enable the system to conserve additional power by turning off the distributed bits. | 10-28-2010 |
20100287391 | MEMORY CONTROL CIRCUIT, CONTROL METHOD, AND STORAGE MEDIUM - A circuit configured to change a mode of a plurality of memory devices having a power saving mode includes a command queue configured to hold memory access, and a cancellation unit configured to cancel the power saving mode of target devices of the memory access held up to a predetermined stage of the command queue. | 11-11-2010 |
20100293401 | Power Managed Lock Optimization - In an embodiment, a timer unit may be provided that may be programmed to a selected time interval, or wakeup interval. A processor may execute a wait for event instruction, and enter a low power state for the thread that includes the instruction. The timer unit may signal a timer event at the expiration of the wakeup interval, and the processor may exit the low power state in response to the timer event. The thread may continue executing with the instruction following the wait for event instruction. In an embodiment, the processor/timer unit may be used to implement a power-managed lock acquisition mechanism, in which the processor is awakened a number of times to check the lock and execute the wait for event instruction if the lock is not free, after which the thread may block until the lock is free. | 11-18-2010 |
20100293402 | DEVICE HAVING MULTIPLE GRAPHICS SUBSYSTEMS AND REDUCED POWER CONSUMPTION MODE, SOFTWARE AND METHODS - Many computing device may now include two or more graphics subsystems. The multiple graphics subsystems may have different abilities, and may, for example, consume differing amount of electrical power, with one subsystem consuming more average power than the others. The higher power consuming graphics subsystem may be coupled to the device and used instead of, or in addition to, the lower power consuming graphics subsystem, resulting in higher performance or additional capabilities, but increased overall power consumption. By transitioning from the use of the higher power consuming graphics subsystem to the lower power consuming graphics subsystem, while placing the higher power consuming graphics subsystem in a lower power consumption mode, overall power consumption is reduced. | 11-18-2010 |
20100299543 | DISPLAY APPARATUS AND METHOD FOR SAVING POWER THEREOF - A display apparatus includes: a command receiver configured to receive power on or off command from an exterior, a power supply unit configured to supply power to the display apparatus and a control unit coupled to the command receiver and the power supply unit, determining whether auxiliary power exists when the power off command is received, wherein the control unit is configured for two power saving modes. | 11-25-2010 |
20100299544 | Enabling/Disabling Power-Over-Ethernet Software Subsystem In Response To Power Supply Status - An Ethernet switch includes 12-Volt and 48-Volt power sourcing modules, system software, Ethernet interface modules and optional power over Ethernet (PoE) modules. The Ethernet interface modules are motherboards that include the circuitry required to implement a non-PoE system. The PoE modules are daughter boards that include the circuitry required to supply powered devices in a PoE subsystem. A PoE module may be connected to a corresponding Ethernet interface module. During start up, all of the Ethernet interface modules are first powered up in response to the 12-Volt power sourcing module. If the system software subsequently determines that the 48-Volt power sourcing module is operational, then (and only then) the system software attempts to detect the presence of any PoE modules. Upon detecting one or more PoE modules, the PoE modules are initialized and configured, thereby enabling PoE operation. | 11-25-2010 |
20100306560 | Power Management in a Virtual Machine Farm at the Local Virtual Machine Platform Level by a Platform Hypervisor Extended with Farm Management Server Functions - Power management for a virtual machine farm in which each hypervisor respectively serving each virtual machine platform in the farm is provided with an extended hypervisor function coacts with functions provided by the connection broker and the manual configuration interface of the virtual machine farm management server for managing each respective virtual machine platform to maximize the time that each platform is in the reduced power state. | 12-02-2010 |
20100306561 | INFORMATION PROCESSING APPARATUS AND POWER CONTROL METHOD - According to one embodiment, an information processing apparatus includes a wireless communication device and a power management module. The power management module is configured to transmit, in response to disconnection of an external power supply device from a power connector of the information processing apparatus, a command instructing turn-off of a power supply circuit within the external power supply device to a wireless communication circuit within the external power supply device via the wireless communication device. | 12-02-2010 |
20100313043 | Storage Apparatus and Its Power Saving Control Method - Provided are a storage apparatus and its power saving control method capable of performing sufficient power saving to multiple memory devices without deteriorating the response performance to a host system. If multiple logical volumes formed in disk drives configuring a parity group are in an offline status where a path group from the host computer is not set, a control processor sets the multiple disk drives of the parity group to a power saving status. | 12-09-2010 |
20100313044 | STORAGE ARRAY POWER MANAGEMENT THROUGH I/O REDIRECTION - A storage system can comprise multiple storage devices with differing characteristics, including differing power-related characteristics. A storage power manager can redirect Input/Output (I/O) communications to storage devices to maximize the power efficiency of the storage system. The storage power manager can reference metadata associated with the data of an I/O request, as well as power-related data, including continuously varying data and storage device characteristics, to select one or more storage devices to which to redirect the I/O. The storage power manager can also move or copy data between storage devices to facilitate maximum utilization of power efficient storage devices with limited storage capacity and to enable the placing of one or more storage devices into a reduced power consuming state. The moving or copying of data can be performed with reference to lifecycle information to identify data that has changed since a storage device was last active. | 12-09-2010 |
20100313045 | STORAGE ARRAY POWER MANAGEMENT USING LIFECYCLE INFORMATION - A multi-device storage system can be arranged into power saving systems by placing one or more storage devices into a reduced power consuming state when the storage activity associated with the system is sufficiently reduced that an attendant decrease in throughput will not materially affect users of the storage system. Where data redundancy is provided for, a redundant storage device can be placed into the reduced power consuming state and its redundancy responsibilities can be transitioned to a partition of a larger storage device. Such transitions can be based on specific parameters, such as write cycles or latency, crossing thresholds, including upper and lower thresholds, they can also be based on pre-set times, or a combination thereof. Lifecycle information, including lifecycle information collected in real-time by storage devices on a block-by-block basis, can be utilized to obtain historical empirical data from which to select the pre-set times. | 12-09-2010 |
20100313046 | DATA PROCESSING SYSTEM, METHOD FOR PROCESSING DATA AND COMPUTER PROGRAM PRODUCT - A data processing system includes one or more processing unit arranged to execute sets of instructions stored in the data processing system. The sets may include two or more application sets, each forming an application sets and including instructions for scheduling for the application an event at a future point in time. The event may require the processing unit to be in an active mode. The sets may further include rescheduling instructions for receiving from the applications information about the scheduled events and determining whether or not one or more of the events can be rescheduled and rescheduling a reschedulable event to a new point in time. The sets may further include mode control instructions for controlling the processing unit to be in the active mode during a time interval which includes the new point in time and to be in a low power mode in which the processing unit consumes less energy than in the active mode during a period of time adjacent to the time interval. | 12-09-2010 |
20100318821 | SCALABLE, DYNAMIC POWER MANAGEMENT SCHEME FOR SWITCHING ARCHITECTURES UTILIZING MULTIPLE BANKS - According to one general aspect, a method may include receiving data from a network device. In some embodiments, the method may include writing the data to a memory bank that is part of a plurality of at least single-ported memory banks that have been grouped to act as a single at least dual-ported aggregated memory element. In various embodiments, the method may include monitoring the usage of the plurality of memory banks. In one embodiment, the method may include, based upon a predefined set of criteria, placing a memory bank that meets the predefined criteria in a low-power mode. | 12-16-2010 |
20100325452 | AUTOMATIC CLOCK-GATING INSERTION AND PROPAGATION TECHNIQUE - Embodiments of the present invention provide a method and system for clock-gating a circuit. During operation, the system receives a circuit which includes a plurality of clocked memory elements. Next, the system identifies a feedback path from an output of a clocked memory element to an input of the clocked memory element, wherein the feedback path passes through intervening combinational logic, but does not pass through other clocked memory elements in the circuit. Then, the system gates a clock signal to the clocked memory element so that the clock signal is disabled when the feedback path causes a value which appears at the output of the clocked memory element to be appear at the input of the clocked memory element. | 12-23-2010 |
20100325453 | PRIORITIZED WORKLOAD ROUTING IN A DATA CENTER - An approach that manages energy in a data center is provided. In one embodiment, there is an energy management tool, including an analysis component configured to determine an energy profile of each of a plurality of systems within the data center. The energy management tool further comprises a priority component configured to prioritize a routing of a workload to a set of systems from the plurality of systems within the data center having the least amount of energy present based on the energy profile of each of the plurality of systems within the data center. | 12-23-2010 |
20100325454 | Resource and Power Management Using Nested Heterogeneous Hypervisors - A server includes a plurality of processors, at least some of the processors being partitioned into virtual partitions using a virtual partition hypervisor. At least one of the virtual partitions executes a virtual machine hypervisor to implement a plurality of virtual machines within said at least one of said virtual partitions. The server also executes a workload manager application configured to dynamically reallocate the processors among the virtual partitions. | 12-23-2010 |
20100325455 | MEMORY CARD CONTROL DEVICE AND METHOD FOR CONTROLLING THE SAME - A memory card control device includes an insertion unit to which a memory card is inserted, a memory card controller to control writing and reading of data to/from the memory card inserted in the insertion unit, an interface controller to send and receive the data written or read to/from the memory card to/from a host computer, a clock supplier to supply a clock signal to the memory card controller and the interface controller, a memory card detector to detect presence or absence of the memory card inserted in the insertion unit, and a low power consumption mode switching unit to switch the memory card controller and the interface controller to a low power consumption mode in response to the absence of the memory card detected by the memory card detector. | 12-23-2010 |
20100325456 | CONTROLLING THE POWER CONSUMPTION OF A RECEIVING UNIT - An average power consumption of receiving units ( | 12-23-2010 |
20100332869 | Method and apparatus for performing energy-efficient network packet processing in a multi processor core system - A method and apparatus for managing core affinity for network packet processing is provided. Low-power idle state of a plurality of processing units in a system including the plurality of processing units is monitored. Network packet processing is dynamically reassigned to processing units that are in a non-low power idle state to increase the low-power idle state residency for processing units that are in a low-power idle state resulting in reduced energy consumption. | 12-30-2010 |
20100332870 | ELECTRONIC DEVICE FOR REDUCING POWER CONSUMPTION OF COMPUTER MOTHERBOARD AND MOTHERBOARD THEREOF - An electronic device for reducing power consumption of a computer motherboard is disclosed. The electronic device enables the computer motherboard to compel interruption of power supply to a south bridge chip and a super input output (SIO) chip of the computer motherboard so as to save power while the computer motherboard is waiting for receipt of a Wake-on-LAN packet. A network chip of the computer motherboard sends a signal to the power-saving electronic device as soon as a Wake-on-LAN event occurs, such that a standby power is electrically connected to the south bridge chip and the SIO chip by the electronic device. The computer motherboard equipped with the electronic device is capable of executing Wake-on-LAN function while compelling interruption of power supply to the south bridge chip and the SIO chip in a power-saving state. | 12-30-2010 |
20100332871 | CAPPING POWER CONSUMPTION IN A DATA STORAGE SYSTEM - A method for capping power consumption in a data storage system is provided. The method comprises associating a power quota with a first storage medium, wherein the power quota limits amount of power consumed by the first storage medium within a given time interval; receiving a request to perform an input/output (I/O) operation on the first storage medium; and servicing the request within power limits defined by the power quota. | 12-30-2010 |
20100332872 | Priority-Based Power Capping in Data Processing Systems - A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system. | 12-30-2010 |
20100332873 | Power Supply Engagement and Method Therefor - An information handling system includes a plurality of power supply units (PSUs) to supply power to one or more system components. For each PSU of the plurality of PSUs, a power conversion efficiency profile for the PSU is determined using a power management control module of the information handling system. The power conversion efficiency profile represents a power conversion efficiency of the PSU for each of one or more power outputs capable of being supplied by the PSU. The power management control module determines a total amount of power to be supplied to a load of the information handling system, and engages a select number of PSUs to provide the total amount of power based on the total amount of power and the power conversion efficiency profiles of the PSUs. | 12-30-2010 |
20110004775 | Methods and Systems for Use-Case Aware Voltage Selection - Systems and methods according to these exemplary embodiments provide for optimizing voltage use in digital circuits. This can be obtained by creating situations for digital circuits such that the effective critical path (ECP) can be used such as, for example, the case where a digital circuit includes a plurality of voltage domains powered by individual and possibly different voltage sources. This can then reduce voltage use in digital circuits. | 01-06-2011 |
20110010569 | Adaptive Flushing of Storage Data - Methods and a processing device are provided for monitoring a level of power in a power supply of a processing device and changing a data flushing policy, with respect to data to be written to a non-volatile storage device, based on a predicted amount of time until power loss. When the predicted amount of time until power loss is higher than a threshold, as defined by a flushing policy, requests from applications for data flushes of data to a non-volatile storage device may be discarded. When the predicted amount of time remaining until power loss drops below the threshold, the requests from the applications for data flushes of the data to the non-volatile storage device may be honored and the data may be flushed to the non-volatile storage device. In some embodiments, the flushing policy may define additional thresholds. | 01-13-2011 |
20110010570 | INFORMATION PROCESSING APPARATUS HAVING POWER SAVING MODE, AND CONTROL METHOD AND STORAGE MEDIUM THEREFOR - An information processing apparatus in which a first waiting time is set, if a job interval is longer than a reference time and a predetermined condition is not satisfied, and a second waiting time longer than the first waiting time is set, if a job interval is longer than the reference time and the predetermined condition is satisfied. In a case that the job interval is longer than the first reference time, a control unit causes a multi-function peripheral to shift from a normal mode to a power saving mode when the first waiting time has elapsed after a job having been processed, if the predetermined condition is not satisfied, and causes the multi-function peripheral to shift to the power saving mode when the second waiting time has elapsed after the job having been processed, if the predetermined condition is satisfied. | 01-13-2011 |
20110016336 | STORAGE SYSTEM, CONTROL METHOD OF STORAGE DEVICE - The present invention provides a technique that enables, in an environment in which an upper limit of electric energy consumption is prescribed for a specific period, operations of a storage device while keeping the electric energy consumption within the prescribed upper limit and, at the same time, maintaining operations of a disk device of a storage device necessary for providing services to a user. A storage system according to the present invention includes a storage device having one or more energized parts and a management device that manages operations of the storage device. The management device acquires electric energy consumption of the energized part and controls the operational state of the energized part so that the electric energy consumption of the storage device over a predetermined period does not exceed a prescribed upper limit. | 01-20-2011 |
20110016337 | SOFTWARE-BASED POWER CAPPING - The present invention relates to power consumption, and specifically an apparatus, method, and computer readable medium to manage and control power consumption in computer systems. Specifically, the present invention manages power consumption by controlling the types of threads that are executed by the processor. The present invention monitors the resources of the system to determine the power consumption of the system. If the power consumption is too high, the present invention issues more low power threads to be executed by the processor. | 01-20-2011 |
20110029793 | GENERATING A SIGNAL TO REDUCE COMPUTER SYSTEM POWER CONSUMPTION FROM SIGNALS PROVIDED BY A PLURALITY OF POWER SUPPLIES - A signal suitable for signaling a computer system to reduce power consumption is generated from a plurality of power supplies. The signal is asserted when at least one of the power supplies of the plurality of power supplies signals impairment, and at least one of the power supplies of the plurality of power supplies signals that the power supply is supplying current above a threshold level. | 02-03-2011 |
20110029794 | POWER SUPPLY CIRCUIT FOR AUDIO CODEC CHIP AND METHOD FOR PROVIDING POWER SUPPLY TO AUDIO CODEC CHIP - A power supply circuit is provided. The power supply circuit includes an audio codec chip and a voltage absorbing circuit. The audio codec chip has a power input terminal. The power input terminal is connected to a power source terminal. The voltage absorbing circuit is connected between the power source terminal and the power input terminal of the audio codec chip so as to decrease a divided voltage accomplished with a voltage from the power source terminal to low level. A method configured for starting up an audio codec chip on a computer motherboard in a normal manner is also provided. | 02-03-2011 |
20110035611 | COORDINATING IN-BAND AND OUT-OF-BAND POWER MANAGEMENT - One embodiment provides a method of managing power in a computer system. A device of the computer system is operated at a selected power-state. The power consumption of the computer system is monitored. If the power consumption of the computer system is approaching or has exceeded a power cap selected for the computer system, then a request to reduce the power-state for the device is generated in response. The operating system is used to service the request to reduce the power-state according to the priority of the request. The reduced power state is forced out-of-band following the request to reduce the power-state if the request is not immediately serviceable by the operating system. Different approaches can be taken to force the reduced power state, using, for example, system management mode or a platform environment control interface. | 02-10-2011 |
20110040993 | CONTROL SYSTEM AND CONTROL METHOD FOR SAVING POWER - A control system for saving power in an electronic device obtains information of maximum power that can be supplied to the electronic device by each power supply, detects how much power is demanded by the electronic device, determines minimum number of the plurality of power supplies, based on the detected power demanded by the electronic device, and turns on power supplies, of which the number is equal to the determined minimum number, and turn off the other power supplies. | 02-17-2011 |
20110055602 | MECHANISM FOR MANAGING POWER IN A VIRTUAL MACHINE SYSTEM - A mechanism for managing power in a virtual machine system is disclosed. A method for a host-based power management system may include monitoring a plurality of VMs in a VM system to detect user activity associated with each of the plurality of VMs, identifying a VM of the plurality of VMs that is inactive based on the user activity associated with the VM, and applying a power reduction policy to the VM. | 03-03-2011 |
20110055603 | POWER MANAGEMENT FOR PROCESSOR - Techniques are generally described related to management of power consumption for a processor. One example method may include identifying a target operating constraint and a first operating parameter; determining a second operating parameter based on the target operating constraint and the first operating parameter; estimating an actual operating constraint; comparing the target operating constraint and the actual operating constraint; and setting up the first operating parameter and the second operating parameter of the processor based on a comparison of the target operating constraint and the actual operating constraint, wherein the target operating constraint is not a worst-case operating constraint. Other examples of methods, systems, and computer programs related to managing power consumption for a processor are also contemplated. | 03-03-2011 |
20110055604 | SYSTEM AND METHOD FOR MANAGING ENERGY CONSUMPTION IN A COMPUTE ENVIRONMENT - A system, method and non-transitory computer readable storage medium are disclosed for managing workload in a data center. The method includes receiving, at a workload manager, energy consumption information. The method further includes receiving workload information about a second data center that is remote from a first data center, and receiving, as controlled by the workload manager, at the first data center at least a portion of workload associated with the second data center based on at least one of the energy consumption information and the workload information. | 03-03-2011 |
20110055605 | SYSTEM AND METHOD FOR MANAGING ENERGY CONSUMPTION IN A COMPUTE ENVIRONMENT - A system, method and non-transitory computer readable storage medium are disclosed for managing workload in a data center. The method includes receiving, at a workload manager, energy consumption information associated with at least one of a first data center and a second data center that is geographically distanced from the first data center. The method further includes receiving workload information associated with at least one of the first data center and the second data center, and transmitting, as controlled by the workload manager, at least part of workload scheduled to be processed at the second data center to the first data center based on at least one of the energy consumption information and the workload information. | 03-03-2011 |
20110060927 | APPARATUS, SYSTEM, AND METHOD FOR POWER REDUCTION IN A STORAGE DEVICE - An apparatus, system, and method are disclosed for managing power consumption in a data storage device. An audit module monitors a power consumption rate of the data storage device relative to a power consumption target. A throttle module adjusts execution of one or more operations on the data storage device in response to the power consumption rate of the data storage device failing to satisfy the power consumption target. A verification module verifies whether the power consumption rate of the data storage device satisfies the power consumption target in response to adjusting the execution of the one or more operations. | 03-10-2011 |
20110072284 | METHODS OF PREPARING A POWER SAVING STATE, UNIVERSAL SERIAL BUS DEVICE AND UNIVERSAL SERIAL BUS HOST - Methods of preparing a power saving state, a Universal Serial Bus (USB) device and a USB host are provided. A method of preparing a power saving state comprises sending a request from a USB device to a USB host, the USB host being connected to the USB device via a USB and the request requesting that the USB host shall stop any bus traffic on the USB. Another method of preparing a power saving state comprises receiving, at a USB host, a request from a USB device, the USB device being connected to the USB host via a USB and the request requesting that the USB host shall stop any bus traffic on the USB. A USB device and a USB host are configured to carry out the respective methods. | 03-24-2011 |
20110072285 | Method and System for No Buffered Traffic Indication for Wireless Local Area Network (WLAN) Power Save - Aspects in a method and system for no buffered traffic indication for wireless local area network (WLAN) power save may enable a peer communication device to determine a time duration for remaining in an active operating state based on communication with other peer communication devices. In one aspect, a given peer communication device may determine that it has no data to communicate to any of the remaining peer communication devices. The given communication device may communicate to each of the peer communication devices that there is no data to transmit to the peer communication device. Each of the peer communication devices may communicate that there is no data to transmit to the given peer communication device. Based on the communications, the given peer communication device may exit the active operating state and enter a low power operating state. | 03-24-2011 |
20110078469 | METHOD AND APPARATUS FOR LOW POWER OPERATION OF MULTI-CORE PROCESSORS - Embodiments of an apparatus, system and method are described for low power operation of a multi-core processing system. An apparatus may comprise, for example, a power management module operative to initialize a low power mode, detect one or more un-affinitized software threads, and affinitize the one or more un-affinitized software threads to run on a set of processor cores of a multi-core processor, wherein the set of processor cores comprises less than a total number of processor cores of the multi-core processor. Other embodiments are described and claimed. | 03-31-2011 |
20110078470 | Flexible cell battery systems and methods for powering information handling systems - The number of battery cells connected together in a main battery conductor path of a multiple cell battery system of an information handling system may be varied in real time based on one or more operating conditions (e.g., system load power consumption, battery cell failure, etc.) of the information handling system. Defective battery cells may be bypassed such that the defective battery system may continue to operate and power an information handling system at a lower voltage, e.g., either temporarily, permanently or temporarily until the user procures a suitable replacement battery system. Interconnection of cells of a non-defective multiple cell battery system may also be selectively re-arranged to vary battery system voltage at particular times or during particular information handling system operation modes. | 03-31-2011 |
20110078471 | ACCESS CONTROL APPARATUS OF DATA STORAGE DEVICE - An access control apparatus of a data storage device includes a first connecting unit configured to be removably connected with a power supply device, perform data transmission through a first data-transmission line, and be supplied with power through a first power-transmission line, a second connecting unit configured to be removably connected with the data storage device, perform data transmission through a second data-transmission line, and supply power through a second power-transmission line, a data transfer processing unit configured to perform data transfer between the power supply device and the data storage device, a power consumption measuring unit configured to measure power supplied from the power supply device through the first power-transmission line, and a power-transmission capability monitoring unit configured to control the data transfer processing unit in accordance with power consumption measured by the power consumption measuring unit. | 03-31-2011 |
20110078472 | COMMUNICATION DEVICE AND METHOD FOR DECREASING POWER CONSUMPTION - A first communication device determines whether a communication device that is not included in a routing path exists through an exchange of routing information with a plurality of adjacent communication devices. In this case, if a communication device that is not included in a routing path exists, the first communication device notifies a corresponding communication device to operate in a power saving mode, operates to decrease power use that is related to the corresponding communication device, and the communication device, having received the notification operates in a power saving mode. | 03-31-2011 |
20110078473 | LATENCY BASED PLATFORM COORDINATION - In some embodiments, an electronic apparatus comprises at least one processor, a plurality of components, and a policy engine comprising logic to receive latency data from one or more components in the electronic device, compute a minimum latency tolerance value from the latency data, and determine a power management policy from the minimum latency tolerance value. | 03-31-2011 |
20110078474 | METHOD OF CONTROLLING POWER CONSUMPTION OF A MEMORY ACCORDING TO MAPPING - There is provided a method of controlling power consumption of a memory, which is executed in a computer system including operation server and a management server. The operation server includes one or more memory chips which are units to control the power consumption of the memory, a power control module for controlling power consumption of the memory chips, and a virtualization module for operating one or more virtual servers. The management server manages the mapping between the one or more virtual servers and the one or more memory chips. The method comprises the steps of instructing the operation server to change the power consumption of the one or more memory chips based on whether the obtained access information is capable of achieving predetermined target performance and the mapping information, and changing the power consumption of the one or more memory chips based on the instruction from the management server. | 03-31-2011 |
20110078475 | Transitioning a Computing Platform to a Low Power System State - A method which includes initiating a power management policy based on a processing element for a computing platform entering a given power state. The power management policy includes a determination as to whether an input/output (I/O) controller and a memory controller for the computing platform are substantially quiescent. The computing platform may then be transitioned to a low power system state from a run power system state based on a determination that both the I/O controller and the memory controller are substantially quiescent and an indication that the computing platform is capable of entering the low power system state. According to this method, the low power system state includes entering one or more devices responsive to the computing platform in a power level adequate to retain a configuration state that enables the one or more devices to transition back to the run power system state in a manner that is substantially transparent to an operating system for the computing platform. Other implementations and examples are also described in this disclosure. | 03-31-2011 |
20110078476 | KEY INPUT APPARATUS USING A SWITCHING MATRIX - The present invention relates to a key input apparatus for a switching matrix. The present invention includes a column scan control device including switching units connected to the lines in the column scan direction in one-to-one correspondence in response to a column scan signal and an enable signal (EN) from the main controller, and performing a column scan operation for each of the modes according to a switching operation of the switching units of selectively receiving two input voltages (Vup and VA) for each column in normal scan mode and receiving a standby voltage (Vh) in power saving mode; and a row scan control device for performing a row scan in response to a row scan signal from the main controller in synchronization with a column scan signal from the column scan control device in normal scan mode, and operating in power saving mode in response to the enable signal (EN). Accordingly, the key input apparatus of the present invention controls a switch matrix using a switch having a simple construction, thereby providing the advantages of removing the ghost key phenomenon, operating in power saving mode and reducing manufacturing cost. | 03-31-2011 |
20110083024 | Methods and Systems for Power Supply Management - System and methods for controlling power delivery to system components are disclosed. A controller is communicatively coupled to a point-of-load converter through a first communication path and a shared memory is communicatively coupled to the point-of-load converter through a second communication path. A third communication path communicatively couples the controller and the shared memory. Control data is communicated from the controller to the point-of-load converter through the first communication path and measurement data is written from the point-of-load converter to the shared memory through the second communication path. The controller is operable to read the measurement data from the shared memory through the third communication path. | 04-07-2011 |
20110083025 | Anticipatory Power Management for Battery-Powered Electronic Device - Methods and apparatus for managing power consumption of a battery-powered electronic device are disclosed. According to one embodiment, power management can take action to reduce power consumption to accommodate estimated power requirements. According to another embodiment, power management can notify a user when a power deficiency is anticipated. According to still another embodiment, power management can advise a user to charge a battery of the battery-powered electronic device. According to still another embodiment, a user can influence power management by user selections. | 04-07-2011 |
20110087904 | SMART POWER MANAGEMENT SYSTEM AND METHOD THEREOF - The present invention provides a smart power management system, comprising a power management apparatus and at least one electric socket device. The plurality of electric socket devices produce a second wireless signal according to power consumption, and the power management apparatus receives the second wireless signal and computes relevant cost or the carbon footprint information shown on a display unit for reference. In addition, the power management apparatus also compares a setup signal inputted by a user to the second wireless signal, the electricity cost or the carbon footprint information to produce a first wireless signal, thereby controlling the plurality of electric socket devices for providing power supply or stopping power supply. | 04-14-2011 |
20110087905 | Changing Operating State of a Network Device on a Network Based on a Number of Users of the Network - Object To control a network printer such that, when the number of active user computers in the vicinity of the network printer is large, the network printer is set in a standby state and, when that number is small, the network printer is powered off to achieve reduced office power consumption. Solution A method for managing a first unit and one or more other units connected to the first unit over a network is provided. The method includes (i) detecting, by a management unit, an operating state of the other units positioned within a specific range from the first unit on the basis of a location of each of the first and other units over the network, the operating state including at least an operating state at which a service request is capable of being transmitted to the first unit. The method further includes (ii) transmitting, by the management unit, to the first unit, an instruction to change an operating state of the first unit depending on a number of the other units being in the detected operating state at which the service request is capable of being transmitted. | 04-14-2011 |
20110087906 | NETWORK MANAGEMENT APPARATUS - A network management/apparatus connected to a plurality of packet relay apparatuses constituting a group through a network includes an energy saving level calculation unit for calculating an energy saving level of each of the packet relay apparatuses on the basis of a CPU usage ratio of the packet relay apparatus managed or a difference between the present energy saving level and the energy saving level of minimum guarantee of the packet relay apparatus, and an energy saving function setting unit for setting an energy saving function of the packet relay apparatuses on the basis of the energy saving level calculated by the energy saving level calculation unit. | 04-14-2011 |
20110087907 | POWER SAVING METHOD AND APPARATUS - A method and an apparatus for enabling battery power saving in an associated device is disclosed. Said battery saving is enabled by receiving electromagnetic energy carried by a wireless signal, obtaining operating power from the received electromagnetic energy, receiving a data unit over a wireless link, storing the data unit in a memory, and providing the data unit from the memory in response to a memory read request received via an input/output controller. | 04-14-2011 |
20110093726 | Memory Object Relocation for Power Savings - A computer system may manage objects in memory to consolidate less frequently accessed objects into memory regions that may be operated in a low power state where the access times may increase for the memory objects. By operating at least some of the memory regions in a low power state, significant power savings can be realized. The computer system may have several memory regions that may be independently controlled and may move memory objects to various memory regions in order to optimize power consumption. In some embodiments, an operation system level function may manage memory objects based on parameters gathered from usage history, memory topology and performance, and input from applications. | 04-21-2011 |
20110093727 | IMAGE FORMING APPARATUS AND CONTROL METHOD THEREOF - Disclosed is an image forming apparatus includes an imaging forming unit configured to form an image; a main controller configured to control an operation of the imaging forming unit; a USB interface configured to receive and to transmit USB data from and to a host apparatus; a power supply configured to supply power to the image forming unit and the main controller; a switch configured to supply power selectively under the control of the main controller; and a sub controller configured to output a power control signal for turning on the switch if USB data is received from the host apparatus in a sleep mode during which the main controller is turned off. Power consumption is thereby reduced by turning off the power to the main controller in the sleep mode. | 04-21-2011 |
20110093728 | COMPUTER SYSTEM AND CONTROL METHOD THEREOF - A computer system and a control method thereof which activates/inactivates a power management mode depending on a performance of a communication operation by a communication unit to thereby increase a life of a battery and/or retain a high data transmission rate when communicating. The computer system includes a communication unit which receives operating power and performs a network communication with an external device; and a controller which identifies a performance of a communication operation of the communication unit and controls the communication unit to reduce a consumption of the operating power supplied to the communication unit if the communication unit does not perform the communication operation, and controls the communication unit not to reduce the consumption of the operating power supplied thereto if the communication unit performs the communication operation. | 04-21-2011 |
20110099397 | OPERATING POINT MANAGEMENT IN MULTI-CORE ARCHITECTURES - For one disclosed embodiment, a processor comprises a plurality of processor cores to operate at variable performance levels. One of the plurality of processor cores may operate at a performance level different than a performance level at which another one of the plurality of processor cores may operate. Logic of the processor is to monitor activity of one or more of the plurality of processor cores. Logic of the processor is to constrain power of one or more of the plurality of processor cores based at least in part on the monitored activity. Other embodiments are also disclosed. | 04-28-2011 |
20110099398 | INTEGRATED CIRCUIT AND ELECTRONIC APPARATUS - An integrated circuit includes a main processing unit, a peripheral connection port for connecting a peripheral device, and an auxiliary processing unit configured to control the peripheral connection port and to perform controlling of interruption and transmission of data from the peripheral device connected to the peripheral connection port instead of the main processing unit. The main processing section and the peripheral connection portion are connected to each other with an inner bus. The main processing unit uses a memory resource provided in the auxiliary processing unit as a part of an inner memory space of the main processing unit. | 04-28-2011 |
20110107126 | System and method for minimizing power consumption for a workload in a data center - A system and method are disclosed for minimizing power consumption for a workload in a data center having two or more computers. The system and method execute a server-centric management tool that provides a workload-power cost function to predict a cost of running a workload on a server. The workload-power cost function is executed by the processor and includes as an input a unique designation of the server. The workload-power cost function includes as an output the cost of running the workload on the server. The system and method provide the output of the workload-power cost function to a workload placement tool to efficiently place the workload. | 05-05-2011 |
20110107127 | NETWORK RELAY APPARATUS - A network relay apparatus which conducts data transfer by using a plurality of network LSIs includes a transfer engine unit having at least two network LSIs and a central control unit which controls the operation state of the network relay apparatus. The transfer engine unit includes the network LSIs capable of changing over at least one of a clock and an operation which differ every function block, a load judgment unit for judging a load laid upon each of function blocks in the network LSI, and a frequency voltage control unit for individually changing over at least one of the clock and operation voltage supplied to each function block on the basis of the load judged by the load judgment unit. | 05-05-2011 |
20110113270 | Dynamic Voltage and Frequency Scaling (DVFS) Control for Simultaneous Multi-Threading (SMT) Processors - A mechanism is provided for controlling operational parameters associated with a plurality of processors. A control system in the data processing system determines a utilization slack value of the data processing system. The utilization slack value is determined using one or more active core count values and one or more slack core count values. The control system computes a new utilization metric to be a difference between a full utilization value and the utilization slack value. The control system determines whether the new utilization metric is below a predetermined utilization threshold. Responsive to the new utilization metric being below the predetermined utilization threshold, the control system decreases a frequency of the plurality of processors. | 05-12-2011 |
20110113271 | METHOD AND DEVICE FOR THE DYNAMIC MANAGEMENT OF CONSUMPTION IN A PROCESSOR - A method for managing the power consumed in a processor executing an application, the application including several processing phases, each of which is associated with a computational load. The method includes defining a first nominal mode of consumption, defining at least one second mode of low consumption, and formulating a decision function making it possible optionally to switch from the nominal mode of consumption to the mode of low consumption during the transition from one processing phase to another processing phase of the application. | 05-12-2011 |
20110113272 | PROJECTOR AND POWER CONTROL METHOD THEREOF - A projector and a power control method thereof are provided. The projector includes a battery supplying a battery power; an interface receiving and transmitting an external power; a selection unit receiving the battery power and the external power, and selecting and outputting one of the battery power and the external power to be served as the operation voltage of the projector; a lighting element; a driver receiving a driving signal and driving the lighting element accordingly; and a central processing unit (CPU) outputting a control signal with a first state to control the selection unit to select and output the external power when the capacity of the battery is not sufficient and the interface receives the external power, and regulating the intensity of the driving signal outputted from the CPU according to the capacity of the external power so as to make the projector continuously maintain in operation. | 05-12-2011 |
20110113273 | OPERATION MANAGEMENT METHOD OF INFORMATION PROCESSING SYSTEM - In a computer room including information processing devices and air conditioners, power saving of the computer room by means of optimization of workload allocation to the information processing devices is achieved in a short time. There, a coefficient of air conditioner performance with respect to the information processing device (device-specific COP) is calculated for each air conditioner. Further, a device-associated power consumption expression representing a total of device power and air conditioner power is created for each information processing device. Also, power consumption of the entire computer room is calculated from the device-associated power consumption expression of the information processing devices. Also, workload allocation is determined by using power saving performance evaluation indexes based on the device-associated power consumption expression of the information processing devices. Further, output of the air conditioner is controlled based on a result of the air conditioner power calculation. | 05-12-2011 |
20110119508 | Power Efficient Stack of Multicore Microprocessors - A computing system has a stack of microprocessor chips that are designed to work together in a multiprocessor system. The chips are interconnected with 3D through vias, or alternatively by compatible package carriers having the interconnections, while logically the chips in the stack are interconnected via specialized cache coherent interconnections. All of the chips in the stack use the same logical chip design, even though they can be easily personalized by setting specialized latches on the chips. One or more of the individual microprocessor chips utilized in the stack are implemented in a silicon process that is optimized for high performance while others are implemented in a silicon process that is optimized for power consumption i.e. for the best performance per Watt of electrical power consumed. The hypervisor or operating system controls the utilization of individual chips of a stack. | 05-19-2011 |
20110119509 | STORAGE SYSTEM HAVING POWER SAVING FUNCTION - A controller of a storage system associates a portion of the logical area of logical storage devices with one or more pool area of a pool. The frequency of I/O (Input/Output) of any of the portion of the logical areas is higher than the I/O frequency of the remaining logical areas of the logical storage devices. In the event of I/O, if a first physical storage device group which forms the basis of the physical storage devices is in a power saving state, then the controller performs I/O of a data element to/from the pool area corresponding to the logical area of the I/O destination, without canceling the power saving state of the first physical storage device group. | 05-19-2011 |
20110126033 | SYSTEMS AND METHODS FOR ELECTRONIC DEVICE POWER MANAGEMENT - Embodiments of the invention implement one or more power management policies on one or more devices in order intelligently to manage the finite amount of battery power available while maximizing synchronization between connected devices. | 05-26-2011 |
20110126034 | POWER MANAGEMENT UTILIZING PROXIMITY OR LINK STATUS DETERMINATION - Methods and apparatuses for power management are disclosed. In one example, proximity of link status of a wireless communication device is used to determine whether a power conservation mode is implemented. | 05-26-2011 |
20110126035 | ENERGY CONSERVATION CONTROL METHOD FOR NETWORK SYSTEM - In an electric power consumption control method of a plurality of network connection devices connected to a network, the plurality of network connection devices are grouped, and on the basis of the traffic amount of the grouped network connection devices, the grouped network connection devices are controlled by a group unit. | 05-26-2011 |
20110131430 | MANAGING ACCELERATORS OF A COMPUTING ENVIRONMENT - Accelerators of a computing environment are managed in order to optimize energy consumption of the accelerators. To facilitate the management, virtual queues are assigned to the accelerators, and a management technique is used to enqueue specific tasks on the queues for execution by the corresponding accelerators. The management technique considers various factors in determining which tasks to be placed on which virtual queues in order to manage energy consumption of the accelerators. | 06-02-2011 |
20110131431 | SERVER ALLOCATION TO WORKLOAD BASED ON ENERGY PROFILES - Assigning a server among a plurality of servers to a workload. A workload distributor generates at least one energy profile for each server among the plurality of servers. The workload distributor receives a request to assign a workload, the request having a resource requirement. The workload distributor selects a subset of servers by comparing, for each server at least one energy profile to the resource requirement. The workload distributor selects from the subset of servers a selected server based on the workload and/or energy profile. The workload distributor dispatches the workload to the selected server. | 06-02-2011 |
20110131432 | System and Method for Reducing Power Consumption of Memory - Systems and methods for reducing problems and disadvantages associated with power consumption in memory devices are disclosed. A method for reducing power consumption in memory may include tracking, by an operating system executing on a processor, one or more logical units of a memory system that are in use. The method may also include setting, by the operating system, a variable indicating a portion of the memory system in use based on the logical units of the memory system in use. The method may additionally include refreshing one or more of the one or more logical units of the memory system based on the variable. | 06-02-2011 |
20110131433 | METHOD FOR COUNTING VECTORS IN REGULAR POINT NETWORKS - The disclosure relates to a method for estimating the number of leader vectors with norm I | 06-02-2011 |
20110131434 | IMAGE FORMING APPARATUS AND POWER CONTROL METHOD - A fixing unit fixes a toner image transferred onto a recording medium to the recording medium by heating and pressurizing the toner image. An auxiliary power supply unit includes a charging element that is charged by a power supplied from a main power supply unit. Each of the main power supply unit and the auxiliary power supply unit supplies a power to the fixing unit. A power control unit controls the main power supply unit and the auxiliary power supply unit, so that the power supplied from at least one of the main power supply unit and the auxiliary power supply unit to the fixing unit is kept sufficient. | 06-02-2011 |
20110138203 | UNIVERSAL SERIAL BUS APPARATUS FOR LOWERING POWER CONSUMPTION - A universal serial bus (USB) apparatus for lowering power consumption is provided. The universal serial bus apparatus includes a universal serial bus circuitry, a monitor unit, and a system duty clock generator. The monitor unit is used to monitor a start of frame (SOF) packet generated by the universal serial bus circuitry and generates a clock control signal accordingly. The system duty clock generator receives the clock control signal and a reference clock signal to generate a system duty clock signal. The enable or disable status of the system duty clock signal can be determined according to the SOF packet monitored by the monitor unit so as to make the universal serial bus apparatus enter into runtime idle mode to lower the power consumption. | 06-09-2011 |
20110138204 | SYSTEM AND METHOD FOR MESSAGE QUEUE MANAGEMENT IN A POWER-SAVE NETWORK - A method and apparatus for communicating information between networked devices. Various aspects of the present invention may comprise, for example, a first networked device communicating information over a wireless communication network to a second networked device having power-save mode capability. The first networked device receives an incoming message from the second networked device. A first outgoing message is transmitted to the second networked device prior to transmitting a previously queued outgoing message. A second outgoing message is transmitted to the second networked device prior to the previously queued outgoing message being transmitted. Information may be communicated to the second networked device in a particular manner that depends on whether the second networked device has power-save capability. Communication medium access may be performed in a particular manner, depending on whether the second networked device has power-save capability. | 06-09-2011 |
20110138205 | OPTIMIZING PROCESSOR OPERATION IN A PROCESSING SYSTEM INCLUDING ONE OR MORE DIGITAL FILTERS - A method for optimizing processor operation in a processing system including one or more digital filters is provided according to the invention. The method includes generating initial filter coefficients for the one or more digital filters of the processing system, determining one or more initial filter coefficients for at least one digital filter of the one or more digital filters that can be dropped and dropping the one or more initial filter coefficients. Dropping the one or more initial filter coefficients reduces a total number of filter coefficients to be used by the processing system. | 06-09-2011 |
20110145609 | POWER AWARE MEMORY ALLOCATION - A computer system may place memory objects in specific memory physical regions based on energy consumption and performance or other policies. The system may have multiple memory regions at least some of which may be powered down or placed in a low power state during system operation. The memory object may be characterized in terms of access frequency, movability, and desired performance and placed in an appropriate memory region. In some cases, the memory object may be placed in a temporary memory region and later moved to a final memory region for long term placement. The policies may allow some processes to operate while consuming less energy, while other processes may be configured to maximize performance | 06-16-2011 |
20110145610 | POWER SAVING DEVICE AND ALL-IN-ONE PC HAVING THE SAME - A power saving device is configured in an all-in-one PC and has a power module expandably composed of a plurality of Ni-MH cells linked up either in series connection or in parallel connection. When an external alternating power provides power supply for the PC, a charging circuit of the power saving device charges the power module. When the alternating power is out or the PC is operated to enter a power saving mode, a controller of the power saving device notifies the PC to enter the power saving mode, while the power module provides power for the memory and memory controller of the PC with low power consumption. The all-in-one PC consumes little power while in power saving mode and is capable of restoring to its normal mode in short time. The power saving device enhances the all-in-one PC with features of instant-on, long-time standby, and backup power provision. | 06-16-2011 |
20110145611 | METHOD OF MEASURING POWER CONSUMPTION OF ELECTRIC APPLIANCE - A method of measuring power consumption of an electric appliance is provided. The method may include determining an operation mode of the electric appliance, extracting power consumption data corresponding to the determined operation mode of the electric appliance, and calculating an integrated power consumption based on the extracted power consumption data and the operation time of the electric appliance. | 06-16-2011 |
20110145612 | Method and System to Determine and Optimize Energy Consumption of Computer Systems - A method, system and computer program product to manage energy consumption within a computing environment. Energy consumption of different hardware components are measured in the computing environment. Measurement includes voltage and current versus time used by the hardware components. The different measured values of energy consumption are collected, followed by tracking the hardware component used in time during an execution of an individual execution context within the computing environment. The energy consumption of the individual execution context is calculated by associating the corresponding collected measured energy consumption to the hardware component used. | 06-16-2011 |
20110145613 | CONNECTION UNIT FOR PATCH CABLES OF POWER-OVER-ETHERNET NETWORKS - The connection unit is intended for connecting terminals (T) to networks (LAN) that provide electric energy (E) to the terminals (T) connected thereto. The connection unit (AE) is configured for generating electric energy for the connection unit (AE) from the energy (E) provided, and has a switching element (SE) for separating the supply of energy for the terminals (T), wherein the switching element (SE) is controlled via the network (LAN). It is advantageous that the energy supply of the terminals (T) can be separated or switched on via the network (LAN) by means of the switching elements (SE), for example as a function of the presence or the location of users of terminals (T). Since the separations of the energy supply to the terminals may be carried out over longer periods of time, such as during the night, the energy consumption of the terminals (T) or of the networks (LAN) providing the electric energy to the terminals (T) can be reduced significantly. | 06-16-2011 |
20110154071 | METHOD AND APPARATUS FOR POWER PROFILE SHAPING USING TIME-INTERLEAVED VOLTAGE MODULATION - Embodiments of an apparatus, system and method are described for dynamically time-interleaving supply voltage modulation to shape a power profile. An apparatus may comprise, for example, a power management module to monitor power information received from a plurality of devices and send a power control signal including delay information to each device having power information that exceeds a power threshold, the delay information comprising information for time-interleaving power usage among the devices having power information that exceeds the power threshold. Other embodiments are described and claimed. | 06-23-2011 |
20110154072 | DATA STORAGE SYSTEM WITH POWER MANAGEMENT AND METHOD OF OPERATION THEREOF - A method of operation of a data storage system includes: providing a standby power source; detecting activity on a communication channel with an upstream re-driver powered with the standby power source; generating a signal-detect output from the upstream re-driver based on the activity; determining a link status with a power control unit based on the signal-detect output, the power control unit powered with the standby power source; and generating a power output from a power supply unit based on the link status, the power supply unit controlled by the power control unit. | 06-23-2011 |
20110154073 | SYSTEMS AND METHODS FOR ENERGY EFFICIENT LOAD BALANCING AT SERVER CLUSTERS - Methods and systems to balance the load among a set of processing units, such as servers, in a manner that allows the servers periods of low power consumption. This allows energy efficient operation of the set of processing units. Moreover, the process is adaptable to variations in systemic response times, so that systemic response times may be improved when operational conditions so dictate. | 06-23-2011 |
20110154074 | POWER MANAGEMENT METHOD AND COMPUTER SYSTEM APPLYING THE SAME - A power management method adapted in a computer system is provided. The computer system includes a main monitor and a host. A management method includes the following steps. First, whether the main monitor is turned off or not is determined. When the main monitor is turned off, a power saving program is executed to reduce the power of the host. Furthermore, a computer system applying the above power management method is also provided. | 06-23-2011 |
20110161696 | REDUCING ENERGY CONSUMPTION IN A CLOUD COMPUTING ENVIRONMENT - Functionality can be implemented within a cloud manager to leverage energy consumption data of cloud processing and their associated facility resources when selecting computing nodes to complete the job. The cloud manager can determine possible computing nodes to complete the job based on the job attributes. The cloud manager can determine aggregate energy data of the cloud resources from an energy usage database. The cloud manager can analyze the energy usage data to determine a configuration of the computing nodes to perform the job that reduces total energy consumption. For example, a configuration of servers can be based on a number of servers and processor utilization at the servers to perform the job. The cloud manager can assign the job to the servers and set the processor utilization at the servers in accordance with the resource configuration determined to minimize energy consumption. | 06-30-2011 |
20110161697 | METHOD AND SYSTEM FOR DISCOVERABILITY OF POWER SAVING P2P DEVICES - In a method and system, a first wireless device may be periodically cycled between an available state and a power saving state. While in the available state, the first wireless device may receive a probe request sent from a second wireless device operating in a discovery state. The first wireless device may transmit a probe response to the second wireless device. Other embodiments are described and claimed. | 06-30-2011 |
20110161698 | System management controller entry into reduced power state - A system includes an operating system, first hardware, second hardware, and a system management controller, the latter which also may be considered an integrated management module or a baseboard management module. The first hardware executes the operating system and is under control of the operating system. The operating system causes the first hardware to enter a first reduced power state. The second hardware is different than the first hardware and is not under control of the operating system. The system management controller is implemented by the second hardware. In response to the operating system causing the first hardware to enter the first reduced power state, the system management controller causes the second hardware to enter a second reduced power state corresponding to the first reduced power state. The first reduced power state may be a more-power-conserving reduced power state than the second reduced power state. | 06-30-2011 |
20110161699 | Methods and System for Reducing Battery Leakage in an Information Handling System - A method for reducing current leakage in a battery in communication with an information handling system (IHS) is disclosed herein. The method includes providing a battery management unit (BMU) in the battery, the BMU in communication with an embedded controller, wherein the BMU comprises a detector pin. The method further includes placing the BMU in a standby mode to disable power from the battery to the IHS while the battery is coupled to the IHS, and configuring the BMU to exit the standby mode, if an external power supply is coupled to the IHS, to enable battery power from the battery to the IHS. Also disclosed is an information handling system (IHS) which includes an embedded controller operable to initiate a power-on sequence in the IHS, and a battery having a battery management unit (BMU), wherein the BMU is initially placed in a standby mode to disable battery power to the IHS, the BMU in communication with the embedded controller. The system may further include a power switch in communication with the embedded controller and the BMU, and a control switch configured to be switched on if an external power supply is coupled to the IHS or if the power switch is activated without the external power supply, wherein the BMU unit exits the standby mode if the control switch is switched on, thereby enabling battery power to the IHS. | 06-30-2011 |
20110161700 | APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION OF ACCESS POINT FUNCTION IN PORTABLE TERMINAL - An apparatus and a method for operating as a virtual terminal to participate in competition for medium access while a mobile terminal operates as an access point are provided. In a case where the mobile terminal accesses a medium while competing with a terminal that transmits data of low priority, an apparatus and a method for entering a low power mode to resolve a power consumption problem of the mobile terminal are provided. The apparatus includes a medium competing unit, which allows the mobile terminal to operate as a virtual terminal and participate in competition for a medium access when data to be transmitted does not exist in the mobile terminal operating as an Access Point (AP). | 06-30-2011 |
20110161701 | REGULAR OR DESIGN APPLICATION - An electronic timer system includes a counter-based time generator for continuously generating raw base time, and a translator for translating between raw base time and local precise time. The counter-based time generator is driven by an oscillator. The timer system further includes a temperature sensor placed in the proximity of the oscillator or a crystal used by the oscillator, and a look-up control table holding temperature values associated with corresponding control values representative of the configurable parameter value A. The look-up control table is generated when the timer system is synchronized with a synchronization source so that the temperature and control values are characteristic of the operation of the timer system in synchronization. The timer system is also configured for reading, when no synchronization source is available, a temperature value from the temperature sensor, and for extracting, based on the temperature value, a control value from the look-up control table corresponding to a suitable (quantized) representation of the temperature value. The timer system is then able to configure the parameter variable A in accordance with the extracted control value. | 06-30-2011 |
20110161702 | TECHNIQUES FOR ENTERING A LOW-POWER LINK STATE - Techniques to cause a point-to-point link between system components to engage in a negotiation process that may lead to the link transitioning from an active state in which data may be transmitted between system components to a low power state where data may not be transmitted. The negotiation process may occur between each pair of nodes within an electronic system that are interconnected via point-to-point link. The negotiation may ensure that there are no pending transactions or transactions that may occur within an upcoming period of time. Through this negotiation each component acknowledges and agrees to transition the link to the low power state. | 06-30-2011 |
20110161703 | PCI EXPRESS ENHANCEMENTS AND EXTENSIONS - A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses. | 06-30-2011 |
20110167284 | CHARGE SUSPEND FEATURE FOR A MOBILE DEVICE - An electronic device is described comprising connecting means configured to establish a connection to another device, and configured to receive electrical power from the connection and configured to receive information from the other device via the connection and comprising determining means configured to determine a set of limitations, wherein for at least one electronic unit configured to receive electrical power, the set of limitations comprises a limitation of electrical power to be distributed to the at least electronic unit and wherein the determining means is further configured to determine the set of limitations based on the information received from the other device, wherein the received information comprises a request for a reduced power consumption of the electronic device. | 07-07-2011 |
20110167285 | INFORMATION HANDLING SYSTEM INCLUDING WIRELESS SCANNING FEATURE - An information handling system (IHS) is provided which includes a system processor and a wireless section coupled to the system processor. While the system processor remains in a reduced power state, the wireless section is operable to be powered up to detect the presence of a wireless network external to the IHS and determine if that detected wireless network matches a network included in profile information stored in a memory that is accessible by the wireless section. An indicator is coupled to the wireless section and is operable to provide an indication that a wireless network is present. | 07-07-2011 |
20110173467 | SYSTEM AND METHOD FOR CONTROLLING ENERGY USAGE IN A SERVER - A system for controlling energy usage in a server having a processor, where the system includes a memory for storing energy cost information, and a controller for determining a transaction rate for the processor. The controller is also for determining a cumulative of energy expended by the server based on the determined transaction rate for each of a number of available power level states (P-states) for operation of the processor, and for selecting one of the available P-states for operation of the processor based on the determined cumulative energy expended and the stored energy cost information. | 07-14-2011 |
20110173468 | Oversubscribing Branch Circuits While Lowering Power Distribution Costs - A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element. | 07-14-2011 |
20110173469 | CONTROL APPARATUS AND CONTROL METHOD FOR VEHICLE - A vehicle equipped with a power source system including a master power source and a slave power source connected in parallel to a motor for running is provided. In a case where distribution of discharge power of the master power source and discharge power of the slave power source cannot be controlled, when a voltage difference between the respective power sources is greater than or equal to a certain value, an ECU sets a limit value on electric power supplied from the power source system to the motor at allowable discharge power of one of the power sources having a higher voltage, and limits a motor torque such that electric power discharged from the power source system to the motor does not exceed the set limit value. | 07-14-2011 |
20110179294 | MULTIFUNCTIONAL DEVICE AND CONTROL METHOD - In a multifunctional device, a packet analysis unit determines whether a received packet contributes to inhibition of a power saving mode, stores the time at which a packet is received and information indicating whether a packet is received during the power saving mode as information about the packet determined as contributing to the inhibition thereof, and calculates a period of access by a plurality of packets based on the stored information about the packet and a factor analysis unit classifies the access of which the calculated period is shorter than the waiting time of the power saving mode into an access inhibiting a shift to the power saving mode and classifies the access of which the period is not shorter than the waiting time of the power saving mode and which is made by the packet received during the power saving mode, into an access returning from the power saving mode. | 07-21-2011 |
20110179295 | METHOD, APPARATUS AND SYSTEM TO DYNAMICALLY CHOOSE AN OPTIMUM POWER STATE - Some embodiments of the invention include an apparatus and method for dynamically choosing an optimum power state. In some embodiments, the optimum power state may be determined from historical information about the various power states that any of the embodiments of the apparatus or a system equipped with embodiments of the apparatus or operating embodiments of the method may encounter. Some embodiments may generate registers to maintain information regarding the various power states. In some embodiments, power management logic may determine the optimum power state based upon this information. Other embodiments are described. | 07-21-2011 |
20110179296 | SYSTEMS, METHODS AND DEVICES FOR LIMITING CURRENT CONSUMPTION UPON POWER-UP - Embodiments are described including those for controlling peak current consumption of a multi-chip memory package during power-up. In one embodiment, each memory device of the multi-chip package includes a power level detector used to compare an internal voltage signal to a threshold. A current limiter controls the ramping rate of the internal voltage signal in response to the power level detector as the internal voltage signal ramps up towards the threshold. | 07-21-2011 |
20110185201 | STORAGE SYSTEM AND ITS POWER CONTROL METHOD - In the process of controlling a plurality of storage devices | 07-28-2011 |
20110185202 | Mobile Computing Device and Method for Maintaining Application Continuity - A method of maintaining application continuity ( | 07-28-2011 |
20110185203 | METHOD AND APPARATUS FOR POWER CONTROL - Embodiments of the present invention relate to limiting maximum power dissipation occurred in a processor. Therefore, when an application that requires excessive amounts of power is being executed, the execution of the application may be prevented to reduce dissipated or consumed power. Example embodiments may stall the issue or execution of instructions by the processor, allowing software or hardware to reduce the power of an application by imposing a decrease in the performance of the application. | 07-28-2011 |
20110185204 | CONTROL OF ACCESSORY COMPONENTS BY PORTABLE COMPUTING DEVICE - A portable computing device (PCD) can control the operating state of a component within an accessory. For example, an accessory can have some components (e.g., a video processor) that are used for some operations but not for others. A PCD can determine whether a particular component will be used and can instruct the accessory to set the component to a desired state, e.g., powered up when in use and powered down when not in use. In some embodiments, the PCD can use status information provided by the accessory in determining a desired state for the accessory component. For example, in the case of a video converter accessory, if no display device or other video receiver is connected to the accessory, a video processor within the accessory can be powered down. | 07-28-2011 |
20110185205 | POWER-SAVING DISPLAY INFORMATION CONVERTING SYSTEM AND METHOD - Display information to be displayed by a display device having a power consumption model is converted according to a power-saving conversion model and the power consumption model, such that the power consumption of the display device for displaying the converted display information is lower than that for displaying the original display information. | 07-28-2011 |
20110185206 | MULTIPLE VOLTAGE GENERATOR AND VOLTAGE REGULATION METHODOLOGY FOR POWER DENSE INTEGRATED POWER SYSTEMS - An integrated power system suitable for simultaneously powering marine propulsion and service loads. The system includes: (a) at least one generator configured with at least first and second armature windings configured to output respective first and second alternating current power signals of different voltages, the at least two armature windings positioned within the same stator slots so that they magnetically couple; (b) at least first and second rectifier circuits coupled to said generator to convert said first and second alternating current power signals into first and second direct current power signals; (c) a first load to which said first direct current power signal is coupled and a second load to which said second direct current power signal is coupled. | 07-28-2011 |
20110191611 | MOBILE COMMUNICATION TERMINAL AND METHOD FOR DISPLAYING ICONS ON DISPLAY OF MOBILE COMMUNICATION TERMINAL - A mobile communication terminal configured to run a plurality of application programs is provided, which includes an operation section configured to be operated by a user, a display section configured to display a plurality of icons individually corresponding to the respective programs, a first memory in which a history of use of the programs can be stored, a second memory in which an arrangement of the icons displayed on the display section can be stored, an updating section configured to update the arrangement of the icons stored in the second memory on the basis of the history of use of the programs stored in the first memory, and a display controller configured to display the icons on the display section in accordance with the arrangement stored in the second memory upon the operation section being operated by the user in a specific manner. | 08-04-2011 |
20110191612 | POWER SUPPLY SYSTEM, ELECTRONIC APPARATUS, AND METHOD FOR CONTROLLING POWER SUPPLY SYSTEM - A power supply system includes a plurality of power supply units that each includes an output terminal connected each other in parallel to other output terminals each included in other power supply units and connected to a plurality of load units, a power supply section that inputs an input voltage and outputs a first output voltage from the output terminal to the plurality of load units, and a shut-off control section that shuts off the output of the first output voltage from the output terminal based on an inputted stand-by signal, and a management control unit that inputs a configuration information representing a configuration of each of the plurality of load units in which the first voltage is inputted, and outputs the stand-by signal to any of the plurality of power supply units based on the configuration information. | 08-04-2011 |
20110191613 | COMMUNICATION APPARATUS AND METHOD OF CONTROLLING COMMUNICATION APPARATUS - A communication apparatus which is connected to an information processing apparatus so as to operate dependent on the information processing apparatus and connects the information processing apparatus and an external apparatus, includes a judgment unit which judges instruction information transmitted from the external apparatus, a storage unit which stores the instruction information, a transmission unit which detects whether the information processing apparatus is in a normal state in which power is consumed normally or a power-saving state in which power consumption is reduced, and transmits the instruction information stored by the storage unit to the information processing apparatus when the information processing apparatus is in the normal state, and a switching unit which switches the communication apparatus to the normal state if the judgment unit judges that the instruction information is an instruction for directing the operation when the communication apparatus is in the power-saving state. | 08-04-2011 |
20110191614 | COMMUNICATION APPARATUS - A communication apparatus that is to be connected to a network includes: a first processing unit configured to transition between a sleep state and a non-sleep state and configured to process a packet received via the network when the first processing unit is in the non-sleep state; and a second processing unit configured to process a packet when the first processing unit is in the sleep state, wherein the second processing unit is capable of executing packet-processing for sequentially processing of unprocessed packets, wherein the second processing unit includes a detecting section that detects a reception of the unprocessed packet, wherein, when the first processing unit is in the sleep state and the reception of the unprocessed packet is detected, the second processing unit starts the packet-processing, and wherein, the second processing unit terminates the packet-processing if a continuous packet-processing period exceeds an allowable time period. | 08-04-2011 |
20110197083 | STORAGE SYSTEM COMPRISING POWER SAVING FUNCTION - A storage system constituted such that power saving to an administrator-desired storage device can be performed from a management device. That is, the storage system comprises a power-saving indication receiving section for receiving from a management console a power-saving indication specifying at least one storage device of a plurality of RAID groups, a plurality of logical units, and a plurality of physical storage devices; and a power-saving controller for saving on power to one or more physical storage devices corresponding to the storage device specified in this power-saving indication. | 08-11-2011 |
20110202780 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface. | 08-18-2011 |
20110208984 | PROTOCOL STACK POWER OPTIMIZATION FOR WIRELESS COMMUNICATIONS DEVICES - User experiences on wireless devices are affected by communication, computation, and user interface capabilities. Another key performance indicator of a wireless device is its battery life. A method, algorithm and apparatus for improving the communication, computation and user interface capabilities of a mobile device is disclosed, which requires the expenditure of less energy and increases battery life. The trade-off between battery life and user experience related to the communication capability is managed by a protocol stack power optimization algorithm that optimally allocates energy resources. The power management algorithm inputs and combines measurements made at various layers of the protocol stack to selectively control a set of actions impacting energy usage. The algorithm maps from a set of measurements to a set of actions that provides the best trade-off between user experience and energy consumption. | 08-25-2011 |
20110208985 | Low Power Mode for a Network Interface - A network interface including: a medium access control device configured to operate at a first power state during an inactive power mode, and operate at a second power state during an active power mode; a physical layer device including (i) an energy detect module configured to detect energy on a medium during the inactive power mode, and (ii) an energy save module configured to time a first pre-determined period subsequent to the energy detect module detecting energy on the medium. The medium access control device is further configured to, subsequent to the energy detect module detecting energy on the medium, transition to the second power state of the active power mode, and communication with the medium access control device via the medium is enabled subsequent to expiration of the first pre-determined period. | 08-25-2011 |
20110213993 | Data processing apparatus and method for transferring workload between source and destination processing circuitry - In response to a transfer stimulus, performance of a processing workload is transferred from a source processing circuitry to a destination processing circuitry, in preparation for the source processing circuitry to be placed in a power saving condition following the transfer. To reduce the number of memory fetches required by the destination processing circuitry following the transfer, a cache of the source processing circuitry is maintained in a powered state for a snooping period. During the snooping period, cache snooping circuitry snoops data values in the source cache and retrieves the snoop data values for the destination processing circuitry. | 09-01-2011 |
20110213994 | Reducing Power Consumption of Distributed Storage Systems - Methods for reducing the power consumption of distributed storage systems are described. An embodiment describes a storage system which is adapted to reduce its power consumption at times of low load by reducing the number of active versions of the stored data. The data to be stored in the storage system is divided into chunks and in an example, each chunk is replicated on a number of different servers. At times of low load, the system enters a mode of operation in which the number of active replicas is reduced and servers that do not store any active replicas are put into a low power state. When in this mode, writes are written to a versioned store and the data is subsequently copied to servers storing replicas once all the servers have returned to normal power state. | 09-01-2011 |
20110213995 | Method, Apparatus And Computer Program Product Providing Instruction Monitoring For Reduction Of Energy Usage - A method is disclosed to operate a power advisor. The method includes, reading a first instruction set; reading a data bus; and reading register value(s) stored in at least one data register. This information is analyzed for energy usage purposes. If a set of instruction can provide the same result with a lower energy usage, the first instruction set is replaced with the lower power usage instruction set. An apparatus and computer program product are also disclosed. | 09-01-2011 |
20110219246 | INFORMATION PROCESSING UNIT INCLUDING SMT-ENABLED CPU AND ITS POWER CONSUMPTION REDUCTION METHOD - An information processing unit includes a processing unit including a plurality of processor cores; and a power consumption reduction device configured to reduce power consumption of the processing unit. The power consumption reduction device measures the loads on threads that are running in the plurality of cores; checks the number of high load threads which are threads in a high load state and the number of low load threads which are threads in a low load state for each core, on the basis of the measuring results; selects, when there exists a core having high load threads whose number is less than a preset threshold on the number of high load threads, the core as a candidate core; and replaces the high load threads existing in the candidate core with the low load threads existing in other cores when the total number of the low load threads in a core other than the candidate core is not less than the number of the high load threads in the candidate core. | 09-08-2011 |
20110219247 | FORCED IDLE OF A DATA PROCESSING SYSTEM - Exemplary embodiments of methods and apparatuses to manage a power of a data processing system are described. One or more constraint parameters of a system are monitored. The data processing system is forced into an idle state for a first portion of a time while allowed to operate for a second portion of the time based on the one or more constraint parameters, wherein the system is forced into the idle state in response to comparing a target idle time to an actual idle time. The target idle time of the system is determined, in one embodiment, based on the one or more constraint parameters. The actual idle time of the system may be monitored to take into account interrupts which disrupt an idle time and idle times resulting from no software instructions to execute. The system may be allowed to operate based on comparisons of the target idle time and the actual idle time. | 09-08-2011 |
20110225438 | COMPUTER PROGRAM PRODUCT FOR CONTROLLING A STORAGE DEVICE HAVING PER-ELEMENT SELECTABLE POWER SUPPLY VOLTAGES - A computer program product for controlling a storage device using per-element selectable power supply voltages provides energy conservation in storage devices while maintaining a particular performance level. The storage device is partitioned into multiple elements, which may be sub-arrays, rows, columns or individual storage cells. Each element has a corresponding virtual power supply rail that is provided with a selectable power supply voltage. The power supply voltage provided to the virtual power supply rail for an element is set to the minimum power supply voltage unless a higher power supply voltage is required for the element to meet performance requirements. A control cell may be provided within each element that provides a control signal that selects the power supply voltage supplied to the corresponding virtual power supply rail. The state of the cell may be set via a fuse or mask, or values may be loaded into the control cells at initialization of the storage device. | 09-15-2011 |
20110225439 | SIGNAL CORRECTION APPARATUS - A signal correction apparatus receives an input audio signal (serving as a first sound reception means). The signal correction apparatus computes, at every frequency, first power that indicates magnitude of sound represented by the input audio signal (serving as a first power computation means). The signal correction apparatus estimates a correction function that is a continuous function defining a relation between each frequency and a correction coefficient used to approximate the first power computed at that frequency to the reference power predetermined for that frequency (serving as a correction function estimation means). The signal correction apparatus multiplies the computed first power by the correction coefficient acquired in accordance with the relation defined by the estimated correction function so as to correct the first power at every frequency (serving as a power correcting means). | 09-15-2011 |
20110231682 | POWER MANAGEMENT METHOD AND RELATED POWER MANAGEMENT SYSTEM - A power management method is disclosed. The power management method comprises the step of a computer system checking existence of a manufacturing identifier (ID) of a human interface device (HID) when the computer system is operated in a first mode; the computer system continuously detecting whether the HID exist when the manufacturing ID exists; the computer system starting a timer when the computer system detects that the HID does not exist; the computer system entering a second mode when the timer expires; the HID determining whether the computer system is operated in the second mode, when plugged into the computer system; the HID performing state transition on the computer system when determining that the computer system is in the second mode; and the computer system entering the first mode when detecting the state transition. | 09-22-2011 |
20110231683 | STORAGE APPARATUS AND A DATA MANAGEMENT METHOD EMPLOYING THE STORAGE APPARATUS - A storage apparatus is provided that is capable of reducing data maintenance management costs with a performance that is both highly reliable and fast. The present invention is storage apparatus where an intermediary device is arranged between a controller and a plurality of disk devices of different performances arranged in a hierarchical manner. The controller unit carries out I/O accesses to and from the disk devices via the intermediary devices based on access requests sent from host apparatus. The intermediary device includes a power saving control function for the disk device and carries out operation control such as spin off and spin up of disk devices in accordance with conditions set in advance. | 09-22-2011 |
20110231684 | Methods and apparatus for managing and controlling power consumption and heat generation in computer systems - A method for reducing power consumption and heat generation in a computer system employs a substitute idle task that puts the processor into a dormant mode, e.g., sleep, nap, or doze mode. The substitute idle task replaces a conventional operating system idle task. The substitute idle task may have a low priority, such as that of the conventional idle task, which it replaces. At each occurrence of a quantum interrupt, a task scheduler schedules applications for execution during the accompanying time slice. After the scheduled applications are done, the substitute idle task is executed. The dormant mode caused by the idle task reduces the system's power consumption. The idle task may also have a high priority and be designed to run for a predetermined percentage of time. As the processor spends the predetermined percentage of time in the dormant mode, known power consumption reduction may be guaranteed in the system. | 09-22-2011 |
20110239013 | POWER MANAGEMENT OF DATA PROCESSING RESOURCES, SUCH AS POWER ADAPTIVE MANAGEMENT OF DATA STORAGE OPERATIONS - A system and method for performing power conservation actions is described. In some examples, the system determines a power conservation policy based on information from the system, and implements that policy in an enterprise or in one or more buildings, such as within a data storage environment. In some examples, the system adds or modifies global filters or system performance based on information from the system. | 09-29-2011 |
20110239014 | POWER MANAGEMENT FOR INPUT/OUTPUT DEVICES - A method for managing power consumption by a network device is disclosed. The network device includes first and second ports, each of the first and second ports identified by a unique identifier and adapted to handle separate network traffic. The method includes verifying that the first and the second ports are connected to a common network end node; shutting off a link between the first port and the network end node; obtaining the unique identifier of the first port; creating, on the second port, a virtual port in response to the unique identifier of the first port; discovering the virtual port on the network device; and redirecting traffic formerly routed through the link through the virtual port. | 09-29-2011 |
20110239015 | Allocating Computing System Power Levels Responsive to Service Level Agreements - A computer program product for initiating a task in a computer system including executing a method that includes receiving a task and a status of the task relative to a target service level. A current power state of the processor is determined. Execution of the task is initiated on the processor in response to the status indicating that the task is meeting the target service level and to the current power state being a low power state. It is determined if the processor can be moved into a high power state, the determining performed if the task is not meeting the target service level and the current power state is the low power state. If the processor can be moved into the high power state then the processor is moved into the high power state and execution of the task is initiated on the processor. | 09-29-2011 |
20110239016 | Power Management in a Multi-Processor Computer System - Power management in a multi-processor computer system, including a computer program product for facilitating receiving a task for execution in a high power state, and determining a current power state of a processor in a multi-processor system, the system having a specified power limit. The task is dispatched to the processor if the current power state of the processor is the high power state. If the processor is not in the high power state, then it is determined if moving the processor into the high power state will cause the multi-processor system to exceed the specified power limit. The processor is moved into the high power state in response to determining that moving the processor into the high power state will not cause the multi-processor system to exceed the specified power limit. The task is dispatched to the processor in response to moving the processor into the high power state. | 09-29-2011 |
20110239017 | SCHEDULING AN APPLICATION FOR PERFORMANCE ON A HETEROGENEOUS COMPUTING SYSTEM - The invention concerns scheduling an application comprised of precedence constrained parallel tasks on a high-performance computer system. The computer system has a plurality of processors each enabled to operate on different voltage supply levels. First, a priority order for the tasks based on the computation and communication costs of the tasks is determined. Next, the based on the priority order of the tasks, assigning each task both a processor and a voltage level that substantially minimises energy consumption and completion time for performing that task when compared to energy consumption and completion time for performing that task on different combinations of processor and voltage level. It is an advantage of the invention that the scheduling takes account not only completion time (makespan), but also energy consumption. Aspects of the invention include a method, software, a scheduling module of a computer and a schedule. | 09-29-2011 |
20110252251 | Hardware Automatic Performance State Transitions in System on Processor Sleep and Wake Events - In an embodiment, a power management unit (PMU) may automatically transition (in hardware) the performance states of one or more performance domains in a system. The target performance states to which the performance domains are to transition may be programmable in the PMU by software, and software may signal the PMU that a processor in the system is to enter the sleep state. The PMU may control the transition of the performance domains to the target performance states, and may cause the processor to enter the sleep state. In an embodiment, the PMU may be programmable with a second set of target performance states to which the performance domains are to transition when the processor exits the sleep state. The PMU may control the transition of the performance domains to the second targeted performance states and cause the processor to exit the sleep state. | 10-13-2011 |
20110252252 | SYSTEM AND METHOD FOR IDENTIFYING AND REDUCING POWER CONSUMPTION BASED ON AN INACTIVITY PERIOD - A system and method for identifying and reducing power consumption in a rendering device based on an inactivity period. Historical data based on a customer usage pattern can be analyzed to detect the inactivity period (e.g., end of day) and to intelligently force the device into a lower energy state. A sleep and low power time can be calculated and a sleep and low power time out period can be reduced to a minimum value based on the inactivity period. | 10-13-2011 |
20110252253 | ENERGY SAVING CIRCUIT OF MOTHERBOARD - A voltage regulating circuit converts a first voltage and provides the converted first voltage to a first voltage pin of a north bridge chip after receiving a control signal from a south bridge chip. A second voltage pin of the north bridge chip is connected to a voltage converting circuit for receiving a second voltage. The logic control circuit receives a control signal from the super I/O chip and outputs a first control signal to turn on the switch to connect the first and the second voltage pins together. The logic control circuit also outputs a second control signal to the voltage regulating circuit to control the voltage regulating circuit to stop providing the converted first voltage to the first voltage pin of the north bridge chip. The voltage converting circuit provides the second voltage to the first voltage pin of the north bridge chip via the switch. | 10-13-2011 |
20110252254 | COMPUTER SYSTEM - Provided is a computer system in which power consumption of the system can be reduced and which can smoothly supply data for a request from a client and avoid increase in a failure rate. In the computer system, by maintaining a power activation threshold for activating a stopping server blade and load balance threshold for assigning the request to a server blade, a server blade whose power is activated but to which the request from the client is not assigned is previously arranged. Priorities of the server blades are maintained, and are periodically changed or are changed in accordance with operation information such as total operation time and the number of times of activation/stop. Further, by maintaining the power activation threshold and a power stop threshold, possibilities of the unbalance among the activated/stopped server blades and frequent control of the activation/stop only in a part of server blades are avoided. | 10-13-2011 |
20110252255 | Methods And Apparatuses For Reducing Step Loads Of Processors - Methods and apparatuses for reducing step loads of processors are disclosed. Method embodiments comprise examining a number of instructions to be processed by a processor to determine the types of instructions that it has, calculating power consumption by in an execution period based on the types of instructions, and limiting the execution to a subset of instructions of the number to control the quantity of power for the execution period. Some embodiments may also create artificial activity to provide a minimum power floor for the processor. Apparatus embodiments comprise instruction type determination logic to determine types of instructions in an incoming instruction stream, a power calculator to calculate power consumption associated with processing a number of instructions in an execution period, and instruction throttling logic to control the power consumption by limiting the number of instructions to be processed in the execution period. | 10-13-2011 |
20110258468 | OPTIMIZING POWER MANAGEMENT IN PARTITIONED MULTICORE VIRTUAL MACHINE PLATFORMS BY UNIFORM DISTRIBUTION OF A REQUESTED POWER REDUCTION BETWEEN ALL OF THE PROCESSOR CORES - Handling requests for power reduction by first enabling a request for an amount of power change, e.g. reduction by any partition. In response to the request for power reduction, an equal proportion of the whole amount of power reduction is distributed between each of a set of cores providing the entitlements to the partitions, and the entitlement of the requesting partition is reduced by an amount corresponding to the whole amount of the power change. | 10-20-2011 |
20110258469 | POWER REDUCTION FOR SYSTEM ON CHIP - Disclosed herein are SOC devices with peripheral units having power management logic. | 10-20-2011 |
20110264933 | METHOD AND APPARATUS FOR OPTIMAL ALLOCATION OF OPERATING POWER ACROSS MULTIPLE POWER DOMAINS OF A HANDHELD DEVICE - A method and apparatus for power management in a handheld device having various power domains, including an attachable/detachable peripheral device. The power source has an available power amount. The method comprises receiving an indication of a power management event at the handheld device related to operation of a power domain, identifying a predetermined power signature associated with operation of the power domain, determining whether the available power amount is sufficient to operate the power domain in accordance with the predetermined power signature, reducing a power state of another functional upon determining that the available power is insufficient, and allocating the reduced power amount to the first power domain of the handheld device for operation according to the predetermined power signature. | 10-27-2011 |
20110264934 | METHOD AND APPARATUS FOR MEMORY POWER MANAGEMENT - A method for power management is disclosed. The method may include monitoring requests for access to a memory of a memory subsystem by one or more processor cores; and monitoring requests for access to the memory conveyed by an input/output (I/O) unit. The method may further include determining if at least a first amount of time has elapsed since any one of the processor cores has asserted a memory access request and determining if at least a second amount of time has elapsed since the I/O unit has conveyed a memory access request. A first signal may be asserted if the first and second amounts of time have elapsed. A memory subsystem may be transitioned from operating in a full power state to a first low power state responsive to assertion of the first signal. | 10-27-2011 |
20110264935 | System And Method For Dynamic Utilization-Based Power Allocation In A Modular Information Handling System - Power from a modular chassis to plural modular information handling systems contained by the chassis is dynamically allocated according to power consumed at each modular information handling system and a priority associated with each modular information handling system. A power manager of the modular chassis allocates power by setting a maximum power for each modular information handling system based upon a priority for each modular information handling system. A power monitor on a modular information handling system requests additional power allocation if power consumed is within a predetermined amount of the maximum power for that system. The power manager allocates additional power in response to the request if another modular information handling system has excess power allocated or if the requesting modular information handling system has a higher priority than another modular information handling system. The requesting system's maximum power is increased and the other system maximum power is decreased so that the maximum power available from the chassis is not exceeded. | 10-27-2011 |
20110271126 | Data processing system - A data processing apparatus is provided comprising first processing circuitry, second processing circuitry and shared processing circuitry. The first processing circuitry and second processing circuitry are configured to operate in different first and second power domains respectively and the shared processing circuitry is configured to operate in a shared power domain. The data processing apparatus forms a uni-processing environment for executing a single instruction stream in which either the first processing circuitry and the shared processing circuitry operate together to execute the instruction stream or the second processing circuitry and the shared processing circuitry operate together to execute the single instruction stream. Execution flow transfer circuitry is provided for transferring at least one bit of processing-state restoration information between the two hybrid processing units. | 11-03-2011 |
20110271127 | METHOD FOR MANAGING ENERGY CONSUMPTION FOR MULTIPROCESSOR SYSTEMS - The invention relates to a method for the on-line management of energy consumption for multiprocessor systems, the method executing at least one application according to a chart of tasks, wherein the method includes, for each application: a first phase for the off-line characterization of the variation of the potential rate of parallelism of execution of the tasks as a function of time, this characterization being based on the worst-case task execution times; and a second phase for the on-line detection and exploitation of the inactivity intervals and of the potential time excesses. A DPM technique makes it possible to determine the duration of the inactivity interval during which a processor may remain inactive according to the potential rate of parallelism characterized in the worst case. | 11-03-2011 |
20110276813 | COMMUNICATION DEVICE - A communication device includes a main processing unit and a sub-processing unit. The main processing unit includes a main performing unit that acquires time information indicating a performance time, stores the time information in a time information storing unit, sets a timer unit to detect that it is the time indicated by the time information, and performs the process when detecting that it is the time, and a power saving determining unit that transmits a report of detecting that a power saving performance condition is satisfied to the sub-processing unit. The sub-processing unit includes a power control unit that stops the supply of power to the main processing unit when receiving the report that the power saving performance condition is satisfied, and restarts the supply of power when the timer unit detects that it is the time indicated by the time information of the time information storing unit. | 11-10-2011 |
20110276814 | COMMUNICATION DEVICE - Provided is a communication device connected to a network access device constituting a network and capable of communication through the network, includes: a circumstance determining unit that determines whether or not the network is in a circumstance of executing a protocol causing blocking of communication on the network by changing the link speed to the network access device; a power saving determining unit that determines whether or not a predetermined power saving performance condition is satisfied; and a link speed control unit that maintains the link speed when it is determined that the power saving performance condition is satisfied and when the network is in the circumstance of executing the protocol. | 11-10-2011 |
20110276815 | INTERFACE FREQUENCY MODULATION TO ALLOW NON-TERMINATED OPERATION AND POWER REDUCTION - Embodiments of the invention are generally directed to systems, methods, and apparatuses for using interface frequency modulation to allow non-terminated operation and power reduction. In some embodiments, an apparatus includes an interface having a termination mode and a power management controller coupled with the interface. The apparatus may also include a power management controller coupled with the interface. In some embodiments, the power management controller is capable of dynamically reducing the operating frequency of the interface and disabling the termination mode to reduce the power consumed by the interface. Other embodiments are described and claimed. | 11-10-2011 |
20110283123 | STORAGE APPARATUS AND CONTROL METHOD OF STORAGE SYSTEM - The present invention achieves appropriate power saving of the storage systems in accordance with the user's needs. In a storage system | 11-17-2011 |
20110289329 | LEVERAGING SMART-METERS FOR INITIATING APPLICATION MIGRATION ACROSS CLOUDS FOR PERFORMANCE AND POWER-EXPENDITURE TRADE-OFFS - Managing power expenditures for hosting computer applications. A smart meter can receive electricity pricing information for a data center or other group of computing resources that host computer applications, such as a cloud computing environment. An application manager to determine how much electricity can be saved by operating the applications at a reduced performance level without compromising performance metrics for the applications. A site broker can determine how to sequence the performance levels of the applications to meet an electricity usage budget or to otherwise reduce electricity consumption or costs, for example during a peak load time period. The site broker can also select one or more applications to migrate to another cloud to meet the electricity usage budget or to reduce electricity consumption or costs. A hybrid cloud broker can interact with the site broker to migrate the selected application(s) to another cloud. | 11-24-2011 |
20110289330 | METHOD AND APPARATUS FOR POWER-EFFICIENCY MANAGEMENT IN A VIRTUALIZED CLUSTER SYSTEM - A method for power-efficiency management in a virtualized cluster system is disclosed, wherein the virtualized cluster system comprises a front-end physical host and at least one back-end physical host, and each of the at least one back-end physical host comprises at least one virtual machine and a virtual machine manager for managing the at least one virtual machine. In the method, flow characteristics of the virtualized cluster system are detected at a regular time cycle, then a power-efficiency management policy is generated for each of the at least one back-end physical host based on the detected flow characteristics, and finally the power-efficiency management policies are performed. The method can detect the real-time flow characteristics of the virtualized cluster system and make the power-efficiency management policies thereupon to control the power consumption of the system and perform admission control on the whole flow, thereby realizing optimal power saving while meeting the quality of service requirements, so that a virtualized cluster system with high power-efficiency can be provided. | 11-24-2011 |
20110296211 | DATA PROCESSOR HAVING MULTIPLE LOW POWER MODES - A processor includes a first virtual terminal, a second virtual terminal, circuitry coupled to the first virtual terminal for providing current to the first virtual terminal, a first regulating transistor coupled between the first virtual terminal and the second virtual terminal, a first disabling transistor coupled in parallel with the first regulating transistor for selectively disabling the first regulating transistor by directly connecting the second virtual terminal to the first virtual terminal, a second regulating transistor coupled between the second virtual terminal and a first power supply voltage terminal, and a second disabling transistor coupled in parallel with the second regulating transistor for selectively disabling the second regulating transistor by directly connecting the second virtual terminal to the first power supply voltage terminal. | 12-01-2011 |
20110296212 | Optimizing Energy Consumption and Application Performance in a Multi-Core Multi-Threaded Processor System - A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters. | 12-01-2011 |
20110296213 | Enterprise power management method and system and power manager for use therein - A method and system for managing power in an enterprise environment based on individual office worker schedules. In one aspect, the system includes a power manager, a plurality of client devices operatively coupled with the power manager and a plurality of managed elements operatively coupled with the power manager, wherein the power manager receives from the client devices individual worker schedule information and generates based at least in part on the individual worker schedule information a list of scheduled events having associated managed elements and power profiles, and wherein in response to a start time of a scheduled event the power manager adjusts a power state of one or more managed elements associated with the scheduled event in accordance with a power profile associated with the scheduled event. | 12-01-2011 |
20110296214 | POWER SAVINGS AND/OR DYNAMIC POWER MANAGEMENT IN A MEMORY - An apparatus comprising a plurality of buffers and a memory controller. The plurality of buffers may each be configured to generate an access request signal in response to a respective one of a plurality of channel requests received from a respective one of a plurality of clients. The memory controller circuit may be configured to generate a clock enable signal in response to the plurality of access request signals. The clock enable signal may be configured to initiate entering and exiting a power savings mode of a memory circuit. | 12-01-2011 |
20110302432 | SUPER CAPACITOR SUPPLEMENTED SERVER POWER - Super capacitor supplemented server power is described. In embodiments, a power system manager is implemented to monitor the capability of one or more power supplies to provide power for a server system. The power system manager can determine that the capability of the power supplies to provide the power is deficient, and then engage one or more super capacitor power modules to provide supplemental power for the server system to mitigate the power deficiency. | 12-08-2011 |
20110302433 | CONTROL CIRCUIT OF POWER-SAVING SOCKET - A control circuit is provided for a power-saving socket and includes a central processing unit, a relay, a sensor unit, a time counting unit, a standby current setting unit, and a current monitoring unit. The central processing unit, upon receiving a human approaching signal from the sensor unit, issues a control signal to the relay to switch a contact of the relay to a closed condition, whereby an electrical appliance plugged to the socket is allowed to operate. When the electrical appliance plugged to the socket stays in a standby mode, the central processing unit receives a current value from the current monitoring unit, which is equal to or smaller than an appliance standby current level, and the time counting unit starts time counting for a specific period of time. Once the detected current value from the current monitoring unit maintains equal to or smaller than the appliance standby current level within the whole specific period of time, the central processing issues a control signal to the relay to switch the contact of the relay to an open condition, whereby power supplied to the electrical appliance plugged to the socket is completely cut off and the electrical appliance consumes no standby power. In this way, power saving can be achieved. | 12-08-2011 |
20110302434 | METHOD AND DEVICE OF POWER SAVING FOR TRANSMITTING SIGNALS - A method and device of the power saving for transmitting a signal is provided. The method comprises the steps of: transmitting a test signal with a first test amplitude from a local terminal, wherein the first test amplitude is selected from a plurality of preset amplitudes; acknowledging that the test signal with the first test amplitude has been received by a remote terminal if an acknowledgement signal is transmitted from the remote terminal for a response to the test signal; and transmitting a data signal having a data amplitude based on the first test amplitude. The device can transmit the data signal with a small data signal amplitude by the method to achieve the saving power. | 12-08-2011 |
20110302435 | POWER MANAGEMENT METHOD AND APPARATUS, AND POWER SUPPLY SYSTEM - A power management method and apparatus, and a power supply system are provided. The method includes: obtaining a power demand value of each module and a rated output power of each power supply unit (PSU) in a communication equipment; calculating the obtained power demand value of each module to acquire a total power demand value of the modules; and adjusting, according to the calculated total power demand value of the modules and the obtained rated output power of each PSU, the current number of the PSUs actually turned on in the communication equipment. | 12-08-2011 |
20110307719 | SYSTEM AND METHOD FOR CONNECTING POWER-SAVING LOCAL AREA NETWORK COMMUNICATION LINK - Provided is a power-saving local area network communication link connection system and method that may automatically switch a communication link between a computer terminal and an Ethernet switch using an Ethernet communication and thus, an Ethernet switch may be prevented from being unnecessarily used. The power-saving local area network communication link connection system may include a monitoring unit to obtain utilization information from each of the plurality of Ethernet switches, a command generating unit to generate a control command based on the utilization information, and a mode switching unit to control, based on the control command, a patch switch to be connected to each of the plurality of Ethernet switches, and to switch a mode of each of the plurality of Ethernet switches. | 12-15-2011 |
20110307720 | COMPUTER SYSTEM AND POWER MANAGEMENT METHOD THEREOF - A computer system and a power-management method thereof are provided. The computer system has an image-reading mode, a first power-management mode and a second power-management mode, and the computer system operating in the second power-management mode consumes less power than it consumes in the first power-management mode. The computer system comprises a first portion comprising a graphics processing unit, a memory space and a display; and a second portion comprising a storage storing an image data. When the computer system operates in the image-reading mode, the image data has been transferred to the memory space from the storage, the second portion enters to the second power-management mode from the first power-management mode, and the first portion keeps in the first power-management mode, so that the graphics processing unit can display an image by the display according to the image data stored in the memory space. | 12-15-2011 |
20110314310 | Low-Power Data Loop Recorder - A system and method are disclosed for capturing pre- and post-event data for random events using minimum power. Real-time data is captured and stored in a continuous loop in a segment of a first memory. Upon detection of a designated event, a second memory is powered-on and post-event data is stored to a segment of the second memory. After a designated data capture window, the second memory is powered-off and real-time data is captured in an unused segment of the first memory. The post-event data may be captured in the unused segment of the first memory and later transferred to the second memory. Auto-address logic monitors and controls the storage and retrieval of pre- and post-event in the first and second memory. An energy management system determines and controls which segments of the first and second memory should be powered-on or kept in the stasis mode to store event data. | 12-22-2011 |
20110314311 | COMMUNICATION CONTROL DEVICE, COMMUNICATION CONTROL METHOD, AND COMPUTER READABLE MEDIUM - A communication control device capable of performing data communication with an information processing device connected through a network, for performing data communication corresponding to a command from an application part which requests data communication with the information processing device, comprises: a communication control part for outputting response information obtained through the data communication corresponding to the command from the application part; and a virtually response part and for generating virtual response information, containing information as to the information processing device, responding to the command from the application part. The communication control part manages registration information including at least one command for requesting virtual data communication performed hypothetically with the virtually response part registered. The communication control part obtains the virtual response information from the virtually response part and outputs to the application part when the command received from the application part is registered in the registration information. | 12-22-2011 |
20110320835 | SYSTEM AND METHOD FOR DYNAMICALLY MANAGING POWER IN AN ELECTRONIC DEVICE - A power controller receives a status signal, generates a control signal from the status signal, and reduces an output voltage of a voltage regulator based on the power control signal. The status signal is indicative of an operating tolerance or condition of a circuit or function of an electronic device during a low power state, and the output voltage of the voltage regulator is reduced to a value that corresponds to the operating tolerance or condition of the circuit or function of the electronic device. | 12-29-2011 |
20110320836 | Apparatus and Method of Managing Consumption in the Apparatus - An apparatus ( | 12-29-2011 |
20110320837 | POWER SUPPLY CIRCUIT, POWER SUPPLY METHOD, AND SIGNAL PROCESSING APPARATUS - A power supply circuit connected to an information processor including first and second controllers via a first cable having a first signal line and a first power line and a second cable having a second signal line and a second power line includes a controller that operates using a current of a first level supplied via the second power line and that performs setup by communicating with the second controller via the second signal line and a switch circuit that supplies, to an external device controller, currents supplied via the first and second power lines. When setup of the external device controller is completed through communication between the external device controller and the first controller via the first signal line, the switch circuit supplies, to the external device controller, a current of a second level higher than the first level supplied via each of the first and second power lines. | 12-29-2011 |
20110320838 | DYNAMIC CPU VOLTAGE REGULATOR PHASE SHEDDING - A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization information, determine whether to adjust a performance state, lookup voltage regulator information for new performance state, adjust active voltage regulator phase, and adjust performance state. The voltage regulator phase shedding system can also include one or more subsystems to read a power measurement, calculate throttling requirements, determine whether to adjust a throttling, lookup voltage regulator information for new performance state capacity, adjust active voltage regulator phase, and adjust throttling. | 12-29-2011 |
20120005499 | Power Control System and Method - A power block is provided having a plurality of individually, remotely controlled power ports switchable between an on state and an off state which users may connect electronic devices. The power block determines the desired power state for the particular power port that a particular electronic device is connected based on infrared codes used to power on or off the particular electronic device and switches the port between the on or off state accordingly. | 01-05-2012 |
20120005500 | PERIPHERAL-DEVICE UTILIZING SYSTEM, SERVER DEVICE, AND METHOD - A server machine, connectable to a peripheral device and to a client machine via a network, includes: a device interface for connecting with a peripheral device; a network interface for connecting with a network; and a device interface control section configured to relay data communications between the client machine and the peripheral device via the device interface and the network interface, and to execute a first process, if a first condition, including that predetermined first data has been received from the client machine is satisfied, of causing the peripheral device to transition into a first state in which the peripheral device is communicable with the server machine, and execute a second process, if a second condition, including that predetermined second data has been received is satisfied, of causing the peripheral device to transition into a second state in which its power consumption is lower than that in the first state. | 01-05-2012 |
20120005501 | System and Method for Maintaining Connectivity to Remote Application Servers - A system and method for maintaining connectivity between a host system running an Always-On-Always-Connected (AOAC) application and an associated remote application server. The system further includes circuitry configured to establish a communication link between the host system and the remote application server. The circuitry is configured periodically transmit keep-alive messages to the remote application server after the host system transitions to and remains in a low-power state. The keep-alive messages are configured to maintain connectivity and presence of the AOAC application with the remote application server while the host system is in the low-power state. | 01-05-2012 |
20120005502 | Device Charging System - Optimized bus powered peripheral battery charging includes a circuit to initiate a change in an advanced configuration and power interface (ACPI) state in a controller allowing charging of a peripheral device battery, the circuit including a signal converter coupled between an input port and the controller to sense when a the peripheral device battery is coupled to an input port and to restrict the controller from changing ACPI state multiple times for a given peripheral device battery coupling; and a ground loop detector coupled in parallel to the signal converter between the input port and the controller to allow the controller to know that the peripheral device battery has maintained being coupled to the input port. | 01-05-2012 |
20120005503 | DYNAMIC PERFORMANCE MANAGEMENT - A dynamic power management technique to optimize the performance to a pre-defined power or temperature limit. A computing system may comprise a performance management unit that may reconfigure the performance parameters, dynamically, based on the pre-defined power or temperature limit. Such an approach may provide performance enhancements as the power consumed by various components of the computing system may be reduced. | 01-05-2012 |
20120005504 | STORAGE SYSTEM COMPRISING FUNCTION FOR REDUCING POWER CONSUMPTION - For at least one of storage unit, processor and cache memory which are I/O process-participating devices related to I/O command process, when a load of one or more I/O process-participating devices or a part thereof is a low load equal to or less than a predetermined threshold value, a processing related to a state of one or more of the I/O process-participating devices or a part thereof is redirected to another one or more I/O process-participating devices or a part thereof, and the state of the one or more I/O process-participating devices or a part thereof is shifted to a power-saving state. | 01-05-2012 |
20120005505 | Determining Status Assignments That Optimize Entity Utilization And Resource Power Consumption - In a method of determining status assignments for a plurality of entities that substantially optimizes a total power consumption of the plurality of entities and a plurality of resource actuators, at least one entity power model for the entities and at least one resource power model for the resource actuators are developed. In addition, a constraint optimization problem having an objective function and at least one constraint is formulated and the problem is solved by employing a search tool, the at least one entity power model, and the at least one resource power module on the objective function to identify status assignments for the entities that results in the optimized total power consumption. | 01-05-2012 |
20120017103 | ELECTRICALLY ISOLATING A SYSTEM FROM AN EXTERNAL POWER SOURCE - A system includes a power supply and a power switch to connect an external power source that is external to the system to the power supply. The power switch has an on position and an off position. The power switch if actuated to the off position causes the system to be electrically isolated from the external power source. A control circuit is responsive to actuation of the power switch to provide a signal to cause software control of a power state of the system. | 01-19-2012 |
20120023345 | MANAGING CURRENT AND POWER IN A COMPUTING SYSTEM - A system and method for efficient power transfer on a die. A semiconductor chip comprises on a die two or more computation units (CUs) utilizing at least two different voltage regulators and a power manager. The power manager reallocates power credits across the die when it detects an activity level of a given CU is below a given threshold. In response to receiving a corresponding number of donated power credits, each of the one or more selected CUs maintains a high activity level with a high performance P-state. When a corresponding workload increases, each CU maintains operation and an average power consumption corresponding to the high performance P-state by alternating between at least two different operational voltages. When the operational voltage drops during the alternation, the current drawn by the particular CU may exceed a given current limit. The power manager detects this current limit is exceeded and accordingly reallocates the power credits across the die. | 01-26-2012 |
20120023346 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 01-26-2012 |
20120023347 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 01-26-2012 |
20120023348 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 01-26-2012 |
20120023349 | INFORMATION PROCESSING APPARATUS AND POWER SAVING MEMORY MANAGEMENT METHOD - An information processing apparatus has a task area unit as an area that executes a predetermined process, a power control unit that reads a task area to execute the process from the process and supplies power from a power source to the read task area, and a control unit that executes the process in the task area unit to which the power is supplied by the power control unit. | 01-26-2012 |
20120023350 | METHOD FOR ACTIVE POWER MANAGEMENT IN A SERIAL ATA INTERFACE - A method for active power management in a Serial ATA interface for data transfer between a host and a device, the method starts with the determining of an optimal data transfer rate for transferring data between the host and the device. Then switching the Serial ATA interface into an active power saving mode based on the optimal data transfer rate is performed. | 01-26-2012 |
20120030486 | POWER MANAGEMENT SYSTEM FOR WIRELESS AUTONOMOUS TRANSDUCER SOLUTIONS - An autonomous transducer system is disclosed. In one aspect, the system includes an energy scavenging module, energy storage module, a load circuit having at least one functional block providing a given functionality, and a power management module arranged for providing power supplied by the energy scavenging module to the load circuit or for exchanging power with the energy storage module. The power management module may further include a tuning module configured to tune the at least one functional block of the load circuit according to a given configuration scheme. | 02-02-2012 |
20120030487 | INFORMATION PROCESSING APPARATUS AND POWER CONTROL METHOD - According to one embodiment, an information processing apparatus includes a first circuit, a second circuit, and a controller. The first circuit is configured to detect consumed power of the information processing apparatus. The second circuit is configured to supply power received from a battery or an external power supply device, to a component in the information processing apparatus. The controller is configured to control the second circuit to receive the power from both of the battery and the external power supply device when the consumed power detected by the first circuit is higher than a capacity of the external power supply device. | 02-02-2012 |
20120036378 | COMPUTER AND CONTROL METHOD THEREOF - A mobile computer as an electronic apparatus and a control method thereof. The control method of the mobile computer which receives power from an adaptor or a battery includes receiving power from one of the adaptor and the battery and operating in an adaptor mode or a battery mode, performing a predetermined power saving operation, which is disabled in the adapter mode, while operating in the battery mode, and performing the power saving operation in a battery emulation mode by maintaining power supply from the adaptor upon an occurrence of a predetermined mode changing event in the adaptor mode. | 02-09-2012 |
20120036379 | Power Control for Information Handling System Having Shared Resources - An information handling system includes at least two processing systems that share system resources. In response to detecting a designated event, a power control module of the information handling system can select one of a plurality of available power profiles. The power profile can be selected based on the event and state information indicative of a state of the processing systems. Based on the selected profile, the power control module can set an operational power mode of one or more of the shared system resources. | 02-09-2012 |
20120042182 | FORCED IDLE CACHE - An interface controller of an electronic device manages power consumption of the electronic device by caching data associated with write commands received while the electronic device is in an idle mode. In one implementation, an interface controller directs write commands to a write cache until disc access is required. Additionally, the interface controller may direct write commands to the write cache until the write cache becomes full or a non-cached read command is received. Once, disc access is required, the data associated with the cached commands are flushed to the hard disc. In one implementation, the interface controller transitions the electronic device to a lower power state and maintains the electronic device in the lower power state until disc access is required. When disc access is required, the interface controller transitions the electronic device to a higher power state. | 02-16-2012 |
20120047378 | METHOD AND SYSTEM FOR LOW-POWERED DATA TRANSMISSION - One embodiment of the present invention is a sensor comprising one or more sensing devices, data-transmission components that transmit sensor data to a receiving component, and a processing component. The processing component executes routines to record sensing-device output as data for transmission to the receiving entity and to control the data-transmission components to transmit the data to the receiving entity. The processing component executes one or more compressing routines to compress data prior to transmission, when data compression is estimated to result in a lower power cost than transmitting uncompressed data, and controlling the data-transmission components to transmit data without compressing the data when data compression is estimated to result in a higher power cost than transmitting uncompressed data. | 02-23-2012 |
20120047379 | BATTERY POWER MANAGEMENT FOR A MOBILE DEVICE - Techniques for managing battery power of a mobile device are described. In an aspect, battery power may be reserved for an application prior to execution of the application on the mobile device. The reservation may ensure that the application has sufficient battery power for execution. In another aspect, battery power may be allocated to applications based on their priorities. The applications may be ordered based on their priorities, and the available battery power for the mobile device may be allocated to one application at a time, starting with the highest priority application. In yet another aspect, battery power may be allocated to applications based on a battery discharge curve for the mobile device. An operating point on the battery discharge curve may be selected based on at least one objective. The available battery power may be determined based on the selected operating point and allocated to the applications. | 02-23-2012 |
20120047380 | METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR PRESENTATION OF INFORMATION IN A LOW POWER MODE - Provided herein is a method, apparatus, and computer program product for presenting information on a display to a user when the display is operating in a low, or reduced power mode. In particular, the method includes providing for operation in a user interface state that is configured to present a first amount of information with at least a portion of the first amount of information being presented on a display while operating in a first power mode, selecting information from the first amount of information to create a second amount of information that is a subset of the first amount of information, where the second amount of information is selected from the first amount of information based upon relevancy parameters, and providing for display of a second amount of information from the user interface state while operating in a second power mode. | 02-23-2012 |
20120060042 | Maintaining power through a data transmission cable - A powered device receives electrical power through a data transmission cable from a power supplying device that monitors a load on the data transmission cable and turns off the power to the load if the load is outside of a range. The powered device draws a first current at least part of a time during which the powered device is in a low power mode. The powered device is operable during the low power mode to draw a second current. And the powered device increases and decreases the second current to maintain a sum of the first current and the second current, or a level of a current into the powered device, at least at a minimum level for at least a portion of a cycle time. | 03-08-2012 |
20120060043 | APPARATUS AND METHOD FOR CONTROLLING POWER IN A WIRELESS COMMUNICATION SYSTEM - An apparatus and method for controlling power in a wireless communication system are provided. The method includes determining one or more available communication modes based on at least one of suppliable power information and data bit rate information, setting one of the one or more determined available communication modes as a communication mode during negotiation of a communication mode with a base station, and transmitting and receiving data by applying the set communication mode. | 03-08-2012 |
20120066526 | SYSTEM AND METHOD FOR DETERMINING OPTIMAL OPERATING PARAMETERS FOR CONSERVING POWER OF A PORTABLE COMPUTING DEVICE - A method and system for determining optimal operating parameters for conserving power of a portable computing device may include plotting a hypersurface in a coordinate system. The method includes defining one or more axes in a coordinate system, such as a Cartesian coordinate system, that impact power consumption of a PCD and which may be held as constants when applied as workloads on CPU. Then, at least one axis is identified as an unknown or variable which may be optimized for power consumption. After the hypersurface containing optimized values is created for various workload scenarios for the PCD, workloads corresponding to the synthetic workloads described above are applied to the PCD. Workload predictors, like a DCVS algorithm, are executed by the PCD and are observed and compared to the hypersurface. Parameters for the workload predictor may be adjusted based on the values from the hypersurface. | 03-15-2012 |
20120066527 | Information Processing Apparatus and Device Control Method - According to one embodiment, an information processing apparatus includes a plurality of power control target devices, a storage unit configured to store management data, and a device management module. The device management module is configured to determine whether a new process is started, based on process information indicative of a list of processes which are being executed, the process information being managed by an operating system, to determine, based on the management data, when the new process is started, one or more power control target devices which are used by an application program corresponding to the new process, and to power on, among the determined one or more power control target devices, a power control target device which is in a power-off state. | 03-15-2012 |
20120072744 | SYSTEMS AND METHODS TO IMPROVE POWER EFFICIENCY IN HYBRID STORAGE CLUSTERS - Systems and methods for reducing power consumption and power leakage in hybrid storage clusters is provided. More specifically, the systems and methods for reducing power consumption select a particular cache (memory) technology in hybrid storage clusters based on performance requirements and/or other parameters associated with an application (file or process). The method can be implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The program instructions are operable to monitor access patterns of one or more applications in one or more memory technologies in a computing system. The program instructions are also operable to select a memory technology to store the one or more applications based on the access patterns of one or more applications. | 03-22-2012 |
20120072745 | SERVER POWER MANAGEMENT WITH AUTOMATICALLY-EXPIRING SERVER POWER ALLOCATIONS - One embodiment provides a power management method for servers in a data center. A group of servers is selected, and the total power allocated to a group of servers is limited to within a group power budget. A separate server power allocation is individually requested for each of a plurality of the servers. Within the constraints of the group power budget, the requested server power allocations are selectively granted for a specified magnitude and duration. The granted server power allocations are also selectively renewed, either automatically or upon request of the servers. Each server that has not received a renewed server power allocation from a group power management entity upon the expiration of the specified duration automatically reduces its own power consumption, such as by the server powering itself off. | 03-22-2012 |
20120072746 | FACILITATING POWER MANAGEMENT IN A MULTI-CORE PROCESSOR - The disclosed embodiments provide a system that facilitates power management in a multi-core processor. During operation, the system detects a change related to a number of active processor cores in the multi-core processor. (Within this system, a given processor core can reside in an active state, wherein the given processor core can draw an active power, or alternatively in a constrained state, wherein the given processor core can draw a constrained power, which is less than the active power.) In response to detecting the change, the system computes a new current limit I | 03-22-2012 |
20120072747 | IMAGE PROCESSING APPARATUS CAPABLE OF SHIFTING TO POWER SAVING MODE, CONTROL METHOD FOR THE IMAGE PROCESSING APPARATUS, AND PROGRAM - An image processing apparatus capable of shifting to a power saving mode. The image processing apparatus includes a storing unit configured to store a document in a storage device, a notification unit configured to periodically notify an apparatus of a predetermined destination of information about a document that has been newly stored by the storing unit into the storage device, and a control unit configured to restrict shifting to a power saving mode in which the notification unit cannot make the notification after storage of a document by the storing unit has been completed and until the notification unit notifies at least information about the document. | 03-22-2012 |
20120072748 | RADIO DEVICE - A method including configuring a processor to determine whether a radio device is communicating with an additional device, configuring the radio device to enter into a power stale in response to whether the radio device is communicating with the additional device, and modifying an amount of power supplied to the radio device in response to the power slate of the radio device. | 03-22-2012 |
20120079298 | ENERGY EFFICIENT HETEROGENEOUS SYSTEMS - Low-power systems and methods are disclosed for executing an application software on a general purpose processor and a plurality of accelerators with a runtime controller. The runtime controller splits a workload across the processor and the accelerators to minimize energy. The system includes building one or more performance models in an application-agnostic manner; and monitoring system performance in real-time and adjusting the workload splitting to minimize energy while conforming to a target quality of service (QoS). | 03-29-2012 |
20120079299 | Enclosure Power Controller - A system and method for controlling power consumption is described herein. A computer system includes an enclosure. The enclosure is configured to contain a plurality of removable compute nodes. The enclosure includes a power controller configured to individually control an amount of power consumed by each of the plurality of removable compute nodes. The power controller provides a plurality of power control signals. Each power control signal is provided to and controls the power consumption of one of the plurality of removable compute nodes. | 03-29-2012 |
20120079300 | ELECTRONIC APPARATUS - A power-supply connection portion connects a power supply and a main body device. Operation information for operating the apparatus main body is stored in a volatile memory. A power feeder feeds power fed from the power supply, to the volatile memory. A non-operation state request receiver receives a non-operation state request for moving the apparatus main body from an operation state to a non-operation state. When the non-operation state request is received by the non-operation state request receiver, a power-feeding controller performs control such that the power feeder feeds the power to the volatile memory for a predetermined period. A mode determiner determines a mode of the non-operation state request. A changer is provided with a setter which sets the predetermined period depending on the mode determined by the mode determiner. | 03-29-2012 |
20120084582 | STORAGE DRIVE MANAGEMENT - With embodiments of the invention, a more robust solution is provided using a storage driver that may already be used for the platforms operating system. This is efficient because the storage driver typically already monitors storage drive access requests, and thus knows when traffic is outstanding (performance may be critical) or when it's not outstanding (and power may be saved). | 04-05-2012 |
20120084583 | DATA TRANSFORM METHOD AND DATA TRANSFORMER - A data transform method and a data transformer. The method includes: importing a data transform rule; acquiring from the data transform rule a source data definition, a destination data definition and a data transform rule definition; predicting resource energy consumption parameters of a data transform node server according to the source data definition, the destination data definition and the data transform rule definition; and deploying a resource energy consumption optimization policy of the data transform node server according to the predicted resource energy consumption parameters of the data transform node server. | 04-05-2012 |
20120084584 | POWER MANAGEMENT METHOD AND APPARATUS - A power management method in a user terminal receives a power from a power supply unit to charge a system voltage, compares the system voltage with a preset voltage, and controls a power input from the power supply unit according to the comparison result. | 04-05-2012 |
20120084585 | INFORMATION PROCESSING APPARATUS CAPABLE OF REMOTE POWER CONTROL, POWER CONTROL METHOD THEREFOR, AND STORAGE MEDIUM - An information processing apparatus that has a plurality of functional units and is capable of communicating with a power monitoring apparatus and supplying power to an appropriate functional unit according to whether a main power switch is operated by an operator or a power-on instruction is received from the power monitoring apparatus. Power that should be supplied to the plurality of functional units is generated. When the main power switch is manually operated by the operator in a state where the generated power is not supplied to the plurality of functional units, control is performed to supply the generated power to the plurality of functional units. In response to the power-on instruction received in a state where the generated power is not supplied to the plurality of functional units, control is provided to supply the generated power to functional units designated in advance among the plurality of functional units. | 04-05-2012 |
20120084586 | METHOD, DEVICE, AND SYSTEM FOR GUARANTEED MINIMUM PROCESSOR POWER STATE DWELL TIME - A method, device, and system are disclosed. In one embodiment the method includes causing a processor to enter into a first power state. Then an interrupt is received that signals the processor to leave the first power state. The method continues by causing the processor to remain in the first power state if the interrupt was received less than a minimum dwell time after the processor entered the first power state. | 04-05-2012 |
20120084587 | Automated Power Management of a Peripheral Device - Based on bounds of a period of reduced operation for a base device, a base device generates a power management message for transmission to a peripheral device. In the power management message, the base device inserts bounds of a period of reduced operation for the peripheral device. As a result, the periods of reduced operation conserve battery power in both devices and the two devices may reestablish a communications channel upon reaching the end of the period of reduced operation and resuming normal operations. | 04-05-2012 |
20120096288 | CONTROLLING OPERATION OF TEMPERATURE SENSORS - Techniques are disclosed relating to controlling power consumption of temperature sensors in integrated circuits. In one embodiment, an integrated circuit is disclosed that includes a temperature sensor that is configured to determine a temperature of the integrated circuit. The integrated circuit also includes a sensor controller that is configured to vary power consumption of the temperature sensor based, at least in part, on the determined temperature. In some embodiments, the integrated circuit may determine a sampling rate of the temperature sensor based, at least in part, on the determined temperature and a temperature threshold of the integrated circuit. The integrated circuit may then vary the power consumption of the temperature sensor by periodically disabling the temperature sensor based on the determined sampling rate. In some embodiments, the integrated circuit may also vary the power consumption of the temperature sensor based on the operating state of one or more processing cores in the integrated circuit. | 04-19-2012 |
20120096289 | STORAGE APPARATUS AND POWER CONTROL METHOD - To enable power saving control by putting storage areas of the same attribute together in a specific RAID group in a storage apparatus that includes storage areas of different access patterns. | 04-19-2012 |
20120096290 | Distributed Architecture for Situation Aware Sensory Application - Embodiments of the invention relate to a distributed signal processing system and a method for processing a sensor signal for a mobile device. Raw signal data is received and pre-processed by a processor to filter and split the data signal into multiple data outputs. The split signal data represent both spatial and spectral components, and/or statistical properties pertaining to the sensor. Low rate processing data is communicated to a second processor for limited data processing by select logic components. | 04-19-2012 |
20120102342 | ACTIVE DISPLAY PROCESSOR SLEEP STATE - Power consumption and dissipation is reduced during active display of content from an internal display buffer using a power supply topology that powers a display subsystem separately from the other components of a CPU. The power supply topology enables a processor to enter a sleep state without disabling the active display of content. The processor enters a processor sleep state when the display buffer is full and the processor components are no longer needed. The processor exits the processor sleep state when the display buffer is empty and operates in conjunction with the display subsystem to fill the buffer with more content. The processor continues to enter and exit the processor sleep states as appropriate until active display ends. | 04-26-2012 |
20120102343 | MOUNTING-LINE POWER CONTROL DEVICE AND MOUNTING-LINE POWER CONTROL METHOD - A mounting-line power control device ( | 04-26-2012 |
20120110356 | PROVIDING POWER OVER ETHERNET WITHIN A VEHICULAR COMMUNICATION NETWORK - A power distribution system within a vehicle operates to provide power over Ethernet to a plurality of network node modules coupled to a vehicular communication network of the vehicle. | 05-03-2012 |
20120110357 | COMMUNICATION APPARATUS, METHOD OF CONTROLLING THE SAME, AND STORAGE MEDIUM - A communication apparatus that is capable of communicating with network nodes more properly even when a control unit thereof shifts to a power-saving state. An NIC communicates with the network nodes via a network. The controller communicates with the network nodes via the communication unit. The controller stores node information on a network node that has transmitted data satisfying a predetermined condition, determines whether or not a shift condition for shifting the controller to a power-saving state is satisfied, and notifies the communication unit of the stored node information when it is determined that the shift condition is satisfied. The NIC stores node information notified by the controller, and executes communication processing based on the stored node information when the controller is in the power-saving state. | 05-03-2012 |
20120110358 | POWER CONTROL OF SECONDARY COPY STORAGE BASED ON JOURNAL STORAGE USAGE AND ACCUMULATION SPEED RATE - Arrangements having multiple second storage systems which each include a restore control unit for controlling restoration processing, in which a data element in a journal stored in a journal storage area is written into a secondary logical volume, and a storage device control unit for controlling a storage device in the second storage system. The restore control unit is provided with a function for suspending the restoration processing. A first value indicating the usage condition of the journal storage area in the second storage system is obtained, and the restore control unit suspends the restoration processing in accordance with the obtained first value. The storage device control unit then executes power saving on a storage device relating to the secondary logical volume. | 05-03-2012 |
20120117397 | DYNAMIC VOLTAGE ADJUSTMENT TO COMPUTER SYSTEM MEMORY - A system and method are provided wherein the voltage to a random access memory system may be automatically, dynamically adjusted without requiring an operating system to be restarted. In one embodiment, a target value of a voltage supplied to the memory system is dynamically selected. A system management mode is invoked in response to a change in the dynamically selected target value, including suspending a normal operation of the memory system. While in the system management mode, the voltage supplied to the memory system is adjusted according to the changed target voltage. A memory speed is adjusted according to the changed target value of the voltage. These steps are performed without restarting the computer system. The system management mode is exited and normal operation of the memory system may resume at the changed target voltage. | 05-10-2012 |
20120117398 | SYSTEM AND METHOD FOR CONTROL OF POWER CONSUMPTION OF INFORMATION HANDLING SYSTEM DEVICES - Systems and methods for controlling power usage of devices in information handling systems are provided. A device for use in an information handling system may include a connector and an auxiliary power connector. The connector may be configured to electrically couple to a device connector such that the device transmits and receives data via the device connector and receives electrical current from a power supply via the device connector. The auxiliary power connector may be configured to electrically couple the device to the power supply such that the device receives electrical current from the power supply via the device connector, the auxiliary power connector including at least one sense line, the at least one sense line configured to receive at least one power control signal. The device may be configured to establish its power usage in response to receiving the at least one power control signal. | 05-10-2012 |
20120117399 | SAVING POWER BY MANAGING THE STATE OF INACTIVE COMPUTING DEVICES - A system method and computer program product for managing readiness states of a plurality of computing devices. A programmed processor unit operates, upon receipt of a request, to either: provide one or more computing devices from an inactive pool to an active pool, or accept one or more active computing devices into the inactive pool. An Inactive Pool Manager proactively manages the inactive states of each computing device by: determining the desired number (and identities) of computing devices to be placed in each inactive state of readiness by solving a constraint optimization problem that describes a user-specified trade-off between expected readiness (estimated time to be able to activate computing devices when they are needed next) and conserving energy; generating a plan for changing the current set of inactive states to the desired set; and, executing the plan. Multiple alternative ways of quantifying the desired responsiveness to surges in demand are provided, and, in each case, the tradeoff between responsiveness and power savings is formulated as an objective function with constraints, and the desired number of devices in each inactive state emerges as the solution to a constraint optimization problem. | 05-10-2012 |
20120117400 | EFFICIENT SERVICE ADVERTISEMENT AND DISCOVERY IN A PEER-TO-PEER NETWORKING ENVIRONMENT - A local device broadcasts a service advertisement in a wireless network, where the service advertisement includes one or more service identifiers (IDs) identifying one or more services being advertised and an availability schedule of the local device. Optionally, the local device reduces power to at least a portion of the local device and wakes up at a time according to the availability schedule. The local device listens in the wireless network according to the availability schedule of the local device. In response to a service request received from a remote device during the availability window, the local device transmits a service response to the remote device. The service request includes one or more service IDs identifying one or more services being inquired by the remote device and the service response includes detailed information associated with one or more services identified by the one or more service IDs. | 05-10-2012 |
20120117401 | MAINTAINING CONNECTIVITY DURING LOW POWER OPERATION - Generally this disclosure describes methods and systems for conserving energy in a client platform by maintaining connectivity between the client platform and a remote resource when the client is in a low-power state. An example method may include receiving notification that the client platform is transitioning to the low-power state, receiving at least one payload from the client platform, the at least one payload being configured to maintain connectivity with a remote resource while the client platform is in the low-power state, transmitting a packet including the at least one payload and receiving a packet including an acknowledgement. | 05-10-2012 |
20120124402 | DETERMINING A POWER SAVING MODE BASED ON A HARDWARE RESOURCE UTILIZATION TREND - Techniques are disclosed for managing the amount of power consumed by server components of a computer system, each server component having multiple power modes. The utilization of each server component is monitored. Based on the monitored utilization, a time period is determined in which to apply a selected power mode to the respective server component. The respective server component is configured to operate in the selected power mode for at least the determined time period. | 05-17-2012 |
20120124403 | POWER CAPPING FEEDBACK NORMALIZATION - A power capping system ( | 05-17-2012 |
20120131362 | BATTERY POWER CONTROL DEVICE, PORTABLE DEVICE AND METHOD FOR CONTROLLING PORTABLE DEVICE - Disclosed are a battery power control device, a portable device and a method of controlling the portable device. The disclosed portable device includes a workload calculator which calculates a workload necessary to provide the specific service to the user according to at least one of time request information related to a desired time during which the specific service is provided to the user and QoS (Quality of Service) request information related to a quality of the specific service, the necessary workload being smaller than a default workload that is preset for providing the specific service; a task performer which performs a task for providing the specific service according to the necessary workload during a time that is reduced to be shorter than a task performance time according to the default workload and stop the task performance during the reduced time; and a battery unit which supplies a power for performing the task to the task performer. | 05-24-2012 |
20120131363 | HEAT DISSIPATING DEVICE AND METHOD THEREOF - A heat dissipating device and the method thereof are provided. The heat dissipating device includes at least one fan, a temperature detecting unit, a fan control unit, and a power consumption control unit. The temperature detecting unit detects a temperature inside the host. The fan control unit controls the rotating speed of the fan. The power consumption control unit calculates the total power consumption of the host, and outputs a control signal to the fan control unit according to the temperature inside the host and the total power consumption of the host, so as to adjust the rotating speed of the fan. | 05-24-2012 |
20120131364 | Method For Managing the Charge Level of a Battery in a Mobile Terminal, Corresponding Management System and Computer Program - The present disclosure relates to a method for managing the charge level of a battery of a mobile terminal connected to a network of transmission of information. The method comprises measuring the charge level of the battery. If the charge level of the battery is lower than a predefined threshold of charge level, the method controls the operation of the terminal to reduce its power consumption during an operation of transmission of information from or toward the terminal. | 05-24-2012 |
20120131365 | Delayed Shut Down of Computer - A computer-implemented computer shut-down method includes identifying that a computing device has been moved from an open configuration in which input and output mechanisms on the computing device are accessible to a user, to a closed configuration in which at least some of the input and output mechanisms are inaccessible to a user; starting a shut-down timer in response to identifying that the computing device has been moved from the open configuration to the closed configuration; waiting a predefined time period, as established by the shut-down timer, and determining from the shut-down timer that the computing device can be transitioned from an active state into a sleep state in which power consuming components of the computing device are powered down; and transitioning the computing device from the active state to the sleep state upon determining that the computing device can be transitioned. | 05-24-2012 |
20120131366 | LOAD BALANCING FOR MULTI-THREADED APPLICATIONS VIA ASYMMETRIC POWER THROTTLING - A first execution time of a first thread executing on a first processing unit of a multiprocessor is determined. A second execution time of a second thread executing on a second processing unit of the multiprocessor is determined, the first and second threads executing in parallel. Power is set to the first and second processing units to effectuate the first and second threads to finish executing at approximately the same time in future executions of the first and second threads. Other embodiments are also described and claimed. | 05-24-2012 |
20120137150 | DATA PROCESSING APPARATUS, METHOD FOR CONTROLLING DATA PROCESSING APPARATUS, AND STORAGE MEDIUM STORING PROGRAM - An apparatus operates in at least a first mode and a second mode consuming less power than the first mode, and stores information indicating specific data to be responded without shifting from the second mode to the first mode, the data being received from a network during an operation in the second mode. Data received from the network during an operation in the first mode is determined whether to be the specific data indicated by the information stored by a storage unit. When the data is the specific data, a shift from the first mode to the second mode after responding to the received data is faster than when the data is not the specific data. | 05-31-2012 |
20120144215 | MAXIMUM CURRENT LIMITING METHOD AND APPARATUS - The maximum current is limited in a multi-processor core system by monitoring the latest power consumption in the processor cores, in order to prevent a system shutdown as a result of an over-current event. If the sum of the latest power of the processor cores exceeds a threshold limit, a performance state (P-state) limit is enforced in the processor cores. The P-state limit causes a P-state change to a lower frequency, voltage and thus a lower current. | 06-07-2012 |
20120144216 | TRANSACTION LEVEL SYSTEM POWER ESTIMATION METHOD AND SYSTEM - A transaction level (TL) system power estimation method and system are provided. The method includes inserting at least a characteristic extractor into an electronic device of a target system. The characteristic extractor extracts at least a power characteristic of the electronic device when a TL simulation is proceeding. The power characteristic provided from the characteristic extractor is converted to at least a power consumption value by using a power model. The power consumption value is recorded into a power database, for analyzing power consumption of the whole target system. In some embodiments, the TL system power estimation method and system can be applied in the target system with dynamic power management. The TL system power estimation method and system also can be used with a high-level synthesizer to develop the power-aware electronic device in a short time. | 06-07-2012 |
20120144217 | Dynamically Modifying A Power/Performance Tradeoff Based On Processor Utilization - In one embodiment, the present invention includes a multicore processor having a power controller with logic to dynamically switch a power management policy from a power biased policy to a performance biased policy when a utilization of the processor exceeds a threshold level. Thus at low utilizations, reduced power consumption can be realized, while at higher utilizations, greater performance can be realized. Other embodiments are described and claimed. | 06-07-2012 |
20120151230 | IMAGE PROCESSING APPARATUS, CONTROL METHOD FOR IMAGE PROCESSING APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM - An image processing apparatus includes a managing part to perform a first process to store the log information in a storage unit and a second process necessary to turn OFF a main power, a generating part to generate the log information by performing a third process necessary to turn OFF the main power, and to send to the managing part a first request signal causing the managing part to perform the first process on the generated log information, and a request part to send to the managing part a second request signal causing the managing part to perform the second process and to send to the generating part a third request signal causing the generating part to perform the third process, when a detecting part detects an OFF state of a main power switch. | 06-14-2012 |
20120151231 | POWER SUPPLY SWITCHING DEVICE, A POWER SUPPLY SWITCHING DEVICE CONTROL METHOD AND A POWER SUPPLY CONTROL PROGRAM - A power supply switching device is comprising: a first connector which connects with a USB (Universal Serial Bus) power bus which supplies electric power; a second connector which connects with a USB connector; and a switching unit which switches between a supplying state in which electric power is supplied from the USB power bus to the USB connector and a cutoff state in which electric power is not supplied from the USB power bus to the USB connector. | 06-14-2012 |
20120159208 | SOFTWARE CONTROLLED POWER LIMITING IN USB TO SATA BRIDGE - A Universal Serial Bus (USB) to Serial ATA (SATA) bridge device and method for operating same in a USB connected mass storage subsystem supports software management of power consumption. The USB to SATA bridge estimates power consumption based on known power consumption characteristics of SATA disk drives when performing commands involved in accessing SATA drive, or takes measurements of power consumption during execution of commands to determine when responses to a USB host device are to be delayed. By selectively delaying responses to the USB host device issuing the commands, the USB to SATA bridge manages the rate at which the host issues commands to the USB mass storage subsystem and is thereby able to automatically limit power consumption of the USB mass storage subsystem to that that available over the USB link. | 06-21-2012 |
20120159209 | Idle Time Service - In embodiments of an idle time service, it can be determined that processing on a device is in an idle state. An execution duration of applications that are scheduled to be executed by a processor of the device can then be extended to reduce power consumption by the device. In other embodiments, it can be determined that an application configured to execute on a device is a background application. The execution duration of the background application can then be extended to reduce power consumption by the device. | 06-21-2012 |
20120159210 | STORAGE APPARATUS AND ITS CONTROL METHOD - The charge capacity of a battery for supplying electric power to a volatile memory and a non-volatile memory is increased without increasing the power source capacity. | 06-21-2012 |
20120159211 | APPARATUS AND METHOD FOR MANAGING POWER EQUIPMENT IN ADVANCED METERING INFRASTRUCTURE NETWORK - Provided is an apparatus and method for managing a power equipment in an advanced metering infrastructure (AMI) network included in a smart grid network. According to an aspect of the present invention, an apparatus and method for managing a power equipment in an AMI network may provide a load control environment enabling a power equipment to declare an opt-out when another power equipment declares an opt-out by providing a list of power equipments included in a load control group in response to a power equipment declaring an opt-out of the load control group so as to process an opt-out of a power equipment selected from the list. | 06-21-2012 |
20120159212 | INFORMATION PROCESSING APPARATUS CAPABLE OF APPROPRIATELY EXECUTING SHUTDOWN PROCESSING, METHOD OF CONTROLLING THE INFORMATION PROCESSING APPARATUS, AND STORAGE MEDIUM - An information processing apparatus capable of recovering the apparatus from a state in which software operation is abnormal to a state in which the same is normal. The information processing apparatus is provided with a CPU for receiving an instruction for turning off power of the information processing apparatus. Upon receipt of the instruction, the CPU determines whether or not it is necessary to turn off the power of the information processing apparatus. When it is necessary to turn off the power of the information processing apparatus, the CPU controls the information processing apparatus such that the power thereof is turned off, whereas when it is unnecessary to turn off the power of the information processing apparatus, the CPU controls the information processing apparatus such that the power thereof is not turned off. | 06-21-2012 |
20120159213 | Node Management of an Electronic Circuit Component - A component of an electronic circuit, the component comprising: a node (REG_ENB; DO) selectively configurable as an output node for providing an output signal to an external component or as an input node for providing an input signal to an internal component; a capacitor (C) selectively coupled to the node (REG_ENB; DO) to influence the time for the node (REG_ENB; DO) to transition between a low state and a high state; and a timer for measuring the time for the node to transition between a low state and a high state to provide a first information input signal, the state of the first information signal depending on the time for the node to transition between the low state and the high state and being indicative of a first information. A method of node management is also described. | 06-21-2012 |
20120159214 | POWER CONTROLLER FOR SUPPLYING POWER VOLTAGE TO FUNCTIONAL BLOCK - A power controller, includes a digital control circuit that outputs a result of comparing a first voltage being input and a voltage reference, and a processor control circuit that stops an operation of the processor based on the result of comparing. | 06-21-2012 |
20120166827 | Method and Apparatus for Reducing Dynamic Power within System-on-a-Chip Routing Resources - A method for saving power in transmission of data across buses. By knowing the power characteristics of a bus and characteristics of data to be transmitted across the bus, the data can be encoded in such a fashion as to conserve system power over transmitting the same data in an unencoded format across the bus. The encoding method may be selected before transmission of the data across the bus, and may change depending on the data to be transmitted across the bus. | 06-28-2012 |
20120166828 | METHOD AND SYSTEM FOR POWER CONTROL TO MINIMIZE POWER CONSUMPTION - The embodiments provide a system and method for device power control. In particular, the embodiments enable a device, such as a direct attached storage device coupled to a host, to enter into a mode that consumes less power. In one embodiment, the mode is self-initiated and triggered based on a preset timeout of non-use or other condition. Alternatively, this reduced power mode may be initiated based on a request by the host. During the reduced power mode of operation, the device may continue to appear active or on-line to its host. However, if its non-use persists, the device may employ a progression of power saving actions. If needed by the host, the direct attached storage device is configured to respond as if it were on-line and reverse one or more of the progression of power saving actions. | 06-28-2012 |
20120166829 | METHOD AND SYSTEM FOR MANAGING A STORAGE NETWORK TO REDUCE POWER CONSUMPTION - Methods, computer systems, and computer program products are provided for managing a storage network system is provided. The storage network system includes a plurality of zones. Each of the plurality of zones includes at least one storage network device. A link-down event associated with one of the storage network devices is detected. One of the plurality of zones is identified is identified as being unused if the zone is not accessed by another of the storage network devices in another of the plurality of zones and if the zone does not access another of the storage network devices in another of the plurality of zones. | 06-28-2012 |
20120166830 | OFFLINE SETUP RECORDING DEVICE AND METHOD AND ELECTRONIC APPARATUS USING THE SAME - An offline setup recording device used in an electronic apparatus is illustrated. When the electronic apparatus is power on, the total energy storage unit is charged by a power supply through the unidirectional conduction unit, such that a total voltage is stored therein. When the electronic apparatus is power off, a user operates the automatically recovering switch to be conducted, such that the state energy storage unit is charged by the total energy storage through the automatically recovering switch, and a storage voltage signal is stored therein. When the electronic apparatus is power on again, the reading unit receives the power, reads out the storage voltage signal, and outputs a read voltage signal accordingly. | 06-28-2012 |
20120166831 | SYSTEM FOR CONTROLLING POWER CONSUMPTION OF SEMICONDUCTOR INTEGRATED CIRCUIT - According to one embodiment, a semiconductor integrated circuit has peripheral devices and a clock supply control circuit which controls supply of clock signals to the devices. An operating system for controlling execution of tasks includes a task information registration unit, a dispatcher, a semaphore managing unit, and a power consumption managing unit. The task information registration unit registers peripheral device use information as task information. The dispatcher controls start of any one of the tasks when an execution request of the task is received and to control switching task execution. The semaphore managing unit to manage state of acquisition and store semaphores. The power consumption managing unit refers to the peripheral device use information and the semaphores, and issues a request to the clock supply control circuit so as to supply or stop the clock signal, in accordance with execution states of the tasks and acquisition state of the semaphores. | 06-28-2012 |
20120166832 | DISTRIBUTED MANAGEMENT OF A SHARED POWER SOURCE TO A MULTI-CORE MICROPROCESSOR - Microprocessors are provided with decentralized logic and associated methods for indicating power related operating states, such as desired voltages and frequency ratios, to shared microprocessor power resources such as a voltage regulator module (VRM) and phase locked loops (PLLs). Each core is configured to generate a value to indicate a desired operating state of the core. Each core is also configured to receive a corresponding value from each other core sharing the applicable resource, and to calculate a composite value compatible with the minimal needs of each core sharing the applicable resource. Each core is further configured to conditionally drive the composite value off core to the applicable resource based on whether the core is designated as a master core for purposes of controlling or coordinating the applicable resource. The composite value is supplied to the applicable shared resource without using any active logic outside the plurality of cores. | 06-28-2012 |
20120166833 | INFORMATION PROCESSING DEVICE, CONTROL METHOD AND CONTROL PROGRAM - An information processing device ( | 06-28-2012 |
20120166834 | COMPUTING LOAD MANAGEMENT METHOD AND SYSTEM - A load management method and system. The method includes detecting and monitoring by a computing system, a frequency signal associated with an input voltage signal used for powering computing apparatuses at a specified location. The computing system compares the frequency signal to a predetermined frequency value. The computing system determines that the frequency signal comprises a first value that is not equal to the predetermined frequency value. The computing system calculates a difference value between the first value and the predetermined frequency value. The computing system compares the difference value to a second value and analyzes a power demand profile. The computing system enables a load adjustment modification process associated with the plurality of power consumption devices based on the difference value and the power demand profile. The computing system generates and stores a report associated with the load adjustment modification process. | 06-28-2012 |
20120166835 | ENERGY LOAD MANAGEMENT METHOD AND SYSTEM - A modification method and system. The method includes detecting and monitoring by a computing system, a frequency signal associated with an input voltage signal used for powering a plurality of power consumption devices at a specified location. The computing system compares the frequency signal to a predetermined frequency value. The computing system determines that the frequency signal comprises a first value that is not equal to the predetermined frequency value. The computing system calculates a difference value between the first value and the predetermined frequency value. The computing system compares the difference value to a second value. The computing system enables a load adjustment modification process associated with the plurality of power consumption devices. The computing system generates and stores a report associated with the load adjustment modification process. | 06-28-2012 |
20120166836 | SYSTEM FOR CONSERVING BATTERY LIFE IN A BATTERY OPERATED DEVICE - A battery operated device includes a receiver for receiving a transmission that includes a postamble. A sensor, in a tire, measures a parameter of the tire and outputs data indicative of the parameter. A microprocessor is coupled to the receiver and the sensor. The microprocessor is configured to periodically partially awaken to determine whether the transmission is likely a forward link packet (FLP) by examining the postamble, and to transmit the data in a reverse link packet (RLP) in response to confirming that the transmission is a FLP. | 06-28-2012 |
20120173901 | PERFORMANCE IMPROVEMENTS IN A WIRELESS CLIENT TERMINAL USING ASSISTANCE FROM A PROXY DEVICE - Various features are provided to improve communication performance and power conservation in a client terminal by relying on the assistance of a proxy device. For instance, rather than reporting channel measurements via a primary communication channel to a network, the client terminal may be adapted to perform (a) channel measurement feedback using out-of-band signaling via the proxy device and/or (b) active synchronization with assistance of a proxy device. In this manner, the client terminal may be able to disable or reduce power consumption over a primary communication interface for the primary communication channel while utilizing a secondary communication interface to communicate with the proxy device. | 07-05-2012 |
20120173902 | POWER MANAGEMENT OF BASE AND DETACHABLE DEVICE - An apparatus and method are disclosed for power management. A monitor module monitors a connection between a base and a detachable device from the base and from the detachable device. The detachable device provides a display for the base if the detachable device and base are connected. A detection module detects a connection event selected from the group consisting of a detachable device connection to the base and a detachable device disconnection from the base. | 07-05-2012 |
20120173903 | SERIAL ATA (SATA) POWER OPTIMIZATION THROUGH AUTOMATIC DEEPER POWER STATE TRANSITION - A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to the Active state. The transition from the Partial state to the Slumber state is direct and the transition may be enabled, but not negotiated through a handshaking process. | 07-05-2012 |
20120173904 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY ANDENERGY CONSERVATION INCLUDING DETERMINING AN OPTIMALPOWER STATE OF THE APPARATUS BASED ON RESIDENCY TIME OFNON-CORE DOMAINS IN A POWER SAVING STATE - A processor may determine the actual residency time of a non-core domain residing in a power saving state and based on the actual residency time the processor may determine an optimal power saving state (P-state) for the processor. In response to the non-core domain entering a power saving state, an interrupt generator (IG) may generate a first interrupt and the device drivers or an operating system may use the first interrupt to start a timer (first value). In response to the non-core domain exiting the power saving state, the IG may generate a second interrupt and the device drivers or an operating system may use the second interrupt to stop the timer (final value). The power management unit may use the final and the first value to determine the actual residency time. | 07-05-2012 |
20120173905 | PROVIDING POWER OVER ETHERNET WITHIN A VEHICULAR COMMUNICATION NETWORK - A power distribution and management system within a vehicle operates to provide power over Ethernet to a plurality of powered devices coupled to a vehicular communication network of the vehicle. | 07-05-2012 |
20120173906 | Optimizing Energy Consumption and Application Performance in a Multi-Core Multi-Threaded Processor System - A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters. | 07-05-2012 |
20120179924 | INTEGRATED CIRCUIT, COMPUTER SYSTEM, AND CONTROL METHOD - An integrated circuit provided with a processor includes a loop detection unit that detects execution of a loop in the processor, a loop-carried dependence analysis unit that analyzes the loop in order to detect loop-carried dependence, and a power control unit that performs power saving control when no loop-carried dependence is detected. By detecting whether a loop has loop-carried dependence, loops for calculation or the like can be excluded from power saving control. As a result, a larger variety of busy-waits can be detected, and the amount of power wasted by a busy-wait can be reduced. | 07-12-2012 |
20120179925 | STORAGE SYSTEM - A storage system including: a storage apparatus including a plurality of storage devices on which a plurality of logical units is configured and a first controller that controls accesses to the plurality of logical units; and a file server coupled to said storage apparatus and including a second controller and a memory storing management information which indicates relationships between each of the plurality of logical units and each of a plurality of indicators; wherein the first controller, in response to a request to create a first folder with a first indicator, creates the folder on one or more first logical units included in the plurality of logical units, the one or more first logical units related to the first indicator. | 07-12-2012 |
20120179926 | MEMORY CONTROL CIRCUIT AND INTEGRATED CIRCUIT INCLUDING BRANCH INSTRUCTION AND DETECTION AND OPERATION MODE CONTROL OF A MEMORY - A memory control circuit includes a branch detection section to detect a branch instruction from an instruction fetched from a memory unit including a plurality of operation modes, and a mode control section to change an operation mode of the memory unit according to a detection result by the branch detection section. The memory unit includes a plurality of memories, the plurality of operation modes include a normal mode allowing access and a standby mode consuming a lower power than the normal mode, and in response to the detection of a branch instruction from an instruction fetched from any one of the plurality of memories, the mode control section makes standby release of the other memories. | 07-12-2012 |
20120185709 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING THREAD CONSOLIDATION - An apparatus, method and system is described herein for thread consolidation. Current processor utilization is determined. And consolidation opportunities are identified from the processor utilization and other exaction parameters, such as estimating a new utilization after consolidation, determining if power savings would occur based on the new utilization, and performing migration/consolidation of threads to a subset of active processing elements. Once the consolidation is performed, the non-subset processing elements that are now idle are powered down to save energy and provide an energy efficient execution environment. | 07-19-2012 |
20120185710 | DETERMINING AND OPTIMIZING ENERGY CONSUMPTION OF COMPUTER SYSTEMS - Management of energy consumption within a computing environment. Energy consumption of different hardware components are measured in the computing environment. Measurement includes voltage and current versus time used by the hardware components. The different measured values of energy consumption are collected, followed by tracking the hardware component used in time during an execution of an individual execution context within the computing environment. The energy consumption of the individual execution context is calculated by associating the corresponding collected measured energy consumption to the hardware component used. | 07-19-2012 |
20120185711 | FAN CONTROL DURING LOW TEMPERATURE OPERATIONS TO REDUCE PLATFORM POWER - In general, in one aspect, the disclosure describes running a cooling fan within a computer at low speed while the computer is in low temperature operations (e.g., idle). The operation of the cooling fan may reduce CPU temperature enough to decrease CPU leakage power, offsetting the power consumption of the fan, and possibly resulting in a net system power reduction. The benefit at the platform level increases further when considering the low efficiency of voltage regulation (VR) in this lower power regime, and potentially reductions in other components (e.g., graphics processor). The optimal fan speed is the speed at which the overall system power is reduced the most (e.g., CPU power savings is greater than fan power utilized). The optimal temperature may be determined dynamically during operation or may be determined in manufacturing and applied statically during operation. | 07-19-2012 |
20120191993 | SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION IN AN ELECTRONIC DEVICE HAVING A TOUCH-SENSITIVE DISPLAY - A system and method for reducing power consumption in an electronic device by controlling the transition of the electronic device from a sleep mode to a full power mode. The electronic device comprises a main processor a touch-sensitive overlay, and an overlay controller. A sequence of touch inputs on the touch-sensitive overlay are detected and captured using the overlay controller while the main processor is in the sleep mode. A subset of the sequence of touch inputs is processed using the overlay controller to determine that the sequence of touch inputs corresponds to a coarse model of a pre-determined wake-up gesture prior to transitioning the electronic device from the sleep mode to the full power mode. | 07-26-2012 |
20120191994 | ELECTRONIC DEVICE, STORAGE MEDIUM AND METHOD FOR SAVING POWER OF THE ELECTRONIC DEVICE - In a method for saving power of an electronic device, a power saving mode is defined for saving power of the electronic device, and a plurality of power configurations for the power saving mode are set. The method invokes the power saving mode of the electronic device, and determines whether the electronic device is in the power saving mode when the electronic device executes functions or applications of the electronic device. If the electronic device is in the power saving mode, the power configurations of the power saving mode are executed. If the electronic device is in a normal mode saving mode, normal configurations of the normal mode of the electronic device are executed. | 07-26-2012 |
20120191995 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING OPTIMIZING C-STATE SELECTION UNDER VARIABLE WAKEUP RATES - A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the OSes exhibit two important observations (1) the bursts of high interrupt rate are interspersed between the low interrupt rate periods and long periods of high activity levels; and (2) the interrupt rate may, suddenly, fall below an interrupt rate (of 1 milli-second, for example) that is typical of the current operating systems (OS). Instead of determining the C-state based on the stale data stored in the counters, the power control logic may determine an optimal C-state by overriding the C-state determined by the OS or any other power monitoring logic. The power control logic may, dynamically, determine an optimal C-state based on the CPU idle residency times and variable rate wakeup events to match the expected wakeup event rate. | 07-26-2012 |
20120191996 | Serial Advanced Technology Attachment Interfaces And Methods For Power Management Thereof - At least one example embodiment discloses a method of managing a power between a host serial advanced technology attachment (SATA) interface and a device SATA interface. The method includes first requesting to enter one of power saving states, defined by a SATA protocol, and second requesting to enter a deep power saving state if one of the host SATA interface and the device SATA interface operates at the first requested power saving state. The first requesting to enter one of power saving states and the second requesting to enter a deep power saving state are performed by one of the host SATA interface and the device SATA interface. | 07-26-2012 |
20120198253 | Operational Management Method for Information Processing System and Information Processing System - In an information processing system comprising an information processing equipment group and a facility equipment group, both an increase in performance and a reduction in power consumption are obtained, thereby achieving an efficient and flexible operational management. The plurality of information processing equipments are divided into a plurality of groups, each of which includes power feed equipments and cooling equipments. The operation management method for the information processing system includes: a procedure for acquiring, from each of the groups, operating information indicating the performances and the power consumptions of the information processing equipments, the power feed equipments, and the cooling equipments included in each of the groups; and another procedure for controlling, based on the operating information, the information processing equipments, the power feed equipments, and the cooling equipments included in each of the groups so that the performances with respect to the power consumptions become large. | 08-02-2012 |
20120198254 | CAPPING POWER CONSUMPTION IN A DATA STORAGE SYSTEM - A method for capping power consumption in a data storage system is provided. The method comprises associating a power quota with a first storage medium, wherein the power quota limits amount of power consumed by the first storage medium within a given time interval; receiving a request to perform an input/output (I/O) operation on the first storage medium; and servicing the request within power limits defined by the power quota. | 08-02-2012 |
20120204043 | Information Processing Apparatus, Method Of Controlling Information Processing Apparatus, And Computer Program Product - In an embodiment, an information processing apparatus has a low power mode. The information processing apparatus includes: a communication control unit; a table that stores identification information identifying an external device in association with an operation need/no-need information representing an operation need/no-need of the external device in the low power mode; a power supply control unit that acquires identification information from an external device at a time of transition to the low power mode, and performs control such that supply of electric power to the communication control unit is to be restricted when determined that the operation need/no-need information corresponding to the identification information represents the operation no-need based on the table, and such that supply of electric power to the communication control unit is continued when determined that the operation need/no-need information represents the operation need based on the table. | 08-09-2012 |
20120204044 | METHOD OF CONTROLLING NETWORK SYSTEM - Provided is a method of controlling a network system. The method includes recognizing power information and an operation mode of an electric product, and providing an energy-saving operation mode to the electric product or operating the electric product in the energy-saving operation mode for reducing an energy-related value based on the recognized power information and the operation mode of the electric product. | 08-09-2012 |
20120210149 | TECHNIQUES FOR PERFORMING STORAGE POWER MANAGEMENT - A technique for performing storage power management on storage subsystems includes measuring, using a power measurement device, power consumption of a storage subsystem. A first average power and a second average power for the storage subsystem are calculated based on the measured power consumption. In this case, the first average power is calculated over a shorter time period than the second average power. One or more first actuators are incremented in response to the first average power of the storage subsystem being greater than a first power level to reduce the first average power of the storage subsystem below the first power level within a first time period. One or more second actuators are incremented in response to the second average power of the storage subsystem being greater than a second power level and less than the first power level to reduce the second average power of the storage subsystem below the second power level within a second time period that is greater than the first time period. Finally, one or more of the first actuators and the second actuators are decremented in response to the second average power of the storage subsystem being more than an offset below the second power level to increase the power consumption of the storage subsystem. | 08-16-2012 |
20120210150 | Method And Apparatus Of Smart Power Management For Mobile Communication Terminals - A method is provided for use in a mobile communication terminal configured to support a plurality of applications, wherein each application is executed by performing one or more tasks. The method includes, in response to a scheduling request from an application, obtaining an indication of power supply condition at a requested run-time of at least one of the tasks. The method further includes obtaining a prediction of a rate of energy usage by the task at the requested run-time, and making a scheduling decision for the task. The scheduling decision comprises making a selection from a group of two or more alternative dispositions for the task. The selection is made according to a criterion that relates the run-tune power-supply condition to the predicted rate of energy usage by the task. | 08-16-2012 |
20120210151 | COMMUNICATION SYSTEMS - A communication system is provided and includes a current control circuit, a processing module, and a detection circuit. The current control circuit has an output node. The current control circuit is capable of drawing input current to the output node. The processing module is capable of operating according to a current accumulated at the output node and an output voltage at the output node. The detection circuit is capable of detecting the output voltage and controlling the processing module according to a detection result of the detection circuit. When the detection circuit detects that the output voltage is lower than a threshold, the detection circuit is capable of controlling the processing module to decrease an output power of a power amplifier or to decrease an operating frequency of a processor. | 08-16-2012 |
20120216055 | System and Method for Improving Power Supply Efficiency - A method may include: calculating approximate power requirements of components, the components supplied with electrical energy from a plurality of power supplies, each of one or more of the plurality of power supplies capable of being enabled and disabled from supplying electrical energy to the components; determining a set of possible configurations of the plurality of power supplies such that for each possible configuration, enabled power supplies of the possible configuration have adequate aggregate capacity to deliver the approximate power requirements and switching to the possible configuration from a then-present configuration would require no more than one of then-disabled power supplies be enabled and no more than one of then-enabled power supplies be disabled; and determining which of the set of possible configurations has the highest expected power efficiency. | 08-23-2012 |
20120216056 | Power Load Shedding for Inline Power Applications - In one embodiment, power from multiple inline power sources is collected. Power is supplied to powered network circuits from the collected power and any excess power from the collected power is supplied to downlink inline equipment. A worst-case power source loss scenario is determined based on power source and load information. Removal of an inline power source is detected and load power is reduced when the removed power source reduces the power required to operate the powered network circuits. | 08-23-2012 |
20120216057 | Selective Power Reduction of Memory Hardware - Managing delivery of power to one or more hardware memory devices in a computer system. The computer system is configured with a processor and at least two hardware memory devices. A temperature monitor tool is employed to monitor the hardware memory devices. Management of an addressable subset of the hardware memory devices is employed in response to the monitored temperature reading. | 08-23-2012 |
20120221870 | COMPUTER AND METHOD FOR CONTROLLING OPERATING STATE OF DEVICE THEREOF - A computer and a method for controlling an operating state of a device thereof are disclosed. The method comprises: detecting that a display portion and a host portion of the computer are in a state of being disconnected from each other; and generating a state event or a control instruction corresponding to the disconnected state for switching the device to an inactive state. With the present invention, when the state of a computer changes, e.g., when a display portion and a host portion of a portable computer are separated, an operating system can control a device to switch its operating state, e.g., deactivate the device, based on a generated state event. In this way, it is possible to avoid unnecessary power consumption of the entire computer due to the active state of the device, and any potential security risk can be eliminated. | 08-30-2012 |
20120221871 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING DETECTING AND CONTROLLING CURRENT RAMPS IN PROCESSING CIRCUIT - Some implementations provide techniques and arrangements for adjusting a rate at which operations are performed by a processor based on a comparison of a first indication of power consumed by the processor as a result of performing a first set of operations and a second indication of power consumed by the processor as a result of performing a second set of operations. The rate at which operations are performed by the processor may be adjusted when the comparison indicates that a difference between the first indication of power consumed by the processor and the second indication of power consumed by the processor is greater than a threshold value. | 08-30-2012 |
20120221872 | System and Method for Adapting a Power Usage of a Server During a Data Center Cooling Failure - A method includes detecting that a rate of temperature change in a server is above a threshold rate, changing the server to a lowest system performance state when the rate of the temperature change in the server is above the threshold rate, and reducing a fan speed to a minimum fan speed level when the rate of temperature change is above the threshold rate. | 08-30-2012 |
20120226922 | CAPPING DATA CENTER POWER CONSUMPTION - Example systems, methods and articles of manufacture to cap data center power consumption are disclosed. A disclosed example system includes a group power capper to allocate a fraction of power for a data center to a portion of the data center, a domain power capper to allocate hosted applications to a server of the portion of the data center to comply with the allocated portion of the power, and a local power capper to control a first state of the server and a second state of a cooling actuator associated with the portion of the data center to comply with the allocated portion of the power. | 09-06-2012 |
20120226923 | POWER CONSUMPTION CONTROLLER, A POWER CONSUMPTION CONTROL SYSTEM, A POWER CONSUMPTION CONTROL METHOD AND A PROGRAM THEREOF - A power consumption controller includes an input power monitoring unit, a load information monitoring unit, a redundancy configuration unit and a power control unit. The input power monitoring unit monitors an input power to a unit including a plurality of components. The load information monitoring unit measures a load of each of the components. The redundancy configuration unit stores information regarding an operation state of each of the components and extracts information regarding a configuration in which redundancy is maintained even if one of the components in operation is stopped. The power control unit detects whether or not the input power is over a predetermined value, selects a component having the smallest load among the components of the extracted configuration when the input power is over the predetermined value and switches the selected component into a power saving mode. | 09-06-2012 |
20120226924 | INTERFACE CIRCUIT SYSTEM AND METHOD FOR PERFORMING POWER MANAGEMENT OPERATIONS IN CONJUNCTION WITH ONLY A PORTION OF A MEMORY CIRCUIT - A memory circuit power management system and method are provided. An interface circuit is in communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to perform a power management operation in association with only a portion of the memory circuits. | 09-06-2012 |
20120233477 | DYNAMIC CORE SELECTION FOR HETEROGENEOUS MULTI-CORE SYSTEMS - Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a second processing core may be signaled. A first performance metric of the first processing core executing the program code may be collected. When the first performance metric is better than a previously determined core performance metric, power down of the second processing core may be signaled and execution of the program code may be continued on the first processing core. When the first performance metric is not better than the previously determined core performance metric, execution of the program code may be switched from the first processing core to the second processing core. | 09-13-2012 |
20120233478 | METHODS AND SYSTEMS FOR DATA INTERCHANGE BETWEEN A NETWORK-CONNECTED THERMOSTAT AND CLOUD-BASED MANAGEMENT SERVER - Aspects of the present invention provide energy conserving communications for networked thermostats powered, in part, by batteries. A thermostat communication server stores a thermostat battery-level to determine what data should be sent to the thermostat. The thermostat communication server classifies types of data to be transmitted to the thermostat according to a data priority ranging from a low-priority to a high-priority data type. If the battery-level associated with the battery on the thermostat is at a low battery-level, the thermostat communication server may only transmit data classified under a high-priority data type. This conserves the power used by the thermostat, allows the battery on the thermostat time to recharge and perform other functions. If the battery-level of the thermostat is at a high level, the thermostat communication server may transmit a range of data to the thermostat classified from a low-priority type to a high-priority data type. | 09-13-2012 |
20120233479 | Oversubscribing Branch Circuits While Lowering Power Distribution Costs - A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element. | 09-13-2012 |
20120233480 | POWER SAVING NOTIFICATION SYSTEM, TERMINAL DEVICE, POWER SAVING NOTIFICATION METHOD, AND POWER SAVING NOTIFICATION PROGRAM - A power saving notification system includes: a power saving possibility judgment unit which judges whether electric power saving is possible in a prescribed function of a terminal device compared to a current setting value of the function or not based on operation history information on the terminal device; and a notification unit which notifies the user of the result of the judgment when the power saving possibility judgment unit judges that electric power saving is possible. | 09-13-2012 |
20120239949 | ELECTRONIC DEVICE AND METHOD FOR APPLICATION AND PROFILE SENSITIVE BATTERY POWER MANAGEMENT - A method of power management in a portable electronic device powered by a finite power supply, such as a battery, is provided. The method comprises determining a residual power level in the finite power supply; and selectively disabling one or more applications installed on the portable electronic device based on an application ranking profile of each of the one or more applications when the residual power level falls below a threshold power level. | 09-20-2012 |
20120239950 | Apparatus and Method for Variable Authentication Requirements - An apparatus and method are disclosed for variable authentication requirements. The apparatus includes an operating status module identifying a change in an operating status of a device and maintaining a history of operating statuses, and an access control module comparing a current operating status with a previous operating status. The apparatus also includes a profile module maintaining a trust indicator for each operating status. The access control module determines a level of authentication required to unlock the device in response to the trust indicator associated with the current operating status. The method includes identifying a change in an operating status of a device and maintaining a history of operating statuses, and comparing a current operating status with a previous operating status. The method also includes maintaining a trust indicator for each operating status, and determining a level of authentication required to unlock the device in response to the trust indicator associated with the current operating status. | 09-20-2012 |
20120239951 | POWER SUPPLY SYSTEM WITH ENERGY-SAVING FUNCTION - A power supply system includes a power supply, a switch control circuit, a voltage rectifying circuit, and a trigger switch connected to the switch control circuit. The switch control circuit is connected between an alternating current (AC) power source and the power supply. The voltage rectifying circuit is connected between the AC power source and the switch control circuit to rectify an AC voltage into a direct current (DC) voltage to power the switch control circuit. When the computer system is powered off, the power supply fails to output a system voltage, and the trigger switch fails to be triggered, the switch control circuit disconnects the power supply from the AC power source. When the computer system is powered off, the power supply fails to output a system voltage, and the trigger switch is triggered, the switch control circuit connects the power supply to the AC power source. | 09-20-2012 |
20120239952 | INFORMATION PROCESSING APPARATUS, POWER CONTROL METHOD, AND RECORDING MEDIUM - A disclosed information processing apparatus includes a plurality of operating systems, a resource information storage part configured to store resource information including usage status information on hardware resources of the information processing apparatus, and a controller configured to specify at least one of the operating systems based on the resource information to report a resource release request of a desired one of the hardware resources to the specified operating system and receive a resource release report on the desired hardware resource from the specified operating system to control power associated with the desired hardware resource. | 09-20-2012 |
20120239953 | INFORMATION PROCESSING APPARATUS, POWER SAVING CONTROL METHOD, AND STORAGE MEDIUM - An information processing apparatus has a sub system that, while a main system is in power saving state, analyzes a protocol of a network communication and recovers the main system to an ordinary power mode from the power saving state, in accordance with the protocol. There is a setting unit that sets a re-transition condition which is a condition to make the main system switch to the power saving state again, depending on a kind of the network communication. Further, there is a control unit that monitors whether the re-transition condition is satisfied and switches the main system to the power saving state in response to the re-transition condition being satisfied. | 09-20-2012 |
20120246499 | Self-Powered Devices and Methods - The self-powered device is configured to be powered by energy collected from a surrounding environment. The self-powered device includes an energy collector, and a memory having instructions for selecting one of a plurality of modes of operation. The energy collector is configured to collect energy to power the self-powered device from a surrounding environment in which the self-powered device is located. The plurality of modes of operation include: (i) a low-power mode of operation in which the self-powered device consumes less than a pre-determined or adaptively-determined amount of power and the self-powered device uses less than its full capabilities, and (ii) and a high-power mode of operation in which self-powered device consumes more than the pre-determined or adaptively-determined amount of power and the self-powered device uses its full capabilities. | 09-27-2012 |
20120254640 | ALLOCATION OF STORAGE RESOURCES IN A NETWORKED COMPUTING ENVIRONMENT BASED ON ENERGY UTILIZATION - Embodiments of the present invention provide an approach to provision storage resources (e.g., across an enterprise storage system (ESS) such as a general parallel file system (GPFS) or the like) for different workloads in an energy efficient manner. The system evaluates different energy profiles/workloads' energy consumption characteristics of storage devices to determine an allocation plan that reduces the energy cost (e.g., results in the lowest cost/energy consumption for handling a storage workload). In a typical embodiment, energy consumption characteristics for handling a particular storage workload will be determined. Thereafter, a type of storage device capable of handling the workload will be determined. Then, an allocation plan that results in the most efficient energy consumption for handling the workload will be developed. In general, the allocation plan is based upon the energy consumption characteristics and an energy efficiency algorithm. The energy efficiency algorithm serves to identify storage device(s) that can handle the workload in such a way as to reduce total energy consumption and, accordingly, costs. Along these lines, the energy efficiency algorithm may also consider other factors such as capacity and load of storage devices and service level agreement (SLA) terms in addition to energy costs (e.g., over times of day and/or days of week). In any event, at least one storage device can then be selected for handling the storage workload according to the allocation plan. | 10-04-2012 |
20120254641 | APPARATUS AND METHOD FOR HIGH CURRENT PROTECTION - An apparatus may comprise one or more processor cores of a processor and a set of current limiters. Each current limiter may be coupled to a respective processor core and arranged to monitor processor activity in the processor, to compare the processor activity to one or more current limits of multiple current limits; and to initiate a current-limiting action when the one or more current limits is exceeded. | 10-04-2012 |
20120254642 | Information Processing Device, Method for Calculating Degree of Contribution to Power Saving, and Presentation Method - According to an embodiment, an information processing device includes a storage section, a computing section, and an index calculating section. The storage section stores a current set value for each of the at least one setting item associated with saving of power consumed by a computer and table data including a score defined in advance for each of set values. The computing section performs a computation for converting the current set value into a score and a computation for converting a most power-saving one of the set values into a score on the basis of a result of checking the current set values at fixed intervals and the scores in the table data. The index calculating section calculates an index of how much drive status of the computer with the current set values contributes to power saving on the basis of results of the computations from the computing section. | 10-04-2012 |
20120254643 | Managing Power Consumption In A Multi-Core Processor - A processor may include a core and an uncore area. The power consumed by the core area may be controlled by controlling the Cdyn of the processor such that the Cdyn is within an allowable Cdyn value irrespective of the application being processed by the core area. The power management technique includes measuring digital activity factor (DAF), monitoring architectural and data activity levels, and controlling power consumption by throttling the instructions based on the activity levels. As a result of throttling the instructions, throttling may be implemented in 3 | 10-04-2012 |
20120260112 | CONTEXT SENSITIVE POWER MANAGEMENT FOR A RESOURCE - Power management systems and methods are presented. In one embodiment, implementation of a method for context specific power management of a resource, comprises: defining a context within which a resource operates, wherein the context is defined by one or more parameters; tracking a usage history of the resource operating within the context to determine passive user feedback related to a plurality of timeout values; and determining a timeout value for a current operation of the resource within the context based on the usage history. | 10-11-2012 |
20120260113 | Changing Device Behavior Based on External Information - A first electronic device comprises an information-filtering module configured to identify one or more second electronic devices that supply one or more types of information needed by the first electronic device; an information-gathering module coupled to the information-filtering module configured to collect information from the second electronic devices; and an operation module coupled to the information-gathering module configured to adjust operational behavior of the first electronic device based on the collected information. | 10-11-2012 |
20120260114 | ON DEMAND HARD DISK DRIVE SYSTEM ON A CHIP POWER CONTROL SCHEME - An access instruction associated with accessing a target location in a disk is obtained. A number of units until the target location is accessed is calculated. It is determined whether there is time for the group of logic to transition from a lower power state to an operational state; the determination is based at least in part on the number of units between a current location of a read head associated with the hard disk system and the target location which is different from the current location of the read head and a warm up time associated with the group of logic. If it is determined there is time, the group of logic is put into the lower power state. | 10-11-2012 |
20120266002 | SEMICONDUCTOR MEMORY DEVICE HAVING LOW POWER MODE AND RELATED METHOD OF OPERATION - A semiconductor memory device has a normal power mode and a low power mode. In the low power mode, a selection circuit assigns one data address to at least two memory cells in the semiconductor memory device, and it reads or writes one unit of data from the at least two memory cells. | 10-18-2012 |
20120266003 | SYSTEM AND METHOD FOR CONSERVING ENERGY IN A DIGITAL HOME NETWORKING DEVICE - A method and apparatus configures a power level for a device able to receive audio, video, and data signals. An input signal is received by a receiver capable of receiving broadcast data signals and digital home networking signals. The system determines if the receiver is operating in a first mode having a first power level or a second mode having a second power level based on a type of input signal received by the receiver. A control signal is generated for modifying at least one setting on a first circuit for configuring the first circuit to operate according to the first power level if the input signal is a first type of input signal. The control signal is provided to the first circuit and the first circuit is configured to operate according to the first power level based on the control signal. | 10-18-2012 |
20120272078 | METHOD AND SYSTEM FOR THERMAL MANAGEMENT OF BATTERY CHARGING CONCURRENCIES IN A PORTABLE COMPUTING DEVICE - A method and system for reducing thermal load by monitoring temperatures within a portable computing device and, based on those temperatures, controlling a battery charge function are disclosed. The method includes monitoring a power management integrated circuit (“PMIC”) to determine if it is generating excess thermal energy that is contributory to an elevated temperature in a physically proximate application specific integrated circuit (“ASIC”). If so, and if the excess thermal energy is attributable to an ongoing battery recharge operation executed by the PMIC, a thermal policy manager module may execute a thermal mitigation technique algorithm to override the PMIC battery recharge function. One exemplary thermal mitigation technique may include a reduction of current sent to the battery, thus slowing the charge cycle and reducing the generation of excess thermal energy. | 10-25-2012 |
20120272079 | POWER SAVING OPERATION OF ALWAYS-CONNECTED WIRELESS ROAMING - Methods and apparatuses enable maintaining wireless connectivity while the wireless client device is in a power save mode. The system includes a host operating system (OS) that handles wireless connections while the device is executing in normal operation, and an embedded agent that handles the wireless connections when the device switches to power saving operation and the host OS switches to a sleep or standby state. The system detects a change in the power save mode and triggers an exchange of session context information between the host OS and the embedded agent (from the host OS to the embedded agent when the system enters the power save mode, and from the embedded agent to the host OS when the system returns to normal operation from the power save mode). The system also triggers the switching of management consistent with the passing of session context information. | 10-25-2012 |
20120278638 | ELECTRONIC DEVICE AND CONTROL METHOD - An electronic device includes a main body, a cover hinged on the main body, a first sensor arranged in the main body, a second sensor arranged in the cover, and a processor. The first sensor senses a change of displacement of the first sensor when the main body is moved to generate a first coordinate information. The second sensor senses a change of displacement of the second sensor when the cover is moved to generate a second coordinate information. The processor calculates an angle between the main body and the cover according to the first coordinate information and the second coordinate information, and controls the electronic device according to the calculated angle. A method for controlling an electronic device is also provided. | 11-01-2012 |
20120284543 | USER INPUT TRIGGERED DEVICE POWER MANAGEMENT - Techniques for user input triggered device power management are described that enable user inputs and activities to cause selective changes in power states for a device. Power can be boosted to a high power state to improve responsiveness for designated inputs and/or activities. When responsiveness is deemed less important in connection with particular inputs and/or activities, a low power state can be set to reduce energy consumption. In at least some embodiments, selectively switching between power states includes detecting various user inputs at a device and filtering the inputs to select power states associated with the user inputs. The device can then be operated in a selected power state until a transition to a different power state is triggered by occurrence of designated events, such as running of a set time interval, further user input, and/or completion of user activity. | 11-08-2012 |
20120284544 | Storage Device Power Management - Techniques for storage device power management are described that enable coordinated buffer flushing and power management for storage devices. In various embodiments, a power manager can coordinate the flushing of pending or “dirty” data from multiple buffers of a computing device in order to reduce or eliminate interleaved (e.g., uncoordinated) data operations from the multiple buffers that can cause shortened disk idle periods. By so doing, the power manager can selectively manage power states for one or more power-managed storage devices to produce longer idle periods. For example, information regarding the status of multiple buffers can be used in conjunction with analysis of historical I/O patterns to determine appropriate times to spin down a disk or allow the disk to keep spinning. Additionally, user-presence information can be utilized to tune the aggressiveness of buffer coordination and state transitions for power-managed storage devices to improve performance. | 11-08-2012 |
20120284545 | Network Device - A network device may be provided with a PHY layer process unit, a determination unit configured to determine that a link state is a link up state or a link down state, and a first control unit configured to control an electrical power supply for the PHY layer process unit. The first control unit may be configured to stop a continuous electrical power supply for the PHY layer process unit if the determination unit determines that the link state is the link down state during a first period in which the continuous electrical power supply is being performed, perform a temporary electrical power supply for the PHY layer process unit during a second period, and commence the continuous electrical power supply if the temporary electrical power supply is performed during the second period and the determination unit determines that the link state is the link up state. | 11-08-2012 |
20120290860 | COMPUTER POWER SUPPLIER WITH A STANDBY POWER SAVING CONTROLLER - A computer power supplier with a built-in power saving controller has a power input socket connected to external AC power supply. A DC switch circuit is connected to AC power and converts AC into DC. A control switch is connected to the AC power. A computer power supply circuit is connected to the AC power of the control switch and converts the AC into DC. A power output socket is connected to the AC power of the control switch and supplies power to peripheral equipment. A power start-up circuit is connected to the DC power of the DC switch circuit and the control switch, and operates the control switch to transmit AC power. A cluster cable transmits the DC power to the mainframe. A boot button is connected both to the start-up circuit and mainboard, so as to convert the AC into DC for the mainframe and start-up circuit. | 11-15-2012 |
20120290861 | Power Saving Method and Apparatus thereof - At startup of an apparatus including a memory and an operating device, an operating system is loaded to the memory as an operating system. While an idle time of the operating device exceeds a predetermined time, the loaded operating system cuts power to the operating device so that the operating device can be completely shut down. As a result, power consumption of the operating device is significantly reduced. | 11-15-2012 |
20120290862 | OPTIMIZING ENERGY CONSUMPTION UTILIZED FOR WORKLOAD PROCESSING IN A NETWORKED COMPUTING ENVIRONMENT - Embodiments of the present invention provide an approach for optimizing energy consumption utilized for workload processing in a networked computing environment (e.g., a cloud computing environment). Specifically, when a workload is received, an energy profile (e.g., contained in a computerized data structure) associated with the workload is identified. Typically, the energy profile identifies a set of computing resources needed to process the workload (e.g., storage requirements, server requirements, processing requirements, network bandwidth requirements, etc.), energy consumption attributes of the set of computing resources, and a proposed duration of the workload. Based on the information contained in the energy profile (and resource availability) a schedule (e.g., time, location, etc.) for processing the workload will be determined so as to optimize energy consumption associated with the processing of the workload. In a typical embodiment, the schedule will be determined such that a total cost for processing the workload can be minimized and/or to any budgeted amount/costs can be met. | 11-15-2012 |
20120290863 | Budget-Based Power Consumption For Application Execution On A Plurality Of Compute Nodes - Methods, apparatus, and products are disclosed for budget-based power consumption for application execution on a plurality of compute nodes that include: assigning an execution priority to each of one or more applications; executing, on the plurality of compute nodes, the applications according to the execution priorities assigned to the applications at an initial power level provided to the compute nodes until a predetermined power consumption threshold is reached; and applying, upon reaching the predetermined power consumption threshold, one or more power conservation actions to reduce power consumption of the plurality of compute nodes during execution of the applications. | 11-15-2012 |
20120297215 | INTELLIGENT USER DETERMINABLE POWER CONSERVATION IN A PORTABLE ELECTRONIC DEVICE - An electronic device includes at least one memory unit, a plurality of applications residing on at least one of the memory units, a display screen and a portable power supply. The electronic device also includes a power management module, which has a power monitor for monitoring an amount of remaining power available from the portable power supply. A processor is operatively associated with the memory units, display screen and portable power supply. The processor is configured to indicate to a user that one or more predetermined ones of the applications should not be used in order to conserve power when the remaining power falls below the first threshold level. | 11-22-2012 |
20120297216 | DYNAMICALLY SELECTING ACTIVE POLLING OR TIMED WAITS - Dynamically selecting active polling or timed waits by a server in a clustered system includes determining a load ratio of a processor of the server, which is determined by calculating a ratio of an instantaneous run queue occupancy to a number of cores of the processor. The processor is occupied by a first runnable thread that requires a message response. A determination may be made whether power management is enabled on the processor, an instantaneous state may be determined based on the load ratio and whether power management is enabled on the processor, and a state process corresponding to the instantaneous state may be executed. | 11-22-2012 |
20120297217 | POWER CONTROLLER, POWER CONTROLLING DEVICE AND POWER-SAVING METHOD FOR POWER CONTROLLING DEVICE - The present disclosure illustrates a power controller adapted for controlling the operation of a power socket. The power controller includes a first signal transmission interface and a first micro-control unit. The first signal transmission interface receives power control flow data and a mode signal for the peripheral devices of a host computer. The first micro-control unit outputs a control signal in accordance with the received periphery power control flow data and the received mode signal from a host computer. Further, the first micro-control unit through the communication established between a first communication unit and the second communication unit of the power socket outputs a control signal to the power socket, in order to control the power socket to power or not to power the peripheral devices after a predetermined time delay. | 11-22-2012 |
20120297218 | CLOUD-BASED ENERGY-SAVING SERVICE SYSTEM AND METHOD - A cloud-based energy-saving service system and method are disclosed. The service system and method of this invention use the strong computation capabilities of the cloud computing technology and systems to determine the power consumption policies of the mobile devices and provide the policies to the mobile devices, whereby the mobile devices implement the power consumption policies to save its power consumptions. In one aspect, the invented system and method calculate and determine the backlight level polices for a particular video stream, then provide the policies information to the mobile devices for implementation. The policies information may be provided to the mobile devices independently or along with the video stream. The calculation of the backlight illumination levels may be done in advance or on remand. | 11-22-2012 |
20120297219 | CIRCUIT AND METHOD OF DRIVING THE SAME - In order to reduce power consumption, an arithmetic circuit having a function of performing a logic operation processing based on an input signal, storing a potential set in accordance with the result of the logic operation processing as stored data, and outputting a signal with a value corresponding to the stored data as an output signal. The arithmetic circuit includes an arithmetic portion performing the logic operation processing, a first field-effect transistor controlling whether a first potential, which is the potential corresponding to the result of the logic operation processing is set, and a second field-effect transistor controlling whether the potential of the output signal data is set at a second potential which is a reference potential. | 11-22-2012 |
20120297220 | ARITHMETIC CIRCUIT AND METHOD OF DRIVING THE SAME - In order to reduce power consumption, an arithmetic circuit having a function of performing a logic operation processing based on an input signal, storing a potential set in accordance with the result of the logic operation processing as stored data, and outputting a signal with a value corresponding to the stored data as an output signal. The arithmetic circuit includes an arithmetic portion performing the logic operation processing, a first field-effect transistor controlling whether a first potential, which is the potential corresponding to the result of the logic operation processing is set, and a second field-effect transistor controlling whether the potential of the output signal data is set at a second potential which is a reference potential. | 11-22-2012 |
20120297221 | ADDER - A circuit in which a storage function and an arithmetic function are combined is proposed by using a transistor with low off-state current for forming a storage element. When the transistor with low off-state current is used, electric charge can be held, for example, in a node or the like between a source or a drain of the transistor with low off-state current and a gate of another transistor. Thus, the node or the like between one of the source or the drain of the transistor with low off-state current and the gate of the another transistor can be used as a storage element. In addition, leakage current accompanied by the operation of an adder can be reduced considerably. Accordingly, a signal processing circuit consuming less power can be formed. | 11-22-2012 |
20120297222 | BRIDGES AND OPERATION METHODS THEREFOR - A bridge is provided. The bridge is coupled between a host and a peripheral apparatus and includes a connector, a power circuit, and a bridge circuit. The connector connects the host and comprises a power pin. The power circuit converts a supplying power to a driving voltage when the power circuit is enabled. The bridge circuit is powered by the driving voltage and performs a data transmission procedure between the host and the peripheral apparatus. An enabling terminal of the power circuit is coupled to the power pin to receive an enabling signal transmitted by the host through the power pin. The power circuit is enabled to provide the driving voltage when the enabling signal is provided with a first potential. The power circuit is disabled to stop providing the driving voltage when the enabling signal is provided with a second potential. | 11-22-2012 |
20120297223 | METHOD AND DEVICE FOR PROVIDING LOW POWER CONSUMPTION SERVICES AND COMMUNICATION SYSTEM - A method and a device for providing low power consumption services and a communication system are provided in the embodiments of the present disclosure. The method includes: receiving a low power consumption request sent by a terminal; when determining that the low power consumption request is supported, sending a first configuration parameter indicating that the low power consumption request is supported to a base station, so that the base station performs low power consumption communication with the terminal according to the first configuration parameter; and sending acknowledgement information indicating that the low power consumption request is supported to the terminal, in which the acknowledgement information carries a second configuration parameter, so that the terminal performs low power consumption communication with the base station according to the second configuration parameter. In this way, a network side provides services with different power consumption for different terminals according to requirements of terminals. | 11-22-2012 |
20120303985 | State retention circuit adapted to allow its state integrity to be verified - A state retention component is provided which is configured to form part of data processing circuitry. The state retention component is configured to hold a state value at a node of the data processing circuitry when the data processing circuitry enters a low power mode. The state retention component comprises a scan input, wherein the state retention component configured, when a scan enable signal is asserted, to read in the state value from a scan input value applied at the scan input, and a scan output, wherein the state retention component is configured, when the scan enable signal is asserted, to read out the state value to the scan output. When the scan enable signal is not asserted, the state retention circuit outputs at the scan output a parity value, wherein the parity value is generated by combinatorial function circuitry on the basis of the state value and the scan input value, wherein the combinatorial function circuitry is configured such that the parity value inverts if either the state value or the scan input value changes, thus providing an external indication of the integrity of the state value held by the state retention component. | 11-29-2012 |
20120303986 | Verifying state integrity in state retention circuits - A data processing apparatus is provided comprising data processing circuitry configured to perform data processing operations. A plurality of state retention circuits forms part of the data processing circuitry and these circuits are configured to hold respective state values at respective nodes of the data processing circuitry it enters a low power mode. One or more scan paths connect the plurality of state retention circuits together in series, such that the state values may be scanned into and out of the respective nodes. A plurality of parity information generation elements are coupled to the scan path(s) and configured to generate parity information indicative of the respective state values held at those respective nodes by the state retention circuits. The plurality of parity information generation elements are arranged to provide one or more parity path(s), such that an output parity value generated at an output of the parity path will invert if one of said respective state values changes, providing an external indication of the integrity of the state values held by the state retention circuits. | 11-29-2012 |
20120303987 | ENERGY CONTROL APPARATUS AND METHOD USING PROPERTY OF ELECTRONIC DEVICE - An energy control apparatus and method using a usage property of an electronic device. The energy control method may include: setting a total power consumption to be less than a predetermined threshold; verifying a usage property for each electronic device when a collected total power consumption exceeds the threshold; calculating a scheduled end time based on the average usage time of each remaining electronic device excluding, from among operating devices, an electronic device of which power-off is unavailable; verifying a remaining electronic device excluding an electronic device of which scheduled end time is less than the threshold; controlling a temporarily stoppable electronic device to be temporarily stopped; controlling a power adjustable electronic device to decrease a power consumption when the total power consumption exceeds the threshold; and starting the temporarily stopped electronic device at a point in time when the total power consumption decreases to be less than the threshold. | 11-29-2012 |
20120303988 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - When a packet received in a deep sleep mode matches a packet stored in a WOL-pattern storage region, a network portion performs reply processing suited for the matched packet after returning a power supply mode of a power supply unit from the deep sleep mode to a normal mode. When the packet received in the deep sleep mode matches a packet stored in a proxy-response-pattern storage region, the network portion performs reply processing suited for the matched packet while maintaining the power supply mode of the power supply unit at the deep sleep mode. | 11-29-2012 |
20120311357 | MULTI-LEVEL THERMAL MANAGEMENT IN AN ELECTRONIC DEVICE - An electronic device is configured to manage heat in the device using a multi level thermal management process. When the temperature of the device reaches a level that requires the device to take action to adjust its thermal behavior, a system level controller identifies a component in the device as being active and that can be controlled to adjust heat generation in the device. Once an active component is identified, a component level controller sets an activity limit for the identified active component that is at or above a minimum activity limit of the component and prevents the component from operating above this activity limit. Other embodiments are also described and claimed. | 12-06-2012 |
20120311358 | METHOD FOR ACTIVATING CARD WITHIN A COMMUNICATION NETWORK - A method for activating a card within a communication network, making it possible to minimize the power consumption cost of putting the card into effect. The method consists of seeking out, and activating as a priority, cards which are located in already-activated receptacles. A receptacle may be a tray or cabinet in a predetermined search range corresponding to one or more nodes of said communication network. | 12-06-2012 |
20120317429 | GREEN COMPUTING HETEROGENEOUS COMPUTER SYSTEM - A green computing heterogeneous computer system for executing software has at least one performance processor, a processor supporting logic supporting the at least one performance processor for executing tasks of the software, and a hypervisor processor that consumes less power than the at least one performance processor. Supported by the processor supporting logic, the hypervisor processor executes tasks of the software that the hypervisor processor has sufficient processing power to handle and puts the at least one performance processor to a power-conserving state. The hypervisor processor brings the at least one performance processor out of idle state to execute tasks of the software that the hypervisor processor has insufficient processing power to handle. The at least one performance and hypervisor processors simultaneously execute tasks of the software that require combined processing power of all processors. | 12-13-2012 |
20120324256 | DISPLAY MANAGEMENT FOR MULTI-SCREEN COMPUTING ENVIRONMENTS - Embodiments of the present invention provide a method, system and computer program product for power management for a multi-display computing environment. In an embodiment of the invention, a computer data processing system can be configured for power management for a multi-display computing environment. The system can include a computer with at least one processor and memory, a video display adapter disposed in the computer and multiple different displays driven by the adapter. The system also can include a selective power management module coupled to the computer and configured to selectively apply power management to only one of the displays in which a period of inactivity is detected, while not applying power management to remaining ones of the displays. | 12-20-2012 |
20120324257 | POWER SUPPLY - A power supply according to various embodiments of the disclosure is configured to detect an event and, in response to the event, alternately supply power to a plurality of provided devices via a provided bus at a first current level or at a second current level, the second current level less than the first current level. Among other things, embodiments in this disclosure help allow additional devices to be used on a bus, even where the total power consumption of the devices would normally exceed a maximum defined by a bus architecture. Furthermore, various embodiments help allow a single gauge of wire to be used throughout a bus network (even where long lengths of wire are required) while still providing sufficient power to the devices connected to the bus. | 12-20-2012 |
20120324258 | POWER STATE MANAGEMENT OF AN INPUT/OUTPUT SERVICING COMPONENT OF A PROCESSOR SYSTEM - A method of regulating power states in a processing system may begin with a processor component reporting a present processor power state to an input-output hub, where the present processor power state corresponds to one of a plurality of different processor power states ranging from an active state to an inactive state. The input-output hub receives data indicative of the present processor power state and, in response to receiving the present processor power state, establishes a lowest allowable hub power state that corresponds to one of a plurality of different hub power states ranging from an active state to an inactive state. The method continues by determining a present hub power state for the input-output hub, wherein depth of the present hub power state is less than or equal to depth of the lowest allowable hub power state. | 12-20-2012 |
20120324259 | POWER AND LOAD MANAGEMENT BASED ON CONTEXTUAL INFORMATION - A power context system is described herein that makes decisions related to device power usage based on factors such as location, load, available alternatives, cost of power, and cost of bandwidth. The system incorporates contextual knowledge about the situation in which a device is being used. Using the context of location, devices can make smarter decisions about deciding which processes to migrate to the cloud, load balancing between applications, and switching to power saving modes depending on how far the user is from a power source. As the cloud becomes more frequently used, load balancing by utilizing distributed data warehouses to move processes to different locations in the world depending on factors such as accessibility, locales, and cost of electricity are considerations for power management. Power management of mobile devices is becoming important as integration with the cloud yields expectations of devices being able to reliably access and persist data. | 12-20-2012 |
20120324260 | ELECTRONIC APPARATUS FOR SAVING POWER, AND METHOD OF SAVING POWER IN AN APPARATUS - According to one embodiment, a transceiver acquires actual consumption data and predicted consumption data for each time slot, from a power supply management system. A data analysis block analyzes the actual consumption data and the predicted consumption data, and generates graph data representing a graph showing a result of the analysis. A display control block causes a display device to display the graph and a power-save line in the graph. A power-save line control block moves the power-save line to a desired position and utilizes a value associated with the desired position as a value at which to start power saving. A command signal output block outputs a power-save command signal to an apparatus which should save power, if the actual consumption data and/or the predicted consumption data exceed the value indicated by the power-save line. | 12-20-2012 |
20120324261 | USB 3.0 HOST WITH LOW POWER CONSUMPTION AND METHOD FOR REDUCING POWER CONSUMPTION OF A USB 3.0 HOST - A USB 3.0 host with low power consumption includes a super speed circuit, a non-super speed circuit, and a control module. The super speed circuit is used for transmitting data at a first transmission speed. A default state of the super speed circuit is turning-off. The non-super speed circuit is used for transmitting data at a second transmission speed, a third transmission speed, or a fourth transmission speed. The first transmission speed is faster than the second transmission speed, the third transmission speed, and the fourth transmission speed. The control module is used for detecting whether a USB peripheral device is connected to the USB 3.0 host, and controlling turning-on and turning-off of the super speed circuit. | 12-20-2012 |
20120324262 | Automatic Power Saving for Communication Systems - Various embodiments of a power saving scheme in data communication are provided. In one aspect, a method transmits a plurality of symbols each of which containing an overhead portion and at least a portion of a respective data transmission unit (DTU). In particular, the method transmits the overhead portion of a first symbol of the plurality of symbols and the at least a portion of a respective DTU of the first symbol when the at least a portion of the respective DTU of the first symbol contains payload data. The method transmits the overhead portion of a second symbol of the plurality of symbols without transmitting the at least a portion of a respective DTU of the second symbol when the at least a portion of the respective DTU of the second symbol contains no payload data. | 12-20-2012 |
20120324263 | Priority-Based Power Capping in Data Processing Systems - A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system. | 12-20-2012 |
20120324264 | Priority-Based Power Capping in Data Processing Systems - A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system. | 12-20-2012 |
20120324265 | COORDINATED LINK POWER MANAGEMENT - A method, apparatus, and system for coordinated link power management. Some embodiments of a method include receiving an exit latency for each of a group of link states for a link, with a device being coupled to an interconnect via the first link. A latency tolerance value is determined and communicated, and a platform latency is received. The method further provides for determining a link budget for the device, the link budget indicating an amount of time available for an exit from a link state for the device; and selecting one of the link states based at least in part on the link budget. | 12-20-2012 |
20120331317 | POWER-CAPPING BASED ON UPS CAPACITY - The power draw of equipment in a data center may be capped in order to keep the power draw under the capacity of the Uninterruptable Power Supply (UPS) that serves the data center. The current capacity of the UPS may be estimated, and the equipment may be controlled so as to keep the equipment's power draw under that current capacity. Factors that may affect the estimate of the UPS's current capacity include the history of temperature and humidity to which the UPS has been subject, and charge/discharge history of the UPS. Factors that may affect the decision of which equipment to throttle to a lower power level include: the current power load at the data center, the type of software that each server is running, and the demand for that software. | 12-27-2012 |
20120331318 | SAVING POWER BY MANAGING THE STATE OF INACTIVE COMPUTING DEVICES - Managing readiness states of a plurality of computing devices. A programmed processor unit operates, upon receipt of a request, to: provide one or more computing devices from an inactive pool to an active pool, or accept one or more active computing devices into the inactive pool. The system proactively manages the inactive states of each computing device by: determining the desired number (and identities) of computing devices to be placed in each inactive state of readiness by solving a constraint optimization problem that describes a user-specified trade-off between expected readiness (estimated time to be able to activate computing devices when they are needed next) and conserving energy; generating a plan for changing the current set of inactive states to the desired set; and, executing the plan. Multiple alternative ways of quantifying the desired responsiveness to surges in demand are provided. | 12-27-2012 |
20120331319 | SYSTEM AND METHOD FOR POWER OPTIMIZATION - A technique for reducing the power consumption required to execute processing operations. A processing complex, such as a CPU or a GPU, includes a first set of cores comprising one or more fast cores and second set of cores comprising one or more slow cores. A processing mode of the processing complex can switch between a first mode of operation and a second mode of operation based on one or more of the workload characteristics, performance characteristics of the first and second sets of cores, power characteristics of the first and second sets of cores, and operating conditions of the processing complex. A controller causes the processing operations to be executed by either the first set of cores or the second set of cores to achieve the lowest total power consumption. | 12-27-2012 |
20130007481 | Software-centric power management - A trigger can relate to power usage of a computing device that a computer program to be run or running on the computing device causes. Detection of the trigger causes performance of a power-saving action. The power-saving action relates to the computer program to reduce the power usage of the computing device. The power-saving action is a strictly software-oriented action. An amount of power of the computing device used in detecting the trigger and performing the power-saving action is less than a reduction of the power usage of the computing device that results from performing the power-saving action, resulting in a net power usage reduction. | 01-03-2013 |
20130007482 | MODE CHANGING POWER CONTROL - An apparatus and method of determining a communications mode. An operating condition of a device is monitored to determine if the operating condition satisfies a condition for loss of charging of a power pack of the device. Examples of operating conditions that satisfy a condition for loss of charging of a power pack of the device include determining that a power pack temperature of the power pack exceeds a power reduction temperature threshold and determining that a net electrical current drawn from the power pack exceeds a net charging electrical current delivered to the power pack. In response to determining that an operating condition of a device satisfies a condition for loss of charging of a power pack of the device, a wireless communications mode of the device is switched from a first mode to a second mode, where the second mode consumes less energy than the first mode. | 01-03-2013 |
20130007483 | METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM - A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention. | 01-03-2013 |
20130007484 | System and Method for Determining Transmitting Frequency to Maintain Remote Application Server Connectivity - A system and method for maintaining connectivity between a host system running an Always-On-Always-Connected (AOAC) application and an associated remote application server includes determining a timing interval Ti for sending keep-alive messages. The timing interval Ti may be determined by selecting a value for a timeout (Ti) to a value between a maximum timeout (T | 01-03-2013 |
20130007485 | STANDBY POWER REDUCING APPARATUS - A standby power reducing module according to an embodiment includes a AC rectification unit; a resonance unit electrically connected to the AC rectification unit and dropping DC voltage; a microcomputer connected to the resonance unit and controlling all operations of a system; a power blocking unit electrically connected to the microcomputer and blocking output voltage of the resonance unit when the system is switched into standby mode; and a independent power supplying unit supplying the standby power to the microcomputer when the system is switched into the standby mode. | 01-03-2013 |
20130007486 | METHOD AND SYSTEM FOR DETERMINING AN ENERGY-EFFICIENT OPERATING POINT OF A PLATFORM - A method and system for determining an energy-efficient operating point of the platform or system. The platform has logic to dynamically manage setting(s) of the processing cores and/or platform components in the platform to achieve maximum system energy efficiency. By using the characteristics of the workload and/or platform to determine the optimum settings of the platform, the logic of the platform facilitates performance guarantees of the platform while minimizing the energy consumption of the processor core and/or platform. The logic of the platform identifies opportunities to run the processing cores at higher performance levels which decreases the execution time of the workload and transitions the platform to a low-power system idle state after the completion of the execution of the workload. Since the execution time of the workload is reduced, the platform spends more time in the low-power system idle state and therefore the overall system energy consumption is reduced. | 01-03-2013 |
20130007487 | Software-centric power management - A trigger can relate to power usage of a computing device that a computer program to be run or running on the computing device causes. Detection of the trigger causes performance of a power-saving action. The power-saving action relates to the computer program to reduce the power usage of the computing device. The power-saving action is a strictly software-oriented action. An amount of power of the computing device used in detecting the trigger and performing the power-saving action is less than a reduction of the power usage of the computing device that results from performing the power-saving action, resulting in a net power usage reduction. | 01-03-2013 |
20130007488 | POWER MANAGEMENT OF A STORAGE DEVICE INCLUDING MULTIPLE PROCESSING CORES - A method of managing power of the storage device including a first processing core for controlling a first function block and a second processing core for controlling a second function block includes: analyzing a pattern of commands received from the outside; selecting an operation mode of the storage device based on the analyzed pattern; and managing the electric power of the storage device by using the first processing core if the selected operation mode is a first mode, and separately managing electric powers of the first and second function blocks by using the first and second processing cores, respectively, if the selected operation mode is a second mode. | 01-03-2013 |
20130007489 | SYSTEM AND METHOD FOR STANDBY POWER REDUCTION IN A SERIAL COMMUNICATION SYSTEM - In a serial communication system having a device including a receiver detection module, this specification is directed to systems and methods for selectively reducing the power consumed by the receiver detection module, preferably when the device is operating in a low power mode. In some embodiments, a signal detection module is configured to receive a control signal from the transmitter of a device at the other end of the communications link to control the operation of the receiver detection module. The control signal may be in-band or may be transmitted on a sideband of the serial link. | 01-03-2013 |
20130007490 | MULTICORE PROCESSOR SYSTEM, POWER CONTROL METHOD, AND COMPUTER PRODUCT - A multicore processor system having multiple cores, includes processors configured to measure bandwidth of a network; compare the measured bandwidth and a given threshold; determine among the cores and based on an obtained comparison result, a core adjustment number by which the number of cores executing a given process related to data communicated through the network is adjusted; calculate the number of executing cores after adjustment by the core adjustment number and based on the number of cores executing the given process before the adjustment and the determined core adjustment number; specify a core executing the given process among the cores and based on the calculated number of executing cores after the adjustment; and distribute the communicated data to the specified core executing the given process. | 01-03-2013 |
20130013941 | ON-DEMAND STORAGE SYSTEM ENERGY SAVINGS - Embodiments of the invention relate to dynamic power management of storage volumes and disk arrays in a storage subsystem to mitigate loss of performance resulting from the power management. The volumes and arrays are prioritized, and in real-time power is selectively reduced in response to both the prioritization and an energy savings goal. A feedback loop is provided to dynamically measure associated power gain based upon a lowering of power consumption, and device selection may be adjusted based upon received feedback. | 01-10-2013 |
20130013942 | Information Processing Device and Method for Controlling Information Processing Device - A first battery | 01-10-2013 |
20130013943 | ON-DEMAND STORAGE SYSTEM ENERGY SAVINGS - Embodiments of the invention relate to dynamic power management of storage volumes and disk arrays in a storage subsystem to mitigate loss of performance resulting from the power management. The volumes and arrays are prioritized, and in real-time power is selectively reduced in response to both the prioritization and an energy savings goal. A feedback loop is provided to dynamically measure associated power gain based upon a lowering of power consumption, and device selection may be adjusted based upon received feedback. | 01-10-2013 |
20130013944 | MULTIPROCESSOR SYSTEM AND CONTROL METHOD THEREOF, AND COMPUTER-READABLE MEDIUM - A multiprocessor system configured to share processes by a main system having a first processor and a subsystem having a second processor, comprises a first shared memory configured to receive accesses from the main system and the subsystem, a second memory configured to receive access from the subsystem at a power saving mode, a stop unit configured to stop accesses from the main system and the subsystem to the first shared memory when the subsystem enters the power saving mode, and a switching unit configured to switch an access destination of the subsystem from the first shared memory to the second memory when the subsystem enters the power saving mode. | 01-10-2013 |
20130013945 | METHOD AND APPARATUS FOR A ZERO VOLTAGE PROCESSOR SLEEP STATE - Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A processor may include a dedicated cache memory. A voltage regulator may be coupled to the processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero and the state variables associated with the processor may be saved to the dedicated cache memory. | 01-10-2013 |
20130024705 | VIRTUAL COMPUTER SYSTEM, DEVICE SHARING CONTROL METHOD, COMPUTER-READABLE RECORDING MEDIUM, AND INTEGRATED CIRCUIT - A total power saving controller AA | 01-24-2013 |
20130031388 | ZERO POWER HIBERNATION MODE WITH INSTANT ON - Systems, methods, and other embodiments associated with a processor configured with a zero power hibernation/sleep mode during which the processor consumes no power are described. According to one embodiment, a processor includes a power management logic. The power management logic is configured to receive a control signal requesting the processor to transition into a power saving mode that reduces power to the processor while retaining a current state of the processor. The power management logic is configured to store, in response to the control signal, a current state of components of the processor in a non-volatile memory. The power management logic is configured to adjust power to the processor to a zero power mode to place the processor into the power saving mode, wherein during the zero power mode the processor is receiving no power. | 01-31-2013 |
20130031389 | Computer System with Over-Subscription Mode of Power Supply - A computer system with an over-subscription mode of power-supplying device is provided. The computer system includes at least a power-consuming device, at least a power-supplying device, and a power management controller. The at least a power-supplying device supplies power to the at least a power-consuming device. The output power of the at least a power-supplying device has a maximum label value, a safety limitation value higher than the maximum label value, and an over-subscription zone between the maximum label value and the safety limitation value. The power management controller is coupled with the at least a power-supplying device and the at least a power-consuming device that controls the power consumption of the at least a power-consuming device. If the output power exceeds the maximum label value to enter the over-subscription zone, the power management controller will lower the power consumption of the power-consuming device(s). | 01-31-2013 |
20130031390 | METHOD AND SYSTEM FOR BUILDING A LOW POWER COMPUTER SYSTEM - Various embodiments disclosed herein relate to an efficient computer server system comprising an efficient power supply unit utilizing a plurality of power-rails to supply electric power to the system components, a special-purpose processor configured to operate as an efficient general purpose server processor while maintaining high performance, and a platform manager configured to control the power supplied to the system components to minimize the system's overall power consumption. Some disclosed embodiments relate to a method of reducing power consumption in information handling server systems comprising configuring a special-purpose processor to be function as a general purpose server processor, selecting a set of power efficient system components based on performance and power efficiency, utilizing an efficient power supply unit and a platform manager to control the power supplied by the power supply unit, and adjusting the processor's frequency to achieve an optimal performance/power-consumption ratio. | 01-31-2013 |
20130031391 | MULTI-CORE PROCESSOR SYSTEM, ELECTRICAL POWER CONTROL METHOD, AND COMPUTER PRODUCT - A multi-core processor system includes a core configured to detect that among cores different from a specific core executing a specific process, a given software different from specific software having a function equivalent to the specific process, is under execution; extract, from a database storing required computing capacities for the plural software and upon detecting that a given software is under execution, requirement values indicating the required computing capacity of the specific software and of the given software; judge for each the cores, whether a sum of the required computing capacities of the specific software and the software is at most a computing capacity value of the core; assign the specific software to a core for which the sum of the required computing capacities is judged to be at most the computing capacity value of the core; and suspend the specific core, upon assigning the specific software to the core. | 01-31-2013 |
20130036317 | Device, System And Method Of Generating An Execution Instruction Based On A Memory-Access Instruction - Embodiments of the present invention provide an apparatus, system, and method of generating an execution instruction. Some demonstrative embodiments my include generating an execution instruction of a predetermined executable format based on memory address data of a memory-access instruction representing a memory address. Other embodiments are described and claimed. | 02-07-2013 |
20130042125 | SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION IN TELECOMMUNICATION SYSTEMS - Various exemplary embodiments relate to a method for controlling power consumption in a telecom system. The method includes selecting a power profile command based upon a desired power consumption and performance characteristic, translating the power profile command into at least one subcommand, and initiating at least one power reduction technique in a telecom component based upon the at least one subcommand. | 02-14-2013 |
20130047010 | METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR SCHEDULING DEMAND EVENTS - Disclosed and described herein are embodiments of systems, methods and computer program for scheduling demand events over a time period based on differences between the estimated power availability and the estimated power consumption at various points during the time period. In one aspect, methods are described. One embodiment of a method comprises establishing a defined time period, estimating power availability over the time period, estimating power consumption over the time period, and scheduling, using a computing device, demand events over the time period based on differences between the estimated power availability and the estimated power consumption at various points during the time period. | 02-21-2013 |
20130047011 | System and Method for Enabling Turbo Mode in a Processor - The systems and methods described herein may enable a processor core to run at higher speeds than other processor cores in the same package. A thread executing on one processor core may begin waiting for another thread to complete a particular action (e.g., to release a lock). In response to determining that other threads are waiting, the thread/core may enter an inactive state. A data structure may store information indicating which threads are waiting on which other threads. In response to determining that a quorum of threads/cores are in an inactive state, one of the threads/cores may enter a turbo mode in which it executes at a higher speed than the baseline speed for the cores. A thread holding a lock and executing in turbo mode may perform work delegated by waiting threads at the higher speed. A thread may exit the inactive state when the waited-for action is completed. | 02-21-2013 |
20130047012 | Apparatus and Method for Entering Low Power Mode Based on Process, Voltage, and Temperature Considerations - A processor arrangement changes its default time interval for entering a power saving mode based sensed operating conditions and predetermined time intervals to be used under various operating conditions to optimize power saving. | 02-21-2013 |
20130047013 | CONTROLLING THE OPERATION OF SERVER COMPUTERS - A plurality of server computers in a network that includes load balancing processes to enhance performance employs a non-performance related variable, such as power consumption, and modifies the load balancing processes in response to the reading of the non-performance variable. Such variables do not affect the response and performance as perceived by a browsing client but do provide other advantages with in the environment as a whole. The non-performance related variable is employed such that one or more of said server computers are de-activated to reduce power consumption, and the load balancing processes balance load across the remaining active server computers. | 02-21-2013 |
20130047014 | COMMUNICATION APPARATUS AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a communication apparatus includes a data reception controller configured to receive data from an external device functioning in an active state via a network and store the data in a buffer; a remote controller configured to, when a predetermined condition is satisfied, issue a request to the external device to switch to a power saving state; and a processor configured to process the data stored in the buffer. | 02-21-2013 |
20130047015 | IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD - An image forming apparatus includes a receiving unit configured to receive an input regarding a print process from a user; a setting unit configured to set the apparatus to normal or energy saving mode based on the input from the user, the normal mode causing the apparatus to be operated by the power supplied from a power supply unit, the energy saving mode causing the apparatus to be operated by the power supplied from the power supply unit or a secondary battery so that power consumption of the apparatus is less than that in the normal mode; a calculation unit configured to calculate a charging amount of the battery based on an energy saving time for which the apparatus has been in the energy saving mode; and a charging unit configured to charge the battery with the power from the power supply unit by the charging amount. | 02-21-2013 |
20130054989 | Energy-Efficient Polling Loop - Logic is provided for increasing energy-efficiency of a data processing system. First logic continuously checks a plurality of I/O ports for incoming workload. Responsive to the incoming workload being lower than a low workload threshold for a current operating frequency, second logic reduces an operating frequency of the processor. Responsive to the incoming workload being higher than a high workload threshold, the second logic increases the operating frequency of the processor. | 02-28-2013 |
20130054990 | Method and System for Reducing Power Consumption in Wireless Communications - According to one disclosed embodiment, a method for reducing power consumption in wireless communications is described. This method may include transmitting a data transmission from a peripheral device to a primary device during a receiving interval of the primary device, receiving a correction offset by the peripheral device from the primary device after the transmitting of the data transmission, and transmitting a subsequent data transmission from the peripheral device to the primary device using the correction offset to ensure that the subsequent data transmission by the peripheral device occurs within a subsequent receiving interval of the primary device. | 02-28-2013 |
20130054991 | PROCESSOR WITH DIFFERENTIAL POWER ANALYSIS ATTACK PROTECTION - A device including a processor to perform an operation yielding a result, the processor including a register including bit it storage elements and including a first and second section, each element being operative to store a bit value, and a power consumption mask module to determine whether the whole result can be completely written in half or less than half of the register, determine a balancing entry if the result can be completely written in half or less than half of the register, a write module to perform a single write operation to the register including writing the result and the balancing entry to the first and second section, respectively, if the result can be completely written in half or less than half of the register else writing the result of the operation across at least part of the first and second section. Related apparatus and methods are also described. | 02-28-2013 |
20130061070 | MASSIVELY MULTICORE PROCESSOR AND OPERATING SYSTEM TO MANAGE STRANDS IN HARDWARE - A computing apparatus and corresponding method for operating are disclosed. The computing apparatus may comprise a set of interconnected central processing units (CPUs). Each CPU may embed an operating system including a kernel comprising a protocol stack. At least one of the CPUs may further embed executable instructions for allocating multiple strands among the rest of the CPUs. The protocol stack may comprise a Transmission Control Protocol/Internet Protocol (TCP/IP), a User Datagram Protocol/Internet Protocol (UDP/IP) stack, an Internet Control Message Protocol (ICMP) stack or any other suitable Internet protocol. The method for operating the computing apparatus may comprise receiving input/output (I/O) requests, generating multiple strands according to the I/O requests, and allocating the multiple strands to one or more CPUs. | 03-07-2013 |
20130061071 | Energy Efficient Implementation Of Read-Copy Update For Light Workloads Running On Systems With Many Processors - A technique for determining if a processor in a multiprocessor system implementing a read-copy update (RCU) subsystem may be placed in low power state. The technique may include determining whether the processor has any RCU callbacks that are ready for invocation or the RCU subsystem requires grace period advancement processing from the processor. The processor may be placed in a low power state if either (1) a first condition holds wherein the processor has one or more pending RCU callbacks, but does not have any RCU callbacks that are ready for invocation and the RCU subsystem does not require grace period advancement processing from the processor, (2) a second condition holds wherein the processor does not have any pending RCU callbacks. | 03-07-2013 |
20130061072 | POWER SAVING NODE CONTROLLER - A method and apparatus are provided which allow telecommunication equipment to adjust its power consumption. A controller within a telecommunication node uses data to determine whether to reduce the power consumption of components within the node. The data can be real-time data fed to the node or controller, or data read from storage, or both, depending on the particular implementation. Various examples of data and decision-making are given. | 03-07-2013 |
20130061073 | COMPUTER SYSTEM AND COMPUTER - Disclosed herein is a computer system including multiple worker nodes, each being equipped with an electric power generation unit and an electric power storage unit storing electric power generated by the electric power generation unit, and a master node responsible for management of tasks that are assigned to the worker nodes. Each worker node determines an operating cycle time of the worker node to execute a task assigned by the master node or communicate with any other worker node, based on information indicating a change in electric power stored in the electric power storage unit of the worker node. | 03-07-2013 |
20130061074 | ELECTRONIC DEVICE AND COMPUTER PROGRAM PRODUCT - An electronic device has, as operation modes, a first mode and a second mode reduced in power consumption from the first mode. The electronic device includes a main unit an operation of which is suppressed in the second mode; and a sub-unit. The sub-unit includes a communicating unit that performs communication via a communication line; and an operation mode controller that changes the operation modes from the second mode to the first mode when the communication with a predefined prescribed device is requested during the second mode and changes the operation modes from the first mode to the second mode at a timing corresponding to termination of the communication. | 03-07-2013 |
20130061075 | IMAGE FORMING APPARATUS AND CONTROL METHOD OF IMAGE FORMING APPARATUS - An image forming apparatus includes a reading unit, a first control unit, a second control unit, and a power supply control unit. The reading unit reads authentication information including a card type and a user code. The first control unit determines, in a state where power is not being supplied to the second control unit, whether a card type included in the authentication information read by the reading unit corresponds to a predetermined card type. The second control unit requests an authentication apparatus to perform user authentication based on the authentication information read by the reading unit. The power supply control unit controls power supply to the second control unit. In response to the first control unit determining that the card type included in the authentication information read by the reading unit corresponds to the predetermined card type, the power supply control unit supplies power to the second control unit. | 03-07-2013 |
20130067255 | AUTOMATIC BACKLIGHT INTENSITY ADJUSTMENT IN AN EMBEDDED OPERATING SYSTEM ENVIRONMENT - A method includes monitoring, through a battery driver component of a embedded operating system executing on a data processing system deriving power from a battery, a state of the battery. The method also includes modifying, through a backlight driver component of the embedded operating system, an intensity level of a backlight of one or more Input/Output (I/O) devices of the data processing system from a current level associated with a normal operation thereof to an intensity level lower than the current level when the battery is detected to be in a critical state to prolong a lifetime thereof. The critical state is associated with a remaining charge on the battery being below a threshold required to maintain the data processing system in a powered on state. | 03-14-2013 |
20130067256 | Electric Storage Device Monitor - An electric storage device monitor includes a measurement unit detecting and obtaining a detected value, a power supply switch portion switching a power supply state of the monitor between a monitoring state and a low power consumption state, a wakeup timer to which an actuation time is set and starting counting time in response to switching to the low power consumption state and continuing counting time and outputting an actuation signal if reaching the actuation time, and a control unit. The switch portion switches from the low power consumption state to the monitoring state every time the wakeup timer outputs the actuation signal. The control unit controls the measurement unit to detect and obtain the detected value in the monitoring state, compares the detected value and a reference value, and changes the actuation time according to a comparison result of the detected value and the reference value. | 03-14-2013 |
20130067257 | Power Managed Lock Optimization - In an embodiment, a timer unit may be provided that may be programmed to a selected time interval, or wakeup interval. A processor may execute a wait for event instruction, and enter a low power state for the thread that includes the instruction. The timer unit may signal a timer event at the expiration of the wakeup interval, and the processor may exit the low power state in response to the timer event. The thread may continue executing with the instruction following the wait for event instruction. In an embodiment, the processor/timer unit may be used to implement a power-managed lock acquisition mechanism, in which the processor is awakened a number of times to check the lock and execute the wait for event instruction if the lock is not free, after which the thread may block until the lock is free. | 03-14-2013 |
20130073882 | SYSTEM AND METHOD FOR REMOTELY MANAGING ELECTRIC POWER USAGE OF TARGET COMPUTERS - In one aspect, a system for remotely managing electric power usage of a plurality of target computers is disclosed. In one embodiment, the system includes a plurality of target computers arranged in a group, each using electric power at a rate associated with a corresponding duty cycle and power rating. A remote management computer is communicatively connected to the group of target computers and operative to receive user input data including a total group power usage limit and a priority assignment, minimum duty cycle setting, and/or power zone setting for at least one of the target computers. A power controller is operative to remotely control the power usage of the target computers according to the corresponding user input data, to cause the total group power usage to be at or below the group power usage limit. | 03-21-2013 |
20130073883 | Dynamic Power Optimization For Computing Devices - In the various aspects, virtualization techniques may be used to reduce the amount of power consumed by execution of applications by power-optimizing the code prior to execution. A dynamic binary translator operating at the machine layer may use a power consumption model to identify code segments that can benefit from optimization and to perform an instruction-sequence to instruction-sequence translation of object code to generate power-optimized object code. Execution hardware may be instrumented with additional circuitry to measure the power consumption characteristics of executing code. The power consumption models may be updated and object code may be regenerated based on the measured the power consumption characteristics of previously executed code. In an aspect, power optimization may be accomplished when the computing device is connected to a battery charger. | 03-21-2013 |
20130073884 | DYNAMIC SLEEP FOR MULTICORE COMPUTING DEVICES - The aspects enable a multi-core processor or system on chip to determine a low power configuration that provides the most system power savings by placing selected resources in a low power mode depending upon acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Each of the cores/processing units treated in a symmetric fashion, and each core may choose its operating state independent of the other cores, without performing complex handshaking or signaling operations. | 03-21-2013 |
20130073885 | POWER SUPPLYING CONTROL APPARATUS, MANAGEMENT CONTROL APPARATUS, IMAGE PROCESSING APPARATUS, AND COMPUTER READABLE STORAGE MEDIUM - A power supplying control apparatus includes a transition unit that causes a control apparatus to transition to one of a power supplied state that causes power to be supplied and a power shutoff state that shuts off the supplying of power, and a determining unit that determines a transition target of the transition unit in accordance with a first time period and a second time period, the first time period having a length of time beyond which no further memory space is available from a second memory, and thus being determined by a transmission and reception speed of information to a communication line network and a storage capacity of the second memory, the second time period being so long as to enable information stored on the second memory to be stored on a first memory in the power shutoff state. | 03-21-2013 |
20130073886 | Systems and Methods for Monitoring and Managing Memory Blocks to Improve Power Savings - Systems and methods are provided for placing a portion of a memory into a low power mode. A system includes a hot spot region creator configured to determine an activity level for each of a plurality of regions of a memory, where certain of the regions are determined to be active regions, and where certain of the regions are determined to be inactive regions and rearrange the data to position the active region data in a contiguous active portion of memory and to position the inactive regions data in a contiguous inactive portion of memory. A memory controller is configured to place the contiguous inactive portion of memory into a low power mode. | 03-21-2013 |
20130080803 | Estimating Temperature Of A Processor Core In A Low Power State - In one embodiment, the present invention includes a method for determining if a core of a multicore processor is in a low power state, and if so, estimating a temperature of the core and storing the estimated temperature in a thermal storage area for the first core. By use of this estimated temperature, an appropriate voltage at which to operate the core when it exits the low power state can be determined. Other embodiments are described and claimed. | 03-28-2013 |
20130080804 | Controlling Temperature Of Multiple Domains Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed. | 03-28-2013 |
20130080805 | DYNAMIC PARTITIONING FOR HETEROGENEOUS CORES - In the various aspects, a virtual machine operating at the machine layer may use power consumption models to partition object code into portions, identify the relative power efficiencies of the mobile device processors for the various code portions, and route the code portions to the mobile device processors that can perform the operations using the least amount of energy. A dynamic binary translator process may translate the object code portions into an instruction set language supported by the hardware component identified as being preferred. The code portions may be executed and the amount of power consumed may be measured, with the measurements used to generate and/or update performance and power consumption models. | 03-28-2013 |
20130080806 | MEDIA PROCESSING DEVICE AND METHOD OF CONTROLLING A MEDIA PROCESSING DEVICE - Power consumption is reduced without reducing convenience in a media processing device having a programmable device that requires configuration. The media processing device has a plurality of control devices, at least one control device is a CPU | 03-28-2013 |
20130080807 | Method and Apparatus for User-Activity-Based Dynamic Power Management and Policy Creation for Mobile Platforms - A method and apparatus for user activity-based dynamic power management and policy creation for mobile platforms are described. In one embodiment, the method includes the monitoring of one or more sensor values of a mobile platform device to gather sensor activity data. Once the sensor activity data is gathered, the user state may be predicted according to the gathered user activity and an updated user state model. In one embodiment, the user state model is updated according to the sensor activity data. In one embodiment, a switch occurs from the present power management policy to a new power management policy if the new user state differs from a present user state by a predetermined amount. In one embodiment, at least one time-out parameter of a selected power management policy may be adjusted to comply with a predicted user state. Other embodiments are described and claimed. | 03-28-2013 |
20130086399 | METHOD, SYSTEM AND APPARATUS FOR NETWORK POWER MANAGEMENT - A method for receiving Internet Protocol (IP) IP traffic data corresponding to one or more network devices, analyzing the IP traffic data and dynamically generating a power management policy based on the analysis. | 04-04-2013 |
20130086400 | ACTIVE STATE POWER MANAGEMENT (ASPM) TO REDUCE POWER CONSUMPTION BY PCI EXPRESS COMPONENTS - Methods and apparatus relating to Active State Power Management (ASPM) to reduce power consumption by PCI express components are described. In one embodiment, a special packet with embedded information triggers entry into a lower power consumption state. The embedded information may include flow control credit information outstanding between two agents and the target power consumption state. Other embodiments are also disclosed and claimed. | 04-04-2013 |
20130091368 | METHOD FOR OPTIMIZING MANAGEMENT OF STANDBY OF A MICROPROCESSOR ENABLING THE IMPLEMENTATION OF SEVERAL LOGICAL CORES AND COMPUTER PROGRAM IMPLEMENTING SUCH A METHOD - The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on standby. After having determined ( | 04-11-2013 |
20130097436 | SYSTEMS AND METHODS TO FILTER DATA PACKETS - A mobile communication device includes a receiver system configured to receive unicast data packets and non-unicast data packets. The receiver system may include a hardware packet filter. The mobile communication device further includes a processor coupled to the receiver system. The processor may be configured to detect a power state change and activate the hardware packet filter at the receiver system in response to the power state change indicating a power-conservation state being entered. When the hardware packet filter is activated, the unicast data packets received at the receiver system may be provided to the processor to be filtered and the non-unicast data packets received at the receiver system are dropped at the receiver system. When the hardware packet filter is not activated, the unicast data packets and the non-unicast data packets received at the receiver system may be provided to the processor. | 04-18-2013 |
20130097437 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING OPTIMIZING C-STATE SELECTION UNDER VARIABLE WAKEUP RATES - A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the OSes exhibit two important observations (1) the bursts of high interrupt rate are interspersed between the low interrupt rate periods and long periods of high activity levels; and (2) the interrupt rate may, suddenly, fall below an interrupt rate (of 1 milli-second, for example) that is typical of the current operating systems (OS). Instead of determining the C-state based on the stale data stored in the counters, the power control logic may determine an optimal C-state by overriding the C-state determined by the OS or any other power monitoring logic. The power control logic may, dynamically, determine an optimal C-state based on the CPU idle residency times and variable rate wakeup events to match the expected wakeup event rate. | 04-18-2013 |
20130097438 | INFORMATION PROCESSING DEVICE AND MANAGEMENT METHOD OF POWER SAVING MODE - In an information processing device, when shifting to a power saving mode, a volatile storage unit is controlled to continuously hold a program loaded to the volatile storage unit even in the power saving mode, and a logical value indicating the power saving mode is set to an input/output port of a third control unit. At time of activation, a second control unit determines if the logical value indicating the power saving mode has been set to the input/output port, and when the logical value has been set, recognizes the activation as a return from the power saving mode and executes the program held in the volatile memory, and when the logical value has not been set, recognizes the activation as a normal activation, loads the program held in the nonvolatile memory to the volatile memory and executes the loaded program. | 04-18-2013 |
20130097439 | Electronic Apparatus that Controls Switching to Energy-Saving Mode - Provided is an electronic apparatus including: a network interface configured to receive data via a network; a communication processing unit configured to notify of a network communication type and a network communication amount of the received data; and an operation mode control unit configured to switch an operation mode from a normal mode to an energy-saving mode when a network communication does not occur in the network interface before a waiting time based on the network communication amount for each network communication type notified of from the communication processing unit has elapsed. | 04-18-2013 |
20130097440 | EVENT SERVICE FOR LOCAL CLIENT APPLICATIONS THROUGH LOCAL SERVER - In server/client architectures, the server application and client applications are often developed in different languages and execute in different environments specialized for the different contexts of each application (e.g., low-level, performant, platform-specialized, and stateless instructions on the server, and high-level, flexible, platform-agnostic, and stateful languages on the client) and are often executed on different devices. Convergence of these environments (e.g., server-side JavaScript using Node.js) enables the provision of a server that services client applications executing on the same device. The local server may monitor local events occurring on the device, and may execute one or more server scripts associated with particular local events on behalf of local clients subscribing to the local event (e.g., via a subscription model). These techniques may enable development of local event services in the same language and environment as client applications, and the use of server-side code in the provision of local event service. | 04-18-2013 |
20130097441 | MULTI-CORE PROCESSOR SYSTEM, POWER CONTROL METHOD, AND COMPUTER PRODUCT - A multi-core processor system includes a core configured to detect among multiple cores, a state of migration of first software from a first core to the core whose specific processing capacity value is lower than that of the first core; and set the processing capacity value of the first core at a time of the detection to be a processing capacity value that is lower than that before the migration when detecting the state of migration. | 04-18-2013 |
20130103960 | METHOD AND DEVICE WITH INTELLIGENT POWER MANAGEMENT - A wireless communication device ( | 04-25-2013 |
20130103961 | Providing Wakeup Logic To Awaken An Electronic Device From A Lower Power Mode - An electronic device ( | 04-25-2013 |
20130111236 | Controlling Operating Frequency Of A Core Domain Via A Non-Core Domain Of A Multi-Domain Processor | 05-02-2013 |
20130111237 | POWER SUPPLY SYSTEM, IMAGE FORMING APPARATUS HAVING THE SAME, AND LOW-CAPACITY POWER SUPPLY CIRCUIT | 05-02-2013 |
20130111238 | Image Processing System, Image Processing Apparatus, Portable Information Apparatus, Image Processing Apparatus Coordination Method, Portable Information Apparatus Coordination Method, Non-Transitory Computer-Readable Recording Medium Encoded with Image Processing Apparatus Coordination Program, and Non-Transitory Computer-Readable Recording Medium Encoded with Portable Information Apparatus Coordination Program | 05-02-2013 |
20130111239 | MEMORY REFRESH RATE THROTTLING FOR SAVING IDLE POWER | 05-02-2013 |
20130111240 | Method And System For Energy Efficient Communication Among One Or More Interfaces In A Communication Path | 05-02-2013 |
20130117588 | Run-Time Task-Level Dynamic Energy Management - A mechanism is provided for run-time task-level dynamic energy management. An instruction address for a first instruction of the application is mapped to a portion of application code in the application in response to an application being marked for energy management. A monitoring of the hardware resource activities is done for the portion of the application code. A level of energy management is then implemented for the portion of the application code based on a value of the tick indicator, resource activities, and an intensity indicator. | 05-09-2013 |
20130117589 | STABILITY CONTROL IN A VOLTAGE SCALING SYSTEM - The subject matter of this application is embodied in an apparatus that includes a data processor, and a hardware monitor to emulate a critical path of the data processor and measure a parameter associated with the emulated critical path, process the measurement value, and generate an interrupt signal if the processing result meets a criterion. The apparatus also includes a power supply to provide power to the data processor and the hardware monitor, and a controller to receive the interrupt signal from the hardware monitor and in response to the interrupt signal, controls the power supply to adjust an output voltage level of the power supply. | 05-09-2013 |
20130117590 | Minimizing Aggregate Cooling and Leakage Power with Fast Convergence - A mechanism is provided for minimizing system power in the data processing system with fast convergence. A current aggregate system power value is determined using a current thermal threshold value. For each potential thermal threshold value in a set of potential thermal threshold values, a determination is made as to whether there is a potential thermal threshold value that results in a potential aggregate system power value that is lower than the current aggregate system power value. Responsive to identifying an optimal potential thermal threshold value from the set of potential thermal threshold values that results in minimum aggregate system power value that is lower than the current aggregate system power value, the optimal potential thermal threshold value is set as a new thermal threshold value. | 05-09-2013 |
20130117591 | ELECTRONIC DEVICE - Manipulation receiving unit receives an operation input by a user manipulation. In case the manipulation receiving unit does not receive an input operation for a predetermined time period, a state control unit sets an operation state to a power saving state. However, if the voice receiving unit receives voice input before a non-operation time period reaches the predetermined time period, the status control unit does not set the operation state to the power saving state even if the manipulation receiving unit does not receive an input operation during the predetermined time period. The non-operation time period is defined as a time period during which the manipulation receiving unit does not receive an input operation. | 05-09-2013 |
20130117592 | POWER CAPPING SYSTEM - A method for power capping is disclosed. The power supplied to a load from a power supply is compared to a power capping limit | 05-09-2013 |
20130124885 | ESTIMATING AND MANAGING POWER CONSUMPTION OF COMPUTING DEVICES USING POWER MODELS - Power consumption of computing devices are monitored with performance counters and used to generate a power model for each computing device. The power models are used to estimate the power consumption of each computing device based on the performance counters. Each computing device is assigned a power cap, and a software-based power control at each computing device monitors the performance counters, estimates the power consumption using the performance counters and the model, and compares the estimated power consumption with the power cap. Depending on whether the estimated power consumption violates the power cap, the power control may transition the computing device to a lower power state to prevent a violation of the power cap or a higher power state if the computing device is below the power cap. | 05-16-2013 |
20130124886 | Power Control Device and Electronic Device Using the Same - The invention discloses a power control device for an electronic device, comprising a power supply unit and a control circuit. The power supply unit outputs a power to an embedded controller of the electronic device according to a power control signal. The control circuit is coupled to the embedded controller, for outputting the power control signal according to an operating status indication signal generated by the embedded controller, so as to control the power supply unit to stop outputting power to the embedded controller via the power control signal when the operating status indication signal signifies a turn-off status. | 05-16-2013 |
20130124887 | COMPUTER SYSTEM AND CONTROL METHOD THEREOF - A computer system includes memory units; a power supply to supply power to the memory units; and a controller to control the supply of power to the plurality of memory units so as to intercept power supplied from the power supply to at least one of the memory units, among the plurality of memory units according to user input. | 05-16-2013 |
20130124888 | NONVOLATILE STORAGE SYSTEM, POWER SUPPLY CIRCUIT FOR MEMORY SYSTEM, FLASH MEMORY, FLASH MEMORY CONTROLLER, AND NONVOLATILE SEMICONDUCTOR STORAGE DEVICE - Disclosed is a nonvolatile storage system including: a memory block having a plurality of flash memories; a flash memory power supply circuit outside of the memory block; and a flash memory controller. The flash memory power supply circuit has a plurality of types of power supply circuits for process execution, the power supply circuits for process execution generating and supplying power at a plurality of voltage levels needed to execute processes in the flash memories. The flash memory controller monitors changes of the internal states of the flash memories by communicating with the flash memories, thereby controlling the power supply circuits for process execution and the flash memories. | 05-16-2013 |
20130124889 | METHOD AND SYSTEM OF CONTROLLING POWER CONSUMPTION OF AGGREGATED I/O PORTS - Controlling power consumption of aggregated I/O ports. At least some of the illustrative embodiments are methods that include: aggregating a plurality of input/output (I/O) ports; and controlling power consumption in the computer system. Controlling the power consumption includes: sending a command from a power policy management program to an aggregation software executing in the computer system, the aggregation software implements the aggregating; and changing a power consumption mode of at least one of the I/O ports responsive to the command. | 05-16-2013 |
20130124890 | MULTI-CORE PROCESSOR AND METHOD OF POWER MANAGEMENT OF A MULTI-CORE PROCESSOR - A multi-core processor includes a plurality of power gating elements for controlling power applied to each core. Each power gating element is coupled to a respective power gating controllers for controlling the respective power gating element to selectively provide full power to the respective core only during an active period of the respective core. A common power gating controller is coupled to the individual power gating controllers for controlling the individual power gating controllers to balance the active periods of the plurality of cores so as to substantially reduce or minimise overlapping active periods so as to reduce the total power provided to all the cores. | 05-16-2013 |
20130132747 | INFORMATION PROCESSING APPARATUS WITH POWER CONTROL UNIT, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM STORING CONTROL PROGRAM THEREFOR - An information processing apparatus that is capable of reducing power consumption. A power supply unit supplies electric power to devices including first and second devices of the apparatus. A power-state-switching unit switches a power state of the apparatus among a first power state in which the power supply unit supplies power to the devices, a second power state in which the power supply unit does not supply power to the first device without supplying power from a secondary battery to the devices, and a third power state in which the secondary battery supplies power to the second device. A control unit controls so that the secondary battery is charged by the power supplied from the power supply unit in the first power state, and to control so that the secondary battery is not charged by the power supplied from the power supply unit in the second and third power states. | 05-23-2013 |
20130132748 | Control Method for Shared Devices and Electronic Device - The present invention discloses a control method for shared devices and an electronic device. The control method of shared devices is used in an electronic device comprising a first subsystem and a second subsystem, the electronic device having a first state and a second state, the first state being a state wherein both the first subsystem and the second subsystem are in the working state, the second state being a state wherein the first subsystem is in the non-working state and the second subsystem is in the working state, the electronic device further comprising shared devices used by the first subsystem and the second subsystem, the method comprising: acquiring a first instruction, the first instruction, which is generated by the first subsystem and is transmitted to the shared devices during the switching process between the first state and the second state of the electronic device, being used to adjust a current working state of the shared devices; acquiring a second instruction, the second instruction being a control instruction, which is generated when the electronic device is switching between the first state and the second state; controlling the state of the shared devices to be the current working state based on the first instruction and the second instruction. | 05-23-2013 |
20130138983 | AUTOMATED FEATURE CONTROL ON BATTERY LIMITED DEVICES - The present invention introduces a method for saving power in battery limited devices. The invention handles profile properties, which may e.g. be User Interface activity, Bluetooth connection success, email fetch success or WLAN connection success. A value of the property is saved into a memory, e.g. once an hour for the whole calendar week, thus forming a trend value which is regularly updated. Certain behavior patterns may then be seen. When changes in the trend occur with different users or as differences compared to a usual behavior in a calendar week, for instance, the characteristics of the device are altered accordingly in order to minimize power usage. | 05-30-2013 |
20130138984 | Extending RunTime with Battery Ripple Cancellation Using CPU Throttling - Methods of extending runtime with battery ripple cancellation in a CPU based system by providing a CPU that includes an input pin capable of throttling the power consumed by the CPU responsive to the input of a throttling signal, sensing a ripple in the form of a decrease in voltage or an increase in current responsive to a load on a CPU power supply, and when the ripple exceeds a predetermined limit, providing a throttling signal to the input pin to throttle the CPU to reduce the ripple. | 05-30-2013 |
20130138985 | POWER MANAGEMENT USING RELATIVE ENERGY BREAK-EVEN TIME - Systems and methods may provide for determining an absolute energy break-even time for a first low power state with respect to a current state of a system. A relative energy break-even time may also be determined for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time. In addition, an operating state may be selected for the system based on at least in part the relative energy break-even time. | 05-30-2013 |
20130138986 | IMAGE FORMING APPARATUS AND POWER CONTROL METHOD THEREOF - An image forming apparatus includes a volatile memory and System-on-Chip (SoC) part. The SoC part includes an internal memory, a CPU for accessing the volatile memory in the normal mode; an interface part for receiving a external signal, and a control part for, when the interface part has no input during a first preset time, copying information stored to the volatile memory to the internal memory and converting to a first power saving mode to lower an operating frequency of the volatile memory and an operating frequency of the CPU, and when a normal mode switch signal is not input during a second preset time in the first power saving mode, controlling the CPU to access the information copied to the internal memory and converting to a second power saving mode to change the volatile memory to a self-refresh mode. | 05-30-2013 |
20130145187 | MULTI-DEVICE POWERSAVING - A control system reduces energy consumption in a multi-device system comprising a plurality of devices. The control system includes at least one processor. The processor is programmed to receive a job to be executed, as well as a selection of one of the plurality of devices for executing the job and a transfer cost for transferring the job from the selected device to each of the plurality of devices. A device to execute the job is determined through optimization of a first cost function. The first cost function is based on the device selection and the transfer costs. The job is assigned to the determined device and a time-out for each device in the multi-device system is determined through optimization of a second cost function. The second cost function is based on an expected energy consumption by the multi-device system. The devices are provided with the determined time-outs. | 06-06-2013 |
20130151876 | METHOD AND APPARATUS FOR QUICK RESUMPTION - When transitioning from sleep mode to active mode, a processing system loads first stage resume content and second stage resume content into a volatile memory of the processing system. The first stage resume content may contain contextual data for a first program that was in use before the processing system transitioned to sleep mode. The second stage resume content may contain contextual data for another program that was in use before the processing system transitioned to sleep mode. The processing system may provide a user interface for the first program before all of the second stage resume content has been loaded into the volatile memory. Other embodiments are described and claimed. | 06-13-2013 |
20130151877 | SYSTEMS AND METHODS FOR PREDICTIVE CONTROL OF POWER EFFICIENCY - A computer power management system ( | 06-13-2013 |
20130159739 | Power Controller, Processor and Method of Power Management - A processor includes a plurality of exclusive resources, a shared resource, and a controller configured to manage power state transitions of each of the plurality of exclusive resources and the shared resource. The controller receives a request from a resource to transition from a first power state to a lower power state and, in response to receiving the request, the controller controls power state transitions of the resource according to a first power control threshold when the resource is one of the plurality of exclusive resources and according to a second power control threshold that is greater than the first power control threshold when the resource is the shared resource. | 06-20-2013 |
20130159740 | ELECTRONIC DEVICE AND METHOD FOR ENERGY EFFICIENT STATUS DETERMINATION - The invention relates to an electronic device and a method for event handling in an electronic device comprising a bus master and a memory for storing a software program. A status of a software and/or hardware module is polled in a polling loop. | 06-20-2013 |
20130159741 | Method, Apparatus, and System for Energy Efficiency and Energy Conservation Including Power and Performance Balancing Between Multiple Processing Elements and/or a Communication Bus - An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit. | 06-20-2013 |
20130159742 | Method, System, and Apparatus for Dynamic Thermal Management - A method, apparatus, article of manufacture, and system, the method including, in some embodiments, processing a computational load by a first core of a multi-core processor, and dynamically distributing at least a portion of the computational load to a second core of the multi-core processor to reduce a power density of the multi-core processor for the processing of the computational load. | 06-20-2013 |
20130159743 | IMAGE PROCESSING APPARATUS, CONTROL METHOD THEREFOR AND STORAGE MEDIUM - A second control unit in an image processing apparatus receives a packet transmitted from an external apparatus, copies and stores the received packet, analyzes the header of the received packet, deletes the analyzed header, and, when transitioning the image processing apparatus from a second power mode to a first power mode based on the result of analysis in the case where the image processing apparatus is in the second power mode, transitions the image processing apparatus from the second power mode to the first power mode, and transfers to the first control unit the received packet that was stored and does not transfer to the first control unit the received packet from which the header was deleted. | 06-20-2013 |
20130159744 | ADAPTIVE RECOVERY FOR PARALLEL REACTIVE POWER THROTTLING - Power throttling may be used to conserve power and reduce heat in a parallel computing environment. Compute nodes in the parallel computing environment may be organized into groups based on, for example, whether they execute tasks of the same job or receive power from the same converter. Once one of compute nodes in the group detects that a parameter (i.e., temperature, current, power consumption, etc.) has exceeded a first threshold, power throttling on all the nodes in the group may be activated. However, before deactivating power throttling, a plurality of parameters associated with the group of compute nodes may be monitored to ensure they are all below a second threshold. If so, the power throttling for all of the compute nodes is deactivated. | 06-20-2013 |
20130159745 | OPTIMIZING POWER CONSUMPTION AND PERFORMANCE IN A HYBRID COMPUTER ENVIRONMENT - A method for optimizing efficiency and power consumption in a hybrid computer system is disclosed. The hybrid computer system may comprise one or more front-end nodes connected to a multi-node computer system. Portions of an application may be offloaded from the front-end nodes to the multi-node computer system. By building historical profiles of the applications running on the multi-node computer system, the system can analyze the trade offs between power consumption and performance. For example, if running the application on the multi-node computer system cuts the run time by 5% but increases power consumption by 20% it may be more advantageous to simply run the entire application on the front-end. | 06-20-2013 |
20130159746 | DATA PROCESSING DEVICE AND DATA PROCESSING SYSTEM - A step down unit steps down an external power supply voltage Vcc. A bias current control circuit controls the magnitude of bias current flowing through an auxiliary path connecting an output node and the ground. A system controller increases the magnitude of the bias current, prior to a change of the operation state of a load circuit by which a relatively large change occurs to the amount of current consumed by the load circuit including a central processing unit. | 06-20-2013 |
20130173941 | Controlling Temperature Of Multiple Domains Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining, in a controller of a multi-domain processor, whether a temperature of a second domain of the multi-domain processor is greater than a sum of a throttle threshold and a cross-domain margin, and if so, reducing a frequency of a first domain of the multi-domain processor by a selected amount. In this way, a temperature of the second domain can be allowed to reduce, given a thermal coupling of the domains. Other embodiments are described and claimed. | 07-04-2013 |
20130179708 | PROCESSING DEVICE - A processing device includes a plurality of input units configured to input a process request; a plurality of processing units configured to execute a process corresponding to the process request input by the plurality of input units; a power control unit configured to transfer the processing device into a power saving state and to transfer the processing device back to a regular state from the power saving state; and an operation suppression control unit configured to send an operation suppression request to the plurality of input units and the plurality of processing units before the power control unit transfers the processing device into the power saving state, and to send an operation suppression release request to the plurality of input units and the plurality of processing units when the power control unit transfers the processing device back to the regular state from the power saving state. | 07-11-2013 |
20130179709 | Controlling Operating Frequency Of A Core Domain Via A Non-Core Domain Of A Multi-Domain Processor - In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed. | 07-11-2013 |
20130185571 | System and Method for Providing Power-Save Operation in an In-Home Communication Network - A first device of a multimedia over coax alliance (MoCA) network may grant a second device of the MoCA network permission to enter a power-saving state. While the second device is in the power-saving mode, the first device may grant bandwidth to the second device during one or more predetermined timeslots. The bandwidth may be granted without a corresponding reservation request from the second device. While the second device is in the power-saving state, it may track time utilizing a clock that is synchronized to the system time of the MoCA network, and transmit during one or more of the predetermined timeslots without first transmitting a corresponding reservation request. The second device may utilize a first modulation profile when not operating in the power-saving state, and utilize a second modulation profile when operating in the power-saving state. | 07-18-2013 |
20130185572 | METHOD AND APPARATUS FOR ACHIEVING ENERGY SAVING OF DATA SWITCHING DEVICE - Embodiments of the present disclosure provide a method and an apparatus for achieving energy saving of a data switching device. The apparatus acquires a working model, where the working model includes correspondence between a working mode and time within a working cycle of the data switching device, the working mode can identify a bandwidth capacity in the working mode, and controls a data processing module in the data switching device to work according to the working model, so that the data processing module works under a bandwidth capacity identified by a corresponding working mode at the time. In the technical solutions of the embodiments of the present disclosure, the power consumption of the data processing module in the data switching device can be reduced in the idle time period, thereby effectively achieving energy saving. | 07-18-2013 |
20130185573 | IMAGE FORMING APPARATUS AND CONTROL METHOD FOR EXECUTING A PROXY IN RESPONSE TO A HEARTBEAT - An image forming apparatus automatically recognizes and responds to an encrypted heartbeat packet only with a small amount of calculation, without causing a sub control unit to execute an SSL/TLS decryption process. As a result, the image forming apparatus can execute a proxy response with less power consumption. | 07-18-2013 |
20130185574 | SEMICONDUCTOR DEVICE, RADIO COMMUNICATION TERMINAL USING THE SAME, AND INTER-CIRCUIT COMMUNICATION SYSTEM - Disclosed as one aspect is a semiconductor device including a transmission/reception interface that is used for transmission and reception of data, a processing unit that processes the data, a monitoring unit that monitors received data and detects a specific frame allowed to be transmitted regardless of a state of a circuit to transmit/receive the data, and a power management unit that controls power consumption of a circuit including the processing unit. | 07-18-2013 |
20130185575 | SEMICONDUCTOR DEVICE FOR SUPPLYING POWER SUPPLY VOLTAGE TO SEMICONDUCTOR DEVICE - A semiconductor device includes first, second and third power supply terminals respectively supplied with first, second and third power supply voltages. The semiconductor device also includes a first terminal connectable to a host device and a second terminal connectable to a peripheral device. The semiconductor device also includes a first circuit block connected to the first terminal and the first power supply terminal and receiving data output from the host device based on the first power supply voltage, a second circuit block connected to the second terminal and the third power supply terminal and receiving data output from the peripheral device based on the third power supply voltage, and a third circuit block connected to the second power supply terminal and controlling operation of the first circuit block and the second circuit block based on the second power supply voltage. | 07-18-2013 |
20130185576 | POWER PROFILING APPLICATION FOR MANAGING POWER ALLOCATION IN AN INFORMATION HANDLING SYSTEM - A method, system, and software instructions for allocating power in a information handling system are operable to respond to a power profiling request by transitioning a processing resource to a first power consumption state and obtaining and storing a first power consumption value. The first power consumption value is then retrieved and used to allocate power to the first processing resource in response to a power on request. The first power consumption state may be a state in which power consumption approximates a maximum power consumption. The processing resource may be further transitioned to a second power consumption state and a second power consumption value obtained. The second power consumption state may be a reduced performance state. Thereafter, responsive to determining that the system lacks sufficient power budget to fulfill a pending request for power, the processing resource is throttled and power is allocated using the second power consumption value. | 07-18-2013 |
20130191662 | POWER MANAGEMENT FOR ELECTRONIC DEVICES - A method for modifying one or more characteristics of a mobile electronic device in order to save or reduce power consumption of the device. The method includes determining by, a processor of the mobile electronic device, an estimated use of the mobile electronic device during an upcoming time period; using the estimated use, determining, by the processor, whether an internal power source of the mobile electronic device has sufficient power to continue operation of the mobile electronic device in a first state during the upcoming time period; based on the estimated use and the internal power source, if the internal power source does not have sufficient power, adjusting the one or more characteristics to reduce a power consumption of the mobile electronic device during the upcoming time period. | 07-25-2013 |
20130191663 | SYSTEM AND METHOD TO CONSERVE POWER IN AN ACCESS NETWORK WITHOUT LOSS OF SERVICE QUALITY - A method is provided in one example embodiment and includes receiving a first data at a first network element; determining that the first data does not match an entry in an access control list; and sending a first message to a second network element that causes the second network element to enter into a low-power state. In yet another example embodiment, the method can include receiving a second data; determining that the second data matches an entry in the access control list; buffering the second data; sending a second message to the second network element, where the second message causes the second network element to exit the low-power state; and sending the buffered second data to the second network element. | 07-25-2013 |
20130191664 | Managing Server Power Consumption In A Data Center - Methods, system, and computer program products are provided for managing server power consumption in a data center. Embodiments include detecting, by a circuit monitoring interposer, a type of a power circuit that is currently coupled to the circuit monitoring interposer; determining a power capacity of the power circuit based on the type of the power circuit; receiving, by the circuit monitoring interposer, a power consumption server measurement from each server monitoring interposer of a plurality of server monitoring interposers, each power consumption server measurement corresponding to a server of the plurality of servers; determining a total power consumption of the power circuit in dependence upon a total of the power consumption server measurements; and determining whether the total power consumption exceeds the power capacity, and if the total power consumption of the power circuit exceeds the power capacity, instructing one or more servers to reduce their power consumption. | 07-25-2013 |
20130198540 | Dynamic Power Management in Real Time Systems - Dynamically reducing power consumption by a processor in a computer system by determining a maximum number of times (token count) that the processor can incur a start-up delay after being placed into a low-power mode during a token period of time when executing a task for a token period of time. The processor may be placed into the low-power mode while executing the task in response to an idle indicator only if a current value of the token count assigned to the task is greater than zero. The current value of the token count is decremented each time the processor incurs a start-up delay in response to being awakened from the low-power mode. The current token count is reset to match the assigned token count at the end of each token period. Furthermore, wakeup may be anticipated to allow the processor to be awakened preemptively. | 08-01-2013 |
20130198541 | System and Method For Battery Load Management In A Portable Computing Device - Various embodiments of methods and systems for managing battery load in a portable computing device (“PCD”) are disclosed. One such method includes tracking an active load on a battery attributable to one or more active power consuming components. Measurements associated with the battery and indicative of the battery's state of health may also be monitored. When a call for additional load on the battery is recognized, such as a user request for provision of additional functionality in the PCD, a future load on the battery that considers the newly called load can be calculated. Based on an analysis of the impact on the battery's state of health, existing, lower priority loads may be scaled or suspended to create battery load capacity for the newly called load. In this way, quality of service and user experience may be optimized while minimizing conditions that could be detrimental to the battery. | 08-01-2013 |
20130205143 | AUTONOMOUS MICROPROCESSOR RE-CONFIGURABILITY VIA POWER GATING PIPELINED EXECUTION UNITS USING STATIC PROFILING - In an embodiment, a method of controlling a functional unit of a target processor includes, using a static code profiler operating on a developer processor and while generating a machine executable instruction from software code, determining whether a functional unit type will be used to perform a process of the machine executable instruction. The method also includes updating a specific needs profile of the process of the machine executable instruction in accordance with the output of the static code profiler, wherein operation of the functional unit having the functional unit type is based on the configuration of the specific needs profile. The method further includes storing the specific needs profile in a configuration register. One or more processes and/or specific needs values or profiles may be loaded at each context switch of the operating system. | 08-08-2013 |
20130205144 | LIMITATION OF LEAKAGE POWER VIA DYNAMIC ENABLEMENT OF EXECUTION UNITS TO ACCOMMODATE VARYING PERFORMANCE DEMANDS - In an embodiment, a method of controlling performance of a processor having a first execution unit and a second execution unit includes maintaining an operational state of the first execution unit of the processor at active, monitoring a utilization of the processor, and based on the utilization, determining whether to alter the operational state of the second execution unit of the processor. When the utilization of the processor is below a first threshold and the performance capability of the second execution unit is less than the performance capability of the first execution unit, the system may change the operational state of the second execution unit of the processor to active, and the operational state of the first execution unit to inactive. When the utilization of the processor is above a second threshold, the system may change the operational state of the second execution unit of the processor to active. | 08-08-2013 |
20130205145 | METHOD FOR OPERATING A BUS CONTROL UNIT AND BUS CONTROL UNIT - A watchdog function is performed for those messages which are used by a controller in a CAN bus to keep the other controllers active. All emitted keep-active messages are read again by the emitting controller itself and are checked for the presence of a reason. In the absence of such a reason, a restart is carried out. | 08-08-2013 |
20130212414 | REDUCING PERFORMANCE DEGRADATION IN BACKUP SEMICONDUCTOR CHIPS - A system has at least a first circuit portion and a second circuit portion. The first circuit portion is operated at normal AC frequency. The second circuit portion is operated in a back-up mode at low AC frequency, such that the second circuit portion can rapidly come-online but has limited temperature bias instability degradation. The second circuit portion can then be brought on-line and operated at the normal AC frequency. A system including first and second circuit portions and a control unit, as well as a computer program product, are also provided. | 08-15-2013 |
20130227318 | CALENDAR-BASED POWER RESERVE - Implementing calendar-based power reserve includes identifying a new calendar entry scheduled into a calendar application of a mobile communications device. The new calendar entry specifies a telephone call. Upon determining a priority indicator has been set for the new calendar entry in the calendar application, the calendar-based power reserve also includes directing a power management component of the mobile communications device to reserve an amount of power for the telephone call, and updating a battery power indicator on the mobile communications device to reflect a capacity of a battery of the mobile communications device. The capacity reflects a current amount of available power for the battery minus the amount of power to reserve. | 08-29-2013 |
20130227319 | CONTROLLING A CURRENT DRAWN FROM AN ADAPTER BY A COMPUTER SYSTEM - The disclosed embodiments provide an apparatus that controls a current drawn from an adapter by a computer system. During operation, the apparatus senses the current drawn from the adapter using a first current sensor and a second current sensor, wherein a response time of the first current sensor is faster than a response time of the second current sensor. Then, when the current sensed using the first current sensor exceeds a predetermined high-current threshold, the apparatus limits the current drawn from the adapter to a first predetermined current limit. Additionally, when the current sensed using the second current sensor exceeds a predetermined thermal-limit current, the apparatus limits the current drawn from the adapter to the predetermined thermal-limit current. | 08-29-2013 |
20130227320 | INFORMATION PROCESSING DEVICE AND METHOD - An information processing device including a reader unit connected through a connection switch to a first control section and a second control section. The first control section is connected to the connection switch by a first bus supporting a first specification. The second control section is connected to a conversion unit by a second bus supporting a second specification. The conversion unit is connected to the connection switch by a third bus supporting the first specification. When the connection switch connects the reader unit to the first control section, the second control section halts communication with the conversion unit, thereby avoiding unnecessary use of processing resources. | 08-29-2013 |
20130232353 | Mobile Device Power State - Techniques for mobile device power state are described. In one or more implementations, a mobile device includes a computing device that is flexibly coupled to an input device via a flexible hinge. Accordingly, the mobile device can operate in a variety of different power states based on a positional orientation of the computing device to an associated input device. In one or more implementations, an application that resides on a computing device can operate in different application states based on a positional orientation of the computing device to an associated input device. In one or more implementations, techniques discussed herein can differentiate between vibrations caused by touch input to a touch functionality, and other types of vibrations. Based on this differentiation, techniques can determine whether to transition between device power states. | 09-05-2013 |
20130232354 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND COMPUTER-READABLE RECORDING MEDIUM - An information processing apparatus may include an acquiring unit to periodically acquire, from an apparatus, information indicating an amount of power consumption stored for each of power supply states of the apparatus, a computation unit to compute a ratio of the amount of power consumption for each of the power supply states included in the information, for each information acquired by the acquiring unit, and an output unit to output information indicating a change in the ratio, based on an order of the information acquired. | 09-05-2013 |
20130232355 | COMMUNICATION DEVICE - A communication device includes a communicating unit that communicates with another electronic device, and a controller that intermittently controls the supply of power to the communicating unit by keeping the supply of power to the communicating unit during a first time period and stopping the supply of power to the communicating unit during a second time period, and determines whether the other electronic device is connected to the communication device within the first time period. When the other electronic device is connected within the first time period, the controller keeps the supply of power to the communicating unit. When the other electronic device is not connected within the first time period, the controller stops the supply of power to the communicating unit during the second time period after the first time period elapses. | 09-05-2013 |
20130232356 | ELECTRICAL POWER SAVING SYSTEM - An electrical power saving system including a video display apparatus and at least two video and audio signal transmission apparatuses connected to each other via a communication network. Each of the video and audio signal transmission apparatuses includes a transmission and reception unit that transmits and receives a control command via the communication network and an operation state switching unit that switches an operation state according to the control command. The operation state switching unit is configured to switch a current operation state to an operation state of lower electricity consumption, when the transmission and reception unit receives a control command indicating that another video and audio signal transmission apparatus is transmitting a video and audio signal to the video display apparatus. | 09-05-2013 |
20130238915 | APPLICATION PROCESSOR WAKE-UP SUPPRESSION - A method and device that intelligently suppresses reporting of an “in-service” condition to the application processor in a mobile station when the mobile station experiences low received signal strength. When the mobile station's application processor is in a power-saving mode, an in-service condition is not reported to the application processor until certain conditions are met. Delayed reporting of the in-service condition will help prevent a toggling effect (or “ping-pong”) of reporting an in-service condition immediately followed by a not-in-service condition. Because the application processor can remain asleep until a sufficiently reliable received signal is available, suppressing reporting of the in-service condition helps prevent unnecessarily waking-up the application processor, and thereby reduces battery consumption. | 09-12-2013 |
20130238916 | METHOD FOR IMPLEMENTING ISOLATION GATES DURING LOW-POWER MODES - A power-saving block may be isolated from a remainder of a digital circuit. To save power, the power-saving block may be powered down when not in use. To prevent the power-down process from creating metastable states in the remainder of the digital circuit, appropriate isolation gates may separate outputs of the power-saving block from the remainder of the digital circuit. Signals may be sent to the power-saving block to ensure that the output signals from the power-saving block are always the same value during the power-down process. The isolation gates may be chosen based on the value expected on the output signals during the power-down process. Assertions may be used to confirm that the correct isolation gates were selected. | 09-12-2013 |
20130238917 | Mobile Terminal and Power-Saving Method and Device for Same - The present invention provides a power-saving method for a mobile terminal, comprising the steps, after setting the mobile terminal to be in a data service power-saving state, monitoring, by the mobile terminal, a data service in accordance with a monitoring strategy for the data service power-saving state, and triggering a data service power-saving operation when a triggering condition set in the monitoring strategy is met. The present invention further provides a power-saving apparatus arranged within a mobile terminal, comprising a monitoring unit and an executing unit, wherein the monitoring unit is configured to monitor data services of the mobile terminal in accordance with a preset monitoring strategy, and send a power-saving command to the executing unit when a data service power-saving strategy is met. The present invention further provides a mobile terminal comprising the power-saving apparatus. As a result, the mobile can rapidly enter the data service power-saving mode according to the monitoring strategy, reduce unnecessary power consumption, and prolong the service time for the mobile terminal. | 09-12-2013 |
20130246817 | BATTERY REPLACING SYSTEM AND METHOD THEREOF - A battery replacing system for replacing a battery of an electronic device, includes a power storage unit and a switch circuit. The power storage unit can be charged by the battery when the battery is mounted to the electronic device. The switch circuit alternatively connects one of the power storage unit or the battery to an operating system of the electronic device. The switch connects the power storage unit to the operating system to have the power storage unit provide power to the operating system when the battery is detached from the electronic device, and connect the battery to the operating system to have the battery provide power to the operating system when the battery is mounted to the electronic device. | 09-19-2013 |
20130246818 | CACHE DEVICE, CACHE SYSTEM AND CONTROL METHOD - According to an embodiment, a cache device includes a cache memory, an access controller, and a power controller. The cache memory includes a plurality of memory areas associated with a plurality of ways, respectively. The access controller controls access to the memory areas. The power controller controls power supplied to each of the memory areas individually such that power supplied to a memory area that has not been accessed for a predetermined time is standby power that is lower than operating power that enables the memory area to operate. The power controller controls power supplied to a memory area such that standby power for a memory area that is highly likely to be accessed has a value closer to the operating power than a value of standby power for a memory area that is less likely to be accessed. | 09-19-2013 |
20130246819 | FOOTER-LESS NP DOMINO LOGIC CIRCUIT AND RELATED APPARATUS - A domino logic circuit includes a pre-charge circuit pre-charging a first dynamic node in response to a clock signal, a first logic network determining a logic level of the first dynamic node in response to first data signals, an inverter receiving the clock signal, a discharge circuit discharging a second dynamic node in response to an output signal of the inverter, and a second logic network determining a logic level of the second dynamic node in response to at least one second data signal and an output signal of the first dynamic node. | 09-19-2013 |
20130246820 | METHOD FOR ADAPTIVE PERFORMANCE OPTIMIZATION OF THE SOC - An apparatus and method for dynamically adjusting power limits for processing nodes and other components, such as peripheral interfaces, is disclosed. The apparatus includes multiple processing nodes and other components, and further includes a power management unit configured to set a first frequency limit for at least one of the processing nodes responsive to receiving an indication of a first detected temperature greater than a first temperature threshold. Initial power limits are set below guard-band power limits for components that do not have reliable reporting of power consumption or for cost or power saving reasons. The amount of throttling of processing nodes is used to adjust the power limits for the processing nodes and these components. | 09-19-2013 |
20130254569 | INDIVIDUAL CORE VOLTAGE MARGINING - Example embodiments of core voltage margining apparatus include a plurality of voltage offset blocks disposed on a multi-core processor with each voltage offset block having a voltage input coupled to receive a supply voltage level, a control input coupled to receive an offset code, and a voltage output coupled to a respective core processor in the multi-core processor, with each voltage offset block configured to offset the supply voltage level by an voltage offset value programmed by an offset code received at the control input of the voltage offset block and a voltage offset register having a like plurality of control outputs each coupled to a corresponding control input of a voltage offset block, where the voltage output register is configured to hold an offset code for each voltage offset block and to provide the offset code, programming the voltage level of a selected voltage offset block, at the control output port coupled to the selected voltage offset block. | 09-26-2013 |
20130262890 | VISUAL INDICATOR AND ADJUSTMENT OF MEDIA AND GAMING ATTRIBUTES BASED ON BATTERY STATISTICS - Systems and methods may provide for identifying an amount of time associated with a user based activity with respect to a battery powered device, and determining a battery drain rate of the battery powered device. An indicator of whether the user based activity can be completed in the amount of time may be generated based on the battery drain rate. | 10-03-2013 |
20130262891 | METHOD AND SYSTEM FOR MANAGING POWER OF A MOBILE DEVICE - An approach for conserving power of a mobile device based on its pattern of use with respect to one or more tasks is described. An intelligent power source manager collects consumption information relating to a power source of a mobile device for execution of one or more tasks. A pattern of use with respect to the one or more tasks based on the collected consumption information is then determined. The intelligent power source manager then selects an action to conserve usage of the power source, according to the pattern of use, in response to subsequent execution of the one or more tasks. | 10-03-2013 |
20130262892 | System and Method for Power Saving Modes in High Speed Serial Interface Communication Systems Utilizing Selective Byte Synchronization - A system and method for minimizing power consumption in a transceiver circuit that uses a digital high-speed serial communications link between at least two devices is presented. Comma code matching is generally used as a means for establishing byte synchronization and for determining and preventing data transfer errors. However, comma code matching, when performed in high speed serial communications links that can transfer data at rate of giga-bits per second, can use a significant amount of power. Thus, the system and method described herein maintain comma code matching in an off-state, and transition comma code matching from an off-state to an on-state when a substantive operational change occurs in the serial communications link. | 10-03-2013 |
20130268785 | Minimizing Power Consumption for Fixed-Frequency Processing Unit Operation - A mechanism is provided for minimizing power consumption for operation of a fixed-frequency processing unit. A number of timeslots are counted in a time window where throttling is engaged to the fixed-frequency processing unit. The number of timeslots where throttling is engaged is divided by a total number of timeslots within the time window, thereby producing a performance loss (PLOSS) value. A determination is made as to whether determining whether the (PLOSS) value associated with the fixed-frequency processing unit is greater than an allowed performance loss (APLOSS) value. Responsive to the PLOSS value being less than or equal to the APLOSS value, a decrease in voltage supplied to the fixed-frequency processing unit is initiated. | 10-10-2013 |
20130268786 | Minimizing Power Consumption for Fixed-Frequency Processing Unit Operation - A mechanism is provided for minimizing power consumption for operation of a fixed-frequency processing unit. A number of timeslots are counted in a time window where throttling is engaged to the fixed-frequency processing unit. The number of timeslots where throttling is engaged is divided by a total number of timeslots within the time window, thereby producing a performance loss (PLOSS) value. A determination is made as to whether determining whether the (PLOSS) value associated with the fixed-frequency processing unit is greater than an allowed performance loss (APLOSS) value. Responsive to the PLOSS value being less than or equal to the APLOSS value, a decrease in voltage supplied to the fixed-frequency processing unit is initiated. | 10-10-2013 |
20130275785 | MEMORY CONTROL APPARATUS, MEMORY CONTROL METHOD, INFORMATION PROCESSING APPARATUS AND PROGRAM - There is provided a memory control apparatus including a deciding unit deciding, among a first main storage apparatus that is a main storage apparatus with low power consumption and a second main storage apparatus with power consumption higher than the power consumption of the first main storage apparatus as memory devices of multiple CPU cores, whether the second main storage apparatus is capable of being suspended, and a power managing unit suppressing a power supplied to the second main storage apparatus and at least one of the multiple CPU cores in a case where the deciding unit decides that the second main storage apparatus is capable of being suspended. | 10-17-2013 |
20130275786 | MOBILE PHONE - A main processor of mobile phone changes from power saving state to active state for changing display in response to a sub processor for sensors, the main processor returning to the power saving state after changing the display. The main processor changes from power saving state to active state for storing information from the sub processor, the main processor returning to the power saving state after the storing function. The main processor selects the stored display data on the basis of the information from the sub processor to change display. The main processor receives and stores information from the sub processor in the boot up process or before finishing the operation. The sub processor is in the active state so as to control the sensor even in a case where the main processor is in the power saving state. | 10-17-2013 |
20130275787 | Methods And Apparatuses For Reducing Step Loads Of Processors - Methods and apparatuses for reducing step loads of processors are disclosed. Method embodiments comprise examining a number of instructions to be processed by a processor to determine the types of instructions that it has, calculating power consumption by in an execution period based on the types of instructions, and limiting the execution to a subset of instructions of the number to control the quantity of power for the execution period. Some embodiments may also create artificial activity to provide a minimum power floor for the processor. Apparatus embodiments comprise instruction type determination logic to determine types of instructions in an incoming instruction stream, a power calculator to calculate power consumption associated with processing a number of instructions in an execution period, and instruction throttling logic to control the power consumption by limiting the number of instructions to be processed in the execution period. | 10-17-2013 |
20130275788 | INFORMATION PROCESSING DEVICE, METHOD FOR CALCULATING DEGREE OF CONTRIBUTION TO POWER SAVING, AND PRESENTATION METHOD - According to an embodiment, an information processing device includes a storage section, a computing section, and an index calculating section. The storage section stores a current set value for each of the at least one setting item associated with saving of power consumed by a computer and table data including a score defined in advance for each of set values. The computing section performs a computation for converting the current set value into a score and a computation for converting a most power-saving one of the set values into a score on the basis of a result of checking the current set values at fixed intervals and the scores in the table data. The index calculating section calculates an index of how much drive status of the computer with the current set values contributes to power saving on the basis of results of the computations from the computing section. | 10-17-2013 |
20130275789 | CREDIT BASED POWER MANAGEMENT - An embodiment may include circuitry to determine whether to issue at least one credit to at least one sender of at least one packet. The credit(s) may be to grant permission to the at least one sender to issue the at least one packet to at least one receiver of the at least one packet. The determination of whether to issue the credit(s) may be based, at least in part, upon whether a time in which the at least one receiver is in a relatively lower power state prior to issuance of the credit(s) is at least sufficient to provide at least a predetermined amount of reduction in power consumption. The relatively lower power state may be relative to a relatively higher power state of the at least one receiver that prevails at the issuance of the credit(s). Additionally or alternatively, the circuitry may be to receive such credit(s). | 10-17-2013 |
20130283072 | ALARM-BASED POWER SAVING MODE FOR AN ELECTRONIC DEVICE - This disclosure relates to an alarm-based power saving mode and associated system implemented on a device for a microprocessor or a telematics circuitry, and more particularly, to an alarm and powered-up microprocessor-driven power latch for disabling a power source to a microprocessor or telematics circuitry at a power switch. A microprocessor and/or telematics circuitry are powered down by an instruction step from the microprocessor or the telematics circuitry by using a power switch to cut off power. The switch is controlled by a power latch, which is regulated by a wake-up value given to an alarm to enable the power latch and exercise power switch control, as well as by a value given directly by the microprocessor to enter the powered down mode. | 10-24-2013 |
20130283073 | ADAPTIVE GRAPHICS SUBSYSTEM POWER AND PERFORMANCE MANAGEMENT - Examples are disclosed for adaptive graphics subsystem power and performance management including adjusting one or more power management or performance attributes for a graphics subsystem for a computing platform based on a comparison of a current quality metric to a target quality metric. The current and target quality metric to be separately determined based on current and target quality of service (QoS) values for power management and performance for at least portions of the computing platform. | 10-24-2013 |
20130290750 | MEMORY WITH WORD LEVEL POWER GATING - In accordance with at least one embodiment, memory power gating at word level is provided. In accordance with at least one embodiment, a word level power-gating technique, which is enabled by adding an extra control bit to each subarray (e.g., each word, each row, each wordline, each bitline, each portion of an array, etc.) of a memory array, provides fine-grained power reduction for a memory array. In accordance with at least one embodiment, a gating transistor is provided for each subarray (e.g., each word, each row, each wordline, each bitline, each portion of an array, etc.). | 10-31-2013 |
20130290751 | FREQUENCY REDUCTION OF MOBILE DEVICE CORES BASED ON APPLICATION PROCESSING REQUIREMENTS - This disclosure describes systems, methods, and apparatus for reducing power consumption of an application processor in a user equipment. State information of applications that indicate an expected load requirement that the applications will likely place on the application processor, can be used to control power management features of the application processor. For instance, an operating frequency of the application processor, or online cores of the application processor, can be reduced. The number of online cores (those that are not idled) can also be changed to tailor performance and power consumption to the load requirement. Other power management techniques such as adjusting core operational voltage can also be implemented. | 10-31-2013 |
20130290752 | OPERATING SYSTEM SUPPORT FOR MEMORY POWER MANAGEMENT - A system including memory and a resource controller. The memory includes a first memgroup and a second memgroup, wherein the first memgroup comprises a first physical page mapped to a virtual page, and wherein the second memgroup comprises a second physical page. The resource controller is configured to receive a request to stop the first memgroup, instruct a memory power management subsystem to mark the first memgroup as stopped in response to receiving the request to stop the first memgroup, wherein no free pages are allocated from the first memgroup after the first memgroup is marked as stopped, remap the virtual page to the second physical page in response to the marking the first memgroup as stopped, and reduce power to the first memgroup in response to a determination that the first physical page is not mapped to the virtual page. | 10-31-2013 |
20130290753 | MEMORY COLUMN DROWSY CONTROL - In accordance with at least one embodiment, column level power control granularity is provided to control a low power state of a memory using a drowsy column control bit to control the low power state at an individual column level to protect the memory from weak bit failure. In accordance with at least one embodiment, a method of using a dedicated row of bit cells in a memory array is provided wherein each bit in the row controls the low power state of a respective column in the array. A special control signal is used to access the word line, and the word line is outside of the regular word line address space. A mechanism is provided to designate the weak bit column and set the control bit corresponding to that particular column to disable the drowsy/low power state for that column. | 10-31-2013 |
20130290754 | LOAD MONITORING APPARATUS AND METHOD - Embodiments of the present invention provide a load monitoring apparatus and method. The apparatus includes: an operation unit, configured to determine indication information for indicating a working state of each processing module in the operation unit; a working state unit, configured to receive the indication information from the operation unit, and determine load amount information in a current monitoring period according to the indication information, where the load amount information is used for indicating a load amount state of the operation unit in the current monitoring period; and a load monitoring unit, configured to receive the load amount information from the working state unit and record the load amount information, and send the load amount information to a system controller, so that the system controller adjusts a working frequency of the operation unit according to the load amount information. | 10-31-2013 |
20130290755 | ENERGY-AWARE CODE OFFLOAD FOR MOBILE DEVICES - A method described herein includes an act of, at a mobile computing device, receiving an indication that a portion of code of a program executing on the mobile computing device is to be offloaded to a second computing device for execution on the second computing device, wherein the indication is based at least in part upon an estimated energy savings of the mobile computing device by offloading the portion of the code for execution on the second computing device. The method also includes an act of transmitting data to the second computing device that causes the second computing device to execute the portion of the code. | 10-31-2013 |
20130290756 | Power Management For A System On A Chip (SoC) - In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU) of a system on a chip (SoC) to request entry into a power saving state for the first subsystem, sending a second link handshake signal between the first subsystem and the PMU to acknowledge the request, and placing the first subsystem into the power saving state without further signaling between the PMU and the first subsystem. Other embodiments are described and claimed. | 10-31-2013 |
20130297956 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A semiconductor device which can consume less power and a method for driving the semiconductor device can be provided. The semiconductor device includes a processor including a control device and an arithmetic unit, a memory device, an input/output device, and a plurality of bus lines which is a path for transmitting and receiving instructions, addresses, or data between the processor and the memory device, or the processor and the input/output device. A first memory storing each piece of information over the bus line is connected to each of the bus lines, and a second memory storing a status flag relating to information over the bus line is connected to the control device. | 11-07-2013 |
20130305067 | DYNAMIC MANAGEMENT OF THERMAL LOADS - A method, system, and computer program product for dynamic management of thermal load in a data processing system are provided in the illustrative embodiments. A component of the data processing system is identified whose temperature has reached a temperature threshold, the component forming a critical component. A workload is selected from a set of workloads that is using the critical component. The workload is modified such that work performed by the critical component is reduced, the modifying further causing the temperature of the critical component to reduce below the temperature threshold. A power consumption of a cooling system associated with the thermal zone is reduced responsive to the temperature reducing below the temperature threshold. | 11-14-2013 |
20130311799 | WEIGHTED CONTROL IN A VOLTAGE SCALING SYSTEM - The subject matter of this application is embodied in an apparatus that includes a data processor, and two or more hardware monitors to measure parameters associated with the data processor. The apparatus also features a power supply to provide power to the data processor and the hardware monitors, and a controller to control the power supply to adjust an output voltage level of the power supply according to measurements from the hardware monitors. Different weight values are applied to the hardware monitors under different conditions, and the power supply output voltage level is controlled according to weighted measurements or values derived from the weighted measurements. | 11-21-2013 |
20130311800 | INFORMATION PROCESSING SYSTEM AND METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An information processing system includes an obtaining unit, a specifying unit, and an output unit. The obtaining unit obtains information indicating a state of the use of each of plural electrical apparatuses. The specifying unit specifies a power supply-and-receive relationship between the plural electrical apparatuses, on the basis of a change in power associated with the obtained information concerning each of the plural electrical apparatuses. The output unit outputs information indicating the power supply-and-receive relationship. | 11-21-2013 |
20130311801 | METHOD AND APPARATUS FOR CONTROLLING POWER CONSUMPTION - A method of controlling power consumption of a portable device includes monitoring whether the portable device has connected to a docking station; and selecting and executing one of a plurality of power consumption controlling algorithms according to a monitoring result. | 11-21-2013 |
20130311802 | MAINTAINING PROCESSOR CONTEXT BEFORE ENTERING POWER SAVING MODE - A CPU automatically preserves the CPU context in a computer memory that remains powered-up when the CPU is powered down in sleep mode. By means of the preserved CPU context, the CPU is able to instantly and transparently resume program execution at the instruction of the program that was asserted for execution when the CPU was powered down. The CPU is permitted to power down frequently, even during execution of a program, and results in reduced average overall power consumption. | 11-21-2013 |
20130311803 | ENERGY-SAVING DEVICE AND METHOD FOR PORTABLE TERMINAL - An energy-saving apparatus and method for a portable terminal are disclosed in the present document. The apparatus includes: an electricity meter module, configured to detect battery power consumption parameters under driving of a data acquisition module; the data acquisition module, configured to drive the detection of the electricity meter module, and output the collected battery power consumption parameters to a data analysis module; the data analysis module, configured to estimate power consumptions of all running devices at present in the terminal according to the input battery power consumption parameters, and output a power consumption optimization instruction to a power consumption optimization execution module; and the power consumption optimization execution module, configured to adopt corresponding power consumption optimization approaches according to the input power consumption optimization instruction. | 11-21-2013 |
20130311804 | MASTER SLAVE QPI PROTOCOL FOR COORDINATED IDLE POWER MANAGEMENT IN GLUELESS AND CLUSTERED SYSTEMS - Methods, apparatus, and systems for implementing coordinated idle power management in glueless and clustered systems. Components for facilitating coordination of package idle power state between sockets in a glueless system such as a server platform include a master entity in one socket (i.e., processor) and a slave entity in each socket participating in the power management coordination. Each slave collects idle status inputs from various sources and when the socket cores are sufficiently idle, it makes a request to the master to enter a deeper idle power state. The master coordinates global power management operations in response to the slave requests, including broadcasting a command with a target latency to all of the slaves to allow the processors to enter reduced power (i.e., idle) states in a coordinated manner. Communications between the entities is facilitated using messages transported over existing interconnects and corresponding protocols, enabling the benefits associated with the disclosed embodiments to be implemented using existing designs. | 11-21-2013 |
20130318371 | SYSTEMS AND METHODS FOR DYNAMIC POWER ALLOCATION IN AN INFORMATION HANDLING SYSTEM ENVIRONMENT - Systems and methods are disclosed that may be implemented to dynamically allocate relative power consumption between a group of multiple information handling system nodes that share a common (e.g., capacity-limited) power supply or source of power. The relative power consumption of the multiple information handling system nodes may be adjusted based on real time power consumption of each of the individual information handling system nodes, as well as the need for additional power by one or more of the individual information handling system nodes. A group of multiple information handling system nodes may dynamically communicate power usage characteristics in a distributed manner between themselves to implement a peer-to-peer acknowledgement architecture, or alternatively may communicate power usage characteristics to a centralized power manager. | 11-28-2013 |
20130318372 | DYNAMIC LOAD STEP CALCULATION FOR LOAD LINE ADJUSTMENT - A method of controlling voltage in a circuit is provided. Within the circuit, a block of an electrical component provides an indication that it desires to switch states (such as from off to on, on to off, or from one speed to another). The change in states requires a different current draw by the electrical component block. The indication is received by an electrical component that controls the voltage of the circuit. The electrical component that controls the voltage then issues a signal granting permission for the electrical component block to switch states. This permission signal is received by the electrical component and the electrical component block changes state. | 11-28-2013 |
20130318373 | DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS - Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system | 11-28-2013 |
20130318374 | DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS - Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system | 11-28-2013 |
20130318375 | PROGRAM EXECUTING METHOD - A program executing method is executed by a computer and includes calculating a first power consumption for execution of a first program described by first code; calculating a second power consumption for execution of a second program of a function identical to that of the first program and described by second code; and converting the first program into the second program and executing the second program, if the second power consumption is less than the first power consumption. | 11-28-2013 |
20130318376 | DATA PROCESSING SYSTEM HAVING POWER CAPPING FUNCTION IN RESPONSE TO OUTPUT STATE OF POWER SUPPLY MODULE - A data processing system includes a plurality of power supply modules each having a comparing unit for comparing an output-current value supplied to a computer with a threshold value, the plurality of power supply modules continue the comparison when the output-current value is equal to or less than the threshold value and outputs an output-current excess signal to a plurality of server blades when the output-current value is equal to or greater than the threshold value, and the plurality of server blades control respectively power consumptions of the server blades to make a power consumption value of the server blades to an equal to or less than a predetermined value on a power source non-redundancy. | 11-28-2013 |
20130318377 | INFORMATION PROCESSOR, COMPUTER PROGRAM PRODUCT, AND POWER SAVING SETTING METHOD - According to one embodiment, information processor includes: setting module; processor; monitoring module; analyzer; and notification module. The setting module specifies first value as first power saving function. The processor controls modules in accordance with the first value. The monitoring module accumulates in storage device information indicating usage of the modules as log. The analyzer determine based on the log whether power saving is achieved by the first power saving function when the processor controls the modules in accordance with the first value. The notification module notifies a user to use a second power saving function when power saving by the first power saving function is not achieved. Here, the second power saving function is expected to provide a larger power saving effect than that of the first power saving function, and realizes power saving in accordance with the usage of the modules. | 11-28-2013 |
20130318378 | SELF-CONTAINED METHOD AND DEVICE FOR MANAGING A FIRST ELECTRONIC APPARATUS - Disclosed herein is a self-contained method and device for managing a first electronic apparatus. Said first electronic apparatus is, in particular, a first electronic multimedia apparatus connected via an HDMI interface to a second electronic apparatus consisting of a playback apparatus. A self-contained method for managing a first electronic apparatus is provided. The first electronic apparatus is connected to at least one second electronic apparatus such that said first electronic apparatus provides data to the second electronic apparatus, said data being usable by said second electronic apparatus. The self-contained management method comprises a CMD_TRG triggering, by said first electronic apparatus, of a control of said first electronic apparatus, in accordance with activity data da2 of at least one second electronic apparatus from among said second electronic apparatus(es). | 11-28-2013 |
20130318379 | SCHEDULING TASKS AMONG PROCESSOR CORES - Embodiments of apparatus, computer-implemented methods, computing devices, systems, and computer-readable media (transitory and non-transitory) are described herein for scheduling a plurality of tasks among a plurality of processor cores. A first processor core of a plurality of processor cores of a computing device may be transitioned to a shielded state, in which no new tasks are to be assigned to the first processor core and tasks already assigned to the first processor core are executed to completion, in response to a determination that a criterion has been met. In various embodiments, the criterion may be based on a condition of the computing device, such as power available to the computing device or a temperature associated with the computing device. In various embodiments, the first processor core may transition to a reduced-power state after the tasks already assigned to the first processor core execute completion. | 11-28-2013 |
20130326246 | SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF CONTROLLING THE SAME - A semiconductor device includes a memory core with a plurality of memory cells, an internal voltage generator and a low power entry circuit. The low power entry circuit receives a plurality of control signals which are provided to a command decoder, and generates a low power signal indicating a low power consumption mode where a refresh operation is prohibited. The internal voltage generator includes a detector and at least one of booster circuits. The internal voltage generator, coupled to the memory core via an internal power supply line, generates a boosted internal voltage based on an external voltage and supplies the boosted internal voltage to the memory core via the internal power supply line. The internal voltage generator stops supplying the boosted internal voltage to the internal power supply line in response to the low power signal while the external voltage is supplied to the semiconductor device. | 12-05-2013 |
20130326247 | SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF CONTROLLING THE SAME - A semiconductor device includes a memory core with a plurality of memory cells, an internal voltage generator and a low power entry circuit. The low power entry circuit receives a plurality of control signals which are provided to a command decoder, and generates a low power signal indicating a low power consumption mode where a refresh operation is prohibited. The internal voltage generator includes a detector and at least one of booster circuits. The internal voltage generator, coupled to the memory core via an internal power supply line, generates a boosted internal voltage based on an external voltage and supplies the boosted internal voltage to the memory core via the internal power supply line. The internal voltage generator stops supplying the boosted internal voltage to the internal power supply line in response to the low power signal while the external voltage is supplied to the semiconductor device. | 12-05-2013 |
20130326248 | SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF CONTROLLING THE SAME - A semiconductor device includes a memory core with a plurality of memory cells, an internal voltage generator and a low power entry circuit. The low power entry circuit receives a plurality of control signals which are provided to a command decoder, and generates a low power signal indicating a low power consumption mode where a refresh operation is prohibited. The internal voltage generator includes a detector and at least one of booster circuits. The internal voltage generator, coupled to the memory core via an internal power supply line, generates a boosted internal voltage based on an external voltage and supplies the boosted internal voltage to the memory core via the internal power supply line. The internal voltage generator stops supplying the boosted internal voltage to the internal power supply line in response to the low power signal while the external voltage is supplied to the semiconductor device. | 12-05-2013 |
20130326249 | REGULATING POWER CONSUMPTION OF A MASS STORAGE SYSTEM - A technique includes receiving first work requests that are associated with a user workload. The technique includes using a machine to transform the first work requests into second work requests that are provided to components of a mass storage system to cause the components to perform work associated with a workload of the mass storage system; and regulating a power consumption of the mass storage system, including regulating a rate at which the second work requests are provided to the components of the mass storage system. | 12-05-2013 |
20130332754 | DATA STORAGE SYSTEM ENERGY AUDIT - An apparatus and associated methodology for a data storage system having an enclosure containing a plurality of drives that are individually selectable to transfer data corresponding to an execution of input/output (I/O) commands between the data storage system and another device. A memory in the enclosure temporarily stores unexecuted I/O commands, and a power supply device is capable of simultaneously operating all of the plurality of drives in support of multiple transfers of data. A power management device operably reduces a power output of the power supply device in response to a forecasted interruption in the transfer of data with one of the drives at a time when an unexecuted I/O command for the one of the drives resides in the memory. | 12-12-2013 |
20130332755 | POWER MANAGEMENT ENHANCEMENT - In one embodiment described herein, a device having an account permitting access to network-based storage, receives a push notification indicating that one or more assets has been shared by another person. In response to the push notification, the device begins downloading the new asset to the device, while starting two timers. When the first timer finishes, the user is notified about the new asset that is available. When the second timer finishes, the download, if still in progress, is interrupted to save power. | 12-12-2013 |
20130332756 | NEAR FIELD COMMUNICATION DEVICE AND POWER MANAGEMENT METHOD OF ELECTRONIC APPARATUS COMPRISING THE SAME - A near field communication device includes an RF power unit that generates an RF power supply voltage through wireless communication with an external communication device, a power detecting unit that detects an output level of a battery connected to the near field communication device, a driving control unit that controls the near field communication device, and a switching control unit that controls a supply of a power supply voltage to the driving control unit from the RF power unit or the battery. The switching control unit controls the supply of the power supply voltage based on at least one of the output level of the battery, a power on/off state of an electronic apparatus including the near field communication device, whether the electronic apparatus is connected to the battery, and whether the RF power supply voltage is generated. | 12-12-2013 |
20130332757 | SYSTEM AND METHOD FOR CONTROLLING TEMPERATURE IN AN INFORMATION HANDLING SYSTEM - Systems and methods for controlling temperature in an information handling system is provided. In certain embodiments, a method may include receiving a desired threshold value, determining if a current real-time system value exceeds the desired threshold value, determining if a power shedding mode is enabled, if the power shedding mode is enabled, adjusting power supplied to the information handling system, and if the power shedding mode is not enabled, dynamically adjusting a fan speed of a cooling fan associated with the information handling system. | 12-12-2013 |
20130339770 | MECHANISM FOR FACILITATING POWER EXTENSION SERVICE AT COMPUTING DEVICES - A mechanism is described for facilitating power extension service at computing devices according to one embodiment of the invention. A method of embodiments of the invention includes calculating potential power saving by one or more of a plurality of power-saving techniques supported by a computing device. The calculating includes identifying the one or more of the plurality of power-saving techniques that are available for selection and an expected amount of power to be saved with the one or more of the plurality of power saving techniques. The method may further include generating a list identifying the one or more of the plurality of power-saving techniques and relevant information resulting from the calculation, and | 12-19-2013 |
20130346771 | Controlling An Asymmetrical Processor - In an embodiment, the present invention includes a multicore processor with a front end unit including a fetch unit to fetch instructions and a decode unit to decode the fetched instructions into decoded instructions, a first core coupled to the front end unit to independently execute at least some of the decoded instructions, and a second core coupled to the front end unit to independently execute at least some of the decoded instructions. The second core may have a second power consumption level greater than a power consumption level of the first core and also heterogeneous from the first core. The processor may further include an arbitration logic coupled to the first and second cores to enable the second core to begin execution responsive to a start processor instruction present in the front end unit. Other embodiments are described and claimed. | 12-26-2013 |
20130346772 | DYNAMIC LINK WIDTH MODULATION - Described herein are embodiments of an apparatus configured for dynamic link width modulation, a system including an apparatus configured for dynamic link width modulation, a method for dynamic link width modulation, and computer-readable media having instructions that, if executed by one or more processors, cause an apparatus to perform a dynamic link width modulation method. An apparatus configured for dynamic link width modulation may include a first counter for determining a length of a queue of packets at a source of a link, a second counter for determining a rate of utilization of the link, and a power control unit configured to modify a width of the link based at least in part on the length of the queue and the rate of utilization. Other embodiments may be described and/or claimed. | 12-26-2013 |
20130346773 | ENERGY-SAVING CIRCUIT FOR MOTHERBOARD - When there is a memory module mounted in a memory slot, a memory power circuit provides a voltage to the memory slot. First and second power pins of the memory slot are connected. A first electronic switch is turned on. A second electronic switch is turned off. A programmable logic controller (PLC) outputs a first control signal to the memory power circuit to output the voltage to the memory slot. When there is no memory module mounted in the memory slot and the motherboard is powered on, the memory power circuit provides a voltage to the memory slot. The first and second power pins of the memory slot are disconnected. The first electronic switch is turned off. The second electronic switch is turned on. The PLC outputs a second control signal to control the memory power circuit not to output the voltage to the memory slot. | 12-26-2013 |
20130346774 | PROVIDING ENERGY EFFICIENT TURBO OPERATION OF A PROCESSOR - In one embodiment, a multicore processor includes cores that can independently execute instructions, each at an independent voltage and frequency. The processor may include a power controller having logic to prevent a first core from execution at a requested turbo mode frequency if the first core has a stall rate greater than a first stall threshold, and concurrently allow a second core to execute at a requested turbo mode frequency if the second core has a stall rate less than a second stall threshold. Other embodiments are described and claimed. | 12-26-2013 |
20140006817 | Performing Local Power Gating In A Processor | 01-02-2014 |
20140006818 | System and Method For Adaptive Thermal Management In A Portable Computing Device | 01-02-2014 |
20140006819 | JOINT OPTIMIZATION OF PROCESSOR FREQUENCIES AND SYSTEM SLEEP STATES | 01-02-2014 |
20140006820 | Energy Efficient Implementation Of Read-Copy Update For Light Workloads Running On Systems With Many Processors | 01-02-2014 |
20140006821 | DATA PROCESSING APPARATUS CAPABLE OF OPERATING IN POWER SAVING MODE, CONTROL METHOD OF DATA PROCESSING APPARATUS, AND STORAGE MEDIUM | 01-02-2014 |
20140013131 | POWER NAPPING TECHNIQUE FOR ACCELERATED NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) AND/OR POSITIVE BIAS TEMPERATURE INSTABILITY (PBTI) RECOVERY - A logic circuit is operated in a normal mode, with a supply voltage coupled to a supply rail of the logic circuit, and with a ground rail of the logic circuit grounded; It is determined that at least a portion of the logic circuit has experienced degradation due to bias temperature instability. Responsive to the determining, the logic circuit is operated in a power napping mode, with the supply voltage coupled to the ground rail of the circuit, with the supply rail of the circuit grounded, and with primary inputs of the circuit toggled between logical zero and logical one at low frequency. A logic circuit and corresponding design structures are also provided. | 01-09-2014 |
20140013132 | HYBRID COMPUTING MODULE - A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die. | 01-09-2014 |
20140013133 | SEMICONDUCTOR INTEGRATED CIRCUIT - A power consumption of a semiconductor integrated circuit is reduced. A semiconductor integrated circuit comprises a first path P1 for performing data processing in a data processing circuit and a second path P2 for bypassing the data processing circuit or for performing data processing in a simplified circuit. The semiconductor integrated circuit exclusively selects the first path and the second path depending on an operational mode, and stops a data input into a path that is not selected, resulting in a reduction of the power consumption. | 01-09-2014 |
20140013134 | ADAPTIVE POWER CONSERVATION IN STORAGE CLUSTERS - Each node and volume in a storage cluster makes a decision whether to reduce power consumption based on lack of requests from client applications and nodes over a time period. Node configuration parameters determine how long to wait until idling a node or volume, and how long to wait while idle before performing integrity checks. A bid value is calculated by each node and reflects how much it will cost for that node to write a file, read a file, or keep a copy. A node with the lowest bid wins, and nodes that are idle have a premium added to each bid to ensure that idle nodes are kept idle. In an archive mode, writes bids are reversed, nodes with less capacity submit lower bids, fuller nodes fill up faster and are then idled, while empty or near empty nodes may remain idle before winning a write bid. | 01-09-2014 |
20140019786 | ENERGY-EFFICIENT TRANSMISSION OF CONTENT OVER A WIRELESS CONNECTION - Energy efficient transmission of content can be provided using a variety of techniques. In an example technique, portions of content can be transmitted from a first computing device to a second computing device for display. A wireless radio of the first computing device can be placed into a low power mode between transmissions of the portions of content. In another example technique, one or more portions of content can be decoded, displayed, encoded, and transmitted by a first computing device for mirroring on a second computing device. One or more other portions of the content can be transmitted in encoded format to the second device without being decoded and displayed by the first device. In another example technique, a wireless radio of a first device can be placed into a low power mode in between transmission of commands to a second computing device to control content. | 01-16-2014 |
20140025967 | TECHNIQUES FOR REDUCING PROCESSOR POWER CONSUMPTION THROUGH DYNAMIC PROCESSOR RESOURCE ALLOCATION - A technique for performing power management for configurable processor resources of a processor determining whether to increase, decrease, or maintain resource units for each of the configurable processor resources based on utilization of each of the configurable processor resources. A total weighted power number for the processor is substantially maintained while resource units for each of the configurable processor resources whose utilization is above a first level is increased and resource units for each of the configurable processor resources whose utilization is below a second level is decreased. The total weighted power number corresponds to a sum of weighted power numbers for the configurable processor resources. | 01-23-2014 |
20140025968 | SYSTEM AND METHOD FOR MONITORING AND MANAGING DATA CENTER RESOURCES IN REAL TIME - A system for monitoring, controlling and optimizing power usage and cooling utilization within a data center infrastructure. The system may make use of a subsystem which is adapted to obtain real time information on both facility devices and information technology (IT) devices. The subsystem may be used to evaluate the real time information to provide an alert and diagnostic information with respect to at least one of the facility devices or at least one of the IT devices. The subsystem may also make use of a mechanism that provides real time control over at least one of the facility devices or at least one of the IT devices to optimize at least one of cooling utilization, power usage or performance of at least one of the facility devices or at least one of the IT devices. | 01-23-2014 |
20140025969 | CONTROL CIRCUIT FOR COMPUTER - A control circuit for a motherboard with a power supply unit arranged thereon includes a processing unit. To save consumption of electrical energy, the processing unit controls a switch unit to discontinue regulating a first power to a second power in a condition where a state of the motherboard is changed from state S | 01-23-2014 |
20140025970 | CONTROL SERVER, NETWORK CONTROL METHOD, AND PROGRAM - A control server selects part of nodes included in a first communication network, generates a second communication network from the selected nodes, determines a forwarding probability of a packet between a node and its next hop node in the second communication network to calculate a communication volume between at least one pair of nodes included in the second communication network with respect to a prescribed traffic using the determined forwarding probability, and calculates a link cost for at least one pair of nodes included in the second communication network based on the determined forwarding probability and the calculated communication volume, adds at least one node included in the first communication network to the second communication network so that the calculated link cost satisfies a prescribed condition, and puts nodes not included in the second communication network in a low power consumption mode. | 01-23-2014 |
20140025971 | METHOD AND DEVICE FOR CONTROLLING TERMINAL AND TERMINAL THEREOF - A method and device for controlling a terminal and a terminal. The method includes: checking the hardware of a terminal to obtain corresponding hardware information; and controlling the terminal according to the hardware information obtained thereby, where the hardware includes at least one of a CPU and a GPU, and the hardware information includes at least one of the voltage information and the frequency information about the hardware. The device includes: a checking module and a control module. | 01-23-2014 |
20140032947 | TRAINING, POWER-GATING, AND DYNAMIC FREQUENCY CHANGING OF A MEMORY CONTROLLER - A method for managing a memory controller comprising selecting a low-power state from a plurality of low-power states. The method further comprises transitioning to the low-power and entering the low-power state when the transition is complete, provided a wake-event has not been received. An apparatus comprises a controller configured to select a power state for transition, a state-machine configured to execute steps for transitions between power states of a memory controller connected by a bus to a memory, a storage configured to store at least one context, and a context engine configured to stream, at the direction of the state-machine engine, the at least one context to the memory controller. Streaming comprises communicating N portions of context data as a stream to N registers in the memory controller. A context comprises a plurality of calibrations corresponding to a state selected for transition. | 01-30-2014 |
20140032948 | MULTI-HOST SATA CONTROLLER - Described herein is a system having a multi-host SATA controller ( | 01-30-2014 |
20140040642 | POWER SUPPLY APPARATUS, PROCESSING APPARATUS, AND INFORMATION PROCESSING SYSTEM - Each of the power supply units in a power supply apparatus includes a voltage conversion circuit that converts input voltage into output voltage within a predetermined voltage range an output capacitor that outputs supply power while accumulating charges according to the voltage converted by the voltage conversion circuit, and an overload detection circuit that detects an overload of the output capacitor and when the overload is detected, notifies an apparatus operated using the power supplied from the power supply apparatus of an overload signal requesting a suppression of power consumption. | 02-06-2014 |
20140040643 | METHOD AND APPARATUS OF POWER MANAGMENT OF PROCESSOR - A processing platform and a method of controlling power consumption of a central processing unit of the processing platform are presented. By operating the method the processing platform is able to set an upper performance state limit and a lower performance state limit. The upper performance state limit is based on a central processing unit activity rate value and the lower performance state limit is based on a minimum require of the operating system to perform operating system tasks. The performance state values are varying within a range of the lower and upper limits according to a power management policy. | 02-06-2014 |
20140040644 | EXPANSION CIRCUIT FOR SERVER SYSTEM AND SERVER SYSTEM USING SAME - An expansion circuit for a server system includes a first output terminal, a second output terminal, a switch circuit and a detection circuit. The first output terminal receives a first voltage and providing the first voltage to a first hard disk drive group. The second output terminal receives the first voltage and provides the first voltage to a second hard disk drive group. The switch circuit is connected between the first and the second output terminals. The detection circuit detects a number of the at least one server which is electrically connected to the expansion circuit. When two servers are electrically connected to the expansion circuit, the detection circuit switches off the switch circuit. When a server is electrically connected to the expansion circuit, the detection circuit switches on the switch circuit. | 02-06-2014 |
20140040645 | INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR INFORMATION PROCESSING APPARATUS, AND STORAGE MEDIUM - An information processing apparatus capable of executing power ON processing for activating a program for storing information in a volatile memory or power OFF processing for stopping the program according to start or stop of power supply includes a communication unit configured to communicate with an external apparatus, a transfer unit configured to transfer a first mode for supplying power to a volatile memory and the communication unit to a second mode for supplying power to the volatile memory while not supplying power to the communication unit according to a data processing state, and a control unit configured to cause a first program to execute power saving processing for saving information stored in the volatile memory to a non-volatile memory and to cause a second program to execute the power OFF processing and the power ON processing when the mode is transferred from the first mode to the second mode. | 02-06-2014 |
20140040646 | METHOD AND APPARATUS FOR POWER THROTTLING OF HIGHSPEED MULTI-LANE SERIAL LINKS - A method for managing the power consumption of an information handling system including a multi-lane serial link having a lane setting that identifies the number of active lanes in the multi-lane serial link. The method may include determining a number of lanes required for the multi-lane serial link based on one or more I/O devices connected to the information handling system, triggering a reduction of the lane setting of the multi-lane serial link if the lane setting of the multi-lane serial link is greater than the determined number of lanes required, and automatically reducing power to the multi-lane serial link in response to the reduction of the lane setting. | 02-06-2014 |
20140047251 | METHODS, SYSTEMS AND DEVICES FOR HYBRID MEMORY MANAGEMENT - In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by translating virtual memory addresses into physical addresses on a computing system having hybrid memory. In a first stage of memory translation, an operating system translates virtual addresses to intermediate physical addresses. In a second stage of memory translation, a chip or virtualization software translates the intermediate physical address to physical addresses based on the characteristics of the physical memory and the characteristics of the processes associated with the physical memory. | 02-13-2014 |
20140047252 | HIERARCHICAL ENERGY OPTIMIZATION FOR DATACENTER NETWORKS - Technologies are presented for power optimization of datacenter networks in a hierarchical perspective. In some examples, a two-level power optimization model may be established to reduce the power consumption of datacenter networks by switching off network switches and links while still guaranteeing full connectivity and maximum link utilization. The model may be implemented by solving a capacitated constraint multi-commodity flow (CMCF) problem employing simple heuristic techniques. A power status of network switches may be determined according to a network traffic matrix and the CMCF optimization determined at core-level and at pod-level. A complementary process to provision whole network connectivity and to meet quality of service (QoS) goals may also be performed. | 02-13-2014 |
20140047253 | MULTIMEDIA PROCESSING SYSTEM AND METHOD OF OPERATING THE SAME - The multimedia processing system includes a plurality of first units including a CPU and a top domain; a storage domain configured to store a plurality of multimedia data; a multimedia codec domain configured to decode segments of target multimedia data received from the storage domain and to output decoded segments according to control of the CPU or the top domain; a system bus configured to connect the plurality of first units, the storage domain, and the multimedia codec domain with one another; and an alive domain configured to control power supply to the plurality of first units, the storage domain, the multimedia codec domain, and the system bus and to receive a signal from a user. | 02-13-2014 |
20140059365 | ULTRA LOW POWER APPARATUS AND METHOD TO WAKE UP A MAIN PROCESSOR - An apparatus and method for waking up a main processor (MP) in a low power or ultra-low power device preferably includes the MP, and a sub-processor (SP) that utilizes less power than the MP to monitor ambient conditions than the MP, and may be internalized in the MP. The MP and SP can remain in a sleep mode while an interrupt sensor monitors for changes in the ambient environment. A sensor is preferably an interrupt-type sensor, as opposed to polling-type sensors conventionally used to detect ambient changes. The MP and SP may remain in sleep mode, as a low-power or an ultra-low power interrupt sensor operates with the SP being in sleep mode, and awakens the SP via an interrupt indicating a detected change. The SP then wakes the MP after comparing data from the interrupt sensor with values in storage or with another sensor. | 02-27-2014 |
20140059366 | ELECTRONIC DEVICE AND CONTROL METHOD - An electronic device comprises a wireless unit, a control unit starting up the wireless unit at a predetermined startup time and a storage unit, wherein the wireless unit queries a wireless base station about a message and, when the message addressed to the electronic device exists, receives the message from the wireless base station, the control unit, when the message received by the wireless unit is an erase message, executes a process of erasing data stored in the storage unit, and the control unit, whereas when the message received by the wireless unit is not the erase message or when there is not the message addressed to the electronic device, stops the wireless unit. | 02-27-2014 |
20140059367 | SAVING POWER BY MANAGING THE STATE OF INACTIVE COMPUTING DEVICES - A system method and computer program product for managing readiness states of a plurality of computing devices. In response to a request, a computer system operates to either: provide one or more computing devices from an inactive pool to an active pool, or accept one or more active computing devices into the inactive pool. An Inactive Pool Manager proactively manages the inactive states of each computing device by: determining the desired number (and identities) of computing devices to be placed in each inactive state of readiness by solving a constraint optimization problem that describes a user-specified trade-off between expected readiness (estimated time to be able to activate computing devices when they are needed next) and conserving energy; generating a plan for changing the current set of inactive states to the desired set; and, executing the plan. Multiple alternative ways of quantifying the desired responsiveness to surges in demand are provided. | 02-27-2014 |
20140059368 | COMPUTING PLATFORM INTERFACE WITH MEMORY MANAGEMENT - In some embodiments, a PPM interface may be provided with functionality to facilitate an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface. | 02-27-2014 |
20140059369 | EFFICIENT SERVICE ADVERTISEMENT AND DISCOVERY IN A PEER-TO-PEER NETWORKING ENVIRONMENT - A local device broadcasts a service advertisement in a wireless network, where the service advertisement includes one or more service identifiers (IDs) identifying one or more services being advertised and an availability schedule of the local device. Optionally, the local device reduces power to at least a portion of the local device and wakes up at a time according to the availability schedule. The local device listens in the wireless network according to the availability schedule of the local device. In response to a service request received from a remote device during the availability window, the local device transmits a service response to the remote device. The service request includes one or more service IDs identifying one or more services being inquired by the remote device and the service response includes detailed information associated with one or more services identified by the one or more service IDs. | 02-27-2014 |
20140068288 | METHOD AND DEVICE WITH ENHANCED BATTERY CAPACITY SAVINGS - An enhanced battery saving capacity device ( | 03-06-2014 |
20140068289 | MECHANISM FOR REDUCING INTERRUPT LATENCY AND POWER CONSUMPTION USING HETEROGENEOUS CORES - A technique for operating a processor includes detecting an interrupt having a first core of the processor as a destination core. The technique includes handling the interrupt by a second core of the processor in response to the first core being in a low-power state. The first core may be capable of executing a greater number of instructions-per-cycle than the second core and the second core may consume less power than the first core. The first core may be coupled to a first voltage plane and the second core may be coupled to a second voltage plane having lower power than the first voltage plane. | 03-06-2014 |
20140068290 | Configuring Power Management Functionality In A Processor - In one embodiment, a multicore processor includes cores that can independently execute instructions, each at an independent voltage and frequency. The processor may include a power controller having logic to provide for configurability of power management features of the processor. One such feature enables at least one core to operate at an independent performance state based on a state of a single power domain indicator present in a control register. Other embodiments are described and claimed. | 03-06-2014 |
20140068291 | Performing Cross-Domain Thermal Control In A Processor - In an embodiment, a processor includes a first domain with at least one core to execute instructions and a second domain coupled to the first domain and including at least one non-core circuit. These domains can operate at independent frequencies, and a power control unit coupled to the domains may include a thermal logic to cause a reduction in a frequency of the first domain responsive to occurrence of a thermal event in the second domain. Other embodiments are described and claimed. | 03-06-2014 |
20140068292 | Power switch system and method thereof - A power switch system for a computer system includes a power supply module for generating a system operational power source and a power transistor driving source according to an external power source, a control module for generating a control signal according to a feedback signal, and a power switch module coupled to the power supply module and a control module for adjustably outputting the system operational power source and the power transistor driving source to a power source module, wherein the feedback signal is utilized to determine an operational mode of the computer system to be a high performance operational mode or a power saving operational mode. | 03-06-2014 |
20140068293 | Performing Cross-Domain Thermal Control In A Processor - In an embodiment, a processor includes a first domain with at least one core to execute instructions and a second domain coupled to the first domain and including at least one non-core circuit. These domains can operate at independent frequencies, and a power control unit coupled to the domains may include a thermal logic to cause a reduction in a frequency of the first domain responsive to occurrence of a thermal event in the second domain. Other embodiments are described and claimed. | 03-06-2014 |
20140068294 | POWER USAGE MANAGEMENT - The invention relates to a method of influencing power consumption of a process being executed on a computer system, comprising calculating an estimate of usage of at least one system resource by the process, converting the estimate of usage into a power consumption estimate, monitoring a time period during which the process is in an idle state and influencing at least one aspect of the computer system if the power consumption estimate exceeds a predefined limit while the process is in an idle state. Preferably this influencing comprises automatic termination of the process if the power consumption estimate exceeds the predefined limit. The at least one system resource may be selected from the group of: a central processing unit (CPU), a storage medium such as a hard disk, a monitor, a graphics card and a communications bus. | 03-06-2014 |
20140068295 | METHODS AND SYSTEMS FOR MANAGING DATA - Systems and methods for managing data, such as metadata or indexes for index databases. In one exemplary method, different processing priorities are assigned to different indexing tasks based upon the origin of the task. In another exemplary method, indexing tasks are processed in a first mode when a data processing system is in a first power state and indexing tasks are processed in a second mode when the data processing system is in a second power state. | 03-06-2014 |
20140068296 | METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION - Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a “current consumption cap” that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold. | 03-06-2014 |
20140068297 | STATE CONTROL METHOD AND APPARATUS AND PORTABLE TERMINAL - The embodiments of the present application provide a method and a state control apparatus as well as a portable terminal. The method is applied in a first system connected to a second system and includes: detecting, by the first system, a first event; determining a first state of the first system and a second state of the second system when the first event is a first predetermined event; obtaining a predetermined policy including a first control command and a second control command based on the first state of the first system, the second state of the second system and the first predetermined event; and controlling, by the first system, its own state based on the first control command and transmitting the second control command to the second system such that the second system is switched from the second state to a fourth state. The second system has different power consumptions in the second state and the fourth state. With the embodiments of the present application, in a portable terminal of hybrid system architecture, the system states of the first and second systems can be controlled in a coordinated manner, such that the power consumption can be reduced when both systems are operating cooperatively. | 03-06-2014 |
20140075217 | Power Saving Network Controller - A method and system are provided for reducing power usage in a telecommunications network. An intelligent network manager within a network operations center determines whether to change the power usage of the network, such as reducing power usage at limes of low network activity. The network operations center is in communication with the network elements of the network, and using the communication channels between the network operations center and the network elements the intelligent network manager instructs various ones of the network elements to operate at a lower capacity or even not at all. | 03-13-2014 |
20140075218 | Nonvolatile Logic Array And Power Domain Segmentation In Processing Device - A computing device includes a first set of non-volatile logic element arrays associated with a first function and a second set of non-volatile logic element arrays associated with a second function. The first and second sets of non-volatile logic element arrays are independently controllable. A first power domain supplies power to switched logic elements of the computing device, a second power domain supplies power to logic elements configured to control signals for storing data to or reading data from non-volatile logic element arrays, and a third power domain supplies power for the non-volatile logic element arrays. The different power domains are independently powered up or down based on a system state to reduce power lost to excess logic switching and the accompanying parasitic power consumption during the recovery of system state and to reduce power leakage to backup storage elements during regular operation of the computing device. | 03-13-2014 |
20140075219 | Run-Time Task-Level Dynamic Energy Management - A mechanism is provided for run-time task-level dynamic energy management. An instruction address for a first instruction of the application is mapped to a portion of application code in the application in response to an application being marked for energy management. A monitoring of the hardware resource activities is done for the portion of the application code. A level of energy management is then implemented for the portion of the application code based on a value of the tick indicator, resource activities, and an intensity indicator. | 03-13-2014 |
20140075220 | METHOD AND DEVICE OF CONTROLLING POWER SAVING - Disclosed in the present invention are a method and a device for controlling power saving. The method comprises: monitoring an amount of remaining charge in a battery of a mobile device; and automatically adjusting a operation of the mobile device according to the monitored amount of remaining charge of the battery, the automatic adjusting comprising at least one of: changing a current value of a device parameter of the mobile device according to the monitored amount of remaining charge, and determining whether to turn off a user application and/or a device function that is currently active on the mobile device according to the monitored amount of remaining charge, so as to reduce the consumption of electricity from the battery. | 03-13-2014 |
20140075221 | Power Management Method and Apparatus, and Power Supply Method - A power management method and apparatus, and a power supply system are provided. The method includes: obtaining a power demand value of each module and a rated output power of each power supply unit (PSU) in a communication equipment; calculating the obtained power demand value of each module to acquire a total power demand value of the modules; and adjusting, according to the calculated total power demand value of the modules and the obtained rated output power of each PSU, the current number of the PSUs actually turned on in the communication equipment. | 03-13-2014 |
20140075222 | System and Method for Managing Energy Consumption in a Compute Environment - Disclosed are systems and methods of performing a power cap processing in a compute environment. The method includes determining of one of committed resources and dedicated resources in a compute environment exceed a threshold value for a job. If a determination is yes that the threshold value is exceeded, then the method includes preempting processing of the job in the compute environment by performing one of migrating the job to a new compute resources and performing a power reduction action associated with the job, such as slowing down a processor associated with a job or cancelling the job. When such a power state reduction action is taken, reservations associated with other jobs may also be adjusted. | 03-13-2014 |
20140082383 | PREDICTING USER INTENT AND FUTURE INTERACTION FROM APPLICATION ACTIVITIES - Techniques for power management of a portable device are described herein. According to one embodiment, a user agent of an operating system executed within a portable device is configured to monitor activities of programs running within the portable device and to predict user intent at a given point in time and possible subsequent user interaction with the portable device based on the activities of the program. Power management logic is configured to adjust power consumption of the portable device based on the predicted user intent and subsequent user interaction of the portable device, such that remaining power capacity of a battery of the portable device satisfies intended usage of the portable device. | 03-20-2014 |
20140082384 | INFERRING USER INTENT FROM BATTERY USAGE LEVEL AND CHARGING TRENDS - Techniques for power management of a portable device are described herein. According to one embodiment, a user agent of an operating system executed within a portable device is configured to monitor daily battery usage of a battery of the portable device, to capturing, by the user agent, daily battery charging pattern of the battery of the portable device, and to inferring, by the user agent, user intent of utilizing the portable device at a given point in time based on a battery operating condition at the point in time in view of the daily battery usage and the daily battery charging pattern. Power management logic is configured to perform power management actions based on the user intent. | 03-20-2014 |
20140082385 | ON DEMAND POWER MANAGEMENT FOR SOLID-STATE MEMORY - Embodiments of an apparatus to increase the power efficiency of a solid-state memory have been presented. In one embodiment, the apparatus includes a power detection circuit coupled to the solid-state memory to detect a demand of a power distribution network that supplies power to the solid-state memory. Furthermore, the apparatus may include a power management controller coupled to the power detection circuit to receive the demand and to scale a voltage supply to the power distribution network in response to the detected demand. | 03-20-2014 |
20140082386 | Charge Recycling Between Power Domains of Integrated Circuits - A mechanism is provided for efficiently recycling a charge from a power domain that is discharging. A side of a discharging power domain normally coupled to a voltage supply is disconnected from the voltage supply. The side of the precharging power domain normally coupled to the voltage supply is currently disconnected from the voltage supply. The side of the discharging power domain normally coupled to the voltage supply is connected to a side of the precharging power domain normally coupled to the voltage supply. A side of the discharging power domain normally coupled to the ground is disconnected from ground. The side of the discharging power domain normally coupled to ground is connected to the voltage supply, thereby precharging the precharging power domain with the charge from the discharging power domain that would normally be lost due to leakage. | 03-20-2014 |
20140089693 | EFFICIENT LOW POWER EXIT SEQUENCE FOR PERIPHERAL DEVICES - Embodiments of the invention describe methods, apparatuses and systems for providing an efficient low power exit sequence for peripheral devices. In embodiments of the invention, a signal from a host device is transmitted to a SATA peripheral device for exiting a low-power state. An initialization time for OOB transmission and reception logic of the SATA peripheral device is tracked, and a reference time value based on the tracked initialization time is stored. In subsequent transitions from said low-power state, the reference time value for waking a host physical layer is utilized, thereby improving the efficiency of the management and use of said low power state. In some embodiments, the above described tracked initialization comprises a time from a transmission of an OOB signal (from the host to the peripheral device) to receiving an OOB response at the host device from the SATA peripheral device. | 03-27-2014 |
20140089694 | DYNAMICALLY CONTROLLING POWER BASED ON WORK-LOOP PERFORMANCE - The present embodiments provide a system that dynamically controls power consumption in a computing device. During operation, the system measures the performance of the computing device while executing a work-loop. Next, the system determines a derived completion time for the work-loop based on the measured performance. (For example, the derived completion time can be an expected completion time, a maximum completion time, or more generally a completion time distribution.) The system then determines a deadline-proximity for the work-loop based on a comparison between the derived completion time and a deadline for the work-loop. (For example, the deadline-proximity can be an expected deadline-proximity, a minimum deadline-proximity, or more generally a deadline-proximity distribution.) Finally, the system controls the power consumption of the computing device based on the determined deadline-proximity for the work-loop. | 03-27-2014 |
20140089695 | ENERGY-SAVING DEVICE - The present invention discloses an energy-saving device with multiple voltage levels which is applied to a motherboard. The energy-saving device includes an energy-saving driving module electrically connected to a CPU on the motherboard for generating an energy-saving signal with multiple voltage levels to the CPU, so as to switch the CPU to a corresponding operational frequency according to a voltage level of the energy-saving signal after the CPU receives the energy-saving signal. The energy-saving device with multiple voltage levels implements 256 voltage levels instead of the conventional two voltage levels, so as to achieve multiple power consumption of the motherboard. | 03-27-2014 |
20140089696 | METHOD FOR CONTROLLING POWER MODE SWITCHING - A method for controlling power mode switching, applied to a computer device, is provided. The computer device includes a power source supplying electrical power to the computer device for operation and is operated in a first power mode. In the method, firstly, a request for switching the computer to a second power mode is received. A power consumption amount corresponding to the second power mode is calculated. A remaining capacity of the power source is obtained. Then, whether the power consumption amount is larger than the remaining capacity is determined. If the power consumption amount is larger than the remaining capacity, a warning indicating that the remaining capacity is not sufficient is sent to an operating system of the computer device and the computer device is not switched to the second power mode. | 03-27-2014 |
20140089697 | SYSTEM-ON-CHIP WITH CAPABILITY FOR CONTROLLING POWER SUPPLY ACCORDING TO DATA TRANSACTION AND METHOD OF OPERATING THE SAME - A system-on-chip (SoC) which includes a plurality of intellectual properties (IP cores) which communicate data with a memory device operates by monitoring whether a data transaction occurs between at least one of the IP cores and the memory device, determining an operation state of the IP core according to the result of the monitoring, and supplying the IP core with power corresponding to the operation state of the IP core. | 03-27-2014 |
20140095902 | Power Saving Traffic Management Policies - A method and system are provided for reducing power usage in a telecommunications network. Policies are applied during traffic management of packets, the policies taking into account the power cost of transmitting a packet onward, including over a network. Embodiments are provided in which such policies are used during classification, scheduling, and traffic shaping of packets. | 04-03-2014 |
20140095903 | POWER EXCURSION TOLERANT POWER SYSTEM - A power excursion tolerant power system includes at least one powered component. A system capacitance and at least one power supply are coupled to the at least one powered component. The at least one power supply is operable as a voltage controlled current source to supply power to the at least one powered component when a system load is below a predetermined threshold. The at least one power supply is operable as a constant current source, and together with the system capacitance, to supply power to the at least one powered component when the system load is above the predetermined threshold. A load reduction mechanism is coupled to the at least one powered component and operable to perform at least one load reduction action when the system load is above the predetermined threshold. | 04-03-2014 |
20140095904 | Apparatus and Method For Determining the Number of Execution Cores To Keep Active In A Processor - A processor is described that includes a plurality of execution cores. The processor also includes power management circuitry to dynamically determine a number of the execution cores that, when active, will cause the processor to operate in a substantially linear power consumption vs. frequency region of operation such that performance gain as a function of power consumption increase with the number of cores is higher as compared to any other number of active execution cores within an established power envelope. | 04-03-2014 |
20140095905 | Computing System and Processor With Fast Power Surge Detection And Instruction Throttle Down To Provide For Low Cost Power Supply Unit - A processor is described that includes a quick signal path from an input of the processor to logic circuitry within the processor. The input is to receive a fast throttle down signal. The logic circuitry is to throttle down a rate at which the processor issues instructions for execution in response to the fast throttle down signal. The quick signal path is to impose practicably minimal propagation delay of the fast throttle down signal within the processor. | 04-03-2014 |
20140095906 | Rotational Graphics Sub-Slice and Execution Unit Power Down to Improve Power Performance Efficiency - Methods and apparatus relating to rotational graphics sub-slice and Execution Unit (EU) power down to improve power performance efficiency are described. In one embodiment, power-gating is rotated amongst single sub-slices within each slice of a plurality of slices based on an indication to reduce power consumption of a computational logic. The computational logic includes the plurality of slices and each of the plurality of slices includes a plurality of sub-slices to perform one or more computations. Other embodiments are also disclosed and claimed. | 04-03-2014 |
20140095907 | Method of Conserving Power Based on Electronic Device's I/O Pattern - A method of affecting power used by an electronic device is provided for an electronic device having storage media and running at least one application. Each application interfaces with the storage media through an input/output (I/O) path executing I/O activities that access the storage media in accordance with configurable parameters of the I/O path. A run-time I/O pattern defined by the I/O activities is determined during a run-time period of the electronic device. At least one of the I/O path's configurable parameters is then modified based on the run-time I/O pattern. The method is readily adapted for power conservation by providing selections for the configurable parameters with each of the selections optimizing power usage for a hypothetical I/O pattern. Then, one or more configurable parameters are modified in accordance with one of the selections for which the hypothetical I/O pattern associated therewith is closest to the run-time I/O pattern. | 04-03-2014 |
20140095908 | DOWNSTREAM DEVICE SERVICE LATENCY REPORTING FOR POWER MANAGEMENT - For one disclosed embodiment, a transition from a first state to a second, different state for at least a portion of a downstream device may be identified. The first and second states may correspond to different levels relating to activity for at least a portion of the downstream device. Data corresponding to a service latency may be transmitted to an upstream device in response to the identified transition for one or more upstream devices to manage power based at least in part on the service latency. Other embodiments are also disclosed. | 04-03-2014 |
20140101468 | APPARATUS, SYSTEM AND METHOD FOR GATED POWER DELIVERY TO AN I/O INTERFACE - Techniques and mechanisms for managing a delivery of power to a resource of an input/output (I/O) interface. In an embodiment, a first link of a plurality of communication links is monitored. Of the plurality of links, a first set of resources of the I/O interface is to support communication only via the first link. One or more other resources of the I/O interface are for supporting communications of another link of the plurality of links. In another embodiment, a resource of the first set of resources is decoupled from a power supply in response to detecting a total number of active lanes of the first link, decoupling. | 04-10-2014 |
20140101469 | HARD DRIVE ENERGY-SAVING CONTROL METHOD AND APPARATUS, AND CENTRAL PROCESSING UNIT - A hard drive energy-saving control method is disclosed. The method includes: obtaining a historical working state of a hard drive in each preset time segment, where each preset time segment is each preset time segment in at least one statistic period; predicting a working state of the hard drive in a next time segment of the current time segment according to the historical working state of the hard drive; and selecting a corresponding energy-saving policy level according to the working state of the hard drive in the next time segment, and performing energy-saving control on the hard drive. Embodiments of the present invention solve the technical problem in the prior art that energy consumption of a hard drive is not correlated with actual service access traffic and the energy-saving efficiency is not optimum. The embodiments of the present invention improve the energy-saving efficiency of the hard drive. | 04-10-2014 |
20140101470 | IDLE DURATION REPORTING FOR POWER MANAGEMENT - For one disclosed embodiment, data corresponding to an idle duration for one or more downstream devices may be received. Power may be managed based at least in part on the received data. Other embodiments are also disclosed. | 04-10-2014 |
20140108831 | POWER DEMAND REDUCTION SYSTEM - An information handling system includes a processor, an air moving system, a power system, and power demand reduction circuit. The air moving system is operable to cool the processor. The power system is operable to power the processor and the air moving system. The power demand reduction circuit is operable to detect a total power system power demand that will exceed a power system output capacity of the power system in response to a processor power demand from the processor and, in response, reduce an air moving system power provided to the air moving system such that the processor power demand will no longer cause the total power system power demand to exceed the power system output capacity. The air moving system power may be increased when a decrease in the processor power demand results in the two contributing to a total power system power that will not exceed the power system output capacity. | 04-17-2014 |
20140108832 | INFORMATION PROCESSING APPARATUS AND OPERATION CONTROL METHOD - According to one embodiment, an information processing apparatus includes a base unit including an upper including a keyboard, a display unit, a processor, a cooling fan, and a controller. The display unit is set at one of a first position where a display surface of the display unit and the upper surface are exposed and a second position where the display surface of the display unit is exposed and a rear surface of the display unit covers the upper surface. The controller lowers a rotational speed of the cooling fan and performance of the processor in response to a change in a setting position of the display unit from the first position to the second position. | 04-17-2014 |
20140108833 | POWER INFORMATION PROVIDING APPARATUS, POWER INFORMATION PROVIDING METHOD, AND COMPUTER READABLE STORAGE MEDIUM - A power information providing apparatus provides a content including power information. The apparatus includes an access result calculator, an energy saving result calculator, and a content type determining module. The access result calculator is configured to calculate a frequency of use of the power information providing apparatus. The energy saving result calculator is configured to calculate a value of a power consumption reduction result. The content type determining module is configured to select a type of the content based on the frequency of use calculated by the access result calculator and the value of the power consumption reduction result calculated by the energy saving result calculator. | 04-17-2014 |
20140108834 | METHOD, SYSTEM, AND APPARATUS FOR DYNAMIC THERMAL MANAGEMENT - A method, apparatus, article of manufacture, and system, the method including, in some embodiments, processing a computational load by a first core of a multi-core processor, and dynamically distributing at least a portion of the computational load to a second core of the multi-core processor to reduce a power density of the multi-core processor for the processing of the computational load. | 04-17-2014 |
20140108835 | POWER MANAGEMENT INTEGRATED CIRCUIT AND OPERATING METHOD THEREOF - A power management integrated circuit includes a nonvolatile memory configured to store code data for driving the power management integrated circuit; a processor configured to execute program data stored at a volatile memory; and a decompression logic separated from the processor, the decompression logic being formed of hardware, configured to decompress the code data to generate program data, and configured to store the program data at the volatile memory. | 04-17-2014 |
20140108836 | MICROCONTROLLER AND METHOD FOR MANUFACTURING THE SAME - A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory. | 04-17-2014 |
20140108837 | POWER MANAGEMENT OF DATA PROCESSING RESOURCES, SUCH AS POWER ADAPTIVE MANAGEMENT OF DATA STORAGE OPERATIONS - A system and method for performing power conservation actions is described. In some examples, the system determines a power conservation policy based on information from the system, and implements that policy in an enterprise or in one or more buildings, such as within a data storage environment. In some examples, the system adds or modifies global filters or system performance based on information from the system. | 04-17-2014 |
20140115356 | TRANSFORMER CAPABLE OF AUTOMATIC INPUT POWER ADJUSTMENT AND COMPUTER USING THE TRANSFORMER - A transformer and a computer capable of automatic input power adjustment are provided, and the computer includes an electronic apparatus and a transformer. The electronic apparatus has a power source module and a wake-up module. The transformer has a switch module, a power supply module and a detection module. The power supply module is connected to the switch module and the detection module. The switch module transmits external power to the power supply module. The power supply module transforms the external power to operation power, and transmits the operation power to a power source module. When the operation power is lower than a charge threshold, the detection module commands the switch module to stop receiving the external power. | 04-24-2014 |
20140115357 | Method and Apparatus for Adjusting Device Power Consumption - The present invention discloses a method for adjusting device power consumption including: grouping multiple devices into at least one device group, setting a group power consumption ceiling threshold (PCCT) for the device group, and setting a device PCCT for each device in the group; obtaining current total power consumption of the group, and when the current total power consumption of the group exceeds the group PCCT, determining whether current power consumption of each device in the group exceeds the device PCCT of the device; when the current power consumption of each device exceeds the device PCCT of the device, reducing power consumption of each device to the device PCCT of the device; and when current power consumption of a device exceeds a device PCCT of the device, setting a new PCCT for the device, and reducing power consumption of the device to/or less than the new PCCT. | 04-24-2014 |
20140115358 | INTEGRATED CIRCUIT DEVICE AND METHOD FOR CONTROLLING AN OPERATING MODE OF AN ON-DIE MEMORY - An integrated circuit device comprising at least one instruction processing module, at least one memory comprising at least one memory bank configurable to operate in a first functional mode and at least one further, lower-power mode, and at least one memory mode control module arranged to control switching of the at least one memory bank between the first functional mode and the at least one further, lower-power modes. | 04-24-2014 |
20140115359 | COMPUTER SYSTEM, CONNECTION DEVICE, POWER SUPPLY CONTROL METHOD, AND POWER SUPPLY CONTROL PROGRAM RECORDING MEDIUM - A host monitoring unit in a host connection device ( | 04-24-2014 |
20140115360 | Method for Reducing Dynamic Power Consumption and Electronic Device - The present invention relates to a method for reducing dynamic power consumption and an electronic device. The method includes: receiving a bus signal; when information about access to the slave device exists in the bus signal, inputting a clock signal into the slave device and detecting a status signal sent by the slave device; and stopping inputting the clock signal into the slave device when the status signal of the slave device indicates that the slave device is in an idle state. A working clock of a device module, such as a slave device, in a chip is controlled by using a status signal of the slave device and a bus signal, which prevents unnecessary circuit turnover from occurring to the device module in the chip in a non-working state, thereby achieving a purpose of reducing dynamic power consumption of the device module in the chip. | 04-24-2014 |
20140129855 | ADAPTIVE POWER INJECTED PORT EXTENDER - A port extender includes a chassis with uplink ports that are operable to receive power and data from a power sourcing device, and user device ports that are operable to connect to user devices. A power management processor is coupled to each of the uplink ports and the user device ports. The power management processor is operable to determine a power budget using power received by the uplink ports. The power management processor is also operable to detect a port configuration event such as the removal of a connection of a user device to a user device port, the inactivity of a user device port, or the addition of a connection of a user device to a user device port, and in response, selectively provide power to one or more of the plurality of user device ports based on the power budget and the port configuration event. | 05-08-2014 |
20140129856 | DEVICE AND METHOD FOR ELECTRIC POWER MANAGEMENT OF A PLURALITY OF PERIPHERAL INTERFACES - The arrangement and method of the invention comprises dynamically limiting current provided to multiple peripheral interfaces of an electronic device, comprising individual current limiting per peripheral interface and global current limiting over all peripheral interfaces, in way that is optimized to best suit power needs for the peripheral devices connected to the peripheral interfaces while respecting the power supplying capacity of the electronic device. | 05-08-2014 |
20140129857 | METHOD OF DYNAMICALLY SCALING A POWER LEVEL OF A MICROPROCESSOR - A method of dynamically scaling a power level of a microprocessor is provided. The method includes: receiving a plurality of workload rates of a microprocessor in a first duration period; determining a second duration period by adjusting a length of the first duration period; calculating a period workload rate based on the plurality of workload rates in the first duration period; dynamically scaling a power level of the microprocessor; and maintaining the scaled power level of the microprocessor in the second duration period. | 05-08-2014 |
20140136864 | MANAGEMENT TO REDUCE POWER CONSUMPTION IN VIRTUAL MEMORY PROVIDED BY PLURALITY OF DIFFERENT TYPES OF MEMORY DEVICES - Reduction of memory power consumption in virtual memory systems that have a combination of different types of physical memory devices working together in a system's primary memory to achieve performance with optimum reductions in power consumption by storing in the virtual memory in the kernel, topology data for each of the different memory devices used. | 05-15-2014 |
20140136865 | Cooperatively Managing Enforcement of Energy Related Policies Between Virtual Machine and Application Runtime - A mechanism is provided in a data processing system for runtime based enforcement of energy policies collaboratively. The application runtime environment executing within a virtual machine on the data processing system receives notification of a change in energy policy for the virtual machine or the physical host it is running on. Responsive to determining the virtual machine is to be run under a power cap based on the notification of a change in energy policy, the application runtime environment dynamically modifies execution of an application in the application runtime environment or requests the execution environment for delaying enforcement of energy policies. The application comprises a set of application modules. | 05-15-2014 |
20140136866 | RACK AND POWER CONTROL METHOD THEREOF - A power control method of a rack having a plurality of nodes includes the following steps. Power information of each node is received. a total power consumption value of the plurality of nodes according to the power information is calculated. A number of power supply units to be turned on according to the total power consumption value and a maximum supplied power value of a single power supply unit is calculated. At least one primary power supply unit and at least one secondary power supply unit in pairs according to the number of power supply units to be turned on is started. The at least one primary power supply unit provides a duty voltage to the plurality of nodes, and the at least one secondary power supply unit does not provide the duty voltage to the plurality of nodes. | 05-15-2014 |
20140136867 | ELECTRONIC DEVICE, CONTROL METHOD OF ELECTRONIC DEVICE, AND PROGRAM - Aspects of the present invention include a device comprising a memory storing instructions and a processing circuit executing the instructions to detect a first user action. The instructions may further include instructions to establish a first user action state based on the detected first user action, designate a first mode based on the first user action state, determine if a second user action, consistent with a first detection condition associated with the first mode, has taken place, when the second user action has taken place, establish a second user action state based on the second user action, and designate a second mode based on the second user action state, the second mode consuming more power than the first mode. | 05-15-2014 |
20140143564 | APPROACH TO POWER REDUCTION IN FLOATING-POINT OPERATIONS - An approach is provided for enabling power reduction in floating-point operations. In one example, a system receives floating-point numbers of a fused multiply-add instruction. The system determines the fused multiply-add instruction does not require compliance with a standard of precision for floating-point numbers. The system generates gating signals for an integrated circuit that is configured to perform operations of the fused multiply-add instruction. The system then sends the gating signals to the integrated circuit to turn off a plurality of logic gates included in the integrated circuit. | 05-22-2014 |
20140143565 | Setting Power-State Limits based on Performance Coupling and Thermal Coupling between Entities in a Computing Device - The described embodiments include a computing device with a first entity and a second entity. In the computing device, a management controller dynamically sets a power-state limit for the first entity based on a performance coupling and a thermal coupling between the first entity and the second entity. | 05-22-2014 |
20140143566 | ELECTRONIC APPARATUS OPERATABLE IN POWER SAVING MODE, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM STORING CONTROL PROGRAM THEREFOR - An electronic apparatus that is capable of preventing overcharge and overdischarge of a battery. The electronic apparatus is operatable in a normal mode and a first power saving mode with less power consumption. A battery supplies electric power until battery residual capacity reaches a first threshold in the first power saving mode. A charging unit charges the battery in the normal mode. A control unit controls, in a case that the battery residual capacity is smaller than a second threshold larger than the first threshold when transition to the first power saving mode is made, so as to charge the battery until the battery residual capacity reaches the second threshold, and make a transition to the first power saving mode. | 05-22-2014 |
20140149759 | Providing An Inter-Arrival Access Timer In A Processor - In an embodiment, a processor includes multiple cores each to independently execute instructions and a power control unit (PCU) coupled to the cores to control power consumption of the processor. In turn, the PCU includes a control logic to cause the processor to re-enter a first package low power state responsive to expiration of an inter-arrival timer, where this expiration indicates that a time duration subsequent to a transaction received in the processor has occurred. Other embodiments are described and claimed. | 05-29-2014 |
20140149760 | DISTRIBUTED POWER BUDGETING - A distributed power management computer program product is configured to collect power consumption data that indicates power consumption by at least a plurality of the components of a node. The program code can be configured to provide, to each of a plurality of controllers associated with a respective one of the plurality of components, the power consumption data. The program code can be configured to determine a node power consumption. The program code can be configured to determine a power differential as a difference between the node power consumption and an upper power consumption threshold of the node. The program code can be configured to determine a proportion of the node power consumption consumed by a first component. The program code can be configured to compute a local power budget for the first component. | 05-29-2014 |
20140149761 | DISTRIBUTED POWER BUDGETING - Embodiments include collecting, from each of a plurality of controllers of a node having a plurality of components, component power consumption. Each of the plurality of controllers is associated with one or more of the components. The component power consumptions are provided to the controllers. A node power consumption for the node is determined based, at least in part, on the component power consumption. The power cap is determined for the plurality of components. A power differential power is determined as a difference between the node power consumption and the power cap for the plurality of components. A proportion of the node power consumption consumed by the component is determined based on the component power consumption of the component. A local power budget is computed for the component based, at least in part, on the power differential and the proportion of the node power consumption consumed by the component. | 05-29-2014 |
20140149762 | DECOUPLED POWER AND PERFORMANCE ALLOCATION IN A MULTIPROCESSING SYSTEM - Embodiments of the inventive subject matter include setting minimum and maximum performance operating limits for each of a plurality of controllers. The operating limits are set in accordance with performance rules imposed on the system. In response to a request to change operation of a processing unit to a requested operational setting, it is determined whether the requested operational setting complies with the minimum and maximum performance operating limits. The minimum performance operating limit is sent to a performance controller if the requested operational setting does not comply with the minimum performance operating limit. The maximum performance operating limit is sent to a performance controller if the requested operational setting does not comply with the maximum performance operating limit. The requested operational setting is sent to a performance controller if the requested operational setting complies with the minimum and maximum performance operating limits. | 05-29-2014 |
20140149763 | COMPUTING SYSTEM VOLTAGE CONTROL - Computing system voltage control methods include receiving an indication of a first performance state. The first performance state is associated with a first voltage and applies to at least one computing system component. The indication of the first performance state is received by a first computing system component from a second computing system component. An indication of a second performance state is received, wherein the second performance state is associated with a second voltage that is not equal to the first voltage. It is determined whether the second performance state is within a range defined by a minimum performance state and a maximum performance state. Responsive to determining that the second performance state is within the range defined by the minimum performance state and the maximum performance state, the voltage of the at least one computing system component is set equal to the voltage associated with the second performance state. | 05-29-2014 |
20140149764 | STANDBY CURRENT REDUCTION THROUGH A SWITCHING ARRANGEMENT WITH MULTIPLE REGULATORS - An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate having a major surface. The integrated circuit also includes a directional light sensor. The directional light sensor includes a plurality of photodetectors located on the major surface. The directional light sensor also includes one or more barriers, wherein each barrier is positioned to shade one or more of the photodetectors from light incident upon the integrated circuit from a respective direction. The directional light sensor is operable to determine a direction of light incident upon the integrated circuit by comparing an output signal of at least two of the photodetectors. | 05-29-2014 |
20140149765 | Self-Powered Devices and Methods - The self-powered device is configured to be powered by energy collected from a surrounding environment. The self-powered device includes an energy collector, and a memory having instructions for selecting one of a plurality of modes of operation. The energy collector is configured to collect energy to power the self-powered device from a surrounding environment in which the self-powered device is located. The plurality of modes of operation include: (i) a low-power mode of operation in which the self-powered device consumes less than a pre-determined or adaptively-determined amount of power and the self-powered device uses less than its full capabilities, and (ii) and a high-power mode of operation in which self-powered device consumes more than the pre-determined or adaptively-determined amount of power and the self-powered device uses its full capabilities. The instructions for selecting one of a plurality of modes of are configured to (a) select the low-power mode of operation when available energy becomes insufficient to fully power the self-powered device, and (b) select the high-power mode of operation when sufficient energy again becomes available to fully power the self-powered device. | 05-29-2014 |
20140149766 | ROUTER PARKING IN POWER-EFFICIENT INTERCONNECT ARCHITECTURES - A method and apparatus for selectively parking routers used for routing traffic in mesh interconnects. Various router parking (RP) algorithms are disclosed, including an aggressive RP algorithm where a minimum number of routers are kept active to ensure adequate network connectivity between active nodes and/or intercommunicating nodes, leading to a maximum reduction in static power consumption, and a conservative RP algorithm that favors network latency considerations over static power consumption while also reducing power. An adaptive RP algorithm is also disclosed that implements aspects of the aggressive and conservative RP algorithms to balance power consumption and latency considerations in response to ongoing node utilization and associated traffic. The techniques may be implemented in internal network structures, such as for single chip computers, as well as external network structures, such as computing clusters and massively parallel computer architectures. Performance modeling has demonstrated substantial power reduction may be obtained using the router parking techniques while maintaining Quality of Service performance objectives. | 05-29-2014 |
20140149767 | MEMORY CONTROLLER AND OPERATING METHOD OF MEMORY CONTROLLER - A memory controller and an operating method of a memory controller are provided. The operating method includes detecting that a bus of an external host connected with the memory controller enters a first power saving mode; entering a second power saving mode of the memory controller according to a result of the detecting; detecting a wake-up process of the bus of the external host; and waking up the memory controller while the bus of the external host executes the wake-up process. The waking up of the memory controller is ended before the wake-up process of the bus of the external host is completed. | 05-29-2014 |
20140149768 | VIRTUALIZED APPLICATION POWER BUDGETING - Virtualized application power budgeting can manage power budgeting for multiple applications in data centers. This power budgeting may be done in intelligent and/or dynamic ways and may be useful for updating power budgets, resolving conflicts in requests for power, and may improve the efficiency of the distribution of power to multiple applications. | 05-29-2014 |
20140157015 | CLAMP CIRCUITS FOR POWER CONVERTERS - A power converter comprises an input port configured to receive a source of power, an output port configured to provide output power, and a bridge circuit coupled to the input port. The bridge circuit comprises a first switch coupled in series with a second switch, and a third switch coupled in series with a fourth switch. A first clamp rectifier is coupled in series with a second clamp rectifier, and the first and second clamp rectifiers are coupled in parallel with the first and second switches. A first clamp capacitor is coupled between the first and second clamp rectifiers, with the first clamp capacitor operative to reduce power loss in the first and second clamp rectifiers. A first resonant inductor is coupled between the first and second switches. The power converter also includes a transformer operatively coupled to the bridge circuit, with the transformer comprising a primary winding and at least one secondary winding. A current rectifying circuit is operatively coupled to the secondary winding of the transformer and the output port. | 06-05-2014 |
20140157016 | Power Saving in Computing Devices - Power saving in computing devices is provided. A first computing device communicates with a second computing device using a first set of tones. A low power event is detected by the first computing device. In response to the detected low power event, a request to communicate using a second set of tones is sent to the second computing device by the first computing device. The second set of tones has fewer tones than the first set of tones, and may be a subset of the first set of tones. | 06-05-2014 |
20140157017 | POWER MANAGEMENT OF COMMUNICATION DEVICES - In some embodiments, a method includes processing, at a communication device, a packet received via a communication media. The method also includes reducing, while the packet is being processed, power to at least one component in the communication device, in response to a condition associated with the processing of the packet being satisfied. The method includes restoring power to the at least one component prior to receiving an entirety of the packet at the communication device. | 06-05-2014 |
20140157018 | POWER MODULE AND ELECTRONIC DEVICE - A power module to power a function module of an electronic device is provided. The power module includes a power unit, a switch unit, a timing unit, and a control unit. The switch unit is connected between the power unit and the function module, and establishes or cuts off a connection between the power unit and the function module. The timing measures a time has elapsed according to a timing length. The control unit is connected to the timing unit and the switch unit, and is used to start the timing unit to measure time after the electronic device has been turned on. The timing unit produces a trigger signal when the measured time reaches the timing length, the control unit turns off the switch unit when receiving the trigger signal, thus cutting off connection between the power unit and the function module. | 06-05-2014 |
20140157019 | ELECTRONIC APPARATUS CAPABLE OF CONTROLLING POWER USAGE, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM - An electronic apparatus capable of controlling power usage without interfering with execution of processes. When the electronic apparatus is requested to execute a process, it is determined whether or not power consumption while the requested process is executed is greater than a predetermined amount of power. When it is determined that the power consumption is greater than the predetermined amount of power, power required to execute the requested process is borrowed from another electronic apparatus. When the power required to execute the requested process is borrowed, the requested process is executed. | 06-05-2014 |
20140157020 | WIRELESS COMMUNICATION DEVICE, WIRELESS COMMUNICATION METHOD, WIRELESS COMMUNICATION SYSTEM, AND COMPUTER-READABLE RECORDING MEDIUM ON WHICH CONTROL PROGRAM OF WIRELESS COMMUNICATION DEVICE HAS BEEN RECODED - To prevent temperature rise caused by increase in communication speed and increase in output power and to provide a mobile terminal device which has a small size and is of low cost, a wireless communication device comprises: a detection means for detecting the temperature inside the device; and a control means for, when the temperature detected by the detection means becomes a preset first threshold value or more, restricting the maximum value of the transmission speed that a self-device can achieve. | 06-05-2014 |
20140164798 | METHOD AND APPARATUS FOR CONTROLLING POWER-OFF OF TERMINAL - A method and an apparatus for controlling power-off of a terminal are disclosed in embodiments of the present invention, where the method includes: acquiring usage state information of the terminal after the terminal is powered on; and controlling the terminal to power off if it is determined, according to the usage state information, that the terminal is abnormally powered on. | 06-12-2014 |
20140164799 | OPTIMIZING POWER USAGE BY FACTORING PROCESSOR ARCHITECTURAL EVENTS TO PMU - A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit. | 06-12-2014 |
20140173305 | METHOD AND APPARATUS FOR MANAGING COMPUTING SYSTEM POWER - An apparatus may include first circuitry coupled to one or more platform components, the first circuitry operative to receive an unfiltered input voltage signal, compare a first voltage level of the unfiltered input voltage signal to a first reference voltage level, and generate a control signal operative to lower operation power of one or more of the one or more platform components when the first voltage level is less than the first reference voltage level. | 06-19-2014 |
20140173306 | SYSTEM AND METHOD FOR PROVIDING FOR POWER SAVINGS IN A PROCESSOR ENVIRONMENT - Particular embodiments described herein can offer a method that includes receiving storage operation information that is to indicate one or more storage drive operations, receiving storage independent power information, determining, by a processor, a performance profile based at least in part on the storage operation information and the storage independent power information, and causing a setting of at least one power management directive that is to correspond with the performance profile. | 06-19-2014 |
20140173307 | Interfacing Dynamic Hardware Power Managed Blocks and Software Power Managed Blocks - A method and apparatus for interfacing dynamic hardware power managed blocks and software power managed blocks is disclosed. In one embodiment, and integrated circuit (IC) may include a number of power manageable functional units. The functional units maybe power managed through hardware, software, or both. Each of the functional units may be coupled to at least one other functional unit through a direct communications link. A link state machine may monitor each of the communications links between functional units, and may broadcast indications of link availability to the functional units coupled to the link. Responsive to a software request to shut down a given link, or a hardware initiated shutdown of one of the functional units coupled to the link, the link state machine may broadcast and indication that the link is unavailable. | 06-19-2014 |
20140173308 | CHIP LEVEL POWER REDUCTION USING ENCODED COMMUNICATIONS - A circuit arrangement, method, and program product communicate data over a communication bus by selectively encoding data values queued for communication over the communication bus based at least in part on at least one data value queued to be communicated thereafter and at least one previously communicated encoded data value to reduce bit transitions for communication of the encoded data values. By reducing bit transitions in the data communicated over the communication bus, power consumption by the communication bus is likewise reduced. | 06-19-2014 |
20140173309 | INFORMATION PROCESSING APPARATUS, AND CONTROL METHOD FOR INFORMATION PROCESSING APPARATUS - One embodiment provides an information processing apparatus including: a main body; a CPU provided in the main body, a limit value being set for an instantaneous power consumption of the CPU; a measuring module configured to measure a power that is being supplied to the main body; and a setting module. The setting module sets the limit value into a first value so that the power does not exceed a first instantaneous value, and if an accumulation time during which the power exceeds a second instantaneous value that is smaller than the first instantaneous value has reached a first threshold time within a prescribed time period, further sets the limit value into a second value so that the power does not exceed the second instantaneous value. | 06-19-2014 |
20140173310 | ELECTRONIC APPARATUS, CONTROL METHOD OF ELECTRONIC APPARATUS AND COMPUTER-READABLE MEDIUM - An electronic apparatus includes a connection detector, an electric-power amount information acquisition module and an instruction module. The connection detector detects whether each of a plurality of electric-power supplies including a first electric-power supply and a second electric-power supply is connected to the electronic apparatus. The electric-power amount information acquisition module acquires total suppliable electric-power amount information representing a total suppliable electric-power amount supplied from the plurality of electric-power supplies detected to be connected to the electronic apparatus. The instruction module compares electric-power amount information representing an amount of electric-power used in a preset high-speed operation mode of a controller with the total suppliable electric-power amount information, and instructs, when the amount of electric-power used in the high-speed operation mode of the controller is larger than the total suppliable electric-power amount, the controller to operate in a mode in which consumed electric-power is lower. | 06-19-2014 |
20140173311 | Methods and Systems for Operating Multi-Core Processors - A method of operating a system on chip (SoC) includes determining to switch from a selected low-power core among a plurality of low-power cores to a high-performance core among a plurality of high-performance cores, counting the number of high-performance cores that are operating among a plurality of high-performance cores, determining a maximum operating frequency of the plurality of high-performance cores based on the counted number, and switching from the selected low-power core to the selected high-performance core based on the determined maximum operating frequency. | 06-19-2014 |
20140181544 | Reducing Power Consumption of a Redundant Power System Utilizing Sleep Power Consumption Considerations for Power Supply Units Within the Redundant Power System - A method, system, and information handling system provides better system power consumption of a redundant power system having a plurality of power supply units (PSUs) by taking into consideration each PSU's sleep power consumption during selection of one or more PSUs to place into a “hot spare” sleep mode. For each PSU, power efficiency data at different load ratings are measured and stored. During the PSU selection, a calculation of system power consumption is conducted on each of several configurations where a different PSU is hypothetically disabled. Each calculation takes into consideration both the sleep power consumption of a disabled PSU and power efficiency data of an enabled PSU. Selection of one or more PSUs to disable is determined according to the configuration yielding the lower or lowest system input power consumption based on the results of the calculations. | 06-26-2014 |
20140181545 | Dynamic Balancing Of Power Across A Plurality Of Processor Domains According To Power Policy Control Bias - In an embodiment, a processor includes multiple domains including a core domain having at least one core to execute instructions and a graphics domain including at least one graphics engine to perform graphics operations and a power controller to control power consumption of the processor. The power controller may include a logic to receive an indication of a priority domain of the domains and to dynamically allocate power to the domains based on a power limit, one or more maximum domain frequency requests, and the priority domain indication. Other embodiments are described and claimed. | 06-26-2014 |
20140181546 | METHOD AND APPARATUS FOR POWER RESOURCE PROTECTION - An apparatus may comprise a platform power protection circuit to monitor an electric current over a platform input line, the electric current received on the platform input line from a current source, and output an alert signal from a comparator when current output is determined to exceed a current threshold. The apparatus may further include logic to assert a control signal to reduce power consumption in one or more platform components coupled to the platform input line when the alert signal is received. Other embodiments are disclosed and claimed. | 06-26-2014 |
20140181547 | SMART CHARGING SYSTEM FOR HYBRID BATTERY PACK - A hybrid battery pack and a power supply procedure for supplying power to a mobile computing system comprising a Li polymer battery coupled in parallel with a supercapacitor cell battery. The Li polymer battery supplies substantially all the continuous currents demanded by the system load. The supercapacitor cell battery supplies substantially all the transient current demanded by the system load. A charging control logic circuit is coupled to the power source and the system load, and operable to control the Li polymer battery to charge the supercapacitor cell battery at a constant rate while the supercapacitor cell battery supplies current to the system load. The control logic can also send instructions to have system load reduced if the supercapacitor cell battery is depleted before it can be charged with an external charger. | 06-26-2014 |
20140181548 | System and Method for Using Energy Efficient Ethernet to Control Energy Efficiencies in Lower Layers - A system and method for using energy-efficient Ethernet to control energy efficiency in lower layers. In one example, an energy-efficiency control policy in a first Ethernet device can be configured to determine a need for transitioning of at least a part of the first Ethernet device into an energy saving sate. Based on such a determination, an energy-efficiency control signal can be transmitted from the first Ethernet device to a first non-Ethernet device. The receipt of the energy-efficiency control signal by the first non-Ethernet device is used to initiate a transition by the first non-Ethernet device into an energy saving state, which in turn may initiate a transition by downstream non-Ethernet devices into an energy saving state. This process creates a single unified energy-efficiency policy domain. | 06-26-2014 |
20140181549 | System and Method for Managing Power Consumption of an Information Handling System - An AC-to-DC power adapter provides DC power to an information handling system at a first higher DC voltage or a second lower DC voltage based upon a power state of the information handling system. For example, approximately 19 Volts DC power is provided if the information handling system is in an on state or if the information handling system is charging a battery. Approximately 13 Volts DC power is provided if the information handling system is in a reduced power state, such as an ACPI S3 state, with a battery having a substantially full charge. | 06-26-2014 |
20140181550 | SYSTEM HAVING TUNABLE PERFORMANCE, AND ASSOCIATED METHOD - A system having tunable performance includes: a plurality of units, wherein at least one unit includes a hardware circuit; at least one global/local busy level detector including a global busy level detector, wherein the global busy level detector is arranged to detect an entire global busy level of the plurality of units; at least one local busy level detector, wherein each local busy level detector is arranged to detect a local busy level of at least one portion of the units; and a global/local system performance manager arranged to tune the performance of the system according to the entire global busy level and the at least one local busy level, wherein a weight of the at least one local busy level is higher than that of the entire global busy level. An associated method is also provided. | 06-26-2014 |
20140189385 | INTELLIGENT RECEIVE BUFFER MANAGEMENT TO OPTIMIZE IDLE STATE RESIDENCY - Methods and systems may provide for determining a plurality of buffer-related settings for a corresponding plurality of idle states and outputting the plurality of buffer-related settings to a device on a platform. The device may determine an observed bandwidth for a channel associated with a receive buffer and identify a selection of a buffer-related setting from the plurality of buffer-related settings based at least in part on the observed bandwidth. In one example, each buffer-related setting includes a latency tolerance and a corresponding idle duration. | 07-03-2014 |
20140189386 | SUPPLY-VOLTAGE CONTROL FOR DEVICE POWER MANAGEMENT - One embodiment provides a method for reducing leakage current in device logic having an operational supply-voltage threshold, a nonzero data-retention supply-voltage threshold, and two or more on-die transistor switches to switchably connect a voltage source to the device logic. After the logic enters an idle period, one or more of the switches are opened to lower a supply voltage of the logic below the operational supply-voltage threshold but above the data-retention supply-voltage threshold. When the logic exits the idle period, one or more of the switches are closed to raise the supply voltage of the logic above the operational supply-voltage threshold. | 07-03-2014 |
20140189387 | STAGED POWER DISTRIBUTION CONTROL - Various embodiments are directed to restrictions in portable computing device electric power to accommodate reductions in the voltage level of a power source. An apparatus comprises a controller caused to receive configuration data from a main processor circuit specifying a voltage level threshold and selected action to take to reduce electric power to a first component in response to the voltage level falling below the first voltage level threshold, recurringly monitor the voltage level; based on the voltage level falling below the first voltage level threshold, take the first selected action and transmit a signal to the main processor circuit indicating that the voltage level has fallen below the first voltage level threshold and that the first selected action has been taken; transmit the voltage level to the main processor circuit; receive a signal from the main processor circuit to undo the first selected action; and so undo. | 07-03-2014 |
20140189388 | PEER ASSISTED MOBILE DEVICE BATTERY EXTENSION SYSTEM - A system configured to manage battery energy of a mobile device includes a primary mobile device and at least one peer device. The primary mobile device includes a power unit, a main communication module to electrically communicate with a peer device, and a peer assisted module in electrical communication with the power unit and the main communication module. The peer assisted module determines an energy level of the energy unit, and determines a task to be executed by the peer device. The peer device receives the task transmitted from the primary mobile device. The peer device further includes a peer process management module that executes at least one computation that completes the task, and communicates a completed task to the primary mobile device. | 07-03-2014 |
20140189389 | PEER ASSISTED MOBILE DEVICE BATTERY EXTENSION SYSTEM - A system configured to manage battery energy of a mobile device includes a primary mobile device and at least one peer device. The primary mobile device includes a power unit, a main communication module to electrically communicate with a peer device, and a peer assisted module in electrical communication with the power unit and the main communication module. The peer assisted module determines an energy level of the energy unit, and determines a task to be executed by the peer device. The peer device receives the task transmitted from the primary mobile device. The peer device further includes a peer process management module that executes at least one computation that completes the task, and communicates a completed task to the primary mobile device. | 07-03-2014 |
20140189390 | SYSTEM AND METHOD FOR CAUSING REDUCED POWER CONSUMPTION ASSOCIATED WITH THERMAL REMEDIATION - Particular embodiments described herein can offer a method that includes receiving a signal indicating whether at least one device is in a low power mode, determining that the at least one device is in a first thermally benign state based, at least in part, on the signal, and performing a first operation associated with a reduced thermal remediation power consumption. | 07-03-2014 |
20140189391 | SYSTEM AND METHOD FOR CONVEYING SERVICE LATENCY REQUIREMENTS FOR DEVICES CONNECTED TO LOW POWER INPUT/OUTPUT SUB-SYSTEMS - In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description. | 07-03-2014 |
20140189392 | COMMUNICATION LINK AND NETWORK CONNECTIVITY MANAGEMENT IN LOW POWER MODE - Methods and apparatus relating to communication link and network connectivity management in low power mode are described. In one embodiment, logic manages one or more external communication network links (also referred as “links”) in response to a determination that a processor has entered a low power consumption state and based on policy information. The logic also blocks/intercepts one or more signals, corresponding to management of the one or more links, that are directed to the processor to allow the processor to stay in the low power consumption. Other embodiments are also claimed and disclosed. | 07-03-2014 |
20140189393 | POWER SUPPLY AND METHOD FOR SUPPLYING POWER TO MOTHERBOARD - A monitored and high-efficiency power supply for a motherboard includes an AC-to-DC conversion circuit, a control circuit, a standby circuit, a main output circuit, a standby output circuit. The AC-to-DC conversion circuit converts an AC source voltage to a DC voltage. When the power supply is in a standby state, the standby circuit is enabled but when the power supply is in a normal working state, the standby circuit is disabled, and the control circuit is enabled to control only the main voltage output to the motherboard. A method for supplying power to a motherboard is also provided. | 07-03-2014 |
20140189394 | ELECTRONIC DEVICE AND POWER-SUPPLY CONTROL METHOD - According to one embodiment, a electronics device includes a setting module, a determination module, a control module. The setting module is configured to set a power consumption reference value for a predetermined period of time. The determination module is configured to determine whether an amount of power consumption of an external power supply exceeds the power consumption reference value in the predetermined period of time. The control module is configured to cause a power reduction process to be performed when the amount of power consumption is determined as exceeding the power consumption reference value, the power reduction process reducing the amount of power consumption of the external power supply. | 07-03-2014 |
20140189395 | INTELLIGENT POWER MANAGEMENT FOR A MULTI-DISPLAY MODE ENABLED ELECTRONIC DEVICE - Particular embodiments described herein provide an apparatus to control power consumption including logic, at least partially including hardware logic, to determine whether an electronic device is using an external display, determine whether a user input has been received by the electronic device within a predetermined time period when the electronic device is using the external display, and control power consumption by a display of the electronic device based at least in part on whether user input has been received within the predetermined time period. | 07-03-2014 |
20140189396 | COMMUNICATION APPARATUS, INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR COMMUNICATION APPARATUS, CONTROL METHOD FOR INFORMATION PROCESSING APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM - A communication apparatus includes a connection unit configured to connect the communication apparatus to an external apparatus, a determination unit configured to determine whether the external apparatus is connected to the communication apparatus via the connection unit in a first connection mode, the first connection mode being a mode in which the external apparatus establishes a connection to a pre-registered apparatus, and a control unit configured to decide, based on a determination result obtained by the determination unit, whether to allow an operation for powering off the external apparatus to be performed. | 07-03-2014 |
20140189397 | STATE CONTROL DEVICE, STATE CONTROL METHOD AND PROGRAM - A state control device which controls return from a power saving state to a normal operating state by an extremely simple operation without wastefully consuming power. In a power saving state the functions of an LCD unit (including a backlight) and a touch panel unit are disabled. When a function-enabled acceleration sensor unit detects a shake (motion) of a portable terminal, the functions of the touch panel unit are enabled. When the enabled touch panel unit detects a touch operation, a transition is made to a normal operating state whereby the LCD unit (including a backlight) is set ON for screen display. Therefore, it is unnecessary to press the power supply button provided in a difficult position to operate from the viewpoint of preventing erroneous operation as in conventional technology, and return from the power saving state to the normal operating state can be achieved with a simple operation. | 07-03-2014 |
20140195830 | SYSTEM AND METHOD FOR POWER MANAGEMENT - Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device. | 07-10-2014 |
20140195831 | ADVANCED PoE POWER CONTROL - A power sourcing equipment (PSE) device including a power over Ethernet (PoE) interface. A processor is coupled to the PoE interface. A memory is coupled to the processor and includes instruction that, when executed by the processor, cause the processor to perform a number of functions. The processor may supply power at a first power level to a PD that is coupled to the PoE interface. The processor may then determine an actual power consumption of the PD. The processor may then send a first Link Layer Discovery Protocol (LLDP) packet to the PD over the PoE interface that includes first proposed power level information that is based on the actual power consumption of the PD. Then processor may then supply power to the PD at a second power level that is different from the first power level. | 07-10-2014 |
20140195832 | ACCELERATED CACHE RINSE WHEN PREPARING A POWER STATE TRANSITION - Methods, integrated circuit devices, and fabrication processes relating to power management transitions of a compute unit comprising a cache are presented. One method includes, responsive to an indication that the compute unit is attempting to enter a low power state, detecting at least one line of the cache differing from the corresponding line in memory, writing differing data from the at least one differing line to the memory, flushing at least one remaining differing line of the cache, and permitting the compute unit to enter the low power state, wherein the detecting and the writing are performed at a first frequency prior to the indication and at a second frequency subsequent the indication, and the second frequency is higher than the first frequency. | 07-10-2014 |
20140195833 | ADAPTIVE LOW-POWER LINK-STATE ENTRY POLICY FOR ACTIVE INTERCONNECT LINK POWER MANAGEMENT - Methods and apparatus for implementing active interconnect link power management using an adaptive low-power link-state entry policy. The power state of an interconnect link or fabric is changed in response to applicable conditions determined by low-power link-state entry policy logic in view of runtime traffic on the interconnect link or fabric. The low-power link-state policy logic may be configured to include consideration of operating system input and Quality of Service (QoS) requirements for applications and devices employing the link or fabric, and device latency tolerance requirements. | 07-10-2014 |
20140201547 | Selective Precharge for Power Savings - Embodiments of a memory device are disclosed that may allow for detecting the opportunity for energy savings and implementing the energy savings for each access to the memory device. The memory device may include a plurality of columns, an address comparator, and a timing and control circuit. Each of the plurality of columns may include a plurality of data storage cells coupled to a common data line, and a pre-charge circuit that may be configured to charge the common data line to a pre-determined voltage. The address comparator may be configured to compare an address value to a previous address value, and generate an output dependent upon the comparison. The timing and control circuit may then selectively disable pre-charge circuits in the plurality of columns dependent upon the generated output of the address comparator. | 07-17-2014 |
20140201548 | Management of the Interaction Between Security and Operating System Power Management Unit - The present invention relates to a method of controlling the operation of a processing device in a first mode or in a second mode. The processing device has a first execution environment and a second execution environment. The method comprises, upon detection of a switch between said first and second modes, setting in the first execution environment a value of a shared variable to an initial value, upon detection of a request of execution of instructions in the second execution environment, updating the value of said shared variable to a value different from the initial value, and reading a current value of the shared variable and causing the processing device to operate in the first mode or in the second mode depending at least on the current value of the shared variable. | 07-17-2014 |
20140201549 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND COMPUTER PROGRAM PRODUCT - An information processing apparatus includes: a power mode information storage unit that stores power mode information indicating whether a power mode of an electronic apparatus is a first power mode in which at least a first communication unit is operable or a second power mode in which the first communication unit is not operable and a second communication unit is operable; an update unit that updates the power mode information; a determination unit that refers to the power mode information and determines the power mode; a first acquisition unit that, if the power mode is the first power mode, obtains state information from the electronic apparatus via the first communication unit; a state information storage unit that stores the state information; and a second acquisition unit that, if the power mode is the second power mode, obtains the state information from the state information storage unit. | 07-17-2014 |
20140208135 | POWER-UP RESTRICTION - Techniques are disclosed relating to power management within an integrated circuits. In one embodiment an apparatus is disclosed that includes a circuit and a power management unit. The power management unit is configured to provide, based on a programmable setting, an indication of whether an attempted communication to the circuit is permitted to cause the circuit to exit from a power-managed state. In some embodiments, the apparatus includes a fabric configured to transmit the attempted communication to the circuit from a device. In such an embodiment, the circuit is configured to exit the power-managed state in response to receiving the attempted communication. The fabric is configured to determine whether to transmit the attempted communication based on the indication provided by the power management unit. | 07-24-2014 |
20140208136 | Systems And Methods For Power Supply Configuration And Control - Systems and methods are disclosed that may be used for controlling information handling system power supply based on current system power policy such as current system load power need and/or based on current system load power capping information. The disclosed systems and methods may be so implemented to improve power use efficiency for information handling system applications in which a power supply unit (PSU) has a power delivery capability that is overprovisioned relative to the power-consuming system load component/s of an information handling system. | 07-24-2014 |
20140208137 | SYSTEMS AND METHODS FOR DYNAMIC LOAD REDUCTION CONTROL MESSAGING - Systems and methods for dynamic load reduction control messaging. In one embodiment, a system can include at least one memory that stores computer-executable instructions; and at least one processor configured to access the at least one memory, wherein the at least one processor is configured to execute the computer-executable instructions. The computer-executable instructions can be operable to receive, by the at least one processor, a multicast load control instruction for a demand response device; generate, based at least in part on the multicast load control instruction, at least one unicast load control instruction; and transmit, by a transmission device coupled to the at least one processor, the at least one unicast load control instruction to a home area network (HAN) device. | 07-24-2014 |
20140208138 | SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION - Systems and methods are disclosed for operating an interface of an electronic device in an active mode or a power save mode based, at least in part, on a condition of a data exchange module buffer. When buffer space is available, incoming data may be stored locally and the interface used to access remote memory storage may be in a power save mode. The interface may revert to active mode to transfer data to the remote memory, such as after a configurable reception interval. Outgoing data may also be stored in a buffer, allowing the interface to be in a power save mode with information transmitted from the buffer. | 07-24-2014 |
20140208139 | INFORMATION PROCESSING APPARATUS, METHOD OF CONTROLLING POWER CONSUMPTION, AND STORAGE MEDIUM - An apparatus includes a memory, a processor coupled to the memory, a power supply device that supplies power to the processor, and a signal generation circuit that, when overcurrent of the power supply device is detected, generates a first signal instructing suppression of power consumption of the processor, and outputs the first signal to the processor. | 07-24-2014 |
20140208140 | POWER CONSUMPTION LIMIT ASSOCIATED WITH POWER OVER ETHERNET (POE) COMPUTING SYSTEM - A computing system is associated with power consumption based on Power over Ethernet (PoE). Power consumption is compared to a threshold, and a signal is asserted that power consumption is to be limited based on the comparison to the threshold. | 07-24-2014 |
20140215235 | Sensory Stream Analysis Via Configurable Trigger Signature Detection - The present inventors have recognized that proper utilization of reconfigurable event driven hardware may achieve optimum power conservation in energy constrained environments including a low power general purpose primary processor and one or more electronic sensors. Aspects of neurobiology and neuroscience, for example, may be utilized to provide such reconfigurable event driven hardware, thereby achieving energy-efficient continuous sensing and signature reporting in conjunction with the one or more electronic sensors while the primary processor enters a low power consumption mode. Such hardware is event driven and operates with extremely low energy requirements. | 07-31-2014 |
20140215236 | POWER-EFFICIENT INTER PROCESSOR COMMUNICATION SCHEDULING - Computer system, method and computer program product for scheduling IPC activities are disclosed. In one embodiment, the computer system includes first processor and second processors that communicate with each other via IPC activities. The second processor may operate in a first mode in which the second processor is able to process IPC activities, or a second mode in which the second processor does not process IPC activities. Processing apparatus associated with the first processor identifies which of the pending IPC activities for communicating from the first processor to the second processor are not real-time sensitive, and schedules the identified IPC activities for communicating from the first processor to the second processor by delaying some of the identified IPC activities to thereby group them together. The grouped IPC activities are scheduled for communicating to the second processor during a period in which the second processor is continuously in the first mode. | 07-31-2014 |
20140215237 | POWER STATE TRANSITION SAVING SESSION INFORMATION - Techniques for saving session information when transitioning a port to a low power state are provided. An indication of an intent to transition a port to a low power state is provided. Session information related to the port is saved. The port is transitioned to the low power state. | 07-31-2014 |
20140215238 | PLATFORM POWER MANAGEMENT FOR BUILDING WIDE CONTROL OF POWER FACTOR AND HARMONICS - Example embodiments of an apparatus to reduce power consumed by a processor include a timing signal block configured to be coupled to measure the magnitude of an alternating current voltage signal supplied to a processor and to assert a timing signal when the magnitude of the alternating current voltage signal is about equal to zero volts and a throttling block configured to be coupled to the processor, to receive the timing signal and to assert a throttling signal that causes processor speed to be reduced so that processor power consumption is reduced in phase with the alternating current voltage signal and harmonic distortion of a current waveform supplied to the processor is reduced. | 07-31-2014 |
20140215239 | Method and Apparatus for Modular Power Management and Protection of Critical Services in Ambulatory Medical Devices - Architecture and associated methods are provided for power management of ambulatory medical devices. The medical devices is described by a suite of services, each assigned a level of priority (from discretionary to critical), and the power management architecture allows use interchangeable control modules of various levels. A Power Safety Controller supervises the system to ensure appropriate preservation of critical services and provide warnings for low battery level. A Fidelity Controller ensures optimal allocation of power between the different services. A device supervision module estimates device characteristics which can be used by the other levels. The overall architecture ensures a safe and optimal management of services, and allows for a bottom-up deployment of the device. | 07-31-2014 |
20140215240 | Methods And Apparatuses For Controlling Thread Contention - An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold. | 07-31-2014 |
20140223205 | MULTIPLE VOLTAGE IDENTIFICATION (VID) POWER ARCHITECTURE, A DIGITAL SYNTHESIZABLE LOW DROPOUT REGULATOR, AND APPARATUS FOR IMPROVING RELIABILITY OF POWER GATES - Described is an apparatus comprising: first and second processing cores; and a PCU which is operable to: generate a first VID for an off-die regulator external to the apparatus, the first VID resulting in a first power supply for the first processing core; and generate a second VID different from the first VID, the second VID resulting in a second power supply for the second processing core. Described is an apparatus comprising: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a processing core, and to receive a second power supply as input; an ADC to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative and to generate the digital bus for controlling the plurality of power-gate transistors. | 08-07-2014 |
20140223206 | SYSTEM AND METHOD FOR POWER REDUCTION BY SEQUESTERING AT LEAST ONE DEVICE OR PARTITION IN A PLATFORM FROM OPERATING SYSTEM ACCESS - In some embodiments, the invention involves a system and method relating to managing power utilization in systems having multiple processing elements. In at least one embodiment, the present invention is intended to control the sleeping/wakefulness of processing elements, as necessary, to maintain a preferred level of power utilization in the platform. Activity is routed to sequestered processing elements instead of sleeping processing elements to save power. | 08-07-2014 |
20140223207 | POWER CONTROL DEVICE AND POWER CONTROL METHOD - The present invention provides a power control device, a machine comprising the same and a power control method. The device is used for an integrated machine comprising a thin client and a display and comprises: a current detecting unit for detecting the current flowing through a port in the thin client connecting to the peripheral device; and a control signal generating unit for generating a control signal based on the intensity of the detected current to adjust the power consumption of the display and/or the thin client to maintain no increase in the power consumption of the integrated machine. The power control device, the machine comprising the same and the power control method of the present invention can be used to avoid low efficiency resulting from the power reservations for peripheral devices connected by a USB port. | 08-07-2014 |
20140223208 | COGNITIVE POWER MANAGEMENT FOR MEMORY DOMINATED WIRELESS COMMUNICATION SYSTEMS - A power management technique utilizing a method for accurately and rapidly estimating the change in the statistical distribution of data at each block in a communication system leading to or originating from a memory that is experiencing voltage scaling induced errors is disclosed. An appropriate memory supply voltage that maximizes power savings is found by exploiting the available SNR slack while keeping system performance within a required margin. | 08-07-2014 |
20140223209 | MEDIA CONTENT CACHING - A playback device includes tangible storage configured to receive transfer of media content from a remote communications device to the playback device while the remote communications device is operating in a high power mode. Interface logic is coupled to the tangible storage and configured to signal the remote communications device during the transfer to prepare the remote communications device to enter a low power mode after the transfer is complete. The remote communications device includes a content manager configured to transfer of media content from the remote communications device to a playback device while the remote communications device is operating in a high power mode. Power logic is coupled to the content manager and configured to prepare the remote communications device to enter a low power mode after the transfer is complete, responsive to receipt of a signal from the playback device during the transfer is complete. | 08-07-2014 |
20140237272 | POWER CONTROL FOR DATA PROCESSOR - A data processor includes a data processor core, and a power controller. The data processor core is adapted to control an external memory system and to perform a task by accessing the external memory system, where the task has an associated computation rate, and the data processor is adapted to control the external memory system by powering up the external memory system when needed. The power controller is coupled to the data processor core for controlling a power consumption of the data processor core and the external memory system by issuing control signals to change an activation time and an activation frequency of the data processor core and the memory system. | 08-21-2014 |
20140237273 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - An information processing apparatus includes: a wakeup-target identifying section configured to identify a wakeup target in response to a wakeup trigger; and a wakeup processing section configured to wake up the wakeup target identified by the wakeup-target identifying section. | 08-21-2014 |
20140237274 | METHOD FOR CONTROLLING INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING APPARATUS - A method of controlling an apparatus including a processor including a plurality of cores, the method includes, when a number of the cores to be activated is M, determining whether or not a first power consumed by the M activated core is within a range of a second power to be consumed when the number of the cores to be activated is M+N, and when the first power is out of the range of the second power, prohibiting to increase the number of the cores to be activated from M to M+N. | 08-21-2014 |
20140245038 | Electronic Device, Electronic System, and Control Method - According to one embodiment, an electronic device to which an AC adaptor is attachable includes a detecting module and a control module. The detecting module detects whether the AC adaptor is attached to the electronic device. The control module controls suppression and non-suppression of power consumption of the electronic device depending upon whether the detecting module detects that the AC adaptor is attached to the electronic device. | 08-28-2014 |
20140250312 | Conditional Notification Mechanism - The described embodiments comprise a first hardware context. The first hardware context receives, from a second hardware context, an indication of a memory location and a condition to be met by the memory location. The first hardware context then sends a signal to the second hardware context when the memory location meets the condition. | 09-04-2014 |
20140250313 | MINIMIZING POWER CONSUMPTION IN ASYNCHRONOUS DATAFLOW ARCHITECTURES - An asynchronous pipeline structure includes a plurality of functional blocks comprising dynamic logic, each block precharged to an idle state responsive to a precharge control signal applied thereto, with each block, upon being precharged, receiving input data thereto for processing, and holding output data generated thereby during an evaluate phase, independent of a reset of the input data; for each block, a completion detector circuit coupled to the output of the functional block, the completion detector circuit generating an acknowledgement signal that indicates validity or absence of data at the output of the block; and for each block, a precharge control circuit generating a precharge signal, wherein for a given block, a first input to the precharge control circuit comprises the acknowledgment signal from a downstream completion detector, and second input to the precharge control circuit comprises the precharge signal from an upstream precharge control circuit. | 09-04-2014 |
20140258744 | METHODS, SYSTEMS, AND COMPUTER READABLE MEDIA FOR CONTROLLING PROCESSOR CARD POWER CONSUMPTION IN A NETWORK TEST EQUIPMENT CHASSIS THAT INCLUDES A PLURALITY OF PROCESSOR CARDS - Methods, systems, and computer readable media for controlling processor card power consumption are disclosed. In one example, the method is conducted in a network test equipment chassis that includes a plurality of processor cards that implements network testing functions. The method includes detecting an event or status associated with one of the plurality of processor cards and determining whether the event or status satisfies a condition of at least one power management rule. In response to determining that the event or status satisfies a condition of the at least one power management rule, the method further includes adjusting power consumption of the processor card in the network test equipment in accordance with the at least one power management rule. | 09-11-2014 |
20140258745 | POWER STATE CHANGE IN DISK DRIVE BASED ON DISK ACCESS HISTORY - A data storage device that includes a magnetic storage device selects one or more power states of the magnetic storage device based on a time interval since a most recent time data has been read from or written to the magnetic storage device. The power state of the magnetic storage device can be changed from a higher power consumption state to a lower power consumption state when the time interval exceeds a predetermined value. The power consumption state may be changed from an active servo state to an intermediate power consumption state, a park state, and/or a standby state, depending on the time elapsed since the most recent time data has been read from or written to the magnetic storage device. | 09-11-2014 |
20140258746 | Collective Operation Management In A Parallel Computer - Methods, apparatuses, and computer program products for collective operation management in a parallel computer are provided. Embodiments include a parallel computer having a first compute node operatively coupled for data communications over a tree data communications network with a plurality of child compute nodes. Embodiments also include each child compute node performing a first collective operation. The first compute rode, for each child compute node, receives from the child compute node, a result of the first collective operation performed by the child compute node. In response to receiving at least one result, the first compute node reduces a power consumption level of the child compute node. | 09-11-2014 |
20140258747 | TECHNIQUES FOR MULTIMEDIA PLAYBACK - Various embodiments are generally directed to an apparatus, method and other techniques for receiving multimedia information at a computing device and receiving one or more of power information and bandwidth information for the computing device. In various embodiments, video processing may be disabled for the computing device when the power information is below a power threshold or bandwidth information is below a bandwidth threshold and an audio only portion of multimedia information may be sent to one or more output devices coupled to the computing device. Other embodiments are described and claimed. | 09-11-2014 |
20140258748 | Collective Operation Management In A Parallel Computer - Methods, apparatuses, and computer program products for collective operation management in a parallel computer are provided. Embodiments include a parallel computer having a first compute node operatively coupled for data communications over a tree data communications network with a plurality of child compute nodes. Embodiments also include each child compute node performing a first collective operation. The first compute rode, for each child compute node, receives from the child compute node, a result of the first collective operation performed by the child compute node. In response to receiving at least one result, the first compute node reduces a power consumption level of the child compute node. | 09-11-2014 |
20140258749 | DYNAMICALLY ENTERING LOW POWER STATES DURING ACTIVE WORKLOADS - Systems and methods may provide for identifying runtime information associated with an active workload of a platform, and making an active idle state determination for the platform based on at least in part the runtime information. In addition, a low power state of a shared resource on the platform may be controlled concurrently with an execution of the active workload based on at least in part the active idle state determination. | 09-11-2014 |
20140258750 | CONTROL SYSTEM AND METHOD FOR SERVER - A control system for a server includes a control chip, a switch module, a hardware power module, a software power module, a power chip, and a basement management controller (BMC) chip. The hardware power module and the software power module output first and second power signals, respectively. The control chip outputs corresponding state signals according to a control signal outputted by the BMC chip. The switch module selectively outputs the first or the second power signals to the power supply chip, to control the power supply chip to perform corresponding power operations. | 09-11-2014 |
20140258751 | MOBILE SYSTEM OPTIMIZATION METHOD - Provided is a method of a mobile system, comprising executing an application at the mobile system, determining an execution condition of the application, and controlling a performance of the mobile system in response to a result of the determined execution condition before the application performs an actual workload. The mobile system optimization method enhances the performance of the mobile system by utilizing the same resources. | 09-11-2014 |
20140258752 | POWER MANAGEMENT FOR PROCESSOR - Techniques are generally described related to management of power consumption for a processor. One example method may include identifying a target operating constraint and a first operating parameter; determining a second operating parameter based on the target operating constraint and the first operating parameter; estimating an actual operating constraint; comparing the target operating constraint and the actual operating constraint; and setting up the first operating parameter and the second operating parameter of the processor based on a comparison of the target operating constraint and the actual operating constraint, wherein the target operating constraint is not a worst-case operating constraint. Other examples of methods, systems, and computer programs related to managing power consumption for a processor are also contemplated. | 09-11-2014 |
20140258753 | INFORMATION PROCESSING APPARATUS, METHOD FOR CONTROLLING INFORMATION PROCESSING APPARATUS, AND STORAGE MEDIUM - An information processing apparatus includes a selection unit configured to select a mode of processing to be executed when a power supply state of the information processing apparatus is shifted from a first power supply state to a second power supply state, a determination unit configured to determine time necessary for executing the processing based on the mode selected by the selection unit, an execution unit configured to execute the processing in the mode selected by the selection unit, and a control unit configured to control the execution unit to execute the processing again when the processing has not been completed within the time determined by the determination unit. | 09-11-2014 |
20140281599 | NAND PAGE BUFFER BASED VOLATILE STATE STORE - Apparatus and methods of reducing power consumption in solid-state storage devices such as solid-state disks (SSDs) that can reduce idle power levels in an SSD, while maintaining low resume latency upon exiting a reduced power state. By arranging a storage controller and at least one NAND flash package of the SSD in separate power islands, storing context information for the SSD in at least one page buffer of NAND flash memory within the NAND flash package on one power island upon entering the reduced power state, and, once the context information is stored in the page buffer, allowing the NAND flash memory to enter a standby mode, placing the storage controller on the other power island in a predefined low power mode, and removing power from any unneeded components on the same power island as the storage controller, a scalable approach to reducing idle power levels in the SSD can be achieved. | 09-18-2014 |
20140281600 | APPARATUS AND METHOD TO PROVIDE NEAR ZERO POWER DEVSLP IN SATA DRIVES - Apparatus and methods of reducing power consumption in solid-state disks (SSDs) that can reduce power levels in SSDs below levels achievable in known SSD reduced power states. The apparatus is a power management subsystem operative to detect whether an SSD subsystem has been enabled to enter a reduced power state, and to receive a control signal from a host directing the power management subsystem to place the SSD subsystem in the reduced power state. In the event the SSD subsystem is enabled to enter the reduced power state and the host asserts the control signal, the power management subsystem effectively disconnects at least a portion of the SSD subsystem from the power rail. In the event power-up clear circuitry asserts a clear signal to the power management subsystem, or the host negates the control signal, the power management subsystem reestablishes the connection between the SSD subsystem and the power rail. | 09-18-2014 |
20140281601 | POWER BOUNDARY CELL OPERATION IN MULTIPLE POWER DOMAIN INTEGRATED CIRCUITS - Embodiments of an apparatus are disclosed that may allow for the isolation of power domains. The apparatus may include a first power switch, a second power switch, and a boundary switch. The first power switch may be coupled between a global power supply and a first local power supply, and the second power switch may be coupled between the global power supply and a second local power supply. The first and second power switches may open in response to first and second power down signals respectively. The boundary switch may be coupled between the first local power supply and the second local power supply and may be configured to open in response to an isolation signal. | 09-18-2014 |
20140281602 | Controlling Processor Consumption Using On-Off Keying Having A Maximum Off Time - In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the off times each correspond to a maximum off time for a platform including the processor. Other embodiments are described and claimed. | 09-18-2014 |
20140281603 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR ALLOWING A HEAD TO ENTER A REDUCED POWER MODE - A system, method, and computer program product are provided for allowing a head to enter a reduced power mode. A first processor having a first head is provided. Additionally, a second processor having a second head is provided. Furthermore, a link is provided, coupled between the first head of the first processor and the second head of the second processor for communicating first data therebetween. In operation, at least the second head of the second processor is capable of entering a reduced power mode. | 09-18-2014 |
20140281604 | Autonomous Power Sparing Storage - Power saving logic in a data storage system with multiple data storage devices is distributed from a central controller to each individual device. Power saving logic, including algorithms used to conserve power when the data storage device is not needed, are stored and executed on each individual data storage device. Hence, rather than implementing a power saving algorithm from a single central sever, each and every data storage system may carry out power saving techniques individually. This reduces the load on the central server and utilizes processing power available on data storage devices such as a disk drive. | 09-18-2014 |
20140281605 | POWER MANAGEMENT FOR A COMPUTER SYSTEM - Embodiments include a method for managing power in a computer system including a main processor and an active memory device including powered units, the active memory device in communication with the main processor by a memory link, the powered units including a processing element. The method includes the main processor executing a program on a program thread, encountering a first section of code to be executed by the active memory device, changing, by a first command, a power state of a powered unit on the active memory device based on the main processor encountering the first section of code, the first command including a store command. The method also includes the processing element executing the first section of code at a second time, changing a power state of the main processor from a power use state to a power saving state based on the processing element executing the first section. | 09-18-2014 |
20140281606 | DATA STORAGE POWER CONSUMPTION THRESHOLD - A power consumption threshold is implemented to manage power consumed by a plurality of devices. A power consumption threshold may be selected for a data storage system having multiple drives. Policies may control operation of storage devices such as hard disk drives to ensure the power consumption threshold is not exceeded. The policies may implement procedures for scheduling hard disk drive operations based on disk drive power characteristics, scheduling maintenance tasks, managing device power states, and strategically scheduling device operations based on their current state. The policies may be implemented by a data manager application in communication with multiple tiers of a data storage system. | 09-18-2014 |
20140281607 | METHOD AND APPARATUS FOR DISPLAYING A PREDETERMINED IMAGE ON A DISPLAY PANEL OF AN ELECTRONIC DEVICE WHEN THE ELECTRONIC DEVICE IS OPERATING IN A REDUCED POWER MODE OF OPERATION - A display controller for use within an electronic device includes a dedicated memory and a low power display processor for displaying information when the electronic device is operating in a reduced power mode of operation (e.g., sleep mode). The memory stores display data for a predetermined image and the display processor supplies the display data to a display panel of the electronic device when the electronic device is operating in the reduced power mode. The display controller may also include a processor interface for receiving control information from the electronic device's device processor to enable the display processor to determine that the electronic device is operating in reduced power mode. The display processor may be configured to scale the stored display data when, due to memory size constraints, the memory stores the display data at a resolution that is different from (e.g., less than) the display panel resolution. | 09-18-2014 |
20140281608 | Battery Usage Throttling for Mobile Devices - A computing device may be configured to determine a power supply usage rate of the computing device based on operations of applications and power-consuming components of the computing device. The computing device may be configured to obtain a target power supply depletion rate. Based on the power supply usage rate exceeding the target power supply depletion rate, the computing device may be configured to adjust an operation of an application of the applications and/or an operation of a power-consuming component of the power-consuming components so as to cause the power supply usage rate to substantially meet the target power supply depletion rate. | 09-18-2014 |
20140281609 | DETERMINING PARAMETERS THAT AFFECT PROCESSOR ENERGY EFFICIENCY - An example process for controlling a processor may include: (i) obtaining parameters associated with operation of a processor, where each of the parameters has a different time scale; (ii) performing an iterative process to identify ones of the parameters that achieve a particular energy efficiency in the processor, where the energy efficiency of the processor corresponds to a quasi-concave function having a maximum that corresponds to the ones of the parameters; and (iii) controlling the processor using the ones of the parameters. | 09-18-2014 |
20140289541 | DYNAMIC POWER CONTROL - Systems and methods are provided that facilitate power management in a processing device. The system contains a power management component and a coupled to the processing device. The power management component determines and input rate and target voltages and/or frequency. The power management component can scale voltages and/or frequencies based on target voltages and/or frequencies. Accordingly, power consumption can be reduced and processing devices can be more efficient. | 09-25-2014 |
20140289542 | ELECTRONIC DEVICE CONTROLLING USER SETTING DEPENDING ON BATTERY STATE, COMPUTER READABLE MEDIUM, AND METHOD FOR DECIDING PERMISSION/ PROHIBITION OF SELECTION - An electronic device includes: a storage battery; a residual quantity detection section that detects an electrical storage residual quantity of the storage battery; a setting member for receiving an input of a user setting including a plurality of options; a permission/prohibition deciding member that decides whether or not selection of each of the options corresponding to the user setting received by the setting member is permitted on the basis of the electrical storage residual quantity detected by the residual quantity detection section; and an indicating member that indicates an option which is prohibited from being selected by the permission/prohibition deciding member and an option which is permitted to be selected by the permission/prohibition deciding member so that each of the option prohibited from being selected and the option permitted to be selected is distinguishable. | 09-25-2014 |
20140289543 | ESTIMATING AND PRESERVING BATTERY LIFE BASED ON USAGE PATTERNS - Embodiments apply user-specific usage patterns to estimate and preserve remaining battery life on a computing device. An amount of battery drain and an execution context are determined and stored for a plurality of recurring time periods. The execution context identifies operations executed by the computing device, signal strength, and other data describing the associated time period. If one of the operations is expected to be executed during a recurrence of at least one of the time periods, the expected execution is adjusted based on execution context and an estimated remaining battery life for the computing device. For example, the computing device may postpone or reschedule the operation for a time period during which the operation is expected to have a greater likelihood of completing successfully. In some embodiments, the battery preservation operations are automatically enabled at a particular threshold. | 09-25-2014 |
20140298051 | FEATURE MANAGEMENT SYSTEM AND METHOD OF MANAGING ACCESS TO APPLICATION PROGRAMMING INTERFACE FUNCTIONALITY - A feature management system and method of managing access to API functionality. One embodiment of the feature management system includes: (1) a driver configured to carry out functions, including a restricted function, in response to calls thereto, (2) a memory configured to store a management action associated with the restricted function and (3) a feature manager operable to recognize the call to the restricted function and to retrieve the management action from the memory and direct the driver to carry out the management action in addition to the restricted function. | 10-02-2014 |
20140298052 | ENERGY EFFICIENCY IN SOFTWARE DEFINED NETWORKS - Mechanism for implementing energy efficiency (EE) policies on flows in a software defined network are disclosed. A controller node receives from each of a plurality of datapath nodes, a corresponding set of EE actions that the respective datapath node is capable of implementing. A flow is identified, and a group of datapath nodes through which the flow is routed is identified. Based on an attribute of the flow, an EE policy is determined. Based on the EE policy, a datapath node in the group of datapath nodes is directed to perform an EE action on packets associated with the flow. | 10-02-2014 |
20140298053 | UNIVERSAL SERIAL BUS HUB AND CONTROL METHOD THEREOF - A universal serial bus and a control method thereof are provided. Different voltages are respectively provided to circuit groups when a universal serial bus hub is in a suspend state and a normal working state, so as to reduce leakage current. | 10-02-2014 |
20140298054 | INFORMATION PROCESSING APPARATUS CAPABLE OF CONNECTING TO NETWORK IN POWER SAVING STATE, METHOD OF CONTROLLING THE SAME, AND STORAGE MEDIUM - An information processing apparatus capable of changing packet patterns for determining, based on a condition of proxy ARP compatibility of a connected wireless LAN access point, communication requests to which the apparatus can respond in a power saving state, and thereby maintaining the power saving state for a longer time period. A RAM of an MFP operable in the normal state and the power saving state stores packet patterns which enable the MFP to respond to packets received in the power saving state while maintaining the power saving state. The MFP acquires proxy ARP support information from a wireless LAN access point that relays communication between the MFP and an external apparatus. The MFP determines whether or not the AP can respond to a received communication request on its behalf, and changes the packet patterns based on the determination result. | 10-02-2014 |
20140298055 | ENERGY SAVING CIRCUIT OF COMPUTER - An energy saving circuit of a computer is connected between a power supply and a motherboard. The energy saving circuit includes first to fifth electronic switches and a sensor. When the computer is in a stand-by state and the sensor senses a person nearby, the motherboard of the computer receives a standby voltage and the motherboard maintains the stand-by state. When the sensor senses no one nearby, the motherboard does not receive the standby voltage and the motherboard is placed in a power off state. | 10-02-2014 |
20140298056 | MEMORY CONTROL CIRCUIT - The memory power consumption is reduced more than in the past by performing a power control suitably for a nonvolatile memory. A memory control circuit is provided with a first register group for a CPU to perform separately initial setting of the operation mode (power OFF, standby, and power ON) of plural banks included in a nonvolatile memory, for every task of a program executed by the CPU, and an access determination unit which determines a bank to which an access from the CPU takes place, on the basis of the access address for instruction fetching and the kind of the fetched instruction. The memory control circuit switches the operation mode of each of the banks on the basis of the setting value of the first register group, and the determination result of the access determination unit. | 10-02-2014 |
20140304535 | ACCESS POINT ROTATION FOR SHARING POWER LOAD - Aspects of the disclosure provide a method for sharing power load in a network. The method includes identifying a first device to serve as an AP of the network in a next time interval, providing network information from a second device that presently serves as the AP to the first device. When the first device starts to serve as the AP of the network, the second device can be configured to enter into a power save state in order to reduce power consumption by the second device in the next time interval. | 10-09-2014 |
20140304536 | STATISTICAL APPROACH TO POWER MANAGEMENT FOR ELECTRONIC DEVICES - Power savings is provided to users of various electronic devices by monitoring the times and locations at which those users activate, deactivate, or otherwise change an operational state of one or more functional elements of a device. Other contextual or environmental information can be captured as well when the user performs such an action. One or more statistical analysis or prediction algorithms can be used to determine when and/or where the user is likely to repeat the one or more actions, where a confidence level of the prediction can be impacted at least in part by the environmental and contextual factors. When a prediction has a minimum level of confidence, a corresponding action can be performed automatically by the device when the relevant factors are met. Changes in behavior can be monitored such that the predictions can be refined over time. | 10-09-2014 |
20140310539 | Power Supply Unit (PSU) Right-Sizing that Supports Power Transients, with Mechanism for Dynamic Curtailment of Power Transients During a PSU Failure - A power controller of an information handling system (IHS) controls power allocation for the IHS with components that intermittently exhibit power transients. The power controller is configured to: identify an enhanced power state during which a maximum power required by the information handling system is greater than the amount of power provided by a primary PSU of a redundant configuration of PSUs; and allocate a portion of the unused operating margin of backup reserve power from the redundant PSUs to support intermittent power transients that occur during enhanced power state operation. The power controller is further configured to, in response to a detection of a condition that reduces an amount of unused operating margin of backup reserve power to less than an amount of additional power required to support the intermittent power transients, autonomously disable/limit the enhanced power state to prevent/limit an occurrence or magnitude of the intermittent power transients. | 10-16-2014 |
20140310540 | Interrupt Based Power State Management - A method and apparatus for power managed interrupt handling is disclosed. In one embodiment, a system includes one or more agents that may invoke an interrupt request. An interrupt controller is configured to receive and process the interrupt requests. When idle, the interrupt controller may be placed in a low power state. The system also includes an interrupt power control circuit coupled to receive interrupt request indications from each of the one or more agents that may invoke interrupts. The interrupt power control circuit is configured to assert a wakeup signal responsive to receiving an indication of an interrupt request from one of the agents. If the interrupt controller is in a low power state, it may exit the state and resume operation in an active state responsive to assertion of the wakeup signal. | 10-16-2014 |
20140310541 | Power Gating Shared Logic - We report methods, integrated circuit devices, and fabrication processes relating to power management transitions of multiple compute units sharing a resource. One method include, in response to an indication that a first compute unit of a plurality of compute units is attempting to enter a normal power state and in response to no other compute units being in a low power state, causing a resource to enter the normal power state, wherein the plurality of compute units share the resource; and causing the first compute unit to enter the normal power state. | 10-16-2014 |
20140310542 | METHOD FOR SAVING POWER ON MULTI-CHANNEL DEVICES - A method for turning a multi-channel link into a power saving mode may include detecting one or more events including a drop in a data throughput of the multi-channel link. In response to the detection of one or more events, data communication through one or more channels of the multi-channel link may be transferred to one or more other channels. The characteristics of the one or more channels may be adjusted to achieve power saving. Data communication through the one or more channels may be resumed at a reduced rate. Some of the one or more other channels of the multi-channel link may be configured to operate in a low-power or shut-down mode while the channels with adjusted characteristics are communicating data at the reduced rate. | 10-16-2014 |
20140310543 | METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM - A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention. | 10-16-2014 |
20140310544 | Method And Apparatus For A Zero Voltage Processor Sleep State - Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A voltage regulator may be coupled to a processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero while an external voltage is continuously applied to a portion of the processor to save state variables of the processor during the zero voltage management power state. | 10-16-2014 |
20140310545 | Control Device for Current Switching and Electronic Device - A control device for current switching includes: a universal serial bus on-the-go (USB OTG) interface for connecting to a first device; a universal serial bus (USB) interface for connecting to a second device; a booster current-limiting circuit connected between the USB OTG interface and the USB interface, where the booster current-limiting circuit, the USB OTG interface, and the USB interface form a line for the device to supply power to a device; and a measuring and controlling unit connected to the booster current-limiting circuit, where the measuring and controlling unit is configured to change, after a current switching request is received, a resistance value of a current-limiting circuit in the booster current-limiting circuit, so that the first device supplies a corresponding current to the second device. The control device for current switching and the electronic device can improve universality of the control device for current switching. | 10-16-2014 |
20140310546 | Operating System Management of Network Interface Devices - Operating system management of network interface devices is described. In one or more implementations, a determination is made by an operating system that network traffic associated with one or more applications of the computing device has completed. Responsive to the determination, a network interface device is caused to transition to a mode to reduce power consumption of the network interface device by the operating system. | 10-16-2014 |
20140317425 | MULTI-CORE PROCESSOR INSTRUCTION THROTTLING - An apparatus for performing instruction throttling for a multi-processor system is disclosed. The apparatus may include a power estimation circuit, a table, a comparator, and a finite state machine. The power estimation circuit may be configured to receive information on high power instructions issued to a first processor and a second processor, and generate a power estimate dependent upon the received information. The table may be configured to store one or more pre-determined power threshold values, and the comparator may be configured to compare the power estimate with at least one of the pre-determined power threshold values. The finite state machine may be configured to adjust the throttle level of the first and second processors dependent upon the result of the comparison. | 10-23-2014 |
20140317426 | ENERGY SAVING CIRCUIT OF COMPUTER - Energy saving circuit of a computer is connected between a power supply and a motherboard. The energy saving circuit includes six electronic switches and a switch. When the computer is in the stand-by state, and the switch is pressed, the motherboard of the computer receives a standby voltage and the motherboard maintains the stand-by state. The energy-saving circuit can shut off the standby voltage by pressing the switch when the computer is powered off to save energy. | 10-23-2014 |
20140325247 | CONTROLLING POWER AND PERFORMANCE IN A SYSTEM AGENT OF A PROCESSOR - In an embodiment, a processor includes a core to execute instructions, an agent to perform an operation independently of the core, a fabric to couple the core and agent and including a plurality of domains and a logic to receive isochronous parameter information from the agent and environmental information of a platform and to generate first and second values, and a power controller to control a frequency of the domains based at least in part on the first and second values. Other embodiments are described and claimed. | 10-30-2014 |
20140325248 | APPARATUS AND METHOD FOR ADJUSTING BANDWIDTH - A method for adjusting bandwidth, a bandwidth scaler and an apparatus are provided. The method for adjusting bandwidth involves determining a dynamic context of a processor, and based on the determined dynamic context, scaling bandwidth between the processor and a memory. | 10-30-2014 |
20140337644 | METHODS AND SYSTEMS FOR MANAGING PERFORMANCE AND POWER UTILIZATION OF A PROCESSOR EMPLOYING A FULLY-MULTITHREADED LOAD THRESHOLD - A method for managing performance and power utilization of a processor in an information handling system (IHS) employing a balanced fully-multithreaded load threshold is disclosed. The method includes providing a maximum current thread utilization (Umax) and a minimum current thread utilization (Umin) among all current thread utilizations of the processor and determining a current performance state (P state) of the processor. The method also includes increasing a current P state of the processor to a next P state of the processor towards a maximum P state (Pmax) of the processor when the current P state of the processor is between Umax and Umin and the current utilization rate of the processor is less than a first threshold utilization rate. The method further includes engaging the processor in a turbo mode when the current P state of the processor reaches the Pmax and the current utilization of the processor is greater than the first threshold utilization rate of the processor. | 11-13-2014 |
20140337645 | FAST-WAKE MEMORY - A memory device is transitioned to a low-power mode in which an active-mode resource required to receive memory access commands from a memory controller at a first command-signaling frequency of the memory device is disabled. A first memory access command, transmitted by the memory controller, is received within the memory device using an alternative signaling resource during a transitional interval in which the active-mode resource is re-enabled. | 11-13-2014 |
20140344595 | Dynamic System Management Communication Path Selection - An information handling system includes a processor, a controller hub, a shared higher bandwidth path coupling the processor to the controller hub, and an exclusive lower bandwidth path coupling the processor to the controller hub. The processor communicates system management information over the bandwidth path in response to a first set of criteria and communicates the information over the lower bandwidth path in response to the second set of criteria. | 11-20-2014 |
20140351612 | INFORMATION PROCESSING METHOD AND ELECTRONIC DEVICE - The present invention discloses an information processing method and an electronic device. The method is applied in an electronic device including a first heating element and a first cooling apparatus, and comprises steps of: detecting and obtaining, at a first instant, first posture information indicating that the electronic device is in a first posture; and detecting and obtaining first actual power of the first heating element; determining first cooling efficiency corresponding to the first posture information, based on a correspondence between the posture information and cooling efficiency of the first cooling apparatus; deciding whether the first actual power is larger than first standard power of the first heating element corresponding to the first cooling efficiency, so as to obtain a decision result; adjusting power of the first heating element from the first actual power to the first standard power, when the decision result indicates that the first actual power is larger than the first standard power. | 11-27-2014 |
20140351613 | VIRTUAL MACHINE POWER CONSUMPTION MEASUREMENT AND MANAGEMENT - Embodiments of the virtual machine power metering system and method measure the power consumption of individual virtual machines. Power meter measurements for a physical host server are converted into individual virtual machine power meters that measure the power consumption of each individual virtual machine residing on the host server. The virtual machine power consumption is computed by generating a power model using the total power consumption of the host server and resource utilization for a virtual machine. Optimal power model coefficients are computed using the power model. The energy used by the virtual machine is computed using one of two embodiments. Embodiments of the system and method also can be used to obtain the power consumption for a specific activity (such as a service, request, or search query). In addition, the virtual machine power metering can be used for virtual machine power capping to allow power oversubscription in virtualized environments. | 11-27-2014 |
20140351614 | DATA STORAGE SYSTEM WITH POWER MANAGEMENT AND METHOD OF OPERATION THEREOF - A method of operation of a data storage system includes: providing a standby power source; detecting activity on a communication channel with an upstream re-driver powered with the standby power source; generating a signal-detect output from the upstream re-driver based on the activity; determining a link status with a power control unit based on the signal-detect output, the power control unit powered with the standby power source; and generating a power output from a power supply unit based on the link status, the power supply unit controlled by the power control unit. | 11-27-2014 |
20140359323 | SYSTEM AND METHOD FOR CLOSED LOOP PHYSICAL RESOURCE CONTROL IN LARGE, MULTIPLE-PROCESSOR INSTALLATIONS - A system and method for closed loop power supply control in large, multiple processor installations are provided. | 12-04-2014 |
20140359324 | SYSTEM AND METHOD FOR INTELLIGENT MULTIMEDIA-BASED THERMAL POWER MANAGEMENT IN A PORTABLE COMPUTING DEVICE - Various embodiments of methods and systems for intelligent multimedia-based thermal power management implemented in a portable computing device (“PCD”) are disclosed. To reduce or increase power consumption in the PCD, embodiments adjust one or more visual multimedia parameters, the settings of which contribute to power consumption associated with an overall multimedia workload. The selection of visual multimedia parameters for setting adjustment is a function of the change in user experience versus the change in power consumption that will likely result from the setting adjustment. Exemplary visual multimedia parameters for which settings may be adjusted by certain embodiments include, but are not limited to, color depth, display brightness, GPU processing resolution, image dynamics algorithm selection, resolution scaling ratios and frames per second processing rates. | 12-04-2014 |
20140359325 | METHOD, DEVICE AND SYSTEM FOR ENERGY MANAGEMENT - The present application relates to carrying out energy management based on context information. In the method, apparatus and system according to the application, a context vector ( | 12-04-2014 |
20140359326 | EMBEDDED CONTROLLER FOR POWER-SAVING AND METHOD THEREOF - An embedded controller for power-saving and a method thereof are provided. The embedded controller is used for executing a plurality of tasks and includes a timer module and a control unit. The timer module includes a plurality of timers, and each of timers is corresponding to one of the tasks respectively. The control unit is coupled to the timer module and respectively sets a wake-up period according to each task. When the wake-up period of each timer is expired, each timer respectively generates a wake-up signal to the control unit. The control unit controls the embedded controller to transfer to an active model from an idle model according to the wake-up signals respectively. After executing the tasks corresponding to the wake-up signals respectively, the control unit controls the embedded controller to transfer to the idle model from the active model. | 12-04-2014 |
20140359327 | ELECTRONIC APPARATUS THAT PERFORMS COOLING DURING POWER-OFF, METHOD OF CONTROLLING THE SAME, AND STORAGE MEDIUM - A technique for controlling a power supply of an electronic apparatus, which makes it possible to positively cool the inside of the apparatus after turning off a main switch of the apparatus, thereby making it possible to reduce unnecessary power consumption. A battery is rechargeable by an AC power supply. A fan cools the apparatus by being driven by power supply from the AC power supply or the battery. A CPU of a system controller determines a power supply off time of the apparatus according to a state of the apparatus when the main switch is turned off. When the determined power supply off time is reached, the power supply controller switches the power supply from the AC power supply to the battery to continue driving the fan. Further, when the state of the apparatus satisfies predetermined conditions, the power supply controller stops driving of the fan. | 12-04-2014 |
20140365792 | BATTERY MANAGEMENT SYSTEM, AND METHOD OF MANAGING THE SAME - A battery management system includes a plurality of slave controllers, each slave controller of the plurality of slave controllers being coupled to a respective battery module, each of the slave controllers having a slave controller identifier, the respective slave controller identifiers being allocated by a slave controller identifier allocation operation performed by the plurality of slave controllers, and a master controller, the master controller being coupled to each of the slave controllers, the master controller receiving the slave controller identifiers from the slave controllers. | 12-11-2014 |
20140365793 | THERMAL MANAGEMENT OF AN INTEGRATED CIRCUIT - Methods for thermal management of an integrated circuit are disclosed. In particular, a dual control loop, having a first control loop and a second control loop, is used to maintain the temperature of an integrated circuit at a first temperature and a second temperature, respectively. In order to prevent the integrated circuit from overheating during periods of rapid temperature increase, the second control loop may be configured to control temperature at the second temperature below the specification limit of the integrated circuit by reducing power to the integrated circuit. The second control loop samples and maintains temperature of the integrated circuit at time intervals relatively faster than that of the first control loop. However, the second control loop is configured to release control to the first control loop when the temperature of the integrated circuit is reduced. The first control loop may then control power to the integrated circuit. | 12-11-2014 |
20140365794 | BROWSER-DRIVEN POWER SAVING - The embodiments disclosed herein describe ways that a browser application or other process can reduce power usage by a computing device. Methods include the process suspending one or more plug-ins on a web page by replacing them with a snapshot taken from the plug-in, and reducing processing on non-media plug-ins and non-visible portions of web pages running in the browser, but not currently in focus, such as when a tab is in the background behind a different tab, when a browser window is minimized, or when the web page is entirely or partially occluded. | 12-11-2014 |
20140365795 | SYSTEMS AND METHODS FOR REDUCING ENERGY STORAGE REQUIREMENTS IN A DATA CENTER - A method for reducing a need for power in a backup mode of operation in a data center includes receiving a first alert from an uninterruptible power supply indicating that the uninterruptible power supply is operating in a first mode, wherein the first mode includes deriving power from a stored energy source, identifying at least one host server configured to receive power from the uninterruptible power supply in the first mode, suspending execution of at least one virtual machine on the at least one host server, receiving a second alert from the uninterruptible power supply indicating that the uninterruptible power supply is operating in a second mode, wherein the second mode includes deriving power from one of a mains power source and a generator, and resuming execution of the at least one virtual machine. | 12-11-2014 |
20140365796 | Power Management For A System On A Chip (SoC) - In one embodiment, the present invention includes a method for sending a first link handshake signal between a first subsystem and a power management unit (PMU) of a system on a chip (SoC) to request entry into a power saving state for the first subsystem, sending a second link handshake signal between the first subsystem and the PMU to acknowledge the request, and placing the first subsystem into the power saving state without further signaling between the PMU and the first subsystem. Other embodiments are described and claimed. | 12-11-2014 |
20140372777 | ADAPTIVE LATENCY TOLERANCE FOR POWER MANAGEMENT OF MEMORY BUS INTERFACES - A method includes, in a memory system that includes a host and a storage device connected by a bus interface, assessing in the storage device a power supply state of the memory system. In the storage device a latency tolerance is selected for the bus interface based on the assessed power supply state. The selected latency tolerance is indicated from the storage device to the host, for application to the bus interface. | 12-18-2014 |
20140380068 | SRAM Regulating Retention Scheme with Discrete Switch Control and Instant Reference Voltage Generation - A system including control logic, a voltage reference, a sense amplifier, and a voltage supply circuit is presented. The sense amplifier may be configured to detect a current state of the voltage supply circuit output compared to the reference voltage. The voltage supply circuit may be configured to capture and preserve the current state to be used as a previous state. The voltage regulator may be configured to compare the current state to one or more previous states and adjust the voltage regulator output based on the comparison. Control logic may be configured to enable the voltage reference output in response to a signal. Control logic may be configured to enable the sense amplifier at a time after the voltage reference is stable. Control logic may be configured to disable the voltage reference output in response to the sense amplifier generating an output. | 12-25-2014 |
20140380069 | Date Adjusted Power Budgeting for an Information Handling System - An information handling system determines a system configuration including a hardware module, and determines an adjusted power budget for the hardware module. The adjusted power budget is based on a calculation including a difference between a date code read from the hardware module and a baseline date, a baseline power budget, a power reduction period and a power reduction interval. The calculation may optionally include a risk factor. In alternate embodiments, an adjusted power budget for a hardware module may be calculated by an order processing system for information handling systems, or by a planning tool for a data center which contains information handling systems. | 12-25-2014 |
20140380070 | VOLTAGE REGULATOR CONTROL SYSTEM - A processor power management system and method are disclosed. The system includes a voltage regulator control system that is communicatively coupled to each of a plurality of processors. The voltage regulator control system is to generate a processor voltage that is provided to each of the plurality of processors and to control a magnitude of the processor voltage based on receiving power management request signal s that are provided from each of the plurality of processors. | 12-25-2014 |
20150012764 | Method And Apparatus For Power Control - Embodiments of the present invention relate to limiting maximum power dissipation occurred in a processor. Therefore, when an application that requires excessive amounts of power is being executed, the execution of the application may be prevented to reduce dissipated or consumed power. | 01-08-2015 |
20150012765 | DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS - Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system. | 01-08-2015 |
20150012766 | DISTRIBUTION OF TASKS AMONG ASYMMETRIC PROCESSING ELEMENTS - Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system. | 01-08-2015 |
20150019888 | SYSTEM, APPARATUS, AND METHOD FOR INFORMATION PROCESSING - A system includes apparatuses and a power collecting device for collecting power consumption information at power sources to which the apparatuses are connected, respectively. The apparatus includes a controller that sets the apparatus to a first state or a second state for a lower power consumption; a first obtaining unit that obtains, from the device, first associated information in which first information for identifying the sources is associated with second information indicating power consumption of the respective sources; a retaining unit that retains second associated information in which the first associated information is associated with the time when the first obtaining unit obtains the first associated information; a state determining unit that determines a state of the other apparatus; and a second obtaining unit that obtains third associated information corresponding to a period during which the apparatus is in the second state when the apparatus transits to the first state. | 01-15-2015 |
20150019889 | Virtualizing Battery Across a Group of Personal Mobile Devices - A system, method, and non-transitory computer readable medium for virtualizing battery in a personal mobile device or across a group of personal mobile devices controlled by a user are provided. The user specifies a set of power management policies for applications running in the personal mobile device(s). Battery usage per application is monitored and resources for the applications are scheduled based on the monitored battery usage and the power management policies. | 01-15-2015 |
20150019890 | CACHE ARRAY WITH REDUCED POWER CONSUMPTION - Embodiments of the disclosure include a cache array having a plurality of cache sets grouped into a plurality of subsets. The cache array also includes a read line configured to receive a read signal for the cache array and a set selection line configured to receive a set selection signal. The set selection signal indicates that the read signal corresponds to one of the plurality subsets of the cache array. The read line and the set selection line are operatively coupled to the plurality of cache sets and based on the set selection signal the subset that corresponds to the set selection signal is switched. | 01-15-2015 |
20150026493 | NONVOLATILE MEMORY DEVICE AND DEVICE SLEEP STATE CONTROL METHOD THEREOF - A nonvolatile memory device includes a device interface configured to communicate with a host. The nonvolatile memory device includes a sleep controller configured to select a sleep state from among a plurality of sleep states. The sleep controller is configured to control the device interface to enter the selected sleep state. Each of the plurality of sleep states have different resume times. The resume times are a period of time taken for the nonvolatile memory device to exit an associated sleep state. In each of the plurality of sleep states, the sleep controller is configured to remove a supply of power from physical blocks of the device interface except for a physical block used for sideband signaling. | 01-22-2015 |
20150033045 | Power Supply Droop Reduction Using Feed Forward Current Control - An apparatus for performing instruction throttling for a computing system is disclosed. The apparatus may include a first counter, a second counter, and a control circuit. The second counter may be configured to increment in response to a determination that a processing cycle of a processor has completed. The control circuit may be configured to initialize the first and second counters, detect the processor has issued and instruction, decrement the first counter in response to the detection of the issued instruction, block the processor from issuing instructions dependent upon the a value of the first counter, reset the first counter dependent upon a value of the second counter, and reset the second counter in response to a determination that the value of the second counter is greater than a pre-determined value. | 01-29-2015 |
20150033046 | METHOD OF POWER MANAGEMENT, PORTABLE SYSTEM AND PORTABLE POWER BANK - A method of power management is to be implemented by a portable electronic device coupled to a portable power bank. The portable power bank is further coupled to an electrical appliance. In the method, the portable electronic device receives power information from the portable power bank, and controls the portable power bank to operate in one of a first mode, in which electrical power is provided to the electrical appliance, and a second mode, in which electrical power is not provided to the electrical appliance, based on whether or not the portable power bank has sufficient amount of power. | 01-29-2015 |
20150033047 | Application Processors, Mobile Devices Including The Same And Methods Of Managing Power Of Application Processors - An application processor includes a memory controller, a display block and a power management unit. The memory controller controls an external memory that stores an image signal to be displayed on a display unit. The display block includes an internal frame buffer and a display controller and the display controller controls the image signal to be displayed on the display unit. The power management unit adaptively controls a power mode of the application processor based on a characteristic of the image signal to be displayed and a power control overhead index. | 01-29-2015 |
20150033048 | MULTIPLE VOLTAGE GENERATOR AND VOLTAGE REGULATION METHODOLOGY FOR POWER DENSE INTEGRATED POWER SYSTEMS - An integrated power system suitable for simultaneously powering marine propulsion and service loads. The system includes: (a) at least one generator configured with at least first and second armature windings configured to output respective first and second alternating current power signals of different voltages, the at least two armature windings positioned within the same stator slots so that they magnetically couple; (b) at least first and second rectifier circuits coupled to said generator to convert said first and second alternating current power signals into first and second direct current power signals; (c) a first load to which said first direct current power signal is coupled and a second load to which said second direct current power signal is coupled. | 01-29-2015 |
20150033049 | METHOD, DEVICE AND MOBILE TERMINAL FOR INFORMATION BACKUP - Disclosed is a method for information backup, comprising: an information backup device detects a battery volume of a mobile terminal and determines whether or not the battery volume reaches a preset low-battery alarming threshold; and the information backup device stores contact information stored in the mobile terminal into a backup memory card when the battery volume reduces the low-battery alarming threshold. The present disclosure also discloses a device and a mobile terminal for information backup. The present disclosure enables the user of a mobile terminal to timely view contact information when the mobile terminal runs out of power. | 01-29-2015 |
20150039919 | DIRECTED WAKEUP INTO A SECURED SYSTEM ENVIRONMENT - Embodiments of processors, methods, and systems for directed wakeup into a secured system environment are disclosed. In one embodiment, a processor includes a decode unit, a control unit, and a messaging unit. The decode unit is to receive a secured system environment wakeup instruction. The control unit is to cause wake-inhibit indicator to be set for each of a plurality of responding logical processor to be kept in a sleep state. The messaging unit is to send a wakeup message to the plurality of responding logical processors, wherein the wakeup message is to be ignored by each of the plurality of responding logical processors for which the wake-inhibit indicator is set. | 02-05-2015 |
20150046729 | SEMICONDUCTOR APPARATUS AND CONTROL METHOD THEROF - First and second processing units execute a binary program. A temperature sensor measures a temperature of a first processing unit. A temperature detection unit outputs a first interrupt instruction when the temperature measured by the temperature sensor exceeds a first value. A bus exchanges data between the first and second processing units. In response to the first interrupt instruction, the control unit interrupts execution in the first processing unit, migrates first data that is necessary for resuming the execution of the binary program from the first processing unit to the second processing unit, and controls the second processing unit to resume the execution of the binary program in the second processing unit. A power control unit interrupts power supply to the first processing unit after the first data is migrated to the second processing unit. | 02-12-2015 |
20150046730 | Method, Apparatus, And System For Energy Efficiency And Energy Conservation Including Power And Performance Balancing Between Multiple Processing Elements And/Or A Communication Bus - An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit. | 02-12-2015 |
20150052373 | Keep Alive Management - Keep alive management techniques are described. In one or more implementations, a keep alive interval is calculated by an operating system of the computing device. The keep alive interval is used to maintain one or more notification channels between one or more applications of the computing device and a network. | 02-19-2015 |
20150058645 | REDUCTION OF POWER CONSUMPTION OF A BUFFER IN A TAPE DRIVE - A method of reducing power consumption of a buffer for cache in a tape drive connected to a host in a communicable manner, according to one embodiment, includes detecting a transfer rate of data from the host or to the host, and determining a writing or reading rate of data to or from a tape based on the data transfer rate. A determination is made as to whether predetermined conditions including the data transfer rate, the data writing or reading rate, and a capacity of a buffer are satisfied, where the buffer includes at least two buffer areas. At least one of the buffer areas is selected when the predetermined conditions are satisfied. The selected buffer area is switched to a power saving mode. | 02-26-2015 |
20150058646 | METHOD FOR CONTROLLING DYNAMIC VOLTAGE FREQUENCY SCALING IN ELECTRONIC DEVICE AND APPARATUS SUPPORTING THE SAME - Disclosed is an operating method of an electronic apparatus. The method includes measuring the load rate of the electronic apparatus that operates at the first driving frequency level. The method also includes determining a second driving frequency level based on the measured load rate. The method further includes determining whether or not to change the first driving frequency level into the second driving frequency level after the operational duration time of the first driving frequency level. The method includes based on determining the change from the first driving frequency level to the second driving frequency level, controlling to operate at the first driving frequency level or the second driving frequency level. | 02-26-2015 |
20150067361 | Adaptively Controlling Low Power Mode Operation For A Cache Memory - In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a cache memory including a plurality of portions distributed across a die of the processor, a plurality of sleep circuits each coupled to one of the portions of the cache memory, and at least one sleep control logic coupled to the cache memory portions to dynamically determine a sleep setting independently for each of the sleep circuits and to enable the corresponding sleep circuit to maintain the corresponding cache memory portion at a retention voltage. Other embodiments are described and claimed. | 03-05-2015 |
20150067362 | Adaptive Integral Battery Pack and Voltage Regulator - An information handling system includes battery packs, loads, and a power management module operable to set an output voltage of a battery pack and direct power from the battery pack to one or more loads. The power management module can direct power from multiple batteries to a load simultaneously. A battery pack includes a converter circuit to convert the voltage provided by battery cells within the battery pack to a voltage set by a power management module. | 03-05-2015 |
20150067363 | CLOCK GENERATOR CIRCUIT WITH AUTOMATIC SLEEP MODE - A clock generator circuit for an integrated circuit (IC) component (e.g., a microcontroller unit) is disclosed that provides an automatic sleep mode for modules of the IC component. In some implementations, the clock generator circuit provides a simplified user interface and low power consumption by implementing one sleep mode level and allowing modules in the IC to start and stop internal clocks dynamically on demand. In active mode, the power consumption can be reduced to a minimum by turning off clocks for unused modules. | 03-05-2015 |
20150067364 | INFORMATION PROCESSING APPARATUS AND POWER SUPPLY MONITORING CIRCUIT - A CPU and a miscellaneous system are operated by electrical power supplied from an AC adapter or a battery. An AC adapter identifying circuit includes a voltage determining comparator that determines whether a voltage from the AC adapter is equal to or greater than a voltage threshold; a current determining comparator that determines whether a current supplied from the AC adapter is equal to or greater than a current threshold; and an electrical power saving control circuit that drops, when the supplied voltage is lower than the voltage threshold and the supplied current is equal to or greater than the current threshold, electrical power consumed by the CPU and the miscellaneous system. | 03-05-2015 |
20150067365 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND POWER CONTROL METHOD - There is provided an information processing apparatus including a mode control unit configured to perform control at least so as to switch a first mode that causes the information processing apparatus to be operated at a first voltage level and a second mode that causes the information processing apparatus to be operated at a second voltage level higher than the first voltage level, and an operation control unit configured to disable certain input operation performed by a user if a state satisfies a certain condition after the mode control unit switches a mode to the second mode. | 03-05-2015 |
20150067366 | Electronic Apparatus And Information Processing Method - An electronic apparatus includes a first processing unit for executing an operation of a first type; a second processing unit for executing an operation of a second type, with the average power consumption of the second processing unit being less than average power consumption of the first processing unit; a sharing unit connected to the first processing unit and the second processing unit and for operating cooperatively with either or both of the first processing unit and the second processing unit selectively according to predetermined condition; and a fixing unit for fixing relative position relation of the electronic apparatus with the user. | 03-05-2015 |
20150074434 | POWER CAPPING APPARATUS AND METHOD - A power capping apparatus including a measurement unit to measure a performance counter value and a used amount of power of the computing system before a power limit value is set. A calculation unit to calculate an energy reference value used in an energy conservation mode using the used amount of power and the performance counter value. A management unit to compare a first used amount of power measured before a power limit value is set with the power limit value when the power limit value is set, and limit the used amount of power to a value below the power limit value when the first used amount of power is greater than the power limit value, wherein the management unit outputs an error message so that a user sets the power limit value in which the energy reference value is within an effective range in the energy conservation mode. | 03-12-2015 |
20150082058 | SCREEN IMAGE MIRRORING METHOD AND APPARATUS - A display apparatus for mirroring a screen image is provided. The display apparatus includes a display unit configured to display a predetermined screen image, an input unit configured to receive a predetermined command or data, a control unit configured to control the predetermined screen image to be transmitted to another display apparatus in order to make the other display apparatus mirror the predetermined screen image, and to reduce power consumption used to display the predetermined screen image when screen image mirroring is requested, and a communication unit configured to transmit the predetermined screen image to the other display apparatus. Also, the display apparatus reduces the power consumption caused when a mirroring service is used. | 03-19-2015 |
20150082059 | PEER TO PEER POWER MANAGEMENT - A system and methods for delivering power to a multitude of portable electronic devices is provided. More specifically, the system and methods provide for powering different portable electronic devices through a central charging device. The method of delivering a power supply to a plurality of portable electronic devices includes determining a power requirement for each of the portable computing devices and supplying the power requirement to each of the portable computing devices in a daisy chain configuration using a central power device. | 03-19-2015 |
20150089254 | Controlling Power Consumption in Processor-Based Systems and Components Thereof - Since the maximum power consumption is largely a concern at the power supply domain, a limited number of nodes may be allowed to consume their maximum power consumption by preventing other nodes from consuming their maximum power consumption. This approach may be used either instead of or in cooperation with existing maximum power consumption regulators. | 03-26-2015 |
20150089255 | THROTTLING DEVICE POWER - An apparatus and system for throttling I/O devices in a computer system is provided. In an example, a method for throttling device power demand during critical power events. The method includes detecting a critical power event and issuing a signal to system devices to defer optional transactions during the critical power event. | 03-26-2015 |
20150089256 | COMMUNICATION DEVICE - A communication device configured to performing communication with an external device. The communication device includes a calculation unit, a recording unit configured to record a first firmware that makes the calculation unit function in a first mode, and a second firmware that makes the calculation unit function in a second mode that is different from the first mode, and a communication unit, when the calculation unit receives a signal from the external device in a designated state switching from execution of the first firmware to execution of the second firmware, configured to make a response not according to contents of the received signal. | 03-26-2015 |
20150089257 | IMAGE PROCESSING APPARATUS, METHOD OF CONTROLLING THE SAME, AND STORAGE MEDIUM - An image processing apparatus having a plurality of functional units that respectively execute predetermined functions, a method of controlling the apparatus, the apparatus manages a memory with a plurality of areas, and allocates the plurality of areas of the memory to the plurality of functional units respectively. Then, when, in a power saving state, at least one of the plurality of functional units is caused to transition into a power saving state, the apparatus stops a refreshing of the area of the memory allocated to the functional unit that is caused to transition into the power saving state. | 03-26-2015 |
20150089258 | Power State Adjustment - A system and method for selecting devices for which power states and/or mode of operation may be adjusted can be implemented based on power supply availability, cost of power consumption at certain periods of the day or year, environmental conditions, priority of applications, and business objectives are disclosed. | 03-26-2015 |
20150095670 | REDUCING PIN COUNT REQUIREMENTS FOR IMPLEMENTATION OF INTERCONNECT IDLE STATES - Methods and apparatus relating to reducing pin count requirements for implementation of interconnect idle state(s) are described. In one embodiment, logic receives a general purpose input signal on a signal pin of an Input/Output (I/O) complex logic in response to a control signal. An I/O device (e.g., coupled to the I/O complex logic) enters a low power consumption state in response to the control signal. The logic receives a wake signal on the signal pin of the I/O complex logic and the I/O device exits the low power consumption state in response to the wake signal. Other embodiments are also claimed and disclosed. | 04-02-2015 |
20150095671 | METHOD AND APPARATUS FOR MANAGING POWER OF A STORAGE SYSTEM - A method and apparatus for managing power of a storage system are provided. The method comprises obtaining historical access information of a plurality of storage devices in the storage system within a time cycle, determining, according to the historical access information, a cold time period in the time cycle, forming a cold storage device for storing at least a part of cold data blocks within the cold time period, and setting power of the cold storage device to a low power mode in a time period of a subsequent time cycle corresponding to the cold time period. The apparatus is configured to implement the method. The method and apparatus effectively save power consumption of the storage system. | 04-02-2015 |
20150095672 | DATA PROCESSING SYSTEM - The data processing system has: a plurality of hardware resources each having at least one standby mode; a control part for controlling execution of a task achieved by using, of the plurality of hardware resources, predetermined ones, and a working status of each hardware resource; and a power-source part for controlling supply of a power source to each hardware resource. The control part performs the scheduling of a scheduled execution time of the task based on information for determining a timing of executing the task, and calculates a standby time of the hardware resource based on a result of the scheduling. The control part compares the standby time with a break-even time depending on the standby mode, thereby deciding whether or not to cause each hardware resource to transition to the standby mode. | 04-02-2015 |
20150095673 | Controlling A Turbo Mode Frequency Of A Processor - In one embodiment, the present invention includes a multicore processor with a power controller to control a frequency at which the processor operates. More specifically, the power controller can limit a maximum operating frequency of the processor to less than a configured maximum operating frequency to enable a reduction in a number of frequency transitions occurring responsive to power state events, thus avoiding the overhead of operations performed in handling such transitions. Other embodiments are described and claimed. | 04-02-2015 |
20150100801 | PREDICTIVE POWER MANAGEMENT BASED ON USER CATEGORY - The present disclosure relates to a predicative power management system configured to adjust computer CPU clock rate by a computer user to conserve energy based on user category. In certain embodiments, the predicative power management system includes (a) a computer user profile creator module, and (b) a power management module. The computer user profile creator module is used to create computer usage profiles and each of the computer usage profiles has a profileID for a computer user with a computer userID. The power management module is used to set and adjust computer CPU clock rate, CPU voltage and device states based on computer users' category and the computer user's computer usage profile. | 04-09-2015 |
20150100802 | REDUCING POWER CONSUMPTION IN MULTI-DISPLAY ENVIRONMENTS - The disclosure is directed to a system and method for selectively controlling display power consumption in a system with a first and second display. While the system is in a non-idle state and while an application that is actively executing has an active window on the first display, a determination is made that the second display is inactive. In response to the determination, and while the system is still in the non-idle state, the second display is switched from a full power state to a low power state. | 04-09-2015 |
20150100803 | METHOD FOR CONTROLLING ELECTRONIC APPARATUS, HANDHELD ELECTRONIC APPARATUS AND MONITORING SYSTEM - A method for controlling an electronic apparatus, a handheld electronic apparatus, and a monitoring system are provided. An image within an image capturing range is displayed on a display unit by an image capturing unit. A digital stamp in the image is detected. The digital stamp corresponds to a single or multiple controllable devices. A control interface corresponding to the digital stamp is displayed on the image. An operation action a user executes on the control interface is detected so as to control the controllable device corresponding to the digital stamp. | 04-09-2015 |
20150100804 | Information Processing Method and Electronic Apparatus - An information processing method and an electronic apparatus are described to reduce the power consumption of electronic apparatus. The method is applied to an electronic apparatus that includes a processing module with at least two sensing units corresponding to at least two power consumption grades. The method includes, when the N sensing units among the at least two sensing units are in an OFF state and the M sensing units among the at least two sensing units are in an ON state, obtaining a first parameter through at least one sensing unit among the M sensing units; determining whether the first parameter satisfies a first predetermined condition; if so, controlling NI sensing units among the N sensing units to be in the ON state, wherein NI is a positive integer less than or equal to N. | 04-09-2015 |
20150100805 | DYNAMIC CPU VOLTAGE REGULATOR PHASE SHEDDING - A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization information, determine whether to adjust a performance state, lookup voltage regulator information for new performance state, adjust active voltage regulator phase, and adjust performance state. The voltage regulator phase shedding system can also include one or more subsystems to read a power measurement, calculate throttling requirements, determine whether to adjust a throttling, lookup voltage regulator information for new performance state capacity, adjust active voltage regulator phase, and adjust throttling. | 04-09-2015 |
20150100806 | Power Supply Engagement and Method Therefor Data - A system includes power supply units (PSUs) to supply power to components. For each PSU, a power conversion efficiency profile is determined. A maximum amount of power consumed during operation of the components is determined. A minimum number of PSUs capable of providing the maximum amount of power is determined. A first amount of power consumed at inputs of the minimum number of PSUs is calculated based on the maximum amount of power and based on the determined power conversion efficiency profile of each of the PSUs. A first number of PSUs to engage is determined, the first number greater than the minimum number of PSUs, wherein a total amount of power consumed at inputs of the first number of PSUs during operation of the system is less than the first amount of power, the determining based on the power conversion efficiency profile of each PSU. | 04-09-2015 |
20150106637 | Data Processing Method, Modem, and Terminal - The present invention discloses a data processing method, the method including obtaining an application packet sent by a network side device, obtaining a status of a screen of a terminal from a screen monitoring module in the terminal, where the status of the screen of the terminal includes a screen-on state and a screen-off state, and when the screen is in the screen-off state, skipping waking up an application processor, and temporarily storing the obtained application packet. In the data processing method provided by embodiments of the present invention, when it is obtained that the screen is in the screen-off state, the obtained application packet is temporarily stored, and an AP is not woken up, thereby reducing power consumption of the terminal. | 04-16-2015 |
20150113300 | BATTERY OPERATED COMPUTER SYSTEM - Disclosed herein is a computer system operating on a local power supply of finite capacity has a plurality of system components each connected to a voltage supply system to draw current for their operation. The computer system includes a measuring circuit connected to detect prevailing usage of the local power supply, for example, a battery. The supply system is connected to receive an indication from the measuring circuit of excessive usage and is adapted to reduce the available supply voltage to selected ones of the system components. Each system component is associated with a clock controller which selects a clock frequency for operation of a component in dependence on the available voltage supply. Also disclosed is a supply system for a computer device operating on a local power supply of finite capacity. | 04-23-2015 |
20150113301 | CHARGING METHOD AND MOBILE ELECTRONIC DEVICE - The invention discloses a charging method and a mobile electronic device using the charging method. The charging method determines a usage state of the mobile electronic device, selectively disables at least one of software programs or at least one of hardware functions that are operated in a host system of the mobile electronic device or does not to disable the software programs and the hardware functions that are operated in the host system, and charges a rechargeable battery of the mobile electronic device. Thereby, during the charging of the mobile electronic device, the charging method reduces power consumption of the mobile electronic device for shortening the charging time. | 04-23-2015 |
20150113302 | Control Method And Electronic Device - A control method and an electronic device using the control method are described. The control method includes, when the processing unit is in a first state, the communicating unit receives current network data; the communicating unit determines whether a communication state of the network data satisfies a predetermined condition; if the communication state does not satisfy the predetermined condition, then the communicating unit stores the current network data into a cache module of the communicating unit; and if the communication state satisfies the predetermined condition, then the communicating unit transmits the current network data to the processing unit, so that the processing unit changes from the first state to a second state, wherein power consumption in the first state is lower than that in the second state. | 04-23-2015 |
20150113303 | Semiconductor Device Predictive Dynamic Thermal Management - A semiconductor device includes a memory storing a lookup table including stored values associated with modes of operation of a component of the semiconductor device. A monitor monitors an operating parameter of the component in real-time, and reports a calculated value associated with the same. A power manager determines a change in the mode of operation of the component based on a comparison of the calculated value with a corresponding stored value, and adjusts a current mode of operation of the component in real-time. | 04-23-2015 |
20150121096 | SYSTEM AND METHOD FOR CONSERVING POWER CONSUMPTION IN A MEMORY SYSTEM - Systems and methods are disclosed for conserving power consumption in a memory system. One such system comprises a system on chip (SoC) and an encoder. The SoC comprises one or more memory clients for accessing a dynamic random access memory (DRAM) memory system coupled to the SoC. The encoder resides on the SoC and is configured to reduce a data activity factor of memory data received from the memory clients by encoding the received memory data according to a compression scheme and providing the encoded memory data to the DRAM memory system. The DRAM memory system is configured to decode the encoded memory data according to the compression scheme into the received memory data. | 04-30-2015 |
20150121097 | REDUCED-POWER TRACE ARRAY FOR A PROCESSOR - A trace array having features that provide reduced power consumption/power dissipation in processor circuits. The trace array circuit stores processor states during program execution and provides a resulting trace for subsequent analysis. The trace array includes power management features that, responsive to a control signal, reduce the power consumption of the trace array. A first state of the control signal indicates that the trace array circuit is storing states during the execution of the program and a second state of the control signal is set to enable the trace array for reading the collected states. The trace array may have dynamic read bit-lines and static write bit-lines to further reduce power consumption, and the pre-charge circuits that charge the dynamic read bit-lines may be selectively disabled in response to the first state of the control signal. Write-through may also be selectively disabled and optionally bypassed during state collection. | 04-30-2015 |
20150121098 | DEVICE POWER MANAGEMENT BASED ON DETECTED POWER SOURCE - An aspect provides an information handling device, including: a connection to an external power supply; a processor; and a memory; the memory having instructions executable by the processor to: detect that the connection to the external power supply is providing an input of power; ascertain via the connection to the external power supply that the input of power is derived from a source having a predetermined characteristic; and automatically adjust a power consumption setting of the information handling device based on the predetermined characteristic. Other aspects are described and claimed. | 04-30-2015 |
20150121099 | DATA STORAGE SYSTEM AND METHOD ANALYZING NON-SIGNAL - A non-signal analyzing method for a data storage system including a storage device connected to a host via a data line and a power line includes; communicating a non-signal from the host to the storage device via the power line, detecting the non-signal in the storage device and return the non-signal through to the host via the data line, and analyzing the returned non-signal using a protocol analyzer to generate analysis results characterizing the returned non-signal. | 04-30-2015 |
20150121100 | Method For Acting as Service Agent, Modem, and Terminal - The present invention discloses a method for acting as a service agent, including: receiving, by a modem, heartbeat configuration information corresponding to an application and sent by an application processor, where the application processor is in a sleep state after sending the heartbeat configuration information corresponding to the application, and establishing, by the modem according to the heartbeat configuration information corresponding to the application, a heartbeat connection with an application server corresponding to the application, so that the application processor is not woken up when the application has no updated content. Solutions provided by embodiments of the present invention can prevent an AP from being frequently woken up, thereby lowering power consumption of a terminal and extending standby time of the terminal. | 04-30-2015 |
20150121101 | POWER SUPPLY APPARATUS - A power supply apparatus includes a master circuit part charging a snubber capacitor initially and supplying power to a load under a light load; and a slave circuit part having a common output terminal with the master circuit part and supplying power to the load under a heavy load along with the master circuit part by distributing the load between them, wherein each of the master circuit part and the slave circuit part has the respective snubber capacitor that is chargeable and dischargeable at a secondary side of a transformer thereof. By doing so, power loss in a system can be reduced and efficiency under a light load improved. | 04-30-2015 |
20150121102 | Electronic Device That Ensures Reduced Unnecessary Recovery - An electronic device includes a main system, a sub system, and a response availability information storage unit. The response availability information storage unit stores response availability information indicating in which communication protocol the response data is generable by the main system. The sub system causes the main system not to recover to a normal state when the main system is in an energy saving state and the electronic device receives the information request data from the outside, if the sub system determines that the response data is not generable by the main system, based on the communication protocol of the information request data and the response availability information stored in the response availability information storage unit, and even if the response data is not generable by the sub system. | 04-30-2015 |
20150127960 | USB Interface Power Supply Method and Power Supply Device for Time Division Multiple Access Load System - A USB interface power supply method and power supply device for a time division multiple access load system reduce costs of using the capacitance while guaranteeing the performance. The USB interface power supply device includes: a USB interface, a soft-start circuit and a DC-DC direct current conversion circuit that are connected in sequence, wherein, an output of the DC-DC direct current conversion circuit supplies power to the time division multiple access load system. The power supply device also includes a capacitor, wherein: a first end of the capacitor is connected between the soft-start circuit and the DC-DC direct current conversion circuit, a second end of the capacitor is set to be grounded, and the capacitor is used for limiting an input current of the DC-DC direct current conversion circuit; a capacitance value of the capacitor is decided according to voltages of the capacitor when the time division multiple access load system works and does not work, a maximum current allowed to be output by the USB interface, an input voltage of the DC-DC direct current conversion circuit, a voltage and a current required by the time division multiple access load system, and a working period of the time division multiple access load system. | 05-07-2015 |
20150127961 | METHOD, DEVICE, PLATFORM, AND MOBILE TERMINAL FOR RECORDING AND ANALYZING BATTERY POWER OF A MOBILE TERMINAL - A method and a device for recording and analyzing the battery power of a mobile terminal have been disclosed. The method includes the following operations: obtaining recorded data of battery power in a mobile terminal over a predetermined time duration; utilizing a preset retrieving strategy, retrieving battery power charging/discharging data from the recorded data of the battery power, and statistically analyzing the battery power charging/discharging data to obtain a statistical analysis result; displaying the statistical analysis result on the mobile terminal. The method improves the accuracy of statistical data on battery power, and provides more accurate analysis and forecast of battery use status based on statistical data on battery power. | 05-07-2015 |
20150127962 | OPTIMIZING POWER USAGE BY FACTORING PROCESSOR ARCHITECTURAL EVENTS TO PMU - A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit. | 05-07-2015 |
20150134985 | Power Management For a Physical Layer Interface Connecting a Display Panel to a Display Transmit Engine - By partitioning the source PHY of a physical layer interface, such as a DisplayPort interface, between multiple power domains, dynamic switching between various power modes with faster entry and exit latency can be achieved in some embodiments. In some embodiments, the scheme may be hardware initiated and autonomous in nature. A controller can switch the PHY in and out of the various power consumption modes, dependent on usage scenarios. | 05-14-2015 |
20150134986 | INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR THE SAME AND STORAGE MEDIUM - An information processing apparatus that can avoid an IEEE802.1X re-authentication process due to a communication speed setting change made at the time of transitioning to the power-saving state and realize both of security and power-saving. Fixed link speed with which both a MFP | 05-14-2015 |
20150134987 | Power Shifting in Multicore Platforms by Varying SMT Levels - Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted. | 05-14-2015 |
20150143141 | SHARED INTERRUPT MULTI-CORE ARCHITECTURE FOR LOW POWER APPLICATIONS - A multicore architecture is configured to exploit explicit task parallelism to save power by sharing interrupt sources that trigger independent tasks. | 05-21-2015 |
20150143142 | SYSTEM AND METHOD FOR DYNAMIC DCVS ADJUSTMENT AND WORKLOAD SCHEDULING IN A SYSTEM ON A CHIP - Various embodiments of methods and systems for dynamically adjusting operating frequency settings of one or more processing components in a portable computing device (“PCD”) are disclosed. One such method involves receiving a request to adjust an operating frequency setting of a processing component to a required frequency (“F_req”) to process a workload. Factor readings associated with the operating capacity of the processing component may be taken. Based on the readings, performance curves associated with the processing component may be queried. The performance curves are used to determine the optimal operating frequency (“F_opt”) for the processing component. The F_opt is compared to the F_req and, if the F_req is less than F_opt, the operating frequency setting of the processing component is set to F_opt. Advantageously, as compared to F_req, at F_opt workload processing may be more efficient and a low power mode may be entered sooner. | 05-21-2015 |
20150143143 | METHOD AND SYSTEM FOR OPTIMIZING A CORE VOLTAGE LEVEL AND ENHANCING FREQUENCY PERFORMANCE OF INDIVIDUAL SUBCOMPONENTS FOR REDUCING POWER CONSUMPTION WITHIN A PCD - A method and system for optimizing a core voltage level of a portable computing device (“PCD”) and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values is determined for a plurality of subcomponents within the PCD. Next, a reduced set of voltage values may be calculated with a voltage aggregator based on the plurality of voltage values. An optimized voltage level for a shared power domain may then be determined by a voltage optimizer within the PCD from the reduced set of voltage values. A shared power domain may then be set to the optimized voltage level. Subsequently, an operating frequency of each subcomponent may be optimized with a frequency performance enhancer based on the optimized voltage level. An optimal power collapse duration may also be calculated by the frequency performance enhancer and set for each subcomponent from the optimal frequency. | 05-21-2015 |
20150143144 | METHOD FOR TRANSMITTING DATA BETWEEN NODES OF A MOTOR VEHICLE USING AN ETHERNET TRANSPORT PROTOCOL AND CONTROL UNIT CONFIGURED TO CARRY OUT SAID METHOD - A method for transmitting data in a motor vehicle from an application using an Ethernet transport protocol between nodes of the motor vehicle includes: the application transmitting data via an Ethernet-based network at cyclic intervals; deactivating local transmitters and receivers of a node in non-use periods, in which no data need to be transmitted; activating again the local transmitters and receivers of the node when data are pending transmission; transferring the local transmitters and receivers from an operating active mode to a quiescent mode in a deactivation time; transferring the local transmitters and receivers from the quiescent mode to the operating active mode in an activation time; and the application lowering the transmission frequency at least until a prescribed limit value is reached based at least in part on a requirement to save energy. | 05-21-2015 |
20150143145 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM - When an amount of a change of a temperature sensor output value is greater than a threshold, the occupation ratio is updated. When the amount of the change of the temperature sensor output value is equal to or smaller greater than the threshold, the occupation ratio is not updated and the background temperature is updated by using the occupation ratio at the time one sampling period before. When a difference between the temperature sensor output value and the background temperature calculated in this way becomes equal to or smaller than a threshold for an absence stated determination, it is determined an user is in an absence state. | 05-21-2015 |
20150143146 | SUBSTRATE PROCESSING APPARATUS AND CONTROL METHOD - According to one embodiment, there is provided a substrate processing apparatus including a substrate processing unit, a power supply, and a control unit. The substrate processing unit is configured to conduct processing on a substrate successively under first and second processing conditions each including a plurality of kinds of processing parameters to process the substrate. The power supply is capable of supplying power, which is one of the processing parameters included in each of the first and second processing conditions, to process the substrate. The control unit is configured to, during a period over which power supplied from the power supply is kept at a first level corresponding to the first processing condition, start a preparation operation to change over other processing parameters different from the power, from a level corresponding to the first processing condition to a level corresponding to the second processing condition. | 05-21-2015 |
20150143147 | FAN CONTROL DURING LOW TEMPERATURE OPERATIONS TO REDUCE PLATFORM POWER - In general, in one aspect, the disclosure describes running a cooling fan within a computer at low speed while the computer is in low temperature operations (e.g., idle). The operation of the cooling fan may reduce CPU temperature enough to decrease CPU leakage power, offsetting the power consumption of the fan, and possibly resulting in a net system power reduction. The benefit at the platform level increases further when considering the low efficiency of voltage regulation (VR) in this lower power regime, and potentially reductions in other components (e.g., graphics processor). The optimal fan speed is the speed at which the overall system power is reduced the most (e.g., CPU power savings is greater than fan power utilized). The optimal temperature may be determined dynamically during-operation or may be determined in manufacturing and applied statically during operation. | 05-21-2015 |
20150149796 | VOLTAGE REGULATOR TRAINING - Embodiments including systems, methods, and apparatuses associated with increasing the power efficiency of one or more components of a computing system. Specifically, the system may include a processor chip which may include an on-die voltage regulator (VR) configured to supply a voltage to a component of the processor chip. The processor chip may be coupled with a dynamic random access memory (DRAM). The system may further include an external VR coupled with the DRAM. A BIOS may be configured to regulate the voltage output of one or both of the on-die VR and/or the external VR. Other embodiments may be described or claimed. | 05-28-2015 |
20150149797 | HIERARCHICAL WEARABLE PROCESSING UNIT - A hierarchical wearable processing unit (HWPU) ( | 05-28-2015 |
20150149798 | INFORMATION PROCESSING DEVICE - In an information processing device | 05-28-2015 |
20150149799 | POWER COORDINATION SYSTEM FOR HYBRID ENERGY STORAGE SYSTEM - A method of controlling power in a hybrid energy storage system that may include controlling power through the at least one battery storage element and the capacitor storage element using a multi-level power management system. In some embodiments, the multi-level power management system includes at least a long term battery management layer and a real time power management layer. The long term battery management layer can be for estimating and managing a life cycle for the battery. The real time power management layer can be for managing power sharing between the at least one battery storage element and the at least one capacitor storage element at each time instant dependent upon adjustments to battery performance based upon the long term battery management layer. | 05-28-2015 |
20150293577 | INSTRUCTION LOOP BUFFER WITH TIERED POWER SAVINGS - Techniques are disclosed relating to power reduction during execution of instruction loops. Multiple different power saving modes may be used by a processor, such as a first power saving mode after only a few loop iterations (e.g., 2-3) and a second, deeper power saving mode after a greater number of loop iterations. The first power saving mode may include keeping a branch predictor and/or other structures active, but the second power saving mode may include reducing power to the branch predictor and/or other structures. An observation mode and an instruction capture mode may also be used by a processor prior to entering a power saving mode for loop execution. Power saving modes may also be achieved during execution of complex loops having multiple backward branches (e.g., nested loops). | 10-15-2015 |
20150293578 | PICOENGINE MULTI-PROCESSOR WITH POWER CONTROL MANAGEMENT - A general purpose PicoEngine Multi-Processor (PEMP) includes a hierarchically organized pool of small specialized picoengine processors and associated memories. A stream of data input values is received onto the PEMP. Each input data value is characterized, and from the characterization a task is determined. Picoengines are selected in a sequence. When the next picoengine in the sequence is available, it is then given the input data value along with an associated task assignment. The picoengine then performs the task. An output picoengine selector selects picoengines in the same sequence. If the next picoengine indicates that it has completed its assigned task, then the output value from the selected picoengine is output from the PEMP. By changing the sequence used, more or less of the processing power and memory resources of the pool is brought to bear on the incoming data stream. The PEMP automatically disables unused picoengines and memories. | 10-15-2015 |
20150301572 | POWER OPTIMIZATION FOR DISTRIBUTED COMPUTING SYSTEM - An embodiment includes determining a first power metric (e.g., memory module temperature) corresponding to a group of computing nodes that includes first and second computing nodes; and distributing a computing task to a third computing node (e.g., load balancing) in response to the determined first power metric; wherein the third computing node is located remotely from the first and second computing nodes. The first power metric may be specific to the group of computing nodes and is not specific to either of the first and second computing nodes. Such an embodiment may leverage knowledge of computing node group behavior, such as power consumption, to more efficiently manage power consumption in computing node groups. This “power tuning” may rely on data taken at the “silicon level” (e.g., an individual computing node such as a server) and/or a large group level (e.g., data center). Other embodiments are described herein. | 10-22-2015 |
20150301578 | ELECTRONIC DEVICE AND CONTENT DISPLAY METHOD THEREOF - An electronic device and a content display method are provided. A content display method of an electronic device includes displaying an application in the electronic device; and changing a content display mode of the application, when a detected battery consumption of the application exceeds a threshold logical battery capacity assigned to the application. | 10-22-2015 |
20150301581 | CONTEXT SENSING FOR COMPUTING DEVICES - A method and system for context sensing is described herein. The method includes determining if sensor data obtained via a number of sensors exceed a predetermined threshold. The method also includes increasing a sampling rate of any of the sensors to obtain context data corresponding to a computing device if the sensor data exceed the threshold. The method further includes analyzing the context data to classify a context of the computing device. | 10-22-2015 |
20150301582 | Energy Efficient Mobile Device - In one embodiment, an energy efficient mobile computing and communication device selects its operation mode based upon analyzing of a user's habit of selecting application programs. Each of the operation modes is associated with a set of applications. Power consumptions of each of the operation modes can be ranked sequentially. In another embodiment, an energy efficient mobile device selects one of the cores of its processor based upon analyzing of the user's habit of selecting the application programs. Each of the cores is associated with a set of applications. Power consumptions of each of the cores can be ranked sequentially. | 10-22-2015 |
20150309551 | SYSTEMS AND METHODS FOR PROVIDING LOCAL HARDWARE LIMIT MANAGEMENT AND ENFORCEMENT - Systems and methods for providing local hardware limit management and enforcement are described. One embodiment includes a system for managing and enforcing hardware limits on a system on chip (SoC). The system includes a plurality of chip components provided on a system on chip (SoC). A network of local limit manager (LLM) components is distributed on the SoC. Each LLM component is in communication with a corresponding sensor module that monitors one or more of the chip components. Each LLM component comprises a generic hardware structure for enforcing one or more hardware limits associated with the corresponding sensor module. | 10-29-2015 |
20150309554 | MANAGING POWER CONSUMPTION IN A COMPUTING SYSTEM - Managing power consumption in a computing system that includes a plurality of integrated technology elements (‘ITEs’) that receive power from a plurality of common form factor power supplies, including: determining the maximum amount of power that can be delivered by each of the common form factor power supplies; determining whether the maximum amount of power that can be delivered by a first common form factor power supply is different than the maximum amount of power that can be delivered by a second common form factor power supply; and responsive to determining that the maximum amount of power that can be delivered by the first common form factor power supply is different than the maximum amount of power that can be delivered by the second common form factor power supply, throttling one or more of the ITEs. | 10-29-2015 |
20150309560 | PORTABLE ELECTRONIC DEVICE AND CORE SWAPPING METHOD THEREOF - A portable electronic device is provided. A power management unit provides a first voltage and a second voltage. A multi-core cluster includes a first processing core configured to be powered by the first voltage and operate at a first operating frequency and a second processing core configured to be powered by the first voltage or the second voltage and operate at a second operating frequency. A third processing core is configured to be powered by the second voltage and operate at a third operating frequency. A first switch is configured to selectively provide the second voltage to the third processing core or stop providing the second voltage to the third processing core according to a first control signal. A second switch is configured to selectively provide the first voltage or the second voltage to the second processing core according to a second control signal. | 10-29-2015 |
20150316972 | DATA TRANSFORM METHOD AND DATA TRANSFORMER - A data transform method and a data transformer. The method includes: importing a data transform rule; acquiring from the data transform rule a source data definition, a destination data definition and a data transform rule definition; predicting resource energy consumption parameters of a data transform node server according to the source data definition, the destination data definition and the data transform rule definition; and deploying a resource energy consumption optimization policy of the data transform node server according to the predicted resource energy consumption parameters of the data transform node server. | 11-05-2015 |
20150316973 | LOAD OPTIMIZATION USING CABLE-ASSOCIATED VOLTAGE DROP - According to one exemplary embodiment, a method for load optimization using cable-associated voltage drop is provided. The method may include receiving a plurality of tasks for processing by a plurality of electronic devices. The method may also include determining a power loss value for one or more power cables powering each of the plurality of electronic devices. The method may further include assigning the plurality of tasks to one or more of the plurality of electronic devices based on the power loss value for the one or more power cables powering each of the plurality of electronic devices. | 11-05-2015 |
20150316975 | FAST-WAKE MEMORY CONTROL - A memory controller is transitioned to a low-power mode in which an active-mode resource required to transmit memory access commands to a memory device at a first command-signaling frequency is disabled. The memory controller transmits a first memory access command to the memory device using an alternative signaling resource during a transitional interval in which the active-mode resource is re-enabled. | 11-05-2015 |
20150319692 | ENERGY-EFFICIENT TRANSMISSION OF CONTENT OVER A WIRELESS CONNECTION - Energy efficient transmission of content can be provided using a variety of techniques. In an example technique, portions of content can be transmitted from a first computing device to a second computing device for display. A wireless radio of the first computing device can be placed into a low power mode between transmissions of the portions of content. In another example technique, one or more portions of content can be decoded, displayed, encoded, and transmitted by a first computing device for mirroring on a second computing device. One or more other portions of the content can be transmitted in encoded format to the second device without being decoded and displayed by the first device. In another example technique, a wireless radio of a first device can be placed into a low power mode in between transmission of commands to a second computing device to control content. | 11-05-2015 |
20150323974 | Device Power and Resource Management - Systems, devices and methods for managing charging and power status for portable devices are disclosed. The systems, devices and methods of the present invention comprise determining existing battery level and charge status of a device, comparing the battery level and charge status with predicted battery usage of tasks associated with calendar events scheduled to take place before the next charge, and transmitting an alert to one or more devices when a threshold likelihood that the battery level will not be sufficient for the predicted battery usage is exceeded. The present invention advantageously displays available power based on time available for certain tasks, and manages device power and resources by modifying and/or transferring tasks from a device having a battery level below a threshold level to one or more other devices with a higher battery levels. | 11-12-2015 |
20150331470 | POWER CAPPING FEEDBACK NORMALIZATION - A power capping system ( | 11-19-2015 |
20150331471 | INFORMATION HANDLING SYSTEM CONFIGURATION FOR POWER SYSTEM OUTPUT CAPABILITY - An IHS configuration system includes a plurality of IHS components including a processor system having a first maximum load current. A power system controller is coupled to the plurality of IHS components and operable to couple to a power supply. The power system controller is operable to retrieve a power output limit of the power system and determine a first system power budget for the plurality of IHS components using the first maximum load current of the processor system. The power system controller then determines whether the first system power budget exceeds the power output limit and, in response to the first system power budget exceeding the power output limit, the power system controller provides a second maximum load current for the processor system to create a second system power budget that does not exceed the power output limit. | 11-19-2015 |
20150331473 | NON-VOLATILE MEMORY EXPRESS (NVMe) DEVICE POWER MANAGEMENT - Systems and methods for managing power to Non-Volatile Memory Express (NVMe) devices. In some embodiments, an Information Handling System (IHS) may include a Central Processing Unit (CPU); a Non-Volatile Memory Express (NVMe) device operably coupled to the CPU; a service processor operably coupled to the CPU and to the NVMe; and a memory operably coupled to the service processor, the memory including program instructions stored thereon that, upon execution by the service processor, cause the service processor to: receive performance data from the CPU, receive metrics data from a source other than the CPU, and control an amount of power provided to the NVMe device based, at least in part, upon the performance data and the metrics data. | 11-19-2015 |
20150331474 | SERIAL COMMUNICATION METHOD - A serial communication method for a layered communication architecture includes a first layer, a second layer that is higher than the first layer, and a third layer that is higher than the second layer. The serial communication method includes transferring a first signal to the second layer based on a signal received through a communication line, the transferring performed by the first layer. The serial communication method further includes informing the third layer of reception of the first signal, the informing performed by the second layer; responding to the second layer based on whether there is a task to be performed, the responding performed by the third layer; transferring a second signal to the first layer based on a response from the third layer the transferring performed by the second layer; and entering a power saving state according to the second signal, the entering performed by the first layer. | 11-19-2015 |
20150338895 | INFORMATION PROCESSING APPARATUS HAVING MULTIPLE POWER MODES, CONTROL METHOD THEREFOR AND STORAGE MEDIUM - An information processing apparatus capable of sufficiently saving power consumption. A receiving unit receives a packet transmitted from an external device. An identifying unit identifies an application which is to execute processing of the packet on a basis of a port number of the packet received by the receiving unit. The application identified by the identifying unit analyzes a content of the packet, identifies a unit required for executing processing of the packet, and issues an instruction to supply power to the unit. | 11-26-2015 |
20150338896 | DYNANMIC PEAK POWER LIMITING TO PROCESSING NODES IN AN INFORMATION HANDLING SYSTEM - A computer-implemented method dynamically limits peak power consumption in processing nodes of an IHS. A power management micro-controller receives processing node-level power-usage and workload data from several node controllers, including current power consumption and a current workload, for each processing node within the IHS. A total available system power of the IHS is identified including a peak power output capacity and a sustained output power capacity. At least one node peak power threshold is determined based on the power-usage and workload data for each of the processing nodes. The node controllers are triggered to determine and set a central processing unit (CPU) peak power limit for each of several CPUs within each of the processing nodes based on the node peak power threshold, wherein each of the CPUs dynamically adjusts an operating frequency based on the CPU peak power limit. | 11-26-2015 |
20150338897 | ELECTRONIC DEVICE - A pull-up resistor of an electronic device pulls up a potential of a USB signal line that is for connection with a host, thereby allowing the host to detect a communication speed. In response to a status request from the host in a normal power mode, a transmission-reception section transmits a status response indicating a switchable status when the electronic device is switchable to a power saving mode. A control section performs switching to the power saving mode after the host suspends transmission of the status request upon receipt of the status response, and performs switching to the normal power mode in response to a specific event within the electronic device in the power saving mode. A switch disables the pull-up to inform the host about disconnection, and enables the pull-up to inform the host that the connection is re-established, thereby causing transmission of the status request to be resumed. | 11-26-2015 |
20150338902 | Algorithm For Preferred Core Sequencing To Maximize Performance And Reduce Chip Temperature And Power - Aspects include computing devices, systems, and methods for selecting preferred processor core combinations for a state of a computing device. In an aspect, a state of a computing device containing the multi-core processor may be determined. A number of current leakage ratios may be determined by comparing current leakages of the processor cores to current leakages of the other processor cores. The ratios may be compared to boundaries for the state of the computing device in respective inequalities. A processor core associated with a number of boundaries may be selected in response to determining that the respective inequalities are true. The boundaries may be associated with a set of processor cores deemed preferred for an associated state of the computing device. The processor core present in the set of processor cores for each boundary of a true inequality may be the selected processor core. | 11-26-2015 |
20150338908 | NON-INTRUSIVE POWER MANAGEMENT - A method and system for managing power consumption of a pool of computing devices are disclosed. One aspect of certain embodiments includes managing resource utilization for each computing device without installing customized software, firmware or hardware on the computing device and dynamically selecting, one or more candidate computing devices for altering their respective power states based on at least real-time information on the quantity of requests. | 11-26-2015 |
20150338910 | Dynamic Power and Thermal Capping for Flash Storage - A mechanism is provided for dynamic power and thermal capping in a flash storage system. A set of measurement values are received for the flash storage system, the set of measurement values comprising one or more of a set of current (I) measurement values, a set of voltage (V) measurement values, or a set of temperature (T) measurement values. An average current (I | 11-26-2015 |
20150346798 | SYSTEM AND METHOD FOR ADJUSTING PERFORMANCE BASED ON THERMAL CONDITIONS WITHIN A PROCESSOR - A system and method for efficient management of operating modes within an integrated circuit (IC) for optimal power and performance targets. A semiconductor chip includes processing units each of which operates with respective operating parameters. Temperature sensors are included to measure a temperature of the one or more processing units during operation. A power manager determines a calculated power value independent of thermal conditions and current draw. The power manager reads each of a first thermal design power (TDP) value for the processing units and a second TDP value for a platform housing the semiconductor chip. The power manager determines a ratio of the first TDP value to the second TDP value. Additionally, the power manager determines another ratio of the first TDP value to the calculated power value. Using the measured temperature, the ratios and the calculated power value, the power manager determines a manner to adjust the operating parameters. | 12-03-2015 |
20150346799 | TECHNIQUES FOR INCREASING ENERGY EFFICIENCY OF SENSOR CONTROLLERS - Methods and apparatus relating to increasing energy efficiency of sensor controllers are described. In an embodiment, logic (e.g., within a sensor controller) performs one or more tasks corresponding to acquisition of data from one or more sensors. The logic performs the one or more tasks to allow a processor core of the sensor controller to enter (or stay in) a low power consumption state during performance of the one or more data acquisition tasks. Other embodiments are also disclosed and claimed. | 12-03-2015 |
20150346804 | METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING DETECTING AND CONTROLLING CURRENT RAMPS IN PROCESSING CIRCUIT - Some implementations provide techniques and arrangements for adjusting a rate at which operations are performed by a processor based on a comparison of a first indication of power consumed by the processor as a result of performing a first set of operations and a second indication of power consumed by the processor as a result of performing a second set of operations. The rate at which operations are performed by the processor may be adjusted when the comparison indicates that a difference between the first indication of power consumed by the processor and the second indication of power consumed by the processor is greater than a threshold value. | 12-03-2015 |
20150362972 | POWER CHARACTERISTICS IN A SYSTEM OF DISPARATE STORAGE DRIVES - A mass data storage system includes a plurality of communicatively coupled storage drives powered by one or more power supplies. A power map defines the relationships between the storage drives and the power supplies and power rules/policies define the maximum permissible power load on each power supply at any point in time. | 12-17-2015 |
20150362975 | SELECTIVE RETRANSMISSION IN NEAR THRESHOLD NETWORK ON CHIP - A method is provided for each router to individually manage retransmissions at run time in a single chip computer die or a single computer that includes cores or compute nodes and routers that interconnect the cores or the compute nodes. Each router compares static energy saving and dynamic energy increase from turning off a retransmission buffer of the router in a monitoring phase. When the static energy saving is greater than the dynamic energy increase, the router turns off the retransmission buffer in a subsequent monitoring phase. When the static energy saving is less than the dynamic energy increase, the router turns on the retransmission buffer in the subsequent monitoring phase. | 12-17-2015 |
20150362976 | CONTEXT BASED POWER SAVING - One aspect provides a method, including: displaying, on a display device, display data; implementing, using a processor, a first power setting for the display device; accessing, using a processor, context data associated with the display data during use of the first power setting; mapping, using a processor, the context data to a predetermined display context, the predetermined display context being associated with a display setting; and switching, using the processor, the first power setting to the display setting of the display context. Other aspects are described and claimed. | 12-17-2015 |
20150363116 | MEMORY CONTROLLER POWER MANAGEMENT BASED ON LATENCY - A processor monitors, directly or indirectly, the amount of time it takes for the memory controller to respond to one or more memory access requests. When this memory access latency indicates that a memory latency tolerance of a program thread has been exceeded, the processor can apportion additional power to the memory controller, thereby increasing the speed with which the memory controller can process memory access requests. | 12-17-2015 |
20150370305 | SYSTEMS AND METHODS FOR PROVIDING POWER SAVINGS AND INTERFERENCE MITIGATION ON PHYSICAL TRANSMISSION MEDIA - Systems and methods for providing power savings and interference mitigation on physical transmission media are disclosed. Exemplary aspects include the ability to change physical layer (PHY) configurations based on operating conditions. By changing the PHY configuration, power consumption and electromagnetic interference (EMI) may be reduced. Still other operating conditions may be used to initiate switching between different PHYs. In another exemplary aspect, parameters of the PHY, such as slew rate, may be modified based on operating conditions to save power and/or reduce interference. | 12-24-2015 |
20150370306 | Method and System Providing Power Management for Multimedia Processing - A power management method is provided to detect system information for a multimedia process, which is to be executed in a multimedia processor system that includes a plurality of cores belonging to a plurality of power domains. The power domains are controlled independently of one another. The method further identifies a set of power domains that provides a processing capacity matching a requirement of the multimedia process indicated in the system information, and supplies power to one or more of the power domains according to the identified set of power domains. | 12-24-2015 |
20150370314 | POWER SUPPLY VOLTAGE AND LOAD CONSUMPTION CONTROL - Examples of electronic circuits and methods are provided. A power adapter is coupled to load device such that a power node and a signal node and a ground node are common to both entities. A supply voltage is regulated and provided by the power adapter to the load device in accordance with a voltage sensed at the signal node. Electrical current drawn by the load device is limited in accordance with a voltage sensed at the signal node. | 12-24-2015 |
20150378406 | METHOD OF EXECUTING AN APPLICATION ON A DISTRIBUTED COMPUTER SYSTEM, A RESOURCE MANAGER AND A DISTRIBUTED COMPUTER SYSTEM - A Resource Manager is provided for managing a plurality of computers. Each of the computers is operable in one of a plurality of power configurations, including a high-power configuration and low-power configurations. The Manager exchanges messages with a Manager Proxy in each computer. Responsive to notifications from Manager Proxies of changes in execution state of an application, the Manager determines a power configuration applicable for the computer of that Manager Proxy, or for a set of computers executing the application. The Manager indicates the power configuration to the Manager Proxy which then decides whether to implement a change. | 12-31-2015 |
20150378416 | INTELLIGENT SWITCH CAPACITOR - The present invention relates to an intelligent switch capacitor, which comprises a shell. The shell is provided with a capacitor core internally. A temperature sensor is arranged on the capacitor core. A top end of the capacitor core is connected to an intelligent switch wiring board. The intelligent switch wiring board is connected to a single chip computer, a capacity-switch, a temperature measurement module, a current measurement module and a current harmonic component measurement module, wherein the capacitor switch is connected to the capacitor core in an inner triangle way. Beneficial effects of the present invention are: 1. A switch and a power capacitor are integrated into a whole, which can implement quick capacity-switching and cutting of the switch; 2. The capacitor has an electronic thermal protection function; 3. Possibilities of capacitor damages and power grid accidents caused by resonance of a PFC capacitor in a power grid system are eliminated completely; 4. A power capacitor loss is reduced. | 12-31-2015 |
20150378417 | Controlling Processor Performance Scaling Based On Context - In an embodiment, a processor includes a core to execute instructions, a power controller to control an operating frequency of the core, and a context filter logic coupled to the power controller to prevent a performance state change request from being granted by the power controller based at least in part on a context of a system including the processor. Other embodiments are described and claimed. | 12-31-2015 |
20150378419 | METHOD OF EXECUTING AN APPLICATION ON A COMPUTER SYSTEM, A RESOURCE MANAGER AND A HIGH PERFORMANCE COMPUTER SYSTEM - In an HPC system, a Resource Manager deliberately introduces heterogeneities to the execution speeds of some, but not all, of the nodes allocated to an application during the application's execution. These heterogeneities may cause changes to the amount of time spent waiting on coordination points: computation intensive applications will be most affected by these changes, IO bound applications less so. By monitoring wait time reports received from a Communications library, the Manager can discriminate between these two types of applications and suitable power states can be applied to the nodes allocated to the application. If the application is IO bound then nodes can be switched to a lower-power state to save energy. This can be applied at any point during application execution so that the hardware configuration can be adjusted to keep optimal efficiency as the application passes through phases with different energy use and performance characteristics. | 12-31-2015 |
20150378424 | Memory Management Based on Bandwidth Utilization - A processing system includes a memory circuit configured for operation at a plurality of frequency-voltage operating points and one or more processing elements operatively coupled to the memory circuit. A memory-bandwidth measurement circuit repeatedly measures run-time bandwidth utilization of the memory circuit, while a controller circuit dynamically adjusts the voltage-frequency operating point of the memory circuit as a function of the measured run-time bandwidth utilization. The controller circuit uses a feedback process that includes determining whether previous adjustments to the voltage-frequency operating point have tended to provide too little memory bandwidth or too much memory bandwidth, based on measurements of run-time bandwidth utilization performed after each of a plurality of previous adjustments to the voltage-frequency operating point of the memory, and dynamically changing one or more bandwidth utilization thresholds used to trigger adjustments to the voltage-frequency operating point, based on the determining. | 12-31-2015 |
20150378426 | SEMICONDUCTOR DEVICE - A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section. | 12-31-2015 |
20150378427 | APPARATUSES AND METHODS OF ENTERING UNSELECTED MEMORIES INTO A DIFFERENT POWER MODE DURING MULTI-MEMORY OPERATION - Disclosed are examples of apparatuses including memory devices and systems comprising memories sharing a common enable signal, wherein the memories may be put into different power modes. Example methods for setting the different power modes of the memories are disclosed. In some examples, different power modes may be set by issuing memory group-level commands, memory-level commands, or combinations thereof. | 12-31-2015 |
20150378429 | METHOD AND APPARATUS FOR PRECISION CPU MAXIMUM POWER DETECTION - A power detection circuit includes a sense element to convey current from a source to a load, a compensating reference element located proximate to the sense element, a comparator, and a precision current sink. The comparator includes a first input coupled to the sense element, a second input coupled to the compensating reference element, and an output. The comparator is configured to assert a signal on the output in response detecting that a first voltage on the first input equals a second voltage on the second input. The precision current sink is coupled to the second input of the comparator and is configured to pull constant current through the compensating reference element based on a predetermined power threshold. | 12-31-2015 |
20160004288 | LEAKAGE CURRENT VARIABILITY BASED POWER MANAGEMENT - Technologies are generally described to provide a leakage current variability based power management of a processor. According to some examples, instruction counters and aggregated power consumption of the processor may be used to process power measurements of the processor into linear equations. The linear equations may be processed to produce a set of leakage values for the processor. In an example scenario, computation data from a power controller and processor instruction counters (PICs) of a core of the processor may be used to determine the leakage current variability of the core. A table of linear combination samples may be generated from the computation data. A micro-architectural leakage map of the core may be generated from the linear combination samples within the table. | 01-07-2016 |
20160004291 | User Level Control Of Power Management Policies - In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed. | 01-07-2016 |
20160004297 | ENERGY MANAGEMENT SYSTEM - An energy management system includes an instruction unit ( | 01-07-2016 |
20160011641 | POWER MANAGEMENT FOR PCIE SWITCHES AND DEVICES IN A MULTI-ROOT INPUT-OUTPUT VIRTUALIZATION BLADE CHASSIS | 01-14-2016 |
20160018869 | ASYNCHRONOUS PROCESSOR - There are disclosed asynchronous computing devices and methods of operating asynchronous computing devices. An asynchronous computing device may include an asynchronous processor and a voltage regulator circuit that outputs an operating voltage to the asynchronous processor in response to a voltage request received from the asynchronous processor. | 01-21-2016 |
20160018871 | TELEMETRY FOR POWER AND THERMAL MANAGEMENT - Power and thermal management that uses trigger circuits to activate power telemetry. A power consumption level of a subsystem is monitored using a trigger circuit while power telemetry mode for the subsystem is inactive. When the monitored power consumption level exceeds a threshold, the trigger circuit activates the power telemetry mode of operation in which telemetry information of the subsystem is provided to a controller. Power consumption of the subsystem is then managed by the controller based on telemetry information obtained under the power telemetry mode. The controller can determine whether a power consumption level of the subsystem has dropped below a threshold, based on telemetry information obtained under the power telemetry mode. The controller may terminate the power telemetry mode when the power consumption level has dropped below the threshold. Other embodiments are also described and claimed. | 01-21-2016 |
20160018874 | Power Management Method and Apparatus, and Power Supply System - A power management method and apparatus, and a power supply system are provided. The method includes: obtaining a power demand value of each module and a rated output power of each power supply unit (PSU) in a communication equipment; calculating the obtained power demand value of each module to acquire a total power demand value of the modules; and adjusting, according to the calculated total power demand value of the modules and the obtained rated output power of each PSU, the current number of the PSUs actually turned on in the communication equipment. | 01-21-2016 |
20160018884 | POWER THROTTLE MECHANISM WITH TEMPERATURE SENSING AND ACTIVITY FEEDBACK - Integrated circuit devices, methods, and other embodiments associated with power throttling with temperature sensing and activity feedback are described. In one embodiment, an integrated circuit device includes temperature sensing logic, activity sensing logic, comparison logic, and signal logic. The temperature sensing logic is configured to output a temperature signal indicative of a temperature of a selected region of the device. The activity sensing logic is configured to output an activity signal indicative of a level of activity of a selected device function. The mode selection logic is configured to select the temperature signal or the activity signal. The comparison logic is configured to compare the selected signal to a series of threshold levels and output a comparison result. The signal logic is configured to generate a throttle signal based on the comparison result. The throttle signal is used to control a frequency of operation of a selected device component. | 01-21-2016 |
20160026230 | DYNAMIC PROGRAM EVALUATION FOR SYSTEM ADAPTATION - A method and apparatus to maintain a plurality of executables for a task in a device are described. Each executable may be capable of performing the task in response to a change in an operating environment of the device. Each executable may be executed to perform a test run of the task. Each execution can consume an amount of power under the changed operating environment in the device. One of the executables may be selected to perform the task in the future based on the amounts of power consumed for the test runs of the task. The selected one executable may require no more power than each of remaining ones of the executables. | 01-28-2016 |
20160026231 | ADAPTIVE ALGORITHM FOR THERMAL THROTTLING OF MULTI-CORE PROCESSORS WITH NON-HOMOGENEOUS PERFORMANCE STATES - In an embodiment, a processor comprises: a plurality of cores each to execute instructions; a plurality of thermal sensors, at least one of which is associated with each of the cores; and a power control unit (PCU) coupled to the cores. The PCU includes a thermal control logic to preemptively throttle a first core by a first throttle amount when a temperature of a second core exceeds at least one thermal threshold. Note that this first core may be preemptively throttled independently of a throttling of the second core and may have a temperature of the first core does not exceed any thermal threshold. Other embodiments are described and claimed. | 01-28-2016 |
20160034012 | Dynamic Power Budgeting in a Chassis - A chassis determines a steady state power consumption of each node in the chassis based upon real-time monitoring of power consumption of the nodes. The chassis also determines a power allocation for each node based upon the steady state power consumptions for the nodes. The chassis also determines a total power allocation for the chassis based upon the steady state power consumptions for the nodes. The chassis also determines a source and amount of input power for the chassis based upon the total power allocation for the chassis. The steady state power consumption of a node may be determined by sampling the power consumption of the node during a window period, and setting the steady state consumption of the node to a range if the values of the samples during the window period are within the assigned range. | 02-04-2016 |
20160034013 | DYNAMIC VOLTAGE AND FREQUENCY SCALING OF A PROCESSOR - A method of Dynamic Voltage Frequency Scaling (DVFS) of a processor includes measuring a first utilization of the processor utilized to execute at least one of a graphic task and a computing task. A second utilization is generated by adjusting the first utilization based on a duration of the graphic task and a duration of the computing task. An operation frequency of the processor is determined based on a comparison of the second utilization with at least one threshold value. | 02-04-2016 |
20160034014 | DIGITAL VOLTAGE DROOP MONITOR WITH CLOCK JITTER ADJUSTMENT - Implementations of the present disclosure involve a system and/or method for measuring on-die voltage levels of an integrated circuit through a digital sampling circuit. In particular, the system and/or method utilize a delay line based analog-to-digital sampling circuit that produces a voltage reading over time, such as at every high frequency clock cycle. In one embodiment, the digital sampling circuit may include a clock jitter monitor circuit configured with a constant supply voltage. This clock jitter monitor is configured to measure the clock jitter that is experienced by the digital voltage monitor circuit and, when compared to measured voltage captured by the circuit, may be used to calibrate or otherwise correct the readings provided by the digital voltage monitor circuit. | 02-04-2016 |
20160034015 | MEMORY POWER SUPPLY LOAD MANAGEMENT - Methods and systems for storing data are disclosed. The systems are configured to perform the methods and the methods may include, for example, receiving electronic data to be stored, partitioning the data into multiple segments, and storing each segment in a memory during a separate write cycle. The methods may also include programming a compensation load so that power provided by a power supply during the storing of each segment is substantially the same. | 02-04-2016 |
20160034016 | METHOD AND APPARATUS FOR MANAGING POWER IN COMPUTER SYSTEMS - The invention is directed towards minimizing power consumption in computer systems. One embodiment of the invention is a power management system that is used for a computer system that has at least one device and one power domain. This embodiment uses two different power managers to manage the power consumption of the device and the power domain. Specifically, this embodiment has (1) a first power manager that determines when to change power state of the device, and (2) a second power manager that determines when to change power state of the power domain. Each of these power managers decides to change the power state of its corresponding device or domain based on information from several different sources. These sources can include power-management clients and power managers of related domains or devices. | 02-04-2016 |
20160034022 | DYNAMIC CORE SWITCHING - A system including a first core to execute instructions associated with an application at a first speed based on a first instruction set and a second core to execute the instructions associated with the application at a second speed based on a second instruction set. The first speed is greater than the first speed. The second instruction set is a subset of the first instruction set. A first memory stores an operating system. The operating system includes a kernel that provides services to the application. A core switching module loads into a second memory after the operating system is booted, where the second memory is separate from the first memory, switches execution of the instructions associated with the application between the first core and the second core, and switches the execution of the instructions associated with the application between the first core and the second core transparently to the operating system. | 02-04-2016 |
20160041594 | TRACKING PIPELINED ACTIVITY DURING OFF-CORE MEMORY ACCESSES TO EVALUATE THE IMPACT OF PROCESSOR CORE FREQUENCY CHANGES - A processor system tracks, in at least one counter, a number of cycles in which at least one execution unit of at least one processor core is idle and at least one thread of the at least one processor core is waiting on at least one off-core memory access during run-time of the at least one processor core during an interval comprising multiple cycles. The processor system evaluates an expected performance impact of a frequency change within the at least one processor core based on the current run-time conditions for executing at least one operation tracked in the at least one counter during the interval. | 02-11-2016 |
20160041595 | Controlling Reduced Power States Using Platform Latency Tolerance - In an embodiment, a processor includes a plurality of cores and power management logic. The power management logic may be to, in response to a first break event during a reduced power state in the processor, set an exit timer based on a platform latency tolerance, block a first plurality of break events from interrupting the reduced power state, and in response to a expiration of the exit timer, terminate the reduced power state. Other embodiments are described and claimed. | 02-11-2016 |
20160041596 | POWER EFFICIENT METHOD AND SYSTEM FOR EXECUTING HOST DATA PROCESSING TASKS DURING DATA RETENTION OPERATIONS IN A STORAGE DEVICE - The solution described here is a method to schedule the execution of data processing tasks while data retention operations need to be performed. The main objective of this approach is to minimize the power consumption of the host data processing tasks that are not time sensitive. The Storage Device may be in a power saving mode or even off at the time the Host wants to execute a data processing task. For non-critical data processing tasks, the Host activates the device at a specific time estimated by the drive to run data retention tasks, and then sends the data processing function to the device. The device executes the Host data processing tasks and also performs the data retention operations accordingly. After the entire process is complete, the device can return to the initial power state or any power state determined by the Host. | 02-11-2016 |
20160041600 | MANAGING POWER SAVINGS IN A HIGH AVAILABILITY SYSTEM AT A REDUNDANT COMPONENT LEVEL OF GRANULARITY - Based on a current activity running on a first selection of components operating in a primary mode from among redundant components within a high availability system, a separate power setting is selected for each separate type of redundant component from among the types of redundant components within the redundant components as specified in a high availability status specified for the current activity. At least one controller interface is called with a request to set the powered state of a particular component that is redundant to at least one of the first selection of components, from among a second selection of components operating in a standby mode from among the redundant components, to the separate power setting for the separate type of redundant component. | 02-11-2016 |
20160041601 | MANAGING POWER SAVINGS IN A HIGH AVAILABILITY SYSTEM AT A REDUNDANT COMPONENT LEVEL OF GRANULARITY - Based on a current activity running on a first selection of components operating in a primary mode from among redundant components within a high availability system, a separate power setting is selected for each separate type of redundant component from among the types of redundant components within the redundant components as specified in a high availability status specified for the current activity. At least one controller interface is called with a request to set the powered state of a particular component that is redundant to at least one of the first selection of components, from among a second selection of components operating in a standby mode from among the redundant components, to the separate power setting for the separate type of redundant component. | 02-11-2016 |
20160041606 | LOW POWER MODE - Examples of the disclosure are directed to a method of, after hitting a UVLO threshold, rebooting an electronic device in a low power mode having a lower UVLO threshold, such that the device can continue to be used past the first UVLO threshold. For example, in a high power mode, the device may be capable of a number of functionalities of a modern portable electronic device, such as network access, the ability to run applications, Bluetooth connections, etc. In a low power mode, the device may only be able to check and display a current time, play an alarm sound at a predefined time, perform near field communication (NFC) transactions/payments, among other possibilities described herein. The limited functionality and reduced usage of peripherals in the low power mode may prevent the battery from experiencing peaks in current level that may be problematic at relatively low levels of voltage. | 02-11-2016 |
20160041608 | Digital Power Estimator to Control Processor Power Consumption - In an embodiment, a digital power estimator (DPE) may be provided that may monitor the processors to estimate the amount of power being consumed. If the estimate exceeds a power threshold, the DPE may throttle one or more of the processors. Additionally, throttling events may be monitored to determine if a change in the operating point is desired. In one embodiment, the DPE throttling events may be counted, and if the counts exceed a count threshold, a change in the operating point to a reduced operation point may be requested. Additionally, if the DPE estimate is below the power threshold (or a second power threshold), a second count of events may be maintained. If the second count exceeds a threshold and the operating point is the reduced operating point, a return to the original operating point may be requested. | 02-11-2016 |
20160048189 | DECENTRALIZED ARCHITECTURE FOR DYNAMIC RESOURCE MANAGEMENT - An electronic device includes a compute system configured to concurrently execute a primary application and one or more secondary applications, one or more subsystems configured to operate in a full-power mode and one or more reduced-power modes, and a resource management module including one or more power mode timers. The resource management module sets a full-power mode timer based on an application-specific full-power requirement for the primary application executing on the electronic device, and instructs the one or more subsystems to operate in full-power mode for a duration of the full-power mode timer. Responsive to an indication of an input to the electronic device, the indication including an input-specific full-power requirement, the resource management module increases the duration of the full-power mode timer based on the duration of the application-specific full-power requirement for the primary application. | 02-18-2016 |
20160054774 | PROFILING A JOB POWER AND ENERGY CONSUMPTION FOR A DATA PROCESSING SYSTEM - A process identifier for a job is collected. The job runs on a plurality of nodes. The job is identified using the process identifier. A node for the job is identified. An amount of power consumed by the node to run the job is determined. | 02-25-2016 |
20160054775 | METHODS AND APPARATUS TO ESTIMATE POWER PERFORMANCE OF A JOB THAT RUNS ON MULTIPLE NODES OF A DISTRIBUTED COMPUTER SYSTEM - A non-transitory computer readable storage medium having stored thereon instructions executable by one or more processors to perform operations including: receiving a plurality of input parameters including (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) a list of frequencies; responsive to receiving the plurality of workload parameters, retrieving calibration data from a calibration database; generating a power estimate based on the plurality of workload parameters and the calibration data; and providing the power estimate to a resource manager is shown. Alternatively, the input parameters may include (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) an amount of available power, wherein the estimator may provide an estimation of the frequency at which the nodes should operate to utilize as much of the available power without exceeding the available power. | 02-25-2016 |
20160054780 | POWER AWARE JOB SCHEDULER AND MANAGER FOR A DATA PROCESSING SYSTEM - An indication of a mode for a job is received. An available power for the job is determined based on the mode. A first power for the job is allocated based on the available power. A first frequency for the job is determined based on the available power. The first power is adjusted based on the available power. | 02-25-2016 |
20160054781 | Methods and Apparatus to Manage Jobs that can and Cannot be Suspended When there is a Change in Power Allocation to a Distributed Computer System - A non-transitory computer readable storage medium storing instructions executable by one or more processors of a distributed computer system to perform operations including determining whether a power consumed by the distributed computer system is greater than a power allocated to the distributed computer system, responsive to determining the power consumed by the distributed computer system is greater than the power allocated to the distributed computer system, determining whether all jobs being processed by the distributed computer system are processing at a lowest power state for each job, wherein a job includes one or more calculations performed by the one or more processors of the distributed computer system and responsive to determining all jobs being processed by the distributed computer system are processing at a lowest power state for each job, suspending a job having a lowest priority among all jobs being processed by the distributed computer system is shown. | 02-25-2016 |
20160054782 | DYNAMIC SCALING OF GRAPHICS PROCESSOR EXECUTION RESOURCES - In one embodiment execution units, graphics cores, or graphics sub-cores can be dynamically scaled across a frame of graphics operations. Available execution units within each graphics core may be scaled using utilization metrics such as the current utilization rate of the execution units and the submission of new draw calls. In one embodiment, one of more of the sub-cores within each graphics core may be enable or disabled based on current or past utilization of the sub-cores based on a set of current graphics operations. | 02-25-2016 |
20160054784 | CONTROLLING POWER CONSUMPTION OF A VOLTAGE REGULATOR IN A COMPUTER SYSTEM - Controlling power consumption of a voltage regulator in a computer system that includes computer memory and the voltage regulator is configured to provide regulated source voltage to the computer memory includes: receiving, by a voltage regulator controller, memory margin statistics of the computer memory, the memory margin statistics including data describing operational tolerance of the computer memory to source voltage signal variations; and adjusting, by the voltage regulator controller, one or more operating characteristics of the voltage regulator in dependence upon the memory margin statistics. | 02-25-2016 |
20160054787 | Method, System, and Apparatus for Dynamic Thermal Management - A method, apparatus, article of manufacture, and system, the method including, in some embodiments, processing a computational load by a first core of a multi-core processor, and dynamically distributing at least a portion of the computational load to a second core of the multi-core processor to reduce a power density of the multi-core processor for the processing of the computational load. | 02-25-2016 |
20160054790 | Reducing Power Consumption During Graphics Rendering - In accordance with some embodiments, the knowledge that a capped frame time is used can be exploited to reduce power consumption. Generally a capped frame time is a pre-allocated amount of time to apply power for rendering in graphics processing. Generally the frame time involves the application of power and some down time in which only idle power is applied pending the next frame time. By making better use of that down time, power consumption reductions can be achieved in some embodiments. | 02-25-2016 |
20160062422 | THERMALLY-CONSTRAINED VOLTAGE AND FREQUENCY SCALING - A performance setting technique is disclosed for a clocked circuit such as a processor in an integrated circuit. The technique determines a maximum power consumption for the clocked circuit as a function of a total thermal resistance of a mobile device incorporating the integrated circuit. The total thermal resistance is a sum of a system thermal resistance for the mobile device and a device thermal resistance for the integrated circuit. | 03-03-2016 |
20160062423 | METHOD FOR MANAGING HEAT GENERATION IN ELECTRONIC DEVICE AND ELECTRONIC DEVICE THEREFOR - Provided is a method for managing heat generation in an electronic device. The method includes determining a state of the electronic device, applying a performance level for at least one element associated with heat generation, corresponding to the state, monitoring state information of the electronic device, and adjusting the performance level for the at least one element according to the state information. Various embodiments are also possible. | 03-03-2016 |
20160062439 | METHOD FOR PERFORMING SYSTEM POWER BUDGETING WITHIN ELECTRONIC DEVICE, AND ASSOCIATED APPARATUS - A method for performing system power budgeting within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and performing configuration adjustment on at least one portion of the electronic device according to the power consumption index corresponding to the specific subsystem. | 03-03-2016 |
20160062441 | POWER MANAGING METHOD AND POWER SUPPLYING SYSTEM APPLYING THE POWER MANAGING METHOD - A power managing method, applied to an electronic system comprising a power providing device and one or more system modules, the power providing device comprising at least one battery. The method comprises: (a) determining a total power budget of the power providing device; (b) obtaining system information of the electronic system; (c) determining an available power budget according to the total power budget and the system information; and (d) allocating the available power budget to the one or more system modules according to the system information. | 03-03-2016 |
20160062442 | CONTROL OF PERIPHERAL DEVICE DATA EXCHANGE BASED ON CPU POWER STATE - A method for processing data includes receiving in a peripheral device, which is connected by a bus to a host processor having host resources, a notification of a sleep state of at least one of the host resources. While the at least one of the host resources is in the sleep state, when the peripheral device receives data from a data source for delivery to the host processor, the peripheral device sends a message to the data source, which causes the data source to defer conveying further data to the peripheral device until the at least one of the host resources has awakened from the sleep state. | 03-03-2016 |
20160062443 | ELECTRONIC DEVICE AND METHOD - In one embodiment, an electronic device detachably connected to a mobile device is provided. The electronic device of the embodiment includes a power supply, a detector and a controller. The power supply is configured to supply power to the mobile device when the mobile device is connected to the electronic device. The detector is configured to detect whether a user is within the detector's range. The controller is configured to stop supplying power to the mobile device, when the detector detects a user while the mobile device is connected to the electronic device and to subsequently resume supplying power. | 03-03-2016 |
20160062445 | APPARATUS AND METHOD OF CONTROLLING POWER CONSUMPTION OF GRAPHIC PROCESSING UNIT (GPU) RESOURCES - A power consumption control apparatus includes a resource selecting unit configured to select resources, whose power consumption levels are to be determined, from among resources of a graphic processing unit (GPU), a resource use information acquiring unit configured to determine whether the selected resources are used from a code block which is all or part of a program executed using the GPU, and a power consumption controlling unit configured to determine a power consumption level of the selected resource based on a determination result of the resource information acquiring unit and to control the power consumption level of the selected resources based on a determined power consumption level of the selected resources. | 03-03-2016 |
20160062446 | METHODS AND SYSTEMS FOR MANAGING PERFORMANCE AND POWER UTILIZATION OF A PROCESSOR EMPLOYING A FULLY-MULTITHREADED LOAD THRESHOLD - A method for managing performance and power utilization of a processor in an information handling system (IHS) employing a balanced fully-multithreaded load threshold is disclosed. The method includes providing a maximum current thread utilization (Umax) and a minimum current thread utilization (Umin) among all current thread utilizations of the processor and determining a current performance state (P state) of the processor. The method also includes increasing a current P state of the processor to a next P state of the processor towards a maximum P state (Pmax) of the processor when the current P state of the processor is between Umax and Umin and the current utilization rate of the processor is less than a first threshold utilization rate. The method further includes engaging the processor in a turbo mode when the current P state of the processor reaches the Pmax and the current utilization of the processor is greater than the first threshold utilization rate of the processor. | 03-03-2016 |
20160062691 | METHOD FOR CONTROLLING MEMORY DEVICE TO ACHIEVE MORE POWER SAVING AND RELATED APPARATUS THEREOF - A memory management method includes: performing a first-level collection operation upon first storage units in a memory pool allocated in a memory device; and after the first storage units are processed by the first-level collection operation, performing a second-level collection operation upon second storage units in the memory pool allocated in the memory device, wherein one of the first-level collection operation and the second-level collection operation is a page-level collection operation, and another of the first-level collection operation and the second-level collection operation is a bank-level collection operation. | 03-03-2016 |
20160070326 | VIRTUAL BATTERIES FOR ELECTRONIC DEVICE AND ASSOCIATED METHOD - An electronic device and associated method is provided. The electronic device includes: a plurality of subsystems including hardware resources; a battery coupled to the plurality of subsystems; and a processing unit, configured to allocate a virtual battery from the battery for each subsystem, wherein each virtual battery has a defined power budget from the battery. | 03-10-2016 |
20160070328 | POWER MANAGEMENT SYSTEM - A power management system includes a power system. A powered component is coupled to the power system. A power detect circuit is coupled to the power system. A power system controller is coupled to the power system, the powered component, and the power detect circuit. The power system controller is operable, for each of at least one workload run using the powered component, to program the power detect circuit with a first threshold for a first system operation setting and determine that the first threshold was not exceeded while the workload was running. The power system controller is then operable to program the power detect circuit with a second threshold for the first system operation setting, determine that the second threshold was exceeded while the workload was running and, in response, use the second threshold to allocate power from the power system. | 03-10-2016 |
20160070330 | POWER MANAGING METHOD AND ELECTRONIC SYSTEM APPLYING THE POWER MANAGING METHOD - An electronic system ( | 03-10-2016 |
20160070332 | Modifying Power Consumption Based On Energy-Usage Messages - Examples described herein involve modifying power consumption based on energy usage messages. A method includes a CPU periodically receiving energy-usage messages from components. From the energy-usage messages, the CPU determines a plurality of historical energy-usage patterns that indicate respective historical energy consumption of a given component while operating in a given operating state. Then, the CPU determines that overall power consumption of the one or more components differs from an expected power consumption. Thereafter, the CPU identifies at least one differing component that is causing the power consumption differential based on the historical energy-usage patterns and a plurality of new energy-usage messages received after the plurality of historical energy-usage patterns were determined. The CPU then causes the at least one differing component to modify an amount of energy that the at least one differing component is consuming. | 03-10-2016 |
20160077572 | SYSTEM ON CHIP (SOC), AND DYNAMIC VOLTAGE FREQUENCY SCALING (DVFS) VERIFICATION METHOD THEREOF - A dynamic voltage and frequency scaling (DVFS) verification method of a system on chip according to an exemplary embodiment of the disclosed subject matter includes extracting, by a DVFS state extraction module, a DVFS state conversion code from a code, analyzing the extracted DVFS state conversion code, and generating a DVFS state value according to a result of the analysis, generating, by a valid state extraction module, valid state values which satisfy an operation voltage condition and an operation frequency condition capable of operating the system on chip, and determining, by a stability determination module, stability of the DVFS state value according to whether or not the DVFS state value is equal to one of the valid state values. | 03-17-2016 |
20160085287 | Performing Local Power Gating In A Processor - In an embodiment, the present invention includes an execution unit to execute instructions of a first type, a local power gate circuit coupled to the execution unit to power gate the execution unit while a second execution unit is to execute instructions of a second type, and a controller coupled to the local power gate circuit to cause it to power gate the execution unit when an instruction stream does not include the first type of instructions. Other embodiments are described and claimed. | 03-24-2016 |
20160085288 | DATA STORAGE DEVICES WITH PERFORMANCE-AWARE POWER CAPPING - Systems, methods, and firmware for power control of data storage devices are provided herein. In one example, a data storage device is presented. The data storage device includes a storage control system to identify a power threshold for the data storage device. The data storage device determines power consumption characteristics for the data storage device and enters into a power controlled mode for the data storage device that adjusts at least a storage transaction queue depth in the data storage device to establish the power consumption characteristics as below the power threshold for the data storage device. | 03-24-2016 |
20160085289 | PERFORMANCE-AWARE POWER CAPPING CONTROL OF DATA STORAGE DEVICES - Systems, methods, and firmware for power control of data storage devices are provided herein. In one example, a data storage device is presented. The data storage device includes a storage control system to identify a power threshold for the data storage device. The data storage device determines power consumption characteristics for the data storage device and enters into a power controlled mode for the data storage device that adjusts at least a storage transaction queue depth in the data storage device to establish the power consumption characteristics as below the power threshold for the data storage device. | 03-24-2016 |
20160085290 | APPARATUS AND METHODS TO CONTROL POWER ON PCIe DIRECT ATTACHED NONVOLATILE MEMORY STORAGE SUBSYSTEMS - Techniques for controlling power on a PCIe direct attached non-volatile memory storage system are disclosed. In one particular embodiment, the techniques may be realized as a method for controlling power including providing power to a memory attached via the PCIe interface; monitoring a state of the attached memory; determining whether a new operation to be implemented on the attached memory would cause the power provided to the memory to exceed a preset threshold; and stalling execution of the new operation on the attached memory when it is determined that the new operation would exceed the preset threshold while continuing execution of preexisting operations on the attached memory. | 03-24-2016 |
20160085291 | POWER MANAGEMENT IN A STORAGE COMPUTE DEVICE - Computations are performed on data objects via two or more data storage sections. The data storage sections facilitate persistently storing the data objects in parallel read/write operations. The data objects are used in computations within a storage compute device. At least one of the storage sections is deactivated during the computations to reduce power usage of the storage compute device. | 03-24-2016 |
20160085292 | ELECTRONIC DEVICE - According to an embodiment, an electronic device includes functional modules and converters. A processor includes a memory storing state information on the state of the processor. Each converter converts the power-supply voltage to a rated voltage for functional modules, and supplies the rated voltage to at least one functional module. When the processor switches to the standby state, a controller stops the supply of the rated voltages to the functional modules except a state holding unit, a receiving unit, and the controller; and stops the operations of the converters not connected to the state holding unit, the receiving unit, and the controller. The state holding unit holds the state information before the processor switches to the standby state. The receiving unit receives a return signal representing the trigger for returning from the standby state. The state holding unit, the receiving unit, and the controller are connected to the same converter. | 03-24-2016 |
20160085293 | Configuring Power Management Functionality In A Processor - In one embodiment, a multicore processor includes cores that can independently execute instructions, each at an independent voltage and frequency. The processor may include a power controller having logic to provide for configurability of power management features of the processor. One such feature enables at least one core to operate at an independent performance state based on a state of a single power domain indicator present in a control register. Other embodiments are described and claimed. | 03-24-2016 |
20160091944 | HW-CONTROLLED POWER DOMAINS WITH AUTOMATIC POWER-ON REQUEST - Systems and methods related to hardware controlled power domains in a hardware system (e.g., an integrated circuit) are disclosed. In one embodiment, fully automatic power on and power off of the power domains in the hardware system is provided without software involvement. In this manner, power up and power down times for the power domains are substantially reduced or minimized, which in turn enables shorter active times for the power domains and thus reduced power consumption (e.g., reduced leakage when hardware in the power domains is idle). | 03-31-2016 |
20160091949 | PERFORMANCE MANAGEMENT FOR A MULTIPLE-CPU PLATFORM - A multiple-CPU (e.g., multi-core) computing device includes P-state management technologies that allow the computing device to update P-state data of all of the individual CPUs using a single periodic task running on one of the CPUs. | 03-31-2016 |
20160091950 | PEAK CURRENT MANAGEMENT - This application relates to methods, apparatus, and systems for throttling a subsystem of a computing device, when a current demanded by the subsystem exceeds a threshold value, in order to protect a power supply providing the current to the subsystem. By reducing the current demanded by the subsystem, the subsystem can be powered by a power supply having a smaller dynamic current range than the subsystem, thereby removing the need to provide a larger power supply for the subsystem. The demand current is measured before the current provided by the power supply significantly increases and a transient current source providing current to the subsystem is depleted. In this way, the subsystem can be throttled before the power supply is aware of an increase in the current demand. | 03-31-2016 |
20160091951 | Systems and Methods for Power Reduced Data Decoder Scheduling - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for scheduling in a data decoder. | 03-31-2016 |
20160091959 | EFFICIENT POWER MANAGEMENT OF UART INTERFACE - Methods and apparatus relating to efficient and/or robust link power management of a UART (Universal Asynchronous Receiver/Transmitter) interface are described. In an embodiment, logic causes a link to enter into a low power consumption state in response to a message exchange over data lines of a UART (Universal Asynchronous Receiver/Transmitter) interface. The message exchange over the data lines of the UART interface is followed by a modification to one or more flow control signals coupled to the UART interface. Other embodiments are also disclosed. | 03-31-2016 |
20160091960 | CONTROL SYSTEMS FOR REDUCING CURRENT TRANSIENTS - A method, apparatus, and system for reducing current transients of a power supply are disclosed. Specifically, the embodiments discussed herein include a control system configured to throttle a processor of a computing device when the current demanded by the processor from the power supply exceeds a reference current value. Throttling can include reducing or limiting the performance state that the processor can be operable in. Additionally, the control system can be operated according to multiple time domains, allowing the sampling of an input current to be performed at a higher rate than a rate at which analysis on the sampled input current is performed. The processor can remain throttled depending on a delayed release filter, which determines when a processor can return to a performance state that was previously removed. | 03-31-2016 |
20160091962 | METHOD OF DYNAMICALLY SCALING A POWER LEVEL OF A MICROPROCESSOR - A power management device includes a workload rate detector configured to adjust a length of a duration period; a power management unit configured to calculate a period workload rate in the duration period; and a voltage-clock provider configured to adjust a power level, based on the period workload rate and/or based on an external command. | 03-31-2016 |
20160098073 | CLOCK-FREE DUAL-DATA-RATE LINK WITH BUILT-IN FLOW CONTROL - A dual-data-rate interface is provided that includes a transmitter driving a transmit pin coupled to a receive pin of a receiver. The receiver drives its receive pin with cycles of a fetch clock. The transmitter responds to each edge of the fetch clock by transmitting a bit over the transmit pin to the receiver. | 04-07-2016 |
20160098074 | SERVER SYSTEM AND CONTROL METHOD THEREOF - A server system and a control method thereof are provided. The server system includes a first computing module, a power distribution board (PDB) module, a first storage apparatus, and a second storage apparatus. The PDB module is connected to the first computing module and is configured to distribute the power of the server system. The first storage apparatus and the second storage apparatus are connected to the PDB module. After finishing a boot operation, the first computing module determines whether a second computing module connected to the PDB module is present, such that the first computing module controls the PDB module to select and distribute the first storage apparatus and the second storage apparatus to the first computing module and the second computing module. Therefore, the server system can achieve different data access applications in the server system by only using a general-purpose PDB module. | 04-07-2016 |
20160109925 | AN APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM - A system on a chip (SoC) is provided including processing cores and a root complex. The transaction requests are communicated between a root port of the root complex and a device, the root port including electrical idle (EI) exit detect circuitry and a reference clock source. The root port supports a first link state, in which the reference clock source and EI exit detect circuitry of the root port are disabled but a common mode voltage is maintained, and a second link state, in which the reference clock source and EI exit detect circuitry are disabled and the common mode voltage is not maintained. The root port transitions to the first link state based on a service latency requirement of the device being less than a threshold and to the second link state based on the service latency requirement being greater than or equal to the threshold. | 04-21-2016 |
20160109926 | MODIFIED WRITE PROCESS BASED ON A POWER CHARACTERISTIC FOR A DATA STORAGE DEVICE - A data storage device includes a memory die. The memory die includes a resistive memory. A method includes determining a power characteristic associated with performing a write process to write data to the resistive memory. The method further includes initiating a modified write process in response to detecting that the power characteristic satisfies a threshold. | 04-21-2016 |
20160109927 | COMPUTER-READABLE RECORDING MEDIUM AND MOBILE TERMINAL DEVICE - A mobile terminal device receives a request for a sensing operation from an application program, specifies candidate processors that are to perform condition determination to determine whether an event output from a sensor performing the sensing operation of the received request satisfies conditions for notification, the conditions being designated by the application program, calculates an evaluation value of electricity consumed by each of the candidate processors in the condition determination, using frequency of the event of the sensing operation of the received request in frequency data, the frequency data linking an event output from a sensor to frequency of generation of the event, and selects a candidate processor having an optimal evaluation value. | 04-21-2016 |
20160109930 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - A bus system includes a bus module which performs data transfer between a master module and a slave module and a detection module which detects transfer of transmission data from the master module to the bus module. When the bus module is shifted to a power saving mode and then is returned from the power saving mode, a power control module delays release of the power saving mode until a plurality of data transfer requests is detected. Accordingly, a power saving effect can be improved in the bus system. | 04-21-2016 |
20160116959 | DEVICE POWER MANAGEMENT STATE TRANSITION LATENCY ADVERTISEMENT FOR FASTER BOOT TIME - Methods and apparatus relating to device power management state transition latency advertisement for faster boot time are described. In some embodiments, a storage unit stores a value corresponding to a requisite transition delay period for a first agent to exit from a low power consumption state. The first agent writes the value to the storage unit and a second agent waits for the requisite transition delay period (after the first agent initiates its exit from the low power consumption state) before the second agent attempts to communicate with the first agent via a link. Other embodiments are also disclosed and claimed. | 04-28-2016 |
20160116961 | Server Information Handling System Indicator Light Management - Server information handling system LED indication lights and other illumination devices are selectively illuminated based upon override configuration settings pushed down from a data center administrative tool. A chassis management controller that manages a blade or rack with plural server information handling systems overrides indication light illumination at blade or rack components, such as power supply and I/O modules. Power saved by reducing indication light illumination is allocated to support operation of one or more server information handling systems. | 04-28-2016 |
20160116963 | DYNAMIC CORE SELECTION FOR HETEROGENEOUS MULTI-CORE SYSTEMS - Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a second processing core may be signaled. A first performance metric of the first processing core executing the program code may be collected. When the first performance metric is better than a previously determined core performance metric, power down of the second processing core may be signaled and execution of the program code may be continued on the first processing core. When the first performance metric is not better than the previously determined core performance metric, execution of the program code may be switched from the first processing core to the second processing core. | 04-28-2016 |
20160116964 | DYNAMIC CORE SELECTION FOR HETEROGENEOUS MULTI-CORE SYSTEMS - Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a second processing core may be signaled. A first performance metric of the first processing core executing the program code may be collected. When the first performance metric is better than a previously determined core performance metric, power down of the second processing core may be signaled and execution of the program code may be continued on the first processing core. When the first performance metric is not better than the previously determined core performance metric, execution of the program code may be switched from the first processing core to the second processing core. | 04-28-2016 |
20160116965 | DYNAMIC CORE SELECTION FOR HETEROGENEOUS MULTI-CORE SYSTEMS - Dynamically switching cores on a heterogeneous multi-core processing system may be performed by executing program code on a first processing core. Power up of a second processing core may be signaled. A first performance metric of the first processing core executing the program code may be collected. When the first performance metric is better than a previously determined core performance metric, power down of the second processing core may be signaled and execution of the program code may be continued on the first processing core. When the first performance metric is not better than the previously determined core performance metric, execution of the program code may be switched from the first processing core to the second processing core. | 04-28-2016 |
20160116968 | Method and System for Throttling Power Consumption - Systems, methods, and/or devices are used to manage a storage system. In one aspect, the method includes receiving, from a host to which a storage device of the storage system is operatively coupled, a request to perform a first memory operation on one or more memory devices of the storage device. The method includes determining a count of credits corresponding to the first memory operation. If a current count of credits in the first credit pool is greater than or equal to the count of credits corresponding to the first memory operation and a current count of credits in the second credit pool is greater than or equal to the count of credits corresponding to the first memory operation, the method includes: performing the first memory operation; and decrementing the first and second credit pools according to the count of credits corresponding to the first memory operation. | 04-28-2016 |
20160116975 | SERVER SYSTEM, CONTROL METHOD THEREFOR, AND CONTROL PROGRAM - This invention provides a server system in which a plurality of servers are divided into a plurality of groups in accordance with a physical arrangement. The server system includes at least one system power provider that distributes and provides system power to each of the plurality of groups, a battery that corresponds to each of the plurality of groups and provides stored power to at least two servers included in the group, and a controller that controls each of the servers included in one group based on power providable by the system power provider and the battery. | 04-28-2016 |
20160124476 | THERMAL MITIGATION OF MULTI-CORE PROCESSOR - A method, an apparatus, and a computer program product are provided. The apparatus may be a UE. The UE has a processor including a plurality of cores. The plurality of cores includes a first core and remaining cores. The UE determines a temperature of the first core of the plurality of cores. The first core processes a load. The UE determines that the temperature of the first core is greater than a first threshold. The UE determines that the temperature of the first core is not greater than a second threshold. The second threshold is greater than the first threshold. The UE transfers at least a portion of the load of the first core to a second core of the remaining cores in response to determining that the temperature of the first core is greater than the first threshold. | 05-05-2016 |
20160124482 | MANAGEMENT APPARATUS AND POWER MANAGEMENT METHOD - A power management apparatus and a power management method are provided. The method includes the following steps. Conduct a first current path during a first period. Provide a first voltage to an operation end when the first current path conducts and a microprocessor is disabled. The first voltage is used to selectively conduct a second path during the first period. Provide a second voltage to the microprocessor when the second current path conducts. The second voltage is used to turn on the microprocessor. Provide a third voltage to the operation end by the microprocessor when the microprocessor is turned on. The third voltage is used to keep the second current path conducted. | 05-05-2016 |
20160124485 | COMPUTER SYSTEM HAVING AN ABSENCE MODE - A computer system includes a system component, at least one non-volatile mass memory, and at least one power supply unit that supplies power. The computer system has at least one system software component having an interface that selects energy-saving functions, which interface provides at least one function that operates the computer system in an absence mode in which at least one first application running on the computer system can be addressed via a network connection. At least one software component is executed by an operating system during operation of the computer system, which software component stops at least one second application when absence of a user is detected and calls the function that operates the computer system in the absence mode via the interface. | 05-05-2016 |
20160124486 | DISTRIBUTED POWER BUDGETING - A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget. | 05-05-2016 |
20160124494 | SERVER - A server includes a control module, a power-supply unit, a storage unit and a switch unit. The control module is electrically connected to a storage device. When the server is powered on, a first power is transmitted to from the power-supply unit to the storage unit and the switch unit, and received by the switch unit to generate a third power. When the server is powered off, the storage unit is triggered to transmit a second power to the switch to make the switch transmit the third power. The control module is provided to control a transmission information between the storage device and a buffer of the control module. When the server is powered on again, the control module continually works according to the transmission information stored in the buffer. | 05-05-2016 |
20160132084 | CIRCUITS AND METHODS PROVIDING SUPPLY VOLTAGE CONTROL BASED ON TRANSIENT LOAD PREDICTION - An apparatus and method are disclosed for providing voltage control at a load of a buck converter. The buck converter is in a feedback loop so that a reference voltage determines a pulse width modulated (PWM) signal that is fed to the buck converter, and an output voltage of the buck converter is fed back to a PWM control circuit to maintain a value of the output voltage. The load at the buck converter provides event counters to a transient load current prediction circuit, which uses a curve fitting algorithm or other adaptive control algorithm to predict a change in current at the load. The transient load current prediction circuit then manipulates the reference voltage in accordance with the predicted change in current at the load. | 05-12-2016 |
20160132090 | CLUSTER SYSTEM, CONTROLLER, METHOD FOR CONTROLLING, AND COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN CONTROLLING PROGRAM - The cluster system including a generator that generates reference information in which an estimated consumption power and an estimated performance of a cluster including two or more candidate nodes among the plurality of nodes when the candidate nodes are assumed to be operated at respective load setting values are associated with each other for each of a plurality of combinations of the respective load setting values of the candidate nodes; a load setting value selector that selects a combination of the respective load setting values of the candidate nodes, the combination leading to the estimated performance satisfying a required performance for the cluster and having the lowest consumption power, by referring to the reference information; and an operation controller that operates the candidate nodes at the selected combination of the load setting values. This configuration satisfies the required performance and also reduce the consumption power. | 05-12-2016 |
20160132093 | METHOD AND APPARATUS FOR CONTROLLING AN OPERATING MODE OF A PROCESSING MODULE - A method of controlling an operating mode of at least one processing module. The method comprises receiving an indication of the execution of at least one background task by the at least one processing module, aggregating an execution duration for the at least one background task on the at least one processing module, and configuring a lower power mode for the at least one processing module when the at least one background task is allocated to the at least one processing module for execution thereon if the aggregated execution duration for the at least one background task exceeds a threshold duration within an evaluation period. | 05-12-2016 |
20160139645 | COMPUTING SYSTEM AND POWER-ON METHOD AND UPDATING METHOD - In the power-on method with the computing system, when a first logic unit of a logic module is powered normally, the logic module is provided to transmit an available power-control-signal to a power conversion unit to make the power conversion unit transmit a working power to a second logic unit of the logic module. In the updating method with the computing system, a processing module is provided to receive an updating instruction to update the logic module. When the logic module is fail to be updated, the logic module transmit an invalid power-control-signal to the power conversion unit to make the power conversion unit transmit stop generating the working power, and then the logic module is updated by the processing module with a firmware update information stored in a storage. After updating by the processing module, the second logic unit of the logic module receives the working power again. | 05-19-2016 |
20160139646 | INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING SYSTEM - An information processing apparatus includes a request unit configured to request information processing to an image processing apparatus via a network; a return unit configured to cause a request processing apparatus to return to a first operation mode from a second operation mode, wherein the request processing apparatus supplements a function when the image processing apparatus executes the information processing, and the request processing apparatus operates in the first operation mode and in the second operation mode in which power consumption is lower than that of the first operation mode; and a determining unit configured to determine whether the requested information processing is a predetermined type. When it is determined that the information processing is the predetermined type, the request processing apparatus is caused to return to the first operation mode from the second operation mode, before the information processing is requested to the request processing apparatus. | 05-19-2016 |
20160139647 | APPARATUS AND METHOD FOR AUTOMATICALLY CONTROLLING POWER SAVING FUNCTION OF COMPUTER AND MONITOR - An apparatus and method for automatically controlling the power saving function of a computer and a monitor are disclosed herein. The apparatus for automatically controlling the power saving function of a computer and a monitor includes a distance calculation unit, an entry or exit determination unit, and a power saving control unit. The distance calculation unit calculates the distances between two or more beacon devices and a terminal of a user. The entry or exit determination unit determines the entry or exit state of the user by checking a change in a first distance between the terminal and a gate beacon device. The power saving control unit controls the power saving function of the computer and monitor of the user by considering one or more of the entry or exit state and a second distance between the terminal and a user beacon device closest to the computer of the user. | 05-19-2016 |
20160139648 | INTERFACE SUPPLY CIRCUIT - An interface supply circuit includes an interface, a control circuit coupled to the interface, a power supply coupled to the control circuit, a control chip coupled to the power supply, and a detection chip coupled to the control chip and the interface. The power supply supplies power to the interface. The interface is configured to receive a wireless card. The detection chip is configured to detect a working state of a computer and detect whether the wireless card is inserted into the interface. The detection chip sends a stop signal to the control chip upon detecting that the computer is shutdown and that no wireless card is inserted into the interface. The control chip sends a disconnect signal to the control circuit upon receiving the stop signal. The control circuit disconnects the power supply and the interface upon receiving the disconnect signal. | 05-19-2016 |
20160139649 | PERFORMANCE-ADJUSTABLE MEMORY MODULE - A performance-adjustable memory module configured for power consumption optimization is provided. In a typical approach, the memory module (e.g., a DRAM-type memory module) comprises a set of memory segments coupled to a set of power supplies. A controller (e.g., an external controller) will supply control information via a set of control registers that is used to vary levels of power provided by the set of power supplies to the set of memory segments. The varying levels of power allow for the performance levels of the set of memory segment to be varied, and thus provide a more optimized memory system. | 05-19-2016 |
20160147276 | RACK SERVER SYSTEM AND POWER MANAGEMENT METHOD THEREOF - A rack server system and power management method is provided for automatically controlling work state of power supplies. The rack server system includes a plurality of servers, at least one rack management controller, and a power supply module. Each of the servers includes a baseboard management controller, which is configured to monitor a server information of the servers and transmits the server information to the rack management controller. The rack management controller calculates the server information to produce a sever work number so as to transmits a control signal including the sever work number to the power supply module. The power supply units are turned on by the power supply module as receiving the control signal. | 05-26-2016 |
20160147280 | CONTROLLING AVERAGE POWER LIMITS OF A PROCESSOR - In one embodiment, a processor includes at least one core to execute instructions, one or more thermal sensors associated with the at least one core, and a power controller coupled to the at least one core. The power controller has a control logic to receive temperature information regarding the processor and dynamically determine a maximum allowable average power limit based at least in part on the temperature information. The control logic may further maintain a static maximum base operating frequency of the processor regardless of a value of the temperature information. Other embodiments are described and claimed. | 05-26-2016 |
20160147281 | MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES - In an integrated circuit device that outputs data values during respective transmit intervals defined by transitions of a transmit clock, the phase of the transmit clock is shifted by half a transmit interval to enable a timing calibration operation. Thereafter, a sequence of data values is transmitted to another integrated circuit device in response to the phase-shifted transmit clock and a samples of the sequence of data values are received from the other integrated circuit device. The received samples are compared with the sequence of data values to determine a phase update value, including comparing at least one received sample with two adjacent data values within the sequence of data values, and the phase of the transmit clock is incrementally advanced or retarded according to the phase update value. | 05-26-2016 |
20160147284 | METHOD AND APPARATUS FOR CONTROLLING DISPLAY OF ELECTRONIC DEVICE - The present invention relates to a method and an apparatus for controlling a display of an electronic device. The method for controlling the display of the electronic device according to the present invention may comprise the steps of: identifying a power state of the electronic device and a power-rating of at least one application; determining an application power state of the at least one application on the basis of a result of the identification; and controlling a display of the electronic device according to the determined application power state. | 05-26-2016 |
20160147291 | Apparatus and Method for Thermal Management In A Multi-Chip Package - In an embodiment, a processor includes a first chip of a multi-chip package (MCP). The first chip includes at least one core and first chip temperature control (TC) logic to assert a first power adjustment signal at a second chip of the MCP responsive to an indication that a first chip temperature of the first chip exceeds a first threshold. The processor also includes a conduit that includes a bi-directional pin to couple the first chip to the second chip within the MCP. The conduit is to transport the first power adjustment signal from the first chip to the second chip and the first power adjustment signal is to cause an adjustment of a second chip power consumption of the second chip. Other embodiments are described and claimed. | 05-26-2016 |
20160154455 | SELECTING METHOD, COMPUTER PRODUCT, SELECTING APPARATUS, AND RECORDING MEDIUM | 06-02-2016 |
20160162003 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An information processing apparatus includes transmitting/receiving sections, response processing sections, a determining section, and a controller. The transmitting/receiving sections transmit and receive data. The response processing sections correspond to the transmitting/receiving sections in a one-to-one relationship. A state of each response processing section is switchable between a first state and second state. The determining section determines priorities of state transition processes for the response processing sections. In a case where a second response processing section starts a state transition process while a first response processing section is performing a state transition process and in a case where the second response processing section is given a higher priority than the first response processing section, the controller controls the response processing sections to suspend the state transition process for the first response processing section and to start the state transition process for the second response processing section. | 06-09-2016 |
20160162004 | TECHNOLOGIES FOR OUT-OF-BAND POWER-BASED TASK SCHEDULING FOR DATA CENTERS - Technologies for data center power management include a number of computing nodes in communication over a network. Each computing node establishes a firmware environment that monitors power consumption of the computing node and if the power consumption exceeds an optimal level broadcasts a request to offload tasks to the other nodes. The firmware environment of a receiving computing node traps the request and determines power requirements and/or compute requirements for the tasks based on the request. The firmware environment determines whether to accept the offloaded task based on the requirements and available resources of the computing node. If accepted, the requesting computing node offloads one or more tasks to the receiving nodes. The firmware environment may be established by a manageability engine of the computing node. Power consumption may be monitored on a per-component basis. Compute requirements may include processor requirements or other requirements. Other embodiments are described and claimed. | 06-09-2016 |
20160162006 | User Scheduled Portable Device Power Management - An information handling system includes a processor, a battery management unit and a memory that stores an operating system. The operating system includes instructions that are executable by the processor to obtain a first user selection of necessary applications to be executed on a portable device and to obtain a second user selection of optional applications to be executed on a portable device. | 06-09-2016 |
20160162009 | INTRODUCING SELECTIVE ENERGY EFFICIENCY IN A VIRTUAL ENVIRONMENT - A system and method for energy conservation in a virtual universe, the method comprising: determining, at a server, available energy conservation options associated with an avatar of the virtual universe; determining, at the server, selected energy conservation options of the available energy conservation options; and applying, at the server, the selected energy conservation options to portions of the virtual universe associated with the avatar. | 06-09-2016 |
20160170464 | SYSTEM AND METHOD OF POWER CONTROL FOR EMBEDDED SYSTEMS WITHOUT ADVANCED CONFIGURATION AND POWER INTERFACE (ACPI) | 06-16-2016 |
20160170465 | POWER SIGNAL INTERFACE | 06-16-2016 |
20160170469 | POWER BALANCING TO INCREASE WORKLOAD DENSITY AND IMPROVE ENERGY EFFICIENCY | 06-16-2016 |
20160170478 | Configuring Power Management Functionality In A Processor | 06-16-2016 |
20160179160 | DESIGN STRUCTURE FOR REDUCING POWER CONSUMPTION FOR MEMORY DEVICE | 06-23-2016 |
20160179161 | DECODE INFORMATION LIBRARY | 06-23-2016 |
20160179162 | HOLISTIC GLOBAL PERFORMANCE AND POWER MANAGEMENT | 06-23-2016 |
20160179163 | SYSTEMS AND METHODS FOR CORE DROOP MITIGATION BASED ON LICENSE STATE | 06-23-2016 |
20160179169 | Dynamic Voltage and Frequency Management based on Active Processors | 06-23-2016 |
20160179172 | POWER CONTROL SYSTEM, POWER CONTROL METHOD, AND INFORMATION PROCESSING DEVICE | 06-23-2016 |
20160179173 | SYSTEMS AND METHODS FOR DYNAMIC SPATIAL POWER STEERING | 06-23-2016 |
20160179177 | POWER STATE TRANSITIONING PROCEDURE FOR A MULTI-CORE PROCESSOR | 06-23-2016 |
20160179183 | Power State Adjustment | 06-23-2016 |
20160179184 | SYSTEM AND METHOD FOR PERFORMING DISTRIBUTED POWER MANAGEMENT WITHOUT POWER CYCLING HOSTS | 06-23-2016 |
20160179185 | EVENT-DRIVEN REOPTIMIZATION OF LOGICALLY-PARTITIONED ENVIRONMENT FOR POWER MANAGEMENT | 06-23-2016 |
20160179583 | EVENT-DRIVEN REOPTIMIZATION OF LOGICALLY-PARTITIONED ENVIRONMENT FOR POWER MANAGEMENT | 06-23-2016 |
20160187956 | ENHANCED SECURITY AND RESOURCE UTILIZATION IN A MULTI-OPERATING SYSTEM ENVIRONMENT - An approach is provided for operating a mobile device having first and second operating systems (OSs) installed. While the mobile device is executing the first OS but not the second OS, (1) based in part on battery power remaining in the mobile device being less than a threshold and a lower power consumption of the mobile device if executing the second OS but not the first OS, execution of the first OS is terminated and the second OS is executed in the mobile device; and/or (2) based in part on (a) the mobile device being currently located in the first geographic region which has a greater likelihood of attack on the mobile device, and (b) the mobile device being more secure while operating the second OS but not the first OS, execution of the first OS is terminated and the second OS is executed in the mobile device. | 06-30-2016 |
20160189706 | ISOLATED WORD TRAINING AND DETECTION - Methods, systems, and apparatuses are described for isolated word training and detection. Isolated word training devices and systems are provided in which a user may provide a wake-up phrase from 1 to 3 times to train the device or system. A concatenated phoneme model of the user-provided wake-up phrase may be generated based on the provided wake-up phrase and a pre-trained phoneme model database. A word model of the wake-up phrase may be subsequently generated from the concatenated phoneme model and the provided wake-up phrase. Once trained, the user-provided wake-up phrase may be used to unlock the device or system and/or to wake up the device or system from a standby mode of operation. The word model of the user-provided wake-up phrase may be further adapted based on additional provisioning of the wake-up phrase. | 06-30-2016 |
20160252945 | CONCURRENT NETWORK APPLICATION SCHEDULING FOR REDUCED POWER CONSUMPTION | 09-01-2016 |
20160252946 | METHODS OF ACHIEVING COGNIZANT POWER MANAGEMENT | 09-01-2016 |
20160252947 | PROCESSOR MANAGEMENT VIA THREAD STATUS | 09-01-2016 |
20160378149 | THERMAL THROTTLING OF ELECTRONIC DEVICES - Disclosed herein is a computing device configured to implement thermal throttling of a component of the computing device. The computing device includes an electronic component and a temperature sensor thermally coupled to the electronic component. The computing device also includes a thermal management controller to receive a temperature measurement from the temperature sensor and generate a throttling factor for the electronic component. If the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least the performance guarantee for the electronic component. | 12-29-2016 |
20160378161 | CLUSTERING EXECUTION IN A PROCESSING SYSTEM TO INCREASE POWER SAVINGS - Embodiments relate to clustering execution in a processing system. An aspect includes accessing a control flow graph that defines a data dependency and an execution sequence of a plurality of tasks of an application that executes on a plurality of system components. The execution sequence of the tasks in the control flow graph is modified as a clustered control flow graph that clusters active and idle phases of a system component while maintaining the data dependency. The clustered control flow graph is sent to an operating system, where the operating system utilizes the clustered control flow graph for scheduling the tasks. | 12-29-2016 |
20160378163 | CLUSTERING EXECUTION IN A PROCESSING SYSTEM TO INCREASE POWER SAVINGS - Embodiments relate to clustering execution in a processing system. An aspect includes accessing a control flow graph that defines a data dependency and an execution sequence of a plurality of tasks of an application that executes on a plurality of system components. The execution sequence of the tasks in the control flow graph is modified as a clustered control flow graph that clusters active and idle phases of a system component while maintaining the data dependency. The clustered control flow graph is sent to an operating system, where the operating system utilizes the clustered control flow graph for scheduling the tasks. | 12-29-2016 |
20160378165 | APPARATUS AND METHOD FOR POWER MANAGEMENT TO MITIGATE DECLINING BATTERY CAPACITY - A method and apparatus reduce power consumption and mitigate declining battery life. In some embodiments, an initial full charge capacity, C(O), of a rechargeable battery is determined. A full charge capacity, C(t), of the rechargeable battery is determined at time t. An average power consumption profile is determined. A reduced power consumption is implemented based on the average power consumption profile and a factor C(t)/C(O). In other embodiments, functions that are not used in an average power consumption profile are deactivated. Other functions that occur in certain use cases of the average power consumption profile are activated and deactivated as needed. | 12-29-2016 |
20160378172 | POWER MANAGEMENT CIRCUIT WITH PER ACTIVITY WEIGHTING AND MULTIPLE THROTTLE DOWN THRESHOLDS - A method is described. The method includes receiving an indication of an activity of load circuitry of a power supply. The method includes, in response to the indication, generating a first signal that describes the activity and a second signal that describes whether the event is initiating or completing. The method includes determining a weight amount from the first signal and adjusting a credit count by the weight amount up or down based on the second signal. The method includes comparing the credit count against a first threshold. The method includes calculating an average credit count that accounts for the credit count and previous credit counts and comparing the average credit count against a second threshold. The method includes adjusting an activity level of the load circuitry if either threshold is crossed. | 12-29-2016 |
20160378175 | POWER SUPPLY CIRCUIT FOR A COMPUTING SERVER - A power supply circuit comprises a power supply unit for powering components of the computing server, a power regulator connected to the power supply unit for regulating electric power supply to the components, and an activator connected to the power regulator for activating the power regulator. The power regulator is configured to initiate adjustment of an amount of electric power supplied from the power supply unit to the components after being activated by the activator. | 12-29-2016 |
20170235356 | ELECTRONIC DEVICE AND METHOD OF REDUCING POWER THEREOF | 08-17-2017 |
20180024602 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING THE SAME | 01-25-2018 |
20180024611 | ELECTRONIC DEVICE AND CONTENT DISPLAY METHOD THEREROF | 01-25-2018 |
20180024612 | METHODS AND APPARATUS FOR CONTROLLING POWER CONSUMPTION OF A COMPUTING UNIT THAT EMPLOYS A DISCRETE GRAPHICS PROCESSING UNIT | 01-25-2018 |
20190146569 | APPARATUS AND METHOD FOR PROACTIVE POWER MANAGEMENT | 05-16-2019 |
20220137692 | Systems and Methods for Coherent Power Management - In an embodiment, a system includes multiple power management mechanism operating in different time domains (e.g., with different bandwidths) and control circuitry that is configured to coordinate operation of the mechanisms. If one mechanism is adding energy to the system, for example, the control circuitry may inform another mechanism that the energy is coming so that the other mechanism may not take as drastic an action as it would if no energy were coming. If a light workload is detected by circuitry near the load, and there is plenty of energy in the system, the control circuitry may cause the power management unit (PMU) to generate less energy or even temporarily turn off. A variety of mechanisms for the coordinated, coherent use of power are described. | 05-05-2022 |