| Entries |
| Document | Title | Date |
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| 20080207006 | PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT - The present disclosure is directed to a process for plasma treating a film comprising titanium, nitrogen and impurities on a substrate. The process comprises forming a plasma of nitrogen gas and hydrogen gas, the flow ratio of hydrogen gas to nitrogen gas ranging from about 0.01 to about 0.7. The film is contacted with the plasma for a time sufficient to reduce the concentration of impurities in the film. | 08-28-2008 |
| 20080227302 | FIBROUS LAMINATE INTERFACE FOR SECURITY COATINGS - an integrated circuit (IC) package with a fibrous interface is provided. The package includes a substrate, a bond coat and a top coat. The substrate is configured to contain IC components and connections. The bond coat layer is configured to encapsulate the IC components. The top coat layer has at least a portion embedded in the bond coat layer. Moreover, the top coat layer includes a fibrous interface configured to provide security and strengthen the bond coat layer. | 09-18-2008 |
| 20080233762 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a high dielectric insulating layer. An amorphous high dielectric insulating layer having a high density is formed by using a precursor which can be deposited through the atomic layer deposition method at a temperature above 400° C. A resulting insulating exhibits a reduced crystallization during a subsequent annealing process. The capacitance equivalent thickness (CET) characteristic and the leakage current characteristic are improved. | 09-25-2008 |
| 20080242108 | Method for fabricating semiconductor device - A method for fabricating a semiconductor device is disclosed. The method includes providing a first chamber and a second chamber. The first chamber and the second chamber are connected by a pressure differential unit, for depositing a metallic film over a substrate in the first chamber, transferring the substrate to the second chamber via the pressure differential unit without exposing the substrate to the ambient environment, and depositing a silicon-containing film on the metallic film in the second chamber. | 10-02-2008 |
| 20080254641 | Manufacturing Method Of Semiconductor Device And Film Deposition System - A dielectric film ( | 10-16-2008 |
| 20080254642 | METHOD OF FABRICATING GATE DIELECTRIC LAYER - A method for fabricating gate dielectric layer is provided. First, a sacrificial layer is formed on a substrate. Next, fluorine ions are implanted into the substrate. Then, the sacrificial layer is then removed. Finally, a dielectric layer is formed on the substrate. | 10-16-2008 |
| 20080293254 | Single-wafer process for fabricating a nonvolatile charge trap memory device - A method for fabricating a nonvolatile charge trap memory device is described. The method includes first forming a tunnel dielectric layer on a substrate in a first process chamber of a single-wafer cluster tool. A charge-trapping layer is then formed on the tunnel dielectric layer in a second process chamber of the single-wafer cluster tool. A top dielectric layer is then formed on the charge-trapping layer in the second or in a third process chamber of the single-wafer cluster tool. | 11-27-2008 |
| 20080305645 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH | 12-11-2008 |
| 20080318437 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE UTILIZING LOW DIELECTRIC LAYER FILLING GAPS BETWEEN METAL LINES - A semiconductor device is manufactured by forming a low dielectric constant layer on a semiconductor substrate which is formed with metal lines; implementing primary ultraviolet treatment of the low dielectric constant layer; forming a capping layer on the low dielectric constant layer having undergone the primary ultraviolet treatment; and implementing secondary ultraviolet treatment of the low dielectric constant layer including the capping layer. | 12-25-2008 |
| 20090004881 | HYBRID HIGH-K GATE DIELECTRIC FILM - The present invention discloses a method of forming a gate dielectric film including: providing a channel region in a transistor, the channel region including multiple segments having different sizes, some of which belong to a first surface portion while others belong to a second surface portion wherein the first surface portion and the second surface portion are adjacent; forming a hybrid high-k gate dielectric film over the channel region including: forming a first dielectric material over the first surface portion, the first dielectric material having a sub-monolayer thickness; forming a second dielectric material over the second surface portion, the second dielectric material having a sub-monolayer thickness, and forming a third dielectric film over the first dielectric film and the second dielectric film wherein the third dielectric film is high-k. | 01-01-2009 |
| 20090004882 | Method of forming high-k dual dielectric stack - The present invention discloses a method including: providing a Group III-V component semiconductor material; forming a first layer over a surface of the Group III-V component semiconductor material, the first layer to unpin a Fermi level at the surface; forming a second layer over the first layer, the second layer for scaling an equivalent oxide thickness (EOT); and annealing the first layer before or after forming the second layer to remove bulk trap defects in the first layer. | 01-01-2009 |
| 20090011609 | RADICAL OXIDATION PROCESS FOR FABRICATING A NONVOLATILE CHARGE TRAP MEMORY DEVICE - A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process. | 01-08-2009 |
| 20090011610 | SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE TRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH K DIELECTRICS - A method of forming a CMOS structure, and the device produced therefrom, having improved threshold voltage and flatband voltage stability. The inventive method includes the steps of providing a semiconductor substrate having an nFET region and a pFET region; forming a dielectric stack atop the semiconductor substrate comprising an insulating interlayer atop a high k dielectric; removing the insulating interlayer from the nFET region without removing the insulating interlayer from the pFET region; and providing at least one gate stack in the pFET region and at least one gate stack in the nFET region. The insulating interlayer can be AlN or AlO | 01-08-2009 |
| 20090029562 | Film formation method and apparatus for semiconductor process - A film formation method for a semiconductor process includes placing a plurality of target objects at intervals in a vertical direction inside a process container of a film formation apparatus. Then, the method includes setting the process container to have a first vacuum state therein, and supplying a first film formation gas containing a hydrocarbon gas into the process container, thereby forming a carbon film by CVD on the target objects. Then, the method includes setting the process container to have a second vacuum state therein, while maintaining the process container to have a vacuum state therein from the first vacuum state, and supplying a second film formation gas containing an organic silicon source gas into the process container, thereby forming an Si-containing inorganic film by CVD on the carbon film. | 01-29-2009 |
| 20090035946 | IN SITU DEPOSITION OF DIFFERENT METAL-CONTAINING FILMS USING CYCLOPENTADIENYL METAL PRECURSORS - A method is disclosed depositing multiple layers of different materials in a sequential process within a deposition chamber. A substrate is provided in a deposition chamber. A plurality of cycles of a first atomic layer deposition (ALD) process is sequentially conducted to deposit a layer of a first material on the substrate in the deposition chamber. These first cycles include pulsing a cyclopentadienyl metal precursor. A plurality of cycles of a second ALD process is sequentially conducted to deposit a layer of a second material on the layer of the first material in the deposition chamber. The second material comprises a metal different from the metal in the cyclopentadienyl metal precursor. | 02-05-2009 |
| 20090047797 | METHOD FOR PRODUCING SHOCK AND TAMPER RESISTANT MICROELECTRONIC DEVICES - A method of producing a microelectronic device resistant to tampering, inspection and damage from surrounding environment or operating conditions includes: (i) applying an adhesion layer on a circuit including a die fixed and electrically connected to a laminate substrate; (ii) spraying, through a flame spray process, a tamper resistant coating over the applied adhesion layer; (iii) applying a first encapsulant for filling spaces and air pockets; (iv) removing air and gases from the first encapsulant; and (v) applying a second encapsulant around the first encapsulant for providing a moisture barrier | 02-19-2009 |
| 20090061644 | VAPOR BASED COMBINATORIAL PROCESSING - A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings. | 03-05-2009 |
| 20090061645 | SEMICONDUCTOR DEVICE INCLUDING FIELD EFFECT TRANSISTORS LATERALLY ENCLOSED BY INTERLAYER DIELECTRIC MATERIAL HAVING INCREASED INTRINSIC STRESS - By appropriately treating an interlayer dielectric material above P-channel transistors, the compressive stress may be significantly enhanced, which may be accomplished by expanding the interlayer dielectric material, for instance, by providing a certain amount of oxidizable species and performing an oxidation process. | 03-05-2009 |
| 20090061646 | VAPOR BASED COMBINATORIAL PROCESSING - A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings. | 03-05-2009 |
| 20090068849 | MULTI-REGION PROCESSING SYSTEM AND HEADS - The various embodiments of the invention provide for relative movement of the substrate and a process head to access the entire wafer in a minimal space to conduct combinatorial processing on various regions of the substrate. The heads enable site isolated processing within the chamber described and method of using the same are described. | 03-12-2009 |
| 20090104786 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes depositing a first film on a workpiece film so that a resist is formed on the first film, processing the first film with the resist serving as a mask, depositing a second film along the first film, processing the second film so that the second film is left only on a sidewall of the first film, depositing a third film on the substrate, exposing a sidewall of the second film, depositing a fourth film along the sidewall and an upper surface of the third film, removing the fourth film except for only its part on the sidewall of the second film, depositing a fifth film on the substrate, planarizing the second to fifth films so that the upper surfaces of the films are exposed, and processing the workpiece film while the second and fifth films serve as a mask. | 04-23-2009 |
| 20090111281 | FREQUENCY DOUBLING USING A PHOTO-RESIST TEMPLATE MASK - A method for doubling the frequency of a lithographic process using a photo-resist template mask is described. A device layer having a photo-resist layer formed thereon is first provided. The photo-resist layer is patterned to form a photo-resist template mask. A spacer-forming material layer is deposited over the photo-resist template mask. The spacer-forming material layer is etched to form a spacer mask and to expose the photo-resist template mask. The photo-resist template mask is then removed and an image of the spacer mask is finally transferred to the device layer. | 04-30-2009 |
| 20090124094 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE TO PREVENT DEFECTS DUE TO INSULATION LAYER VOLUME CHANGE - A semiconductor device is made by forming patterns on a semiconductor substrate. After forming the patterns, sequentially forming a spacer layer, an oxidation promotion layer and a buffer layer on the semiconductor substrate including the surfaces of the patterns previously formed. An insulation layer is then formed on the buffer layer to fill the patterns. The semiconductor substrate including the insulation layer is subsequently annealed such that the buffer layer is oxidized and the insulation layer is baked. | 05-14-2009 |
| 20090137130 | Method For Forming A Multiple Layer Passivation Film And A Device Incorporating The Same - A method of forming a multiple layer passivation film on a semiconductor device surface comprises placing a semiconductor device in a chemical vapor deposition reactor, introducing a nitrogen source into the reactor, introducing a carbon source into the reactor, depositing a layer of carbon nitrogen on the semiconductor device surface, introducing a silicon source into the reactor after the carbon source, and depositing a layer of silicon carbon nitrogen on the carbon nitrogen layer. A semiconductor device incorporating the multiple layer passivation film is also described. | 05-28-2009 |
| 20090149031 | Method of making a semiconductor device with residual amine group free multilayer interconnection - The present invention provides a semiconductor device that can restrict the dissolution hindering phenomenon in a chemically amplified resist film. More specifically, after the formation of a contact pattern on a semiconductor substrate, a wiring pattern is formed on the contact pattern. A SiC film, a first SiOC film, a SiC film, a second SiOC film, a USG film as a diffusion preventing film, and a silicon nitride film as a reflection preventing film, are formed on the wiring pattern. A dual damascene structure is then formed using the chemically amplified resist film and another chemically amplified resist film. In this manner, the N | 06-11-2009 |
| 20090215279 | ORGANIC/INORGANIC HYBRID THIN FILM PASSIVATION LAYER FOR BLOCKING MOISTURE/OXYGEN TRANSMISSION AND IMPROVING GAS BARRIER PROPERTY - The present invention relates to an organic/inorganic hybrid thin film passivation layer comprising an organic polymer passivation layer prepared by a UV/ozone curing process and an inorganic thin film passivation layer for blocking moisture and oxygen transmission of an organic electronic device fabricated on a substrate and improving gas barrier property of a plastic substrate; and a fabrication method thereof. Since the organic/inorganic hybrid thin film passivation layer of the present invention converts the surface polarity of an organic polymer passivation layer into hydrophilic by using the UV/ozone curing process, it can improve the adhesion strength between the passivation layer interfaces, increase the light transmission rate due to surface planarization of the organic polymer passivation layer, and enhance gas barrier property by effectively blocking moisture and oxygen transmission. | 08-27-2009 |
| 20090263975 | FILM FORMATION METHOD AND APPARATUS FOR FORMING SILICON-CONTAINING INSULATING FILM DOPED WITH METAL - A film formation method for a semiconductor process performs a film formation process to form a silicon-containing insulating film doped with a metal on a target substrate, in a process field inside a process container configured to be selectively supplied with a silicon source gas and a metal source gas. The method includes forming a first insulating thin layer by use of a chemical reaction of the silicon source gas, while maintaining a shut-off state of supply of the metal source gas; then, forming a first metal thin layer by use of a chemical reaction of the metal source gas, while maintaining a shut-off state of supply of the silicon source gas; and then, forming a second insulating thin layer by use of the chemical reaction of the silicon source gas, while maintaining a shut-off state of supply of the metal source gas. | 10-22-2009 |
| 20090263976 | APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Variation in the thickness of the deposited films depending on number of the processed product wafers in the deposition process employing a batch type CVD apparatus is inhibited to provide a manufacture of the film having a predetermined thickness with an improved reproducibility. The deposition apparatus | 10-22-2009 |
| 20090275211 | FABRICATION METHOD OF POROUS LOW-K DIELECTRIC FILM - A method for fabricating a porous low-k dielectric film includes providing a substrate, performing a first CVD process by providing a back-bone precursor to form an interface dielectric layer, performing a second CVD process by providing a porogen precursor to form a back-bone layer, and removing the porogen material in the back-bone layer so that the back-bone layer becomes an ultra low-k dielectric layer. The interface dielectric layer and the ultra low-k dielectric layer compose a porous low-k dielectric film. | 11-05-2009 |
| 20090305514 | METHOD OF MODIFYING INTERLAYER ADHESION - Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less. | 12-10-2009 |
| 20100035439 | FILM FORMING METHOD AND FILM FORMING APPARATUS - The invention includes inserting an object to be processed into a processing vessel, which can be maintained vacuum, and making the processing vessel vacuum; performing a sequence of forming a ZrO | 02-11-2010 |
| 20100075507 | Method of Fabricating a Gate Dielectric for High-K Metal Gate Devices - The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous radicals, nitrogen/hydrogen radicals, and sulfur/hydrogen radicals. | 03-25-2010 |
| 20100105214 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Passivation films including first and second layers (first passivation film) are formed on a GaAs substrate (semiconductor substrate). A SiN film (second passivation film) is formed on the passivation films as a top layer passivation film by catalytic chemical vapor deposition. The SiN film formed by catalytic chemical vapor deposition has a lower degree of hygroscopicity than that of a conventional SiN film formed by plasma chemical vapor deposition. | 04-29-2010 |
| 20100203741 | SEMICONDUCTOR MANUFACTURING SYSTEM - Disclosed is a technique for effectively suppressing the generation of particles resulting from peeling-off of unnecessary films that have unavoidably adhered to the inner surface of the reaction tube of an ALD film-forming apparatus. A precoating process utilizing ALD is performed to deposit a metal oxide film, e.g., an aluminum oxide film, onto the unnecessary films, in order to prevent peeling-off of the unnecessary films. The type and/or position of the nozzle for supplying ozone, as a precoat gas, into the reaction tube during the precoating process is different from that of the nozzle for supplying ozone, as a film-forming gas, into the reaction tube during forming of a film on a semiconductor substrate. | 08-12-2010 |
| 20100221923 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes: a structure comprising at least two heterogeneous layers having different stress levels; and a stress relief layer disposed between the two heterogeneous layers to relive a difference in the stress levels. The stress relief layer may include: a first layer formed over a first heterogeneous layer; a second layer formed over the first layer; and a third layer formed between the second layer and a second heterogeneous layer. | 09-02-2010 |
| 20110003481 | Method for manufacturing a semiconductor device - It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower. | 01-06-2011 |
| 20110003482 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING SYSTEM - Provided is a method of manufacturing a semiconductor device. In the method, an aluminium-containing insulation film is formed on an electrode film of a substrate by alternately repeating a process of supplying an aluminium precursor into a processing chamber in which the substrate is accommodated and exhausting the aluminium precursor from the processing chamber and a process of supplying an oxidizing or nitriding precursor into the processing chamber and exhausting the oxidizing or nitriding precursor from the processing chamber; and a high permittivity insulation film different from the aluminium-containing insulation film is formed on the aluminium-containing insulation film by alternately repeating a process of supplying a precursor into the processing chamber and exhausting the precursor from the processing chamber and a process of supplying an oxidizing precursor into the processing chamber and exhausting the oxidizing precursor from the processing chamber. In addition, heat treatment is performed on the substrate. | 01-06-2011 |
| 20110008970 | Methods of Forming Semiconductor Constructions - The invention includes methods of forming isolation regions for semiconductor constructions. A hard mask can be formed and patterned over a semiconductor substrate, with the patterned hard mask exposing a region of the substrate. Such exposed region can be etched to form a first opening having a first width. The first opening is narrowed with a conformal layer of carbon-containing material. The conformal layer is punched through to expose substrate along a bottom of the narrowed opening. The exposed substrate is removed to form a second opening which joins to the first opening, and which has a second width less than the first width. The carbon-containing material is then removed from within the first opening, and electrically insulative material is formed within the first and second openings The electrically insulative material can substantially fill the first opening, and leave a void within the second opening. | 01-13-2011 |
| 20110021036 | METHOD OF SEALING AN AIR GAP IN A LAYER OF A SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE - A method of sealing an air gap in a layer of a semiconductor structure comprises providing a first layer of the semiconductor structure having at least one air gap for providing isolation between at least two conductive lines formed in the first layer. The at least one air gap extends into the first layer from a first surface of the first layer. The method further comprises forming a barrier layer of a barrier dielectric material over the first surface of the first layer and the at least one air gap. The barrier dielectric material is selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals entering the at least one air gap. In another embodiment, the at least one air gap extends from a first surface of the first layer to at least a portion of side surfaces of the at least two conductive lines to expose at least a portion of the side surfaces, and a barrier layer of a barrier dielectric material is formed over the exposed portions of the side surfaces of each of the at least two conductive lines. | 01-27-2011 |
| 20110034036 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Provided is a method of manufacturing a semiconductor device. In the method, after a thin liner is formed on a substrate on which a lower interconnection is formed, a silicon source is supplied to form a silicide layer under the liner by a reaction between the silicon source and the lower interconnection, and the silicide layer is nitrided and an etch stop layer is formed. Therefore, the lower interconnection is prevented from making contact with the silicon source, variations of the surface resistance of the lower interconnection can be prevented, and thus high-speed devices can be fabricated. | 02-10-2011 |
| 20110039419 | METHODS FOR FORMING DIELECTRIC LAYERS - Methods for forming a dielectric layer on a substrate are provided herein. In some embodiments a method for forming a dielectric layer on a substrate may include exposing the substrate to a first source gas comprising a silicon (Si) precursor and an oxidizer for a first period of time to form a first layer comprising silicon and oxygen; and exposing the substrate to a second source gas comprising a metal precursor and the silicon precursor for a second period of time to form a second layer comprising silicon and a metal, where in the first layer and the second layer form the dielectric layer. | 02-17-2011 |
| 20110065285 | DIELECTRIC LAYER STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for fabricating a dielectric layer structure includes providing a substrate, blanketly forming a low-k dielectric layer of an interlayer dielectric (ILD) layer, the low-k dielectric layer covering at least a first metal interconnect structure on the substrate, blanketly forming a single tensile film of the ILD layer having a thickness of 200-1500 angstroms on the low-k dielectric layer, and performing a moisture preventing treatment on the single tensile film. The single tensile layer possesses a stress comparative to a stress of the low-k dielectric layer and a hydrophobic characteristic that prevents itself from absorbing moisture. | 03-17-2011 |
| 20110076856 | SEMICONDUCTOR DIE WITH PROTECTIVE LAYER AND RELATED METHOD OF PROCESSING A SEMICONDUCTOR WAFER - A semiconductor die and a related method of processing a semiconductor wafer are disclosed in which a first interlayer insulator having a recess region of varying configuration and defining a scribe line is associated with at least one protective layer formed with a characterizing inclined side surface. | 03-31-2011 |
| 20110092077 | METHOD TO MINIMIZE WET ETCH UNDERCUTS AND PROVIDE PORE SEALING OF EXTREME LOW K (K<2.5) DIELECTRICS - Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed form the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film. | 04-21-2011 |
| 20110111604 | PLASMA SURFACE TREATMENT TO PREVENT PATTERN COLLAPSE IN IMMERSION LITHOGRAPHY - The present invention comprises a method of reducing photoresist mask collapse when the photoresist mask is dried after immersion development. As feature sizes continue to shrink, the capillary force of water used to rinse a photoresist mask approaches the point of being greater than adhesion force of the photoresist to the ARC. When the capillary force exceeds the adhesion force, the features of the mask may collapse because the water pulls adjacent features together as the water dries. By depositing a hermetic oxide layer over the ARC before depositing the photoresist, the adhesion force may exceed the capillary force and the features of the photoresist mask may not collapse. | 05-12-2011 |
| 20110151676 | METHODS OF THIN FILM PROCESS - A method for forming a semiconductor structure includes forming a plurality of features across a surface of a substrate, with at least one space being between two adjacent features. A first dielectric layer is formed on the features and within the at least one space. A portion of the first dielectric layer interacts with a reactant derived from a first precursor and a second precursor to form a first solid product. The first solid product is decomposed to substantially remove the portion of the first dielectric layer. A second dielectric layer is formed to substantially fill the at least one space. | 06-23-2011 |
| 20110195580 | METHOD FOR FORMING LAMINATED STRUCTURE INCLUDING AMORPHOUS CARBON FILM - A method for forming a laminated structure including an amorphous carbon film on an underlying layer includes forming an initial layer containing Si—C bonds on a surface of the underlying layer, by supplying an organic silicon gas onto the underlying layer; and forming the amorphous carbon film by thermal film formation on the underlying layer with the initial layer formed on the surface thereof, by supplying a film formation gas containing a hydrocarbon compound gas onto the underlying layer. | 08-11-2011 |
| 20110195581 | STRUCTURE AND METHOD TO ENHANCE BOTH NFET AND PFET PERFORMANCE USING DIFFERENT KINDS OF STRESSED LAYERS - In producing complementary sets of metal-oxide-semiconductor (CMOS) field effect transistors, including nMOS and pMOS transistors), carrier mobility is enhanced or otherwise regulated through the use of layering various stressed films over either the nMOS or pMOS transistor (or both), depending on the properties of the layer and isolating stressed layers from each other and other structures with an additional layer in a selected location. Thus both types of transistors on a single chip or substrate can achieve an enhanced carrier mobility, thereby improving the performance of CMOS devices and integrated circuits. | 08-11-2011 |
| 20110230056 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING MULTILAYER DIELECTRIC LAYERS - Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device. | 09-22-2011 |
| 20110230057 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF PROCESSING SUBSTRATE, AND SUBSTRATE PROCESSING APPARATUS - An excellent type of a film is realized by modifying conventional types of films. A carbonitride film of a predetermined thickness is formed on a substrate by performing, a predetermined number of times, a cycle including the steps of: supplying a source gas into a process vessel accommodating the substrate under a condition where a CVD reaction is caused, and forming a first layer including an element on the substrate; supplying a carbon-containing gas into the process vessel to form a layer including carbon on the first layer, and forming a second layer including the element and the carbon; supplying the source gas into the process vessel under a condition where a CVD reaction is caused to additionally form a layer including the element on the second layer, and forming a third layer including the element and the carbon; and supplying a nitrogen-containing gas into the process vessel to nitride the third layer, and forming a carbonitride layer serving as a fourth layer including the element, the carbon, and nitrogen. | 09-22-2011 |
| 20110230058 | COMPOSITION FOR FORMING RESIST UNDERLAYER FILM WITH REDUCED OUTGASSING - There is provided underlayer films of high-energy radiation resists that are applied onto semiconductor substrates in a lithography process for producing semiconductor devices and that are used to prevent reflection, static electrification, and development defects and to suppress outgassing during the exposure of resist layers with high-energy radiation. A composition for forming an underlayer film of a high-energy radiation resist, the composition comprising a film component having an aromatic ring structure or a hetero ring structure. The film component having an aromatic ring structure or a hetero ring structure is contained preferably in a film at a proportion of 5 to 85% by mass. The film component may be a compound having an aromatic ring structure or a hetero ring structure, and the compound may be a polymer or a polymer precursor including a specific repeating unit. The aromatic ring may be a benzene ring or fused benzene ring, and the hetero ring structure may be triazinetrione ring. | 09-22-2011 |
| 20110237085 | METHODS OF MODIFYING INTERLAYER ADHESION - Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less. | 09-29-2011 |
| 20110244694 | DEPOSITING CONFORMAL BORON NITRIDE FILMS - A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower then silicon nitride. | 10-06-2011 |
| 20110256731 | METHOD FOR FABRICATING A GATE DIELECTRIC LAYER - A method for fabricating the gate dielectric layer comprises forming a high-k dielectric layer over a substrate; forming an oxygen-containing layer on the high-k dielectric layer by an atomic layer deposition process; and performing an inert plasma treatment on the oxygen-containing layer. | 10-20-2011 |
| 20110263134 | PREVENTION OF OXIDATION OF SUBSTRATE SURFACES IN PROCESS CHAMBERS - In some embodiments, a reducing gas ambient containing a reducing agent is established in a batch process chamber before substrates are subjected to a deposition. The reducing atmosphere is established before and/or during loading of the substrates into the process chamber, and can include flowing reducing gas into the process chamber while the chamber is open. The reducing gas can be a mixture of a reducing agent and an inert gas, with the reducing agent being a minority component of the reducing gas. Using the reducing gas ambient, oxidation of substrate surfaces is reduced. | 10-27-2011 |
| 20110294304 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device comprising a first insulating film formed on a semiconductor substrate, a charge storage layer formed on the first insulating film, a second insulating film formed on the charge storage layer, and a control electrode formed on the second insulating film, forming the second insulating film comprises forming a lower insulating film containing oxygen and a metal element, thermally treating the lower insulating film in an atmosphere containing oxidizing gas, and forming an upper insulating film on the thermally treated lower insulating film using film forming gas containing at least one of hydrogen and chlorine. | 12-01-2011 |
| 20110294305 | Antireflective Coating - Device and method for an antireflective coating to improve image quality in an image display system. A preferred embodiment comprises a first high refractive index layer overlying a reflective surface of an integrated circuit, a first low refractive index layer overlying the first high refractive index layer, a second high refractive index layer overlying the first low refractive index layer, and a second low refractive index layer overlying the second high refractive index layer. The alternating layers of high refractive index material and low refractive index material form an optical trap, allowing light to readily pass through in one direction, but not so easily in a reverse direction. The dual alternating layer topology improves the antireflective properties of the antireflective layer and permits a wide range of adjustments for manipulating reflectivity and color point. | 12-01-2011 |
| 20120021609 | DEPOSITION OF VISCOUS MATERIAL - Embodiments of the invention provide methods and systems for depositing a viscous material on a substrate surface. In one embodiment, the invention provides a method of depositing a viscous material on a substrate surface, the method comprising: applying a pre-wet material to a surface of a substrate; depositing a viscous material atop the pre-wet material; rotating the substrate about an axis to spread the viscous material along the surface of the substrate toward a substrate edge; and depositing additional pre-wet material in a path along the surface and adjacent the spreading viscous material. | 01-26-2012 |
| 20120058646 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A semiconductor device in which a semiconductor layer is formed on an insulating substrate with a front-end insulating layer interposed between the semiconductor layer and the insulating substrate is provided which is capable of preventing action of an impurity contained in the insulating substrate on the semiconductor layer and of improving reliability of the semiconductor device. In a TFT (Thin Film Transistor), boron is made to be contained in a region located about 100 nm or less apart from a surface of the insulating substrate so that boron concentration decreases at an average rate being about 1/1000-fold per 1 nm from the surface of the insulating substrate toward the semiconductor layer. | 03-08-2012 |
| 20120064729 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An object of the present invention is to increase adhesiveness between thin films, particularly a high molecular film formed on an insulating surface, and the present invention provides a semiconductor device with high reliability and a method for manufacturing the semiconductor device with high yield. A semiconductor device of the present invention comprises a laminate structure formed in close contact with an organic insulating film on a hydrophobic surface of an inorganic insulating film including silicon and nitrogen. A film having the hydrophobic surface is an insulating film having a contact angle of water of equal to or more than 30°, preferably of equal to or more than 40°. | 03-15-2012 |
| 20120088373 | METHODS OF FORMING TITANIUM SILICON OXIDE - A dielectric containing a titanium silicon oxide film and a method of fabricating such a dielectric provide a dielectric for use in a variety of electronic devices. Embodiments may include a dielectric containing a titanium silicon oxide film arranged as one or more monolayers. Embodiments may include structures for capacitors, transistors, memory devices, and electronic systems with dielectrics containing a titanium silicon oxide film, and methods for forming such structures. | 04-12-2012 |
| 20120094504 | METHODS OF FORMING GATE DIELECTRIC MATERIAL - A method of forming gate dielectric material includes forming a silicon oxide gate layer over a substrate. The silicon oxide gate layer is treated with a first ozone-containing gas. After treating the silicon oxide gate layer, a high dielectric constant (high-k) gate dielectric layer is formed over the treated silicon oxide gate layer. | 04-19-2012 |
| 20120100726 | Methods of Forming Silicon Oxides and Methods of Forming Interlevel Dielectrics - A method of forming silicon oxide includes depositing a silicon nitride-comprising material over a substrate. The silicon nitride-comprising material has an elevationally outermost silicon nitride-comprising surface. Such surface is treated with a fluid that is at least 99.5% H | 04-26-2012 |
| 20120149212 | CVD METHOD AND CVD REACTOR - The invention relates to a device and a method for depositing semiconductor layers, in particular made of a plurality of components on one or more substrates ( | 06-14-2012 |
| 20120156890 | IN-SITU LOW-K CAPPING TO IMPROVE INTEGRATION DAMAGE RESISTANCE - A method and apparatus for forming low-k dielectric layers that include air gaps is provided. In one embodiment, a method of processing a substrate is provided. The method comprises disposing a substrate within a processing region, reacting an organosilicon compound, with an oxidizing gas, and a porogen providing precursor in the presence of a plasma to deposit a porogen containing low-k dielectric layer comprising silicon, oxygen, and carbon on the substrate, depositing a porous dielectric capping layer comprising silicon, oxygen and carbon on the porogen containing low-k dielectric layer, and ultraviolet (UV) curing the porogen containing low-k dielectric layer and the porous dielectric capping layer to remove at least a portion of the porogen from the porogen containing low-k dielectric layer through the porous dielectric capping layer to convert the porogen containing low-k dielectric layer to a porous low-k dielectric layer having air gaps. | 06-21-2012 |
| 20120164842 | TRENCH EMBEDDING METHOD AND FILM-FORMING APPARATUS - A trench embedding method includes forming an oxidization barrier film on a trench; forming an expandable film on the oxidization barrier film; embedding an embedding material that contracts by being fired on the trench; and firing the embedding material, wherein the forming of the oxidization barrier film includes: forming a first seed layer on the trench by supplying an aminosilane-based gas; and forming a silicon nitride film on the first seed layer, wherein the forming of the expandable film includes: forming a second seed layer on the silicon nitride film by supplying an aminosilane-based gas; and forming a silicon film on the second seed layer. | 06-28-2012 |
| 20120184110 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF PROCESSING SUBSTRATE AND SUBSTRATE PROCESSING APPARATUS - An insulating film including characteristics such as low permittivity, a low etching rate and a high insulation property is formed. Supplying a gas containing an element, a carbon-containing gas and a nitrogen-containing gas to a heated substrate in a processing vessel to form a carbonitride layer including the element, and supplying the gas containing the element and an oxygen-containing gas to the heated substrate in the processing vessel to form an oxide layer including the element are alternately repeated to form on the substrate an oxycarbonitride film having the carbonitride layer and the oxide layer alternately stacked therein. | 07-19-2012 |
| 20120196448 | METHODS OF FORMING AN INSULATING METAL OXIDE - A dielectric containing an insulating metal oxide film having multiple metal components and a method of fabricating such a dielectric produce a reliable dielectric for use in a variety of electronic devices. Embodiments include a titanium aluminum oxide film structured as one or more monolayers. Embodiments also include structures for capacitors, transistors, memory devices, and electronic systems with dielectrics containing a titanium aluminum oxide film. | 08-02-2012 |
| 20120202354 | ADVANCED LOW k CAP FILM FORMATION PROCESS FOR NANO ELECTRONIC DEVICES - A method of forming a carbon-rich silicon carbide-like dielectric film having a carbon concentration of greater than, or equal to, about 30 atomic % C and a dielectric constant of less than, or equal to, about 4.5 is provided. The dielectric film may optionally include nitrogen. When nitrogen is present, the carbon-rich silicon carbide-like dielectric film has a concentration nitrogen that is less than, or equal, to about 5 atomic % nitrogen. | 08-09-2012 |
| 20120214316 | SEMICONDUCTOR DEVICES HAVING PLANARIZED INSULATION LAYERS AND METHODS OF FABRICATING THE SAME - A semiconductor device and a method of fabricating a semiconductor device including a step of providing a substrate having a first region and a second region adjacent to each other, a step of forming a structure on the substrate in the first region, the structure including a top surface and a sidewall, a step of forming a first insulation layer on the substrate including the structure, the first insulation layer including a first top surface in the first region, an inclined sidewall on the sidewall of structure, and a second top surface in the second region, a step of forming a second insulation layer on the first insulation layer, and a step of planarizing the second and first insulation layers to form a common planarized surface. | 08-23-2012 |
| 20120225565 | REDUCED PATTERN LOADING USING SILICON OXIDE MULTI-LAYERS - Aspects of the disclosure pertain to methods of depositing conformal silicon oxide multi-layers on patterned substrates. The conformal silicon oxide multi-layers are each formed by depositing multiple sub-layers. Sub-layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS) and an oxygen-containing precursor into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. A plasma treatment may follow formation of sub-layers to further improve conformality and to decrease the wet etch rate of the conformal silicon oxide multi-layer film. The deposition of conformal silicon oxide multi-layers grown according to embodiments have a reduced dependence on pattern density while still being suitable for non-sacrificial applications. | 09-06-2012 |
| 20120231633 | OFF-ANGLED HEATING OF THE UNDERSIDE OF A SUBSTRATE USING A LAMP ASSEMBLY - Disclosed are method and apparatus for treating a substrate. The apparatus is a dual-function process chamber that may perform both a material process and a thermal process on a substrate. The chamber has an annular radiant source disposed between a processing location and a transportation location of the chamber. Lift pins have length sufficient to maintain the substrate at the processing location while the substrate support is lowered below the radiant source plane to afford radiant heating of the substrate. A method of processing a substrate having apertures formed in a first surface thereof includes depositing material on the first surface in the apertures and reflowing the material by heating a second surface of the substrate opposite the first surface. A second material can then be deposited, filling the apertures partly or completely. Alternately, a cyclical deposition/reflow process may be performed. | 09-13-2012 |
| 20120252224 | METHOD OF DEPOSITING SILICON OXIDE FILM AND SILICON NITRIDE FILM, FILM FORMING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of depositing a silicon oxide film and a silicon nitride film includes depositing the silicon oxide film and the silicon nitride film on a substrate, and a gas for forming the silicon nitride film further includes boron. | 10-04-2012 |
| 20120270409 | Methods For Manufacturing High Dielectric Constant Films - Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water. | 10-25-2012 |
| 20120270410 | METHOD FOR FORMING THE GATE INSULATOR OF A MOS TRANSISTOR - A method for forming the gate insulator of a MOS transistor, including the steps of: a) forming a thin silicon oxide layer at the surface of a semiconductor substrate; b) incorporating nitrogen atoms into the silicon oxide layer by plasma nitridation at a temperature lower than 200° C., to transform this layer into a silicon oxynitride layer; and c) coating the silicon oxynitride layer with a layer of a material of high dielectric constant, wherein steps b) and c) follow each other with no intermediate anneal step. | 10-25-2012 |
| 20120282783 | METHOD FOR FABRICATING HIGH-K DIELECTRIC LAYER - A method for fabricating high-k dielectric layer is disclosed. The method includes the steps of: providing a substrate; and forming a plurality of high-k dielectric layers by using a plurality of reacting gases to perform a plurality of process stages on the surface of the substrate, wherein at least one of the reacting gases comprises different flow rate in the fabrication stages. | 11-08-2012 |
| 20120309205 | CAPPING LAYER FOR REDUCED OUTGASSING - A method of forming a silicon oxide layer is described. The method first deposits a silicon-nitrogen-and-hydrogen containing (polysilazane) film by radical-component chemical vapor deposition (CVD). The silicon-nitrogen-and-hydrogen containing film is formed by combining a radical precursor (excited in a remote plasma) with m unexcited carbon-free silicon precursor. A capping layer is formed over the silicon-nitrogen-and-hydrogen-containing film to avoid time-evolution of underlying film properties prior to conversion into silicon oxide. The capping layer is formed by combining a radical oxygen precursor (excited in a remote plasma) with an unexcited silicon-and-carbon-containing-precursor. The films are converted to silicon oxide by exposure to oxygen-containing environments. The two films may be deposited within the same substrate processing chamber and may be deposited without breaking vacuum. | 12-06-2012 |
| 20130005154 | METHOD OF FORMING A DIELECTRIC LAYER HAVING AN ONO STRUCTURE USING AN IN-SITU PROCESS - A method of forming a dielectric layer, the method including sequentially forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate by performing a plasma-enhanced atomic layer deposition process, wherein a first nitrogen plasma treatment is performed after forming the first oxide layer. | 01-03-2013 |
| 20130084711 | REMOTE PLASMA BURN-IN - Methods of treating the interior of a plasma region are described. The methods include a preventative maintenance procedure or the start-up of a new substrate processing chamber having a remote plasma system. A new interior surface is exposed within the remote plasma system. The (new) interior surfaces are then treated by sequential steps of (1) forming a remote plasma from hydrogen-containing precursor within the remote plasma system and then (2) exposing the interior surfaces to water vapor. Steps (1)-(2) are repeated at least ten times to complete the burn-in process. Following the treatment of the interior surfaces, a substrate may be transferred into a substrate processing chamber. A dielectric film may then be formed on the substrate by flowing one precursor through the remote plasma source and combining the plasma effluents with a second precursor flowing directly to the substrate processing region. | 04-04-2013 |
| 20130084712 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF PROCESSING SUBSTRATE, SUBSTRATE PROCESSING APPARATUS AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM - A semiconductor manufacturing method includes forming an oxide film on a substrate by performing a first cycle a predetermined number of times, including supplying a first source gas, an oxidizing gas and a reducing gas to the substrate heated to a first temperature in a process container under a sub-atmospheric pressure; forming a seed layer on a surface of the oxide film by supplying a nitriding gas to the substrate in the process container, the substrate being heated to a temperature equal to or higher than the first temperature and equal to or lower than a second temperature; and forming a nitride film on the seed layer formed on the surface of the oxide film by performing a second cycle a predetermined number of times, including supplying a second source gas and the nitriding gas to the substrate heated to the second temperature in the process container. | 04-04-2013 |
| 20130084713 | DIELECTRIC LAYER FOR SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device comprises a silicate interface layer and a high-k dielectric layer overlying the silicate interface layer. The high-k dielectric layer comprises metal alloy oxides. | 04-04-2013 |
| 20130102160 | Methods of Forming Patterns - Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings. | 04-25-2013 |
| 20130109195 | FILM FORMING APPARATUS AND METHOD OF OPERATING THE SAME | 05-02-2013 |
| 20130109196 | FILM FORMING APPARATUS AND METHOD OF OPERATING THE SAME | 05-02-2013 |
| 20130122720 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A high-k capacitor insulating film stable at a higher temperature is formed. There is provided a method of manufacturing a semiconductor device. The method comprises: forming a first amorphous insulating film comprising a first element on a substrate; adding a second element different from the first element to the first amorphous insulating film so as to form a second amorphous insulating film on the substrate; and annealing the second amorphous insulating film at a predetermined annealing temperature so as to form a third insulating film by changing a phase of the second amorphous insulating film. The concentration of the second element added to the first amorphous insulating film is controlled according to the annealing temperature. | 05-16-2013 |
| 20130149873 | Method of Manufacturing Semiconductor Device, Method of Processing Substrate, Substrate Processing Apparatus and Non-Transitory Computer-Readable Recording Medium - A thin film including characteristics of low permittivity, high etching resistance and high leak resistance is to be formed. A method of manufacturing a semiconductor device includes forming a thin film containing a predetermined element on a substrate by performing a cycle a predetermined number of times, the cycle including: forming a first layer containing the predetermined element, nitrogen and carbon by alternately performing supplying a source gas containing the predetermined element and a halogen element to the substrate and supplying a first reactive gas containing three elements including the carbon, the nitrogen and hydrogen and having a composition wherein a number of carbon atoms is greater than that of nitrogen atoms to the substrate a predetermined number of times; and forming a second layer by supplying a second reactive gas different from the source gas and the first reactive gas to the substrate to modify the first layer. | 06-13-2013 |
| 20130149874 | Method of Manufacturing Semiconductor Device, Method of Processing Substrate, Substrate Processing Apparatus and Non-Transitory Computer-Readable Recording Medium - A method of manufacturing a semiconductor device is provided. The method includes: forming a thin film containing a predetermined element on a substrate by repeating a cycle, the cycle including: forming a first layer containing the predetermined element, nitrogen and carbon by alternately performing supplying a source gas containing the predetermined element and a halogen element to the substrate and supplying a first reactive gas containing three elements including the carbon, the nitrogen and hydrogen and having a composition wherein a number of carbon atoms is greater than that of nitrogen atoms to the substrate a predetermined number of times; forming a second layer by supplying a second reactive gas different from the source gas and the first reactive gas to the substrate to modify the first layer; and modifying a surface of the second layer by supplying a hydrogen-containing gas to the substrate. | 06-13-2013 |
| 20130164945 | FILM DEPOSITION METHOD - A film deposition method includes an adsorption step of adsorbing a first reaction gas onto a substrate by supplying the first reaction gas from a first gas supplying portion for a predetermined period without supplying a reaction gas from a second gas supplying portion while separating a first process area and a second process area by supplying a separation gas from a separation gas supplying portion and rotating a turntable; and a reaction step of having the first reaction gas adsorbed onto the substrate react with a second reaction gas by supplying the second reaction gas from the second gas supplying portion for a predetermined period without supplying a reaction gas from the first gas supplying portion while separating the first process area and the second process area by supplying the separation gas from the separation gas supplying portion and rotating the turntable. | 06-27-2013 |
| 20130171834 | IN-SITU DEPOSITION OF FILM STACKS - Disclosed herein are methods of forming a film stack which may include the plasma accelerated deposition of a silicon nitride film formed from the reaction of nitrogen containing precursor with silicon containing precursor, the plasma accelerated substantial elimination of silicon containing precursor from the processing chamber, the plasma accelerated deposition of a silicon oxide film atop the silicon nitride film formed from the reaction of silicon containing precursor with oxidant, and the plasma accelerated substantial elimination of oxidant from the processing chamber. Also disclosed herein are process station apparatuses for forming a film stack of silicon nitride and silicon oxide films which may include a processing chamber, one or more gas delivery lines, one or more RF generators, and a system controller having machine-readable media with instructions for operating the one or more gas delivery lines, and the one or more RF generators. | 07-04-2013 |
| 20130171835 | COMPOSITION FOR WATER-REPELLENT TREATMENT OF SURFACE, AND METHOD FOR WATER-REPELLENT TREATMENT OF SURFACE OF SEMICONDUCTOR SUBSTRATE USING SAME - The purpose of the present invention to provide: a composition which can be used for water-repellent treating of the entire surface of a semiconductor substrate having a pattern formed by laminating a Si-containing insulating layer and a metal layer, at one time; and a method for water-repellent treatment of the semiconductor substrate surface using the composition. | 07-04-2013 |
| 20130196515 | METHOD OF FORMING THIN METAL AND SEMI-METAL LAYERS BY THERMAL REMOTE OXYGEN SCAVENGING - Methods for forming thin metal and semi-metal layers by thermal remote oxygen scavenging are described. In one embodiment, the method includes forming an oxide layer containing a metal or a semi-metal on a substrate, where the semi-metal excludes silicon, forming a diffusion layer on the oxide layer, forming an oxygen scavenging layer on the diffusion layer, and performing an anneal that reduces the oxide layer to a corresponding metal or semi-metal layer by oxygen diffusion from the oxide layer to the oxygen scavenging layer. | 08-01-2013 |
| 20130203266 | Methods of Forming Metal Nitride Materials - Disclosed herein are various methods of forming metal nitride layers on various types of semiconductor devices. In one example, the method includes forming a layer of insulating material above a semiconducting substrate, performing a physical vapor deposition process to form a metal nitride layer above the layer of insulating material, wherein the metal nitride layer has an intrinsic as-deposited stress level, and performing at least one process operation on the metal nitride layer to reduce a magnitude of the intrinsic as-deposited stress level in the metal nitride layer. | 08-08-2013 |
| 20130230989 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is provided, wherein the method comprises steps as follows: A first conductive-type metal-oxide-semiconductor transistor and a second conductive-type metal-oxide-semiconductor transistor are firstly formed on a substrate. Subsequently, a first stress-inducing dielectric layer and a first capping layer are formed in sequence on the first conductive-type metal-oxide-semiconductor transistor; and then a second stress-inducing dielectric layer and a second capping layer are formed in sequence on the second conductive-type metal-oxide-semiconductor transistor. Next, the fist capping layer is removed. | 09-05-2013 |
| 20130260573 | METHOD OF MAKING A LITHOGRAPHY MASK - A method of making a lithography mask with a stress-relief treatment is disclosed. The method includes providing a substrate and depositing an opaque layer on the substrate. The opaque layer is patterned to form a patterned mask. A stress-relief treatment is applied to the patterned mask by using an radiation exposure. | 10-03-2013 |
| 20130280918 | METHODS AND APPARATUS FOR FORMING SILICON PASSIVATION LAYERS ON GERMANIUM OR III-V SEMICONDUCTOR DEVICES - Described are apparatus and methods for forming silicon interfacial layers on germanium or III-V materials. Such silicon layers may be deposited by atomic layer deposition at specific temperatures to avoid interdiffusion of silicon and the germanium or III-V material. | 10-24-2013 |
| 20130337656 | STRUCTURE AND METHOD FOR DUAL WORK FUNCTION METAL GATE CMOS WITH SELECTIVE CAPPING - A CMOS device having an NMOS transistor with a metal gate electrode comprising a mid-gap metal with a low work function/high oxygen affinity cap and a PMOS transistor with a metal gate electrode comprising a mid gap metal with a high work function/low oxygen affinity cap and method of forming. | 12-19-2013 |
| 20140011368 | METHOD AND APPARATUS OF FORMING CARBON FILM - According to an embodiment of present disclosure, a method of forming a carbon film on a substrate to be processed is provided. The method includes loading a substrate to be processed with a carbon film formed thereon into a processing chamber of a film forming apparatus (Process | 01-09-2014 |
| 20140024224 | METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A method of manufacturing a semiconductor integrated circuit device which includes a semiconductor substrate; and multiple semiconductor elements disposed on the semiconductor substrate. The semiconductor elements include an n-channel MOS transistor and a p-channel MOS transistor. The n-channel MOS transistor is covered by a tensile stress film, and the p-channel MOS transistor is covered by a compressive stress film. A dummy region, the entire surface of which is covered by a combination of the tensile stress film and the compressive stress film, is disposed on the surface of the semiconductor substrate. | 01-23-2014 |
| 20140038426 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES - A method for reducing defects in an active device area of a semiconductor device during fabrication is disclosed. In one aspect, the method comprises providing the active device area adjacent an isolation structure, wherein a substantially planar surface is formed over the isolation structure and the active device area, forming a patterned stress-inducing layer over the substantially planar surface, forming at least one screening layer between the patterned stress-inducing layer and the substantially planar surface, where the screening layer is configured to screen part of the stress field induced by the patterned stress-inducing layer, performing an anneal process after forming the patterned stress-inducing layer on the substantially planar surface, so as to induce a movement of the defects towards a contact interface between the active device area and the isolation structure, and removing the patterned stress-inducing layer from the substantially planar surface. | 02-06-2014 |
| 20140045341 | PATTERN FORMING METHOD - According to one embodiment, a pattern forming method includes forming a physical guide, in which at least an upper part of a side wall surface of a concave section is an inclined surface, on a film to be processed, forming a polymer layer containing at least two kinds of segments inside the concave section of the physical guide, microphase-separating the polymer layer, to form self-assembled polymer domains including a first polymer section and a second polymer section, and processing the film to be processed by use of the self-assembled polymer domains. | 02-13-2014 |
| 20140057454 | METHODS AND APPARATUS FOR PLASMA-BASED DEPOSITION - High-deposition rate methods for forming transparent ashable hardmasks (AHMs) that have high plasma etch selectivity to underlying layers are provided. The methods involve placing a wafer on a powered electrode such as a powered pedestal for plasma-enhanced deposition. According to various embodiments, the deposition is run at low hydrocarbon precursor partial pressures and/or low process temperatures. Also provided are ceramic wafer pedestals with multiple electrode planes embedded with the pedestal are provided. According to various embodiments, the pedestals have multiple RF mesh electrode planes that are connected together such that all the electrode planes are at the same potential. | 02-27-2014 |
| 20140065840 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS - To form an insulating film with extremely low concentration of impurities such as carbon, hydrogen, nitrogen, chlorine, etc in a film. There are provided the steps of forming a specific element-containing layer on a substrate by supplying source gas containing a specific element into a processing container in which the substrate is accommodated; changing the specific element-containing layer into a nitride layer, by activating and supplying gas containing nitrogen into the processing container; and changing the nitride layer into an oxide layer or an oxynitride layer, by activating and supplying gas containing oxygen into the processing container; with this cycle set as one cycle and performed for at least one or more times. | 03-06-2014 |
| 20140080315 | METHOD OF FORMING LAMINATED FILM AND FORMING APPARATUS THEREOF - A method of forming a laminated film includes forming a silicon oxide film on a plurality of target objects loaded in a reaction chamber, and forming a silicon oxynitride film on the plurality of target objects by supplying a silicon source, an oxidizing agent and a nitride agent to the reaction chamber, wherein forming the silicon oxide film and forming the silicon oxynitride film are repeatedly performed for a predetermined number of times on the plurality of target objects to form a laminated film including the silicon oxynitride film and the silicon oxide film. | 03-20-2014 |
| 20140080316 | METHODS OF FORMING GATE DIELECTRIC MATERIAL - A method of fabricating a semiconductor device includes contacting water with a silicon oxide layer. The method further includes diffusing an ozone-containing gas through water to treat the silicon oxide layer. The method further includes forming a dielectric layer over the treated silicon oxide layer. | 03-20-2014 |
| 20140120736 | METHOD FOR FABRICATION OF CRACK-FREE CERAMIC DIELECTRIC FILMS - The invention provides a process for forming crack-free dielectric films on a substrate. The process comprises the application of a dielectric precursor layer of a thickness from about 0.3 μm to about 1.0 μm to a substrate. The deposition is followed by low temperature heat pretreatment, prepyrolysis, pyrolysis and crystallization step for each layer. The deposition, heat pretreatment, prepyrolysis, pyrolysis and crystallization are repeated until the dielectric film forms an overall thickness of from about 1.5 μm to about 20.0 μm and providing a final crystallization treatment to form a thick dielectric film. The process provides a thick crack-free dielectric film on a substrate, the dielectric forming a dense thick crack-free dielectric having an overall dielectric thickness of from about 1.5 μm to about 20.0 μm. | 05-01-2014 |
| 20140179115 | Methods of Forming Patterns - Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings. | 06-26-2014 |
| 20140193982 | LOW THERMAL CONDUCTIVITY MATRICES WITH EMBEDDED NANOSTRUCTURES AND METHODS THEREOF - A matrix with at least one embedded array of nanowires and method thereof. The matrix includes nanowires and one or more fill materials located between the nanowires. Each of the nanowires including a first end and a second end. The nanowires are substantially parallel to each other and are fixed in position relative to each other by the one or more fill materials. Each of the one or more fill materials is associated with a thermal conductivity less than 50 Watts per meter per degree Kelvin. And, the matrix is associated with at least a sublimation temperature and a melting temperature, the sublimation temperature and the melting temperature each being above 350° C. | 07-10-2014 |
| 20140213067 | FILM FORMING METHOD AND FILM FORMING APPARATUS - A film forming method for forming a thin film composed of a SiOCN layer containing at least silicon (Si), oxygen (O), carbon (C) and nitrogen (N) on a surface of a workpiece within an evacuable processing vessel optionally using a silane-based gas, a hydrocarbon gas, a nitriding gas or an oxidizing gas includes forming a first film including at least Si, C and N, and forming a second film including at least Si, C and O. The forming a first film and the forming a second film are set as a cycle and the cycle is performed once or more. | 07-31-2014 |
| 20140235067 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING METHOD, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM - A thin film that has a predetermined composition and containing predetermined elements is formed on a substrate by performing a cycle of steps a predetermined number of times, said cycle comprising: a step wherein a first layer containing the predetermined elements, nitrogen and carbon is formed on the substrate by alternately performing, a predetermined number of times, a process of supplying a first source gas containing a predetermined element and a halogen group to the substrate and a process of supplying a second source gas containing a predetermined element and an amino group to the substrate; a step wherein a second layer is formed by modifying the first layer by supplying an amine-based source gas to the substrate; and a step wherein a third layer is formed by modifying the second layer by supplying a reaction gas that is different from the source gases to the substrate. | 08-21-2014 |
| 20140242808 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SUBSTRATE PROCESSING SYSTEM - A semiconductor device manufacturing method includes forming a first high-k insulating film on a processing target object; performing a crystallization heat-treatment process on the first high-k insulating film at a temperature equal to or higher than about 650° C. for a time less than about 60 seconds; and forming, on the first high-k insulating film, a second high-k insulating film containing a metal element having an ionic radius smaller than that of a metal element of the first high-k insulating film and having a relative permittivity higher than that of the first high-k insulating film. | 08-28-2014 |
| 20140256154 | INTERLEVEL DIELECTRIC STACK FOR INTERCONNECT STRUCTURES - A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity. | 09-11-2014 |
| 20140273510 | SILANE AND BORANE TREATMENTS FOR TITANIUM CARBIDE FILMS - Methods of treating metal-containing thin films, such as films comprising titanium carbide, with a silane/borane agent are provided. In some embodiments a film comprising titanium carbide is deposited on a substrate by an atomic layer deposition (ALD) process. The process may include a plurality of deposition cycles involving alternating and sequential pulses of a first source chemical that comprises titanium and at least one halide ligand, a second source chemical comprising metal and carbon, wherein the metal and the carbon from the second source chemical are incorporated into the thin film, and a third source chemical, wherein the third source chemical is a silane or borane that at least partially reduces oxidized portions of the titanium carbide layer formed by the first and second source chemicals. In some embodiments treatment forms a capping layer on the metal carbide film. | 09-18-2014 |
| 20140273511 | METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING FORMATION OF CHEMICAL GUIDE PATTERNS FOR DIRECTED SELF-ASSEMBLY LITHOGRAPHY - Methods for creating chemical guide patterns by DSA lithography for fabricating an integrated circuit are provided. In one example, an integrated circuit includes forming a bifunctional brush layer of a polymeric material overlying an anti-reflective coating on a semiconductor substrate. The polymeric material has a neutral polymeric block portion and a pinning polymeric block portion that are coupled together. The bifunctional brush layer includes a neutral layer that is formed of the neutral polymeric block portion and a pinning layer that is formed of the pinning polymeric block portion. A portion of the neutral layer or the pinning layer is selectively removed to define a chemical guide pattern. A block copolymer layer is deposited overlying the chemical guide pattern. The block copolymer layer is phase separated to define a nanopattern that is registered to the chemical guide pattern. | 09-18-2014 |
| 20140273512 | TRIALKYLSILANE SILICON PRECURSOR COMPOUND, METHOD OF FORMING A LAYER USING THE SAME, AND SEMICONDUCTOR DEVICE INCLUDING THE LAYER - A trialkylsilane-based silicon precursor compound may be expressed by the following chemical formula 1. | 09-18-2014 |
| 20140273513 | RESIST COMPOSITION AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - There is provided a resist composition including a crosslinking material configured to cause crosslinking in the presence of an acid, an inclusion compound, and a solvent. | 09-18-2014 |
| 20140273514 | TOPOGRAPHY MINIMIZATION OF NEUTRAL LAYER OVERCOATS IN DIRECTED SELF-ASSEMBLY APPLICATIONS - A method is provided for patterning a layered substrate that includes loading a substrate into a coater-developer processing system; coating the substrate with a photoresist material layer; patterning the photoresist material layer to form a photoresist pattern; transferring the substrate to a deposition processing system; and depositing a neutral layer over the photoresist pattern and exposed portions of the substrate. The neutral layer can deposited using a gas cluster ion beam (GCIB) process, or an atomic layer deposition (ALD) process, which has minimal topography. The method may further include lifting off a portion of the neutral layer deposited over the photoresist pattern to expose a neutral layer template for subsequent directed self-assembly (DSA) patterning; depositing a DSA material layer over the neutral layer template; baking the DSA material layer to form a DSA pattern; and developing the DSA material layer to expose the final DSA pattern for subsequent feature etching. | 09-18-2014 |
| 20140273515 | INTEGRATED PLATFORM FOR FABRICATING N-TYPE METAL OXIDE SEMICONDUCTOR (NMOS) DEVICES - Embodiments of an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices are provided herein. In some embodiments, an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices may include a first deposition chamber configured to deposit a first layer atop the substrate, the first layer comprising titanium oxide (TiO | 09-18-2014 |
| 20140287592 | METHODS OF FORMING A LAYER - According to example embodiments, a method of forming a layer includes: forming a dielectric layer using a metal precursor expressed by one of R | 09-25-2014 |
| 20140287593 | HIGH THROUGHPUT MULTI-LAYER STACK DEPOSITION - Methods and apparatus for high rate formation of multi-layer stacks on semiconductor substrate is provided. A chamber for forming such stacks at high rates includes a first precursor line and a second precursor line. The first precursor line is coupled to a first diverter, which is coupled to a gas inlet in a lid assembly of the chamber. The second precursor line is coupled to a second diverter, which is also coupled to the gas inlet. The first diverter is also coupled to a first divert line, and the second diverter is coupled to a second divert line. Each of the first and second divert lines is coupled to a divert exhaust system. A chamber exhaust system is coupled to the chamber. The diverters are typically located close to the lid assembly. | 09-25-2014 |
| 20140295673 | SILANE OR BORANE TREATMENT OF METAL THIN FILMS - The negative effect of oxygen on some metal films can be reduced or prevented by contacting the films with a treatment agent comprising silane or borane. In some embodiments, one or more films in an NMOS gate stack are contacted with a treatment agent comprising silane or borane during or after deposition. | 10-02-2014 |
| 20140302685 | DIELETRIC CAP HAVING MATERIAL WITH OPTICAL BAND GAP TO SUBSTANTIALLY BLOCK UV RADIATION DURING CURING TREATMENT, AND RELATED METHODS - A dielectric cap and related methods are disclosed. In one embodiment, the dielectric cap includes a dielectric material having an optical band gap (e.g., greater than about 3.0 electron-Volts) to substantially block ultraviolet radiation during a curing treatment, and including nitrogen with electron donor, double bond electrons. The dielectric cap exhibits a high modulus and is stable under post ULK UV curing treatments for, for example, copper low k back-end-of-line (BEOL) nanoelectronic devices, leading to less film and device cracking and improved reliability. | 10-09-2014 |
| 20140308820 | METHOD OF DEPOSITING SILICON OXIDE FILM AND SILICON NITRIDE FILM AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of depositing a silicon oxide film and a silicon nitride film includes depositing the silicon oxide film and the silicon nitride film on a substrate, and a gas for forming the silicon nitride film further includes boron. | 10-16-2014 |
| 20140335700 | Carbon Layers for High Temperature Processes - Carbon layers with reduced hydrogen content may be deposited by plasma-enhanced chemical vapor deposition by selecting processing parameters accordingly. Such carbon layers may be subjected to high temperature processing without showing excessive shrinking. | 11-13-2014 |
| 20140342575 | Method for Forming an Interfacial Layer on a Semiconductor Using Hydrogen Plasma - Techniques include a method of forming an interfacial passivation layer between a first semiconductor material (such as germanium) and a high-k gate dielectric. Such techniques include using a hydrogen-based plasma formed using a slotted-plane antenna plasma processing system. Such a plasma treatment can be executed with substrate temperatures less than 380 degrees Celsius, and even down to about 200 degrees Celsius or below. | 11-20-2014 |
| 20140349490 | CONFORMAL AMORPHOUS CARBON FOR SPACER AND SPACER PROTECTION APPLICATIONS - A method of forming a nitrogen-doped amorphous carbon layer on a substrate in a processing chamber is provided. The method generally includes depositing a predetermined thickness of a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, depositing conformally a predetermined thickness of a nitrogen-doped amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the nitrogen-doped amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the nitrogen-doped amorphous carbon layer, and removing the patterned features from the substrate. | 11-27-2014 |
| 20140377963 | PATTERNING FOR SELECTIVE AREA DEPOSITION - A method of producing a patterned inorganic thin film element includes providing a substrate. A thin layer of polymeric inhibitor is uniformly depositing on the substrate. A patterned mask having open areas is provided on the thin layer of polymeric inhibitor. The thin layer of polymeric inhibitor is patterned by removing inhibitor from areas exposed by the open areas of the patterned mask using a highly reactive oxygen process. An inorganic thin film layer is deposited on the substrate in the areas exposed by the removal of the thin layer of polymeric inhibitor using an atomic layer deposition process. | 12-25-2014 |
| 20150017813 | Semiconductor Device Manufacturing Method and Substrate Treatment System - A semiconductor device manufacturing method that includes: forming a gate insulating film containing a hafnium oxide and a zirconium oxide on a workpiece having a source, a drain and a channel; and subjecting the gate insulating film to a crystallization heat treatment at a temperature of 600 degrees C. or less is provided. The gate insulating film subjected to the crystallization heat treatment has a relative permittivity of 27 or more. | 01-15-2015 |
| 20150031216 | CLEANING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM - There is provided a method of cleaning an inside of a process chamber, which is formed by a reaction tube and a manifold configured to support the reaction tube and installed under a heater, after forming a stacked film of oxide and nitride films on a substrate in the process chamber by alternately performing forming the oxide film on the substrate and forming the nitride film thereon. The method includes supplying a hydrogen-free fluorine-based gas from a first nozzle, which is installed in the manifold to extend upward from the manifold to an inside of the reaction tube, to an inner wall of the reaction tube; and supplying a hydrogen fluoride gas from a second nozzle, which is installed in the manifold, to an inner wall of the manifold. | 01-29-2015 |
| 20150079804 | UNDER LAYER FILM-FORMING COMPOSITION FOR IMPRINTS AND METHOD OF FORMING PATTERN - An under layer film having excellent surface planarity is provided. In one aspect, the under layer film-forming composition for imprints includes a (meth)acrylic resin (A) containing an ethylenic unsaturated group (P) and a nonionic hydrophilic group (Q), and having a weight average molecular weight of 1,000 or larger; and a solvent (B), the resin (A) having an acid value of smaller than 1.0 mmol/g. In another aspect, the under layer film-forming composition for imprints includes a (meth)acrylic resin (A2) containing an ethylenic unsaturated group (P), and containing, as a nonionic hydrophilic group (Q), a cyclic substituent (Q2) having a carbonyl group in the cyclic structure thereof, with a weight average molecular weight of 1,000 or larger; and a solvent (B). | 03-19-2015 |
| 20150093912 | UNDERLAYER COMPOSITION FOR PROMOTING SELF ASSEMBLY AND METHOD OF MAKING AND USING - Disclosed herein is a formulation for depositing a cured underlayer for promoting the formation of self assembled structures. The underlayer comprises: (a) a polymer comprising at least one pendant vinyl ether monomer repeat unit having the structure, (I): | 04-02-2015 |
| 20150099373 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, METHOD FOR PROCESSING SUBSTRATE, SUBSTRATE PROCESSING DEVICE AND RECORDING MEDIUM - In order to extend the cycle of gas cleaning for a film-forming device, a method for manufacturing a semiconductor device includes: a substrate carry-in process for carrying a substrate into a processing chamber; a film forming process for laminating at least two types of films on the substrate in the processing chamber; a substrate carry-out process for carrying the film laminated substrate out from the processing chamber; an etching process for supplying an etching gas into the processing chamber while the substrate is not in the processing chamber after the substrate carry-out process. The etching process includes a first cleaning process for supplying a fluorine-containing gas activated by plasma excitation into the processing chamber as an etching gas; and a second cleaning process for supplying a fluorine-containing gas activated by heat into the processing chamber as an etching gas. | 04-09-2015 |
| 20150147890 | MULTI-MODE THIN FILM DEPOSITION APPARATUS AND METHOD OF DEPOSITING A THIN FILM - A multi-mode thin film deposition apparatus including a reaction chamber, a carrying seat, a showerhead, an inert gas supplying source, a first gas inflow system and a second gas inflow system is provided. The carrying seat is disposed in the reaction chamber. The showerhead has a gas mixing room and gas holes disposed at a side of the gas mixing room. The gas mixing room is connected to the reaction chamber through the plurality of gas holes which faces the carrying seat. The first gas inflow system is connected to the reaction chamber and supplies a first process gas during a first thin film deposition process mode. The inert gas supplying source is connected to the gas mixing room for supplying an inert gas. The second gas inflow system is connected to the gas mixing room to supply a second process gas during a second thin film deposition process mode. | 05-28-2015 |
| 20150340224 | METHOD FOR COATING A WORKPIECE - In various embodiments, a method for coating a workpiece is provided. The method may include drying a workpiece, the workpiece being coated with at least one oxide layer as an uppermost layer; depositing a dielectric layer over the uppermost layer of the dried workpiece; wherein the workpiece is continuously subject to a pressure which is lower than atmospheric pressure during the drying process and during the depositing process. | 11-26-2015 |
| 20150364318 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, METHOD FOR PROCESSING SUBSTRATE, SUBSTRATE PROCESSING APPARATUS AND RECORDING MEDIUM - A method for manufacturing a semiconductor device includes forming a thin film containing a specific element and having a prescribed composition on a substrate by alternately performing the following steps prescribed number of times: forming a first layer containing the specific element, nitrogen, and carbon on the substrate by alternately performing prescribed number of times: supplying a first source gas containing the specific element and a halogen-group to the substrate, and supplying a second source gas containing the specific element and an amino-group to the substrate, and forming a second layer by modifying the first layer by supplying a reactive gas different from each of the source gases, to the substrate. | 12-17-2015 |
| 20160005598 | INHIBITING DIFFUSION OF ELEMENTS BETWEEN MATERIAL LAYERS OF A LAYERED CIRCUIT STRUCTURE - Methods for fabricating a layered circuit structure are provided, which include, for instance: depositing a first material layer above a substrate, the first material layer having an oxidized upper surface; providing a second material layer over the oxidized upper surface of the first material layer; and inhibiting diffusion of one or more elements from the oxidized upper surface of the first material layer into either the first material layer or the second material layer during the providing of the second material layer over the oxidized upper surface of the first material layer. The inhibiting may include one or more of modifying a characteristic(s) of the first material layer, forming a protective layer over the oxidized upper surface of the first material layer, or altering at least one process parameter employed in providing the second material layer. | 01-07-2016 |
| 20160013044 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 01-14-2016 |
| 20160056033 | LOW TEMPERATURE ATOMIC LAYER DEPOSITION OF OXIDES ON COMPOUND SEMICONDUCTORS - Surface pretreatment of SiGe or Ge surfaces prior to gate oxide deposition cleans the SiGe or Ge surface to provide a hydrogen terminated surface or a sulfur passivated (or S—H) surface. Atomic layer deposition (ALD) of a high-dielectric-constant oxide at a low temperature is conducted in the range of 25-200° C. to form an oxide layer. Annealing is conducted at an elevated temperature. A method for oxide deposition on a damage sensitive III_V semiconductor surface conducts in-situ cleaning of the surface with cyclic pulsing of hydrogen and TMA (trimethyl aluminum) at a low temperature in the range of 100-200° C. Atomic layer deposition (ALD) of a high-dielectric-constant oxide forms an oxide layer. Annealing is conducted at an elevated temperature. The annealing can create a silicon terminated interfaces. | 02-25-2016 |
| 20160064218 | HYDROGEN-FREE SILICON-BASED DEPOSITED DIELECTRIC FILMS FOR NANO DEVICE FABRICATION - Embodiments of the present invention provide hydrogen-free dielectric films and methods of fabrication. A hydrogen-free precursor, such as tetraisocyanatosilane, and hydrogen-free reactants, such as nitrogen, oxygen (O2/O3) and nitrous oxide are used with chemical vapor deposition processes (PECVD, thermal CVD, SACVD, HDP CVD, and PE and Thermal ALD) to create hydrogen-free dielectric films. In some embodiments, there are multilayer dielectric films with sublayers of various materials such as silicon oxide, silicon nitride, and silicon oxynitride. In embodiments, the hydrogen-free reactants may include Tetra Isocyanato Silane, along with a hydrogen-free gas including, but not limited to, N2, O2, O3, N2O, CO2, CO and a combination thereof of these H-Free gases. Plasma may be used to enhance the reaction between the TICS and the other H-free gasses. The plasma may be controlled during film deposition to achieve variable density within each sublayer of the films. | 03-03-2016 |
| 20160071720 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM - A technique includes forming a laminated film on a substrate by performing a cycle a predetermined number of times. The cycle includes forming a first film which contains at least a predetermined element and oxygen, and forming a second film which contains at least the predetermined element, oxygen and carbon. The first film and the second film are laminated to form the laminated film. | 03-10-2016 |
| 20160086791 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM - The present invention increases controllability of a composition ratio of a multi-element film that contains a predetermined element and at least one element selected from the group consisting of boron, oxygen, carbon and nitrogen. There is provided a method of manufacturing a semiconductor device, including: forming a laminated film where a first film and a second film are laminated on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) forming the first film being free of borazine ring structure and including a predetermined element and at least one element selected from the group consisting of oxygen, carbon and nitrogen; and (b) forming the second film having a borazine ring structure and including at least boron and nitrogen. | 03-24-2016 |
| 20160093485 | Method for Hydrophobization of Surface of Silicon-Containing Film by ALD - A method is for hydrophobization of a surface of a silicon-containing film by atomic layer deposition (ALD), wherein the surface is subjected to atmospheric exposure. The method includes: (i) providing a substrate with a silicon-containing film formed thereon; and (ii) forming on a surface of the silicon-containing film a hydrophobic atomic layer as a protective layer subjected to atmospheric exposure, by exposing the surface to a silicon-containing treating gas without exciting the gas. The treating gas is capable of being chemisorbed on the surface to form a hydrophobic atomic layer thereon. | 03-31-2016 |
| 20160148837 | METHOD OF TREATING A POROUS DIELECTRIC LAYER AND A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE USING THE SAME - A method of treating a porous dielectric layer includes preparing a substrate on which the porous dielectric layer including an opening and pores exposed by the opening is formed, supplying a first precursor onto the substrate to form a first sub-sealing layer sealing the exposed pores, and supplying a second precursor onto the first sub-sealing layer to form a second sub-sealing layer covering the first sub-sealing layer. Each of the first and second precursors includes silicon, and a molecular weight of the second precursor is smaller than that of the first precursor. | 05-26-2016 |
| 20160153090 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM | 06-02-2016 |
| 20160155635 | ATOMIC LAYER DEPOSITION OF GeO2 | 06-02-2016 |
| 20160189950 | FILM FORMING METHOD - Disclosed is a method of forming a nitride film on a substrate to be processed (“processing target substrate”) having a carbon-containing film that contains a carbon atom. The method includes placing the processing target substrate within a processing container of a film forming apparatus, and forming a first nitride film on the carbon-containing film by plasma of a first reaction gas including a gas of nitride species having no hydrogen atom, and an inert gas. | 06-30-2016 |
| 20160254143 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 09-01-2016 |
| 20190145006 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM | 05-16-2019 |
