Class / Patent application number | Description | Number of patent applications / Date published |
438712000 | Reactive ion beam etching (i.e., RIBE) | 59 |
20080274623 | METHODS FOR FABRICATING A MAGNETIC HEAD READER USING A CHEMICAL MECHANICAL POLISHING (CMP) PROCESS FOR SENSOR STRIPE HEIGHT PATTERNING - Methods for fabricating TMR and CPP GMR magnetic heads using a chemical mechanical polishing (CMP) process with a patterned CMP conductive protective layer for sensor stripe height patterning. The method comprises defining a stripe height of a read sensor of a magnetic head reader. The method further comprises refill depositing an insulator layer on the read sensor. The method further comprises performing a CMP process down to the conductive protective layer on the read sensor deposited while defining the read sensor to remove an overfill portion of the insulator layer above the conductive protective layer and to remove a sensor pattern masking structure on the conductive protective layer. As a result, the insulator layer is planarized and smooth with the read sensor, eliminating fencing and alumina bumps typically encountered in the insulator layer at the edge of the patterned sensor. | 11-06-2008 |
20080293250 | Deep anisotropic silicon etch method - A method of anisotropic plasma etching of a silicon wafer, maintained at a temperature from −40° C. to −120° C., comprising alternated and repeated steps of:
| 11-27-2008 |
20090017632 | METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES USING RIE PROCESS - A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio during plasma generation and etching. Plasma generation is induced by a source radio frequency and anisotropic etch performance is induced by a second bias radio frequency. | 01-15-2009 |
20090081876 | METHOD OF PREVENTING ETCH PROFILE BENDING AND BOWING IN HIGH ASPECT RATIO OPENINGS BY TREATING A POLYMER FORMED ON THE OPENING SIDEWALLS - High aspect ratio contact openings are etched while preventing bowing or bending of the etch profile by forming a highly conductive thin film on the side wall of each contact opening. The conductivity of the thin film on the side wall is enhanced by ion bombardment carried out periodically during the etch process. | 03-26-2009 |
20090275205 | METHODS OF REMOVING SILICON OXIDE AND GASEOUS MIXTURES FOR ACHIEVING SAME - A method of removing at least a portion of a silicon oxide material is disclosed. The silicon oxide is removed by exposing a semiconductor structure comprising a substrate and the silicon oxide to an ammonium fluoride chemical treatment and a subsequent plasma treatment, both of which may be effected in the same vacuum chamber of a processing apparatus. The ammonium fluoride chemical treatment converts the silicon oxide to a solid reaction product in a self-limiting reaction, the solid reaction product then being volatilized by the plasma treatment. The plasma treatment includes a plasma having an ion bombardment energy of less than or equal to approximately 20 eV. An ammonium fluoride chemical treatment including an alkylated ammonia derivative and hydrogen fluoride is also disclosed. | 11-05-2009 |
20090305510 | Method of Etching a Material Surface - Disclosed is a method of structuring a material surface by dry etching, so that a passivation layer soluble in a solvent forms by the dry etching on parts of the structured material surface, sealing the passivation layer with a substance soluble in the solvent, and removing the sealed passivation layer and the substance by means of the solvent. | 12-10-2009 |
20090325388 | METHOD OF SEMICONDUCTOR PROCESSING - In a semiconductor that has a structure in which a work function controlling metal conductor is provided on a high dielectric insulation film, fine processing is performed without deteriorating a device. In a method of semiconductor processing, in which the semiconductor has an insulation film containing Hf or Zr formed on a semiconductor substrate and a conductor film containing Ti or Ta or Ru formed on an insulation film, and the conductor film is processed by using a resist formed on the conductor film under a plasma atmosphere, the resist is removed under the plasma atmosphere of gas that contains hydrogen and does not contain oxygen. | 12-31-2009 |
20100105212 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a device, including a semiconductor device. A method of fabricating a semiconductor device may include forming a photoresist pattern on and/or over a substrate, which may expose a predetermined region supposed to include a metal line thereover. A method of fabricating a semiconductor device may include etching a substrate, for example using reactive ion etching, which may use a photoresist pattern. A method of fabricating a semiconductor device may include cleaning a substrate using a liquid inorganic compound. An apparatus may include a photoresist pattern over a substrate, and may include a substrate etched by reactive ion etching using a photoresist pattern and/or cleaned using a liquid inorganic compound. | 04-29-2010 |
20100112820 | METHOD FOR MEMBRANE PROTECTION DURING REACTIVE ION/PLASMA ETCHING PROCESSING FOR VIA OR CAVITY FORMATION IN SEMICONDUCTOR MANUFACTURE - A method for protecting a chuck membrane in a reactive ion etcher during plasma processing is described. The method utilizes a photoresist as a protective layer. Suitable photoresists can be used in this invention to not only image a semiconductor substrate to protect areas where vias and/or cavities are not desired during plasma processing but also to protect the chuck membrane(s) of the reactive ion etcher from being damaged and/or contaminated during plasma processing. Both negative-working and positive-working photoresists can be used. | 05-06-2010 |
20100221922 | ELECTRON BEAM PROCESSING DEVICE AND METHOD USING CARBON NANOTUBE EMITTER - Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation. In one example an electron beam array such as a carbon nanotube array is used to selectively expose a surface during a processing operation. | 09-02-2010 |
20110027999 | ETCH METHOD IN THE MANUFACTURE OF AN INTEGRATED CIRCUIT - The present invention provides a method for etching a substrate in the manufacture of a semiconductor device, the method comprising contacting a surface of the substrate with ions extracted from a plasma formed from a gas comprising one or more of an oxygen-containing species, a nitrogen-containing species and an inert gas, and separately contacting the surface of the substrate with a plasma formed from a gas comprising a fluorine-containing species. | 02-03-2011 |
20110070742 | METHOD OF FORMING METAL INTERCONNECTION ON THICK POLYIMIDE FILM - Many current micromachining devices are integrated with materials such as very thick layer of polyimide (10 to 100 um) to offer essential characteristics and properties for various applications; it is inherently difficult and complicated to provide reliable metal interconnections between different levels of the circuits. The present invention is generally related to a novel micromachining process and structure to form metal interconnections in integrated circuits or micromachining devices which are incorporated with thick polyimide films. More particularly, the embodiments of the current invention relates to formation of multi-step staircase structure with tapered angle on polyimide layer, which is therefore capable of offering superb and reliable step coverage for metallization among different levels of integrated circuits, and especially for very thick polyimide layer applications. | 03-24-2011 |
20110076853 | Novel process method for post plasma etch treatment - A method of fabricating a wafer comprising MEMS devices comprises etching trenches or vias into the wafer using a deep reactive ion etching process wherein this process forms residual polymers on sidewalls of the trenches or vias. The wafer is exposed to a dry-cleaning process wherein residual polymers are removed. The dry-cleaning process comprises hot oven baking, combustion, or laser beam illumination. | 03-31-2011 |
20110151673 | PLASMA ETCHING METHOD, PLASMA ETCHING DEVICE, AND METHOD FOR PRODUCING PHOTONIC CRYSTAL - A plasma etching method capable of oblique etching with a high aspect ratio and high uniformity is provided. In the plasma etching method, a base body is etched with a high aspect ratio by the following process: An electric-field control device having an ion-introducing orifice penetrating therethrough in a direction inclined from the normal to the surface of a base body is placed on or above the surface of this base body. Plasma is generated on the surface of the base body on or above which the electric-field control is placed. A potential difference is formed between the plasma and the base body so as to attract ions in the plasma toward the base body. | 06-23-2011 |
20110250760 | METHOD FOR MANUFACTURING A MICRO-ELECTROMECHANICAL STRUCTURE - Disclosed herein is a method for manufacturing a micro-electromechanical structure. The method includes the following steps. A circuitry layer having a release feature is formed on an upper surface of a first substrate. A passive layer is formed on the circuitry layer without covering the release feature. The release feature is removed to expose the first substrate by a wet etching process. A portion of the exposed first substrate is anisotropically etched. A second substrate is disposed above the circuitry layer. A cavity is formed in the lower surface of the first substrate. The cavity is filled with a polymeric material. A portion of the first substrate under the microstructure is removed to release the micro-electromechanical structure. | 10-13-2011 |
20110318933 | SUBSTRATE PROCESSING METHOD - There is provided a substrate processing method capable of preventing the decrease in etching efficiency by positive ions and increasing the overall etching efficiency by using negative ions. The substrate processing method includes applying a plasma RF and a bias RF in the pattern of a pulse wave, respectively. The substrate processing method repeatedly performs the steps of: ( | 12-29-2011 |
20120108072 | SHOWERHEAD CONFIGURATIONS FOR PLASMA REACTORS - Apparatus, devices, and methods for increasing the ion energy in a plasma processing devices are provided. In various embodiments, the surface area of a showerhead facing the work piece includes a plurality of features. The plurality of features increases the surface area of the showerhead relative to a flat surface. Increasing the surface area of the showerhead increases the ion energy without increasing the power used to generate the plasma. Increasing the ion energy using such a showerhead allows for the broader application of plasma processes in integrated circuit manufacturing. | 05-03-2012 |
20120164838 | METHOD FOR PLANARIZING INTERLAYER DIELECTRIC LAYER - The present application discloses provides a method for planarizing an interlayer dielectric layer, comprising the steps of: providing a multilayer structure including at least one sacrificial layer and at least one insulating layer under the sacrificial layer on the semiconductor substrate and the first gate stack, performing a first RIE on the multilayer structure, in which a reaction chamber pressure is controlled in such a manner that an etching rate of the portion of the at least one sacrificial layer at a center of a wafer is higher than that at an edge of the wafer, so as to obtain a concave etching profile; performing a second RIE on the multilayer structure to completely remove the sacrificial layer and a part of the insulating layer, so as to obtain the insulating layer having a planar surface which serves as an interlayer dielectric layer. The planarization process can replace a CMP process for providing an interlayer dielectric layer having a planar surface, which achieves a relative larger available area of the wafer. | 06-28-2012 |
20120214313 | PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS - There is provided a plasma processing apparatus capable of optimizing a plasma process in response to various requirements of a micro processing by effectively controlling a RF bias function. In this plasma processing apparatus, a high frequency power RF | 08-23-2012 |
20120214314 | METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE - A method for manufacturing a semiconductor structure comprising complementary bipolar transistors, wherein for manufacture of a PNP-type structure, an emitter layer having a surface oxide layer is present on top of an NPN-type structure, the emitter layer comprising lateral and vertical surfaces, and wherein for removal of the oxide layer, an ion etching step is applied, wherein for the on etching step a plasma for providing ions is generated in a vacuum chamber by RF coupling and the generated ions are accelerated by an acceleration voltage between the plasma and a wafer comprising the semiconductor structure, and wherein the plasma generation and the ion acceleration are controlled independently from each other | 08-23-2012 |
20130157469 | Semiconductor Processing System with Source for Decoupled Ion and Radical Control - A top plate assembly is positioned above and spaced apart from the substrate support, such that a processing region exists between the top plate assembly and the substrate support. The top plate assembly includes a central plasma generation microchamber and a plurality of annular-shaped plasma generation microchambers positioned in a concentric manner about the central plasma generation microchamber. Adjacently positioned ones of the central and annular-shaped plasma generation microchambers are spaced apart from each other so as to form a number of axial exhaust vents therebetween. Each of the central and annular-shaped plasma generation microchambers is defined to generate a corresponding plasma therein and supply reactive constituents of its plasma to the processing region between the top plate assembly and the substrate support. | 06-20-2013 |
20130171829 | Titanium-Nitride Removal - A chemical solution that removes undesired metal hard mask yet remains selective to the device wiring metallurgy and dielectric materials. The present invention decreases aspect ratio by selective removal of the metal hard mask before the metallization of the receiving structures without adverse damage to any existing metal or dielectric materials required to define the semiconductor device, e.g. copper metallurgy or device dielectric. Thus, an improved aspect ratio for metal fill without introducing any excessive trapezoidal cross-sectional character to the defined metal receiving structures of the device will result. | 07-04-2013 |
20130196511 | ETCHING METHOD AND ETCHING APPARATUS - An etching method of etching a periodic pattern formed by self-assembling a first polymer and a second polymer of a block copolymer that is capable of being self-assembled, the etching method includes supplying a high frequency power which is set such that a great amount of ion energy is distributed within a range smaller than ion energy distribution at which an etching yield of the first polymer is generated and larger than or equal to ion energy distribution at which an etching yield of the second polymer is generated, and supplying a predetermined gas, generating plasma from the supplied gas by the high frequency power, and etching the periodic pattern on a processing target object by using the generated plasma. | 08-01-2013 |
20130203260 | ETCHING METHOD AND ETCHING APPARATUS - This etching method comprises a step for forming an organic compound gas ( | 08-08-2013 |
20130295773 | Method for Simultaneously Forming Features of Different Depths in a Semiconductor Substrate - Embodiments of the invention may include first providing a stack of layers including a semiconductor substrate, a buried oxide layer on the semiconductor substrate, a semiconductor-on-insulator layer on the buried-oxide layer, a nitride layer on the semiconductor-on-insulator layer, and a silicon oxide layer on the nitride layer. A first opening and second opening with a smaller cross-sectional area than the first opening are then formed in the silicon oxide layer, the nitride layer, the semiconductor-on-insulator layer, and the buried-oxide layer. The first opening and the second opening are then etched with a first etching gas. The first opening and the second opening are then etched with a second etching gas, which includes the first etching gas and a halogenated silicon compound, for example, silicon tetrafluoride or silicon tetrachloride. In one embodiment, the first etching gas includes hydrogen bromide, nitrogen trifluoride, and oxygen. | 11-07-2013 |
20130344700 | ELECTROSTATIC DEFLECTOR, LITHOGRAPHY APPARATUS, AND METHOD OF MANUFACTURING DEVICE - The present invention provides an electrostatic deflector which deflects a plurality of charged particle beams, the deflector comprising a first electrode member including a plurality of first electrode pairs arranged along a first axis direction in an oblique coordinate system, and a second electrode member including a plurality of second electrode pairs arranged along a second axis direction in the oblique coordinate system, wherein each of the plurality of charged particle beams is deflected by a corresponding first electrode pair of the plurality of first electrode pairs, and a corresponding second electrode pair of the plurality of second electrode pairs. | 12-26-2013 |
20140011365 | PLASMA PROCESSING APPARATUS AND METHOD - To improve processing uniformity by improving a working characteristic in an edge exclusion region. Provided is a plasma processing apparatus for processing a sample by generating plasma in a vacuum vessel to which a processing gas is supplied and that is exhausted to a predetermined pressure and by applying a radio frequency bias to a sample placed in the vacuum vessel, wherein a conductive radio frequency ring to which a radio frequency bias power is applied is arranged in a stepped part formed outside a convex part of the sample stage on which the wafer is mounted, and a dielectric cover ring is provided in the stepped part, covering the radio frequency ring, the cover ring substantially blocks penetration of the radio frequency power to the plasma from the radio frequency ring, and the radio frequency ring top surface is set higher than a wafer top surface. | 01-09-2014 |
20140141620 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes dry etching an interlayer insulating layer provided on a foundation layer by using a mask having a plurality of first openings and a plurality of second openings arranged more closely than the first openings to form simultaneously a first hole reaching the foundation layer under each of the first openings and a second hole reaching the foundation layer under the second openings. The first hole reaches the foundation layer without contacting any other first holes. After starting of the dry etching, a plurality of holes are formed under each of the plurality of second openings, and with the progress of the dry etching, the plurality of holes are connected with each other at least at their upper parts including their open ends to form the second hole having an opening area larger than an opening area of the first hole. | 05-22-2014 |
20140148014 | SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD - A substrate processing apparatus and method includes a chamber, a remote plasma source outside the chamber to provide activated ammonia and activated hydrogen fluoride into the chamber, and a direct plasma source to provide ion energy to a substrate inside the chamber. The plasma source includes ground electrodes extending in a first direction on a first plane perpendicularly spaced apart from a plane on which the substrate is disposed and defined by the first direction and a second direction perpendicular to the first direction and power electrodes disposed between the ground electrodes, extending in the first direction parallel to each other and receiving power from an RF power source to generate plasma between adjacent ground electrodes. The activated ammonia and the activated hydrogen fluoride are supplied on the substrate through a space between the power electrode and the ground electrode. | 05-29-2014 |
20140193978 | METHOD OF PLASMA PROCESSING AND APPARATUSES USING THE METHOD - A method of operating a plasma processing device includes outputting a first RF power having a first frequency and a first duty ratio, and outputting a second RF power having a second frequency higher than the first frequency and a second duty ratio smaller than the first duty ratio. The outputting of the first RF power and the outputting of the second RF power are synchronized with each other. | 07-10-2014 |
20140206197 | METHOD OF FABRICATING FIN FET AND METHOD OF FABRICATING DEVICE - In fin FET fabrication, side walls of a semiconductor fin formed on a substrate have certain roughness. Using such fins having roughness may induce variations in characteristics between transistors due to their shapes or the like. An object of the present invention is to provide a fin FET fabrication method capable of improving device characteristic by easily reducing the roughness of the side walls of fins after formation. In one embodiment of the present invention, side walls of a semiconductor fin are etched by an ion beam extracted from a grid to reduce the roughness of the side walls. | 07-24-2014 |
20140256148 | METHOD AND APPARATUS FOR HIGH EFFICIENCY GAS DISSOCIATION IN INDUCTIVE COUPLED PLASMA REACTOR - Embodiments of the present disclosure relate to method and apparatus for providing processing gases to a process chamber with improved plasma dissociation efficiency. One embodiment of the present disclosure provides a baffle nozzle assembly comprising an outer body defining an extension volume connected to a processing chamber. A processing gas is flown to the processing chamber through the extension volume which is exposed to power source for plasma generation. | 09-11-2014 |
20140349488 | Etching Gas - Disclosed is an etching gas provided containing CHF | 11-27-2014 |
20140363978 | Electron Beam-Induced Etching - Beam-induced etching uses a work piece maintained at a temperature near the boiling point of a precursor material, but the temperature is sufficiently high to desorb reaction byproducts. In one embodiment, NF | 12-11-2014 |
20150011093 | ION BEAM ETCHING SYSTEM - The disclosed embodiments relate to methods and apparatus for removing material from a substrate. In various implementations, conductive material is removed from a sidewall of a previously etched feature such as a trench, hole or pillar on a semiconductor substrate. In practicing the techniques herein, a substrate is provided in a reaction chamber that is divided into an upper plasma generation chamber and a lower processing chamber by a corrugated ion extractor plate with apertures therethrough. The extractor plate is corrugated such that the plasma sheath follows the shape of the extractor plate, such that ions enter the lower processing chamber at an angle relative to the substrate. As such, during processing, ions are able to penetrate into previously etched features and strike the substrate on the sidewalls of such features. Through this mechanism, the material on the sidewalls of the features may be removed. | 01-08-2015 |
20150017809 | FLUOROCARBON BASED ASPECT-RATIO INDEPENDENT ETCHING - A method for etching features into an etch layer disposed below a patterned mask is provided. At least three cycles are provided, where each cycle comprises providing an ion bombardment, by creating a plasma, of the etch layer to create activated sites of surface radicals in parts of the etch layer exposed by the patterned mask, extinguishing the plasma, exposing the etch layer to a plurality of fluorocarbon containing molecules, which causes the fluorocarbon containing molecules to selectively bind to the activated sites, wherein the selective binding is self limiting, and providing an ion bombardment of the etch layer to initiate an etch reaction between the fluorocarbon containing molecule and the etch layer, wherein the ion bombardment of the etch layer to initiate an etch reaction causes the formation of volatile etch products formed from the etch layer and the fluorocarbon containing molecule. | 01-15-2015 |
20150024604 | METHOD OF ETCHING A SILICON SUBSTRATE - A method of etching a silicon substrate, in which a depressed portion is formed by etching a first surface of the silicon substrate with ions generated in plasma, the method including introducing a rare gas into a reaction system to ionize the rare gas. | 01-22-2015 |
20150024605 | SUBSTRATE PROCESSING METHOD - A substrate processing method for forming a through-hole in a substrate by reactive ion etching includes preparing a substrate that has a first surface and a second surface and on the first surface side of which a first layer and a second layer are disposed, the second surface being on the opposite side to the first surface, the second layer covering the first layer; and performing reactive ion etching on the substrate from the second surface to form a through-hole extending through the substrate from the first surface to the second surface, the reactive ion etching being performed to reach the first layer. The etching rate of the second layer for the reactive ion etching is lower than that of the first layer. | 01-22-2015 |
20150056815 | GCIB ETCHING METHOD FOR ADJUSTING FIN HEIGHT OF FINFET DEVICES - A gas cluster ion beam (GCIB) etching method for adjusting a fin height in finFET devices is described. The method includes providing a substrate having a fin structure and a gap-fill material layer completely overlying the fin structure and filling the regions between each fin of the fin structure, wherein each fin includes a cap layer formed on a top surface thereof, and planarizing the gap-fill material layer until the cap layer is exposed on at least one fin of the fin structure. Additionally, the method includes setting a target fin height for the fin structure, wherein the fin height measured from an interface between the cap layer and the fin structure, and exposing the substrate to a GCIB and recessing the gap-fill material layer relative to the cap layer until the target fin height is substantially achieved. | 02-26-2015 |
20150064919 | ASPECT RATIO DEPENDENT ETCH (ARDE) LAG REDUCTION PROCESS BY SELECTIVE OXIDATION WITH INERT GAS SPUTTERING - Embodiments of methods for etching a substrate include exposing the substrate to a first plasma formed from an inert gas; exposing the substrate to a second plasma formed from an oxygen-containing gas to form an oxide layer on a bottom and sides of a low aspect ratio feature and a high aspect ratio feature, wherein the oxide layer on the bottom of the low aspect ratio feature is thicker than on the bottom of the high aspect ratio feature; etching the oxide layer from the bottom of the low and high aspect ratio features with a third plasma to expose the bottom of the high aspect ratio feature while the bottom of the low aspect ratio feature remains covered; and exposing the substrate to a fourth plasma formed from a halogen-containing gas to etch the bottom of the low aspect ratio feature and the high aspect ratio feature. | 03-05-2015 |
20150104949 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD THEREOF - In some embodiments of the present disclosure, an apparatus includes an ionizer. The ionizer is configured to dispatch a reactive ion on a surface. The apparatus also has an implanter and the implanter has an outlet releasing an accelerated charged particle on the surface. | 04-16-2015 |
20160042922 | TECHNIQUES AND APPARATUS FOR ANISOTROPIC METAL ETCHING - In one embodiment, a method for etching a copper layer disposed on a substrate includes directing reactive ions to the substrate when a mask that defines an exposed area and protected area is disposed on the copper layer, wherein an altered layer is generated in the exposed area comprising a chemically reactive material; and exposing the copper layer to a molecular species that is effective to react with the chemically reactive material so as to remove the altered layer. | 02-11-2016 |
20160049304 | SYSTEM, METHOD AND APPARATUS FOR PLASMA ETCH HAVING INDEPENDENT CONTROL OF ION GENERATION AND DISSOCIATION OF PROCESS GAS - A method of etching a wafer includes injecting a source gas mixture into a process chamber. The injecting includes injecting the source gas into multiple hollow cathode cavities in a top electrode, generating plasma in each of the cavities, and outputting the plasma from corresponding outlets of the cavities into a wafer processing region in the chamber, where the processing region is located between the outlets and a surface to be etched. An etchant gas mixture is injected into the processing region through injection ports in the top electrode such that the etchant gas mixes with the plasma output from the outlets. The etchant gas is prevented from flowing into the outlets of the cavities by the plasma flowing from the outlets. Mixing the etchant gas and the output from the cavities generates a desired chemical species in the processing region and thereby enables the surface to be etched. | 02-18-2016 |
20160049310 | Method for Selective Oxide Removal - A method for removing oxide selective to a material comprising at least silicon and at least nitrogen is disclosed, the method comprising providing in a reactor a structure having a surface comprising a region, wherein said region comprises a material comprising at least silicon and at least nitrogen, providing on said structure an oxide layer overlying at least a part of said region, and removing said oxide layer selective to said material by etching, thereby exposing at least a part of said at least overlaid part of said region, wherein said etching is done only by providing an etchant gas comprising boron, whereby a voltage bias lower than 30 V is applied to the structure. | 02-18-2016 |
20160064231 | FAST ATOMIC LAYER ETCH PROCESS USING AN ELECTRON BEAM - An etch process gas is provided to a main process chamber having an electron beam plasma source, and during periodic passivation operations a remote plasma source provides passivation species to the main process chamber while ion energy is limited below an etch ion energy threshold. During periodic etch operations, flow from the remote plasma source is halted and ion energy is set above the etch threshold. | 03-03-2016 |
20160064232 | ION BEAM ETCH WITHOUT NEED FOR WAFER TILT OR ROTATION - Various embodiments herein relate to methods and apparatus for etching feature on a substrate. In a number of embodiments, no substrate rotation or tilting is used. While conventional etching processes rely on substrate rotation to even out the distribution of ions over the substrate surface, various embodiments herein achieve this purpose by moving the ion beams relative to the ion source. Movement of the ion beams can be achieved in a number of ways including electrostatic techniques, mechanical techniques, magnetic techniques, and combinations thereof. | 03-03-2016 |
20160064244 | ATOMIC LAYER ETCH PROCESS USING AN ELECTRON BEAM - Atomic layer etching using alternating passivation and etching processes is performed with an electron beam plasma source, in which the ion energy is set to a low level below the etch threshold of the material to be etched during passivation and to a higher level above the etch threshold during etching but below the etch threshold of the unpassivated material. | 03-03-2016 |
20160064260 | ION INJECTOR AND LENS SYSTEM FOR ION BEAM MILLING - The embodiments herein relate to methods and apparatus for performing ion etching on a semiconductor substrate, as well as methods for forming such apparatus. In some embodiments, an electrode assembly may be fabricated, the electrode assembly including a plurality of electrodes having different purposes, with each electrode secured to the next in a mechanically stable manner. Apertures may be formed in each electrode after the electrodes are secured together, thereby ensuring that the apertures are well-aligned between neighboring electrodes. In some cases, the electrodes are made from degeneratively doped silicon, and the electrode assembly is secured together through electrostatic bonding. Other electrode materials and methods of securing may also be used. The electrode assembly may include a hollow cathode emitter electrode in some cases, which may have a frustoconical or other non-cylindrical aperture shape. A chamber liner and/or reflector may also be present in some cases. | 03-03-2016 |
20160064519 | ULTRAHIGH SELECTIVE POLYSILICON ETCH WITH HIGH THROUGHPUT - Provided are methods and apparatuses for removing a polysilicon layer on a wafer, where the wafer can include a nitride layer, a low-k dielectric layer, an oxide layer, and other films. A plasma of a hydrogen-based species and a fluorine-based species is generated in a remote plasma source, and the wafer is exposed to the plasma at a relatively low temperature to limit the formation of solid byproduct. In some implementations, the wafer is maintained at a temperature below about 60° C. The polysilicon layer is removed at a very high etch rate, and the selectivity of polysilicon over the nitride layer and the oxide layer is very high. In some implementations, the wafer is supported on a wafer support having a plurality of thermal zones configured to define a plurality of different temperatures across the wafer. | 03-03-2016 |
20160071723 | GAS CLUSTER REACTOR FOR ANISOTROPIC FILM GROWTH - A method of performing in-situ cleaning of a substrate includes inserting a gas cluster ion beam into a processing chamber containing a substrate, the gas cluster ion beam includes a broad gas cluster ion bean that reaches an entire surface of the substrate. The entire surface of the substrate becomes substantially uniform after an exposure to the gas cluster ion beam. | 03-10-2016 |
20160071734 | PROCESS GAS ENHANCEMENT FOR BEAM TREATMENT OF A SUBSTRATE - A beam processing system and method of operating are described. In particular, the beam processing system includes a beam source having a nozzle assembly that is configured to introduce a primary gas through the nozzle assembly to a vacuum vessel in order to produce a gaseous beam, such as a gas cluster beam, and optionally, an ionizer positioned downstream from the nozzle assembly, and configured to ionize the gaseous beam to produce an ionized gaseous beam. The beam processing system further includes a process chamber within which a substrate is positioned for treatment by the gaseous beam, and a secondary gas source, wherein the secondary gas source includes a secondary gas supply system that delivers a secondary gas, and a secondary gas controller that operatively controls the flow of the secondary gas injected into the beam processing system downstream of the nozzle assembly. | 03-10-2016 |
20160071739 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device manufacturing method includes performing reactive ion etching of the film containing a metal disposed on the bottom of the first groove and the film containing a metal disposed on the bottom of the second groove under a same condition in a state where the substrate is heated to the target temperature. | 03-10-2016 |
20160141150 | FAST-GAS SWITCHING FOR ETCHING - A method for etching a layer in a plasma chamber with an inner injection zone gas feed and an outer injection zone gas feed is provided. The layer is placed in the plasma chamber. A pulsed etch gas is provided from the inner injection zone gas feed at a first frequency, wherein flow of pulsed etch gas from the inner injection zone gas feed is ramped down to zero. The pulsed etch gas is provided from the outer injection zone gas feed at the first frequency and simultaneous with and out of phase with the pulsed etch gas from the inner injection zone gas feed. The etch gas is formed into a plasma to etch the layer, simultaneous with the providing the pulsed etch gas from the inner injection zone gas feed and providing the pulsed gas from the outer interjection zone gas feed. | 05-19-2016 |
20160148786 | PULSED PLASMA CHAMBER IN DUAL CHAMBER CONFIGURATION - Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to set parameters to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF period, and to assist in the re-striking of the bottom plasma during the ON period. | 05-26-2016 |
20160172216 | Ion Energy Control By RF Pulse Shape | 06-16-2016 |
20160181117 | INTEGRATED ETCH/CLEAN FOR DIELECTRIC ETCH APPLICATIONS | 06-23-2016 |
20160189975 | ETCHING METHOD AND ETCHING APPARATUS - An etching method is provided. In the etching method, a temperature of a chiller configured to cool a pedestal is controlled so as to become −20 degrees C. or lower. Plasma is generated from a hydrogen-containing gas and a fluoride-containing gas supplied from a gas supply source by supplying first high frequency power having a first frequency supplied to the pedestal from a first high frequency power source. A silicon oxide film deposited on a substrate placed on the pedestal is etched by the generated plasma. Second high frequency power having a second frequency lower than the first frequency of the first high frequency power is supplied to the pedestal from a second high frequency power source in a static eliminating process after the step of etching the silicon oxide film. | 06-30-2016 |
20160379816 | TECHNIQUES TO ENGINEER NANOSCALE PATTERNED FEATURES USING IONS - A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension. | 12-29-2016 |
20180025916 | MONOLAYER FILM MEDIATED PRECISION MATERIAL ETCH | 01-25-2018 |