| Entries |
| Document | Title | Date |
|---|
| 20080213951 | Method of fabricating pixel structure - A method of fabricating a pixel structure including the following procedures is provided. First, a substrate having an active device thereon is provided. A patterned passivation layer is formed on the substrate and the active device, and the patterned passivation layer exposes a portion of the active device. Then, a conductive layer is formed over the patterned passivation layer, and the conductive layer is electrically connected to the active device. A mask exposing a portion of the conductive layer is provided above the conductive layer. A laser is used to irradiate the conductive layer via the mask to remove the portion of the conductive layer exposed by the mask. As a result, the remained portion of the conductive layer constitutes a pixel electrode, and the pixel electrode is electrically connected to the active device. The method simplifies the fabrication process of a pixel structure, and thus reduces the fabrication cost. | 09-04-2008 |
| 20080227242 | PIXEL STRUCTURE OF A THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY - A pixel structure of a thin film transistor liquid crystal display employs a design of three metal layers and includes an organic insulating layer between a data signal line and a common electrode for reducing a parasitic capacitance, while a passivation layer included between the common electrode and a pixel electrode acts as a storage capacitor required for the pixels, so as to achieve a high aperture ratio, and the common electrode can act as a shielding bar for enhancing the display contrast. | 09-18-2008 |
| 20080261356 | METHOD OF FORMING THIN FILM TRANSISTOR - A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate and includes at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer. | 10-23-2008 |
| 20080268586 | SWITCHING DEVICE FOR A PIXEL ELECTRODE AND METHODS FOR FABRICATING THE SAME - The invention discloses a switching element of a pixel electrode for a display device and methods for fabricating the same. A gate is formed on a substrate. A first copper silicide layer is formed on the gate. An insulating layer is formed on the first copper silicide layer. A semiconductor layer is formed on the insulating layer. A source and a drain are formed on the semiconductor layer. Moreover, a second copper silicide layer is sandwiched between the semiconductor layer and the source/drain. | 10-30-2008 |
| 20090011551 | Method for manufacturing semiconductor device - A method for manufacturing a semiconductor device is provided, which comprises at least a steps of forming a gate insulating film over a substrate, a step of forming a microcrystalline semiconductor film over the gate insulating film, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film. The microcrystalline semiconductor film is formed by introducing a silicon hydride gas or a silicon halide gas when a surface of the gate insulating film is subjected to hydrogen plasma to generate a crystalline nucleus over the surface of the gate insulating film, and by increasing a flow rate of the silicon hydride gas or the silicon halide gas. | 01-08-2009 |
| 20090029508 | Method for manufacturing semiconductor device - A method for manufacturing a semiconductor device and a display device each including a thin film transistor which has excellent electric characteristics and high reliability, with high mass productivity. In a display device which includes a channel-etch inversely-staggered thin film transistor in which a microcrystalline semiconductor layer is used for a channel formation region, the microcrystalline semiconductor layer is formed of a stacked layer of a microcrystalline semiconductor film which is formed by a deposition method and can be a nucleus of crystal growth and an amorphous semiconductor film; a conductive film and a semiconductor film which forms a source region and a drain region and to which an impurity imparting one conductivity is added are formed over the amorphous semiconductor film; and the conductive film is irradiated with laser light. The amorphous semiconductor film over the microcrystalline semiconductor film is crystallized by the laser light, and the microcrystalline semiconductor layer including the microcrystalline semiconductor film formed by a deposition method can be formed. | 01-29-2009 |
| 20090042342 | METHOD FOR CRYSTALLIZATION OF AMORPHOUS SILICON BY JOULE HEATING - The present invention provides a method for preparation of crystallization of amorphous silicon thin film, which comprises providing a forming a amorphous silicon on a dielectric film formed on a transparent substrate; then forming a conductive layer on the top surface of substrate; applying an electric field to the conductive layer so as to generate heat; and crystallization of amorphous silicon thin film by the generated heat. | 02-12-2009 |
| 20090047758 | METHOD OF MANUFACTURING DISPLAY DEVICE - In a case of forming a bottom-gate thin film transistor, a step of forming a microcrystalline semiconductor film over a gate insulating film by a plasma CVD method, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film are performed. In the step of forming the microcrystalline semiconductor film, the pressure in the reaction chamber is set at or below 10 | 02-19-2009 |
| 20090047759 | Method for manufacturing semiconductor device - After a gate insulating film is formed over a gate electrode, in order to improve the quality of a microcrystalline semiconductor film which is formed in an early stage of deposition, a film near an interface with the gate insulating film is formed under a first deposition condition in which a deposition rate is low but the quality of a film to be formed is high, and then, a film is further deposited under a second deposition condition in which a deposition rate is high. Then, a buffer layer is formed to be in contact with the microcrystalline semiconductor film. Further, plasma treatment with a rare gas such as argon or hydrogen plasma treatment is performed before formation of the film under the first deposition condition for removing adsorbed water on a substrate. | 02-19-2009 |
| 20090047760 | Method for manufacturing semiconductor device - Electric characteristics of a thin film transistor including a channel formation region including a microcrystalline semiconductor are improved. The thin film transistor includes a gate electrode, a gate insulating film formed over the gate electrode, a microcrystalline semiconductor layer formed over the gate insulating film, a semiconductor layer which is formed over the microcrystalline semiconductor layer and includes an amorphous semiconductor, and a source region and a drain region which are formed over the semiconductor layer. A channel is formed in the microcrystalline semiconductor layer when the thin film transistor is placed in an on state, and the microcrystalline semiconductor layer includes an impurity element for functioning as an acceptor. The microcrystalline semiconductor layer is formed by a plasma-enhanced chemical vapor deposition method. In forming the microcrystalline semiconductor layer, a process gas is excited with two or more kinds of high-frequency electric power with different frequencies. | 02-19-2009 |
| 20090047761 | Manufacturing method of semiconductor device - An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film. | 02-19-2009 |
| 20090068800 | Method and/or system for forming a thin film - Embodiments of methods, apparatuses, devices, and/or systems for forming a thin film are described. | 03-12-2009 |
| 20090075440 | DISPLAY AND MANUFACTURING METHOD THEREOF - A display includes a substrate, a control electrode formed on the substrate, input and output electrodes formed on the substrate having facing sides facing each other with respect to the control electrode, a semiconductor layer contacting the input and the output electrodes, and an insulating layer formed between the control electrode and the semiconductor layer. At least one of the facing sides of the input and output electrodes on the semiconductor layer has a plurality of protrusions. The channel between the input and output electrodes is formed with various shapes, the length of the channel is prevented from being extending by a skew phenomenon, and the width of the channel may be extended. | 03-19-2009 |
| 20090098691 | MANUFACTURING PROCESS OF THIN FILM TRANSISTOR - A thin film transistor includes a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted by a number of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a number of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of a conventional thin film transistor. | 04-16-2009 |
| 20090124052 | METHOD OF FABRICATING MEMORY CELL - A method of fabricating a memory cell includes following steps. First, a substrate is provided, and a control gate is formed on the substrate. Then, a dielectric layer is formed to cover the control gate and the substrate. Afterward, an α-SiGe layer is formed on the dielectric layer. After that, a laser annealing process is performed to oxidize the α-SiGe layer into a silicon oxide layer, so as to separate out Ge atoms from the α-SiGe layer to form a Ge quantum dot layer between the silicon oxide layer and the dielectric layer. A poly-Si island is then formed on the silicon oxide layer, wherein the poly-Si island includes a source doped region, a drain doped region, and a channel region located therebetween. | 05-14-2009 |
| 20090137087 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, FILM DEPOSITION METHOD, AND FILM DEPOSITION APPARATUS - An object is to provide a film deposition apparatus in which the amount of leakage from the outside of the chamber to the inside of the chamber is reduced. Even if leakage occurs from the outside of the chamber to the inside of the chamber, oxygen and nitrogen included in an atmosphere that surrounds the outer wall of the chamber are reduced as much as possible and the atmosphere is filled with a noble gas or hydrogen, whereby the inside of the chamber is kept cleaner at 1/100 or less, preferably, 1/1000 or less of oxygen concentration and nitrogen concentration than those in the air. Since the space with high airtightness is provided adjacent to the outside of the chamber, the chamber is covered with a bag and a high-purity argon gas is supplied to the bag. | 05-28-2009 |
| 20090148987 | METHOD FOR FABRICATING PIXEL STRUCTURE - A method for fabricating a pixel structure is disclosed. A substrate is provided. A first conductive layer is formed on the substrate, and a first shadow mask exposing a portion of the first conductive layer is disposed over the first conductive layer. Laser is used to irradiate the first conductive layer for removing the part of the first conductive layer and forming a gate. A gate dielectric layer is formed on the substrate to cover the gate. A channel layer is formed on the gate dielectric layer over the gate. A source and a drain are formed on the channel layer and respectively above both sides of the gate. A patterned passivation layer is formed to cover the channel layer and expose the drain. An electrode material layer is formed to cover the patterned passivation layer and the exposed drain. | 06-11-2009 |
| 20090162982 | ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME - An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole. | 06-25-2009 |
| 20090209068 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE - In a method of manufacturing a thin film transistor substrate, a gate line and a gate electrode are formed on a substrate. A gate insulating layer is formed to cover the gate line and the gate electrode. A semiconductor layer is formed on the gate insulating layer to overlap with the gate electrode. A data line, a source electrode, and a drain electrode are formed on the gate insulating layer and the semiconductor layer. A photoresist layer is formed on the data line, the source electrode, and the drain electrode. The photoresist layer is patterned, and an organic layer is formed on the substrate having the photoresist layer pattern. Then, the photoresist layer pattern is removed. | 08-20-2009 |
| 20090209069 | ORGANIC SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is an object of the present invention to provide a method for manufacturing an inexpensive organic TFT which does not depend on an expensive dedicated device and does not expose an organic semiconductor to atmospheric air. Moreover, it is another object of the present invention to provide a method for manufacturing an organic TFT at low temperature so as not to cause a problem of pyrolyzing a material. In view of the foregoing problems, one feature of the present invention is that a film-like protector which serves as a protective film is provided over an organic semiconductor film. The film-like protector can be formed by being fixed to a film-like support body with an adhesive agent or the like. | 08-20-2009 |
| 20090215233 | PHOTORESIST COMPOSITION AND METHOD OF MANUFACTURING ARRAY SUBSTRATE USING THE SAME - A photoresist composition includes a binder resin, a photo acid generator, an acryl resin having four different types of monomers, and a solvent. | 08-27-2009 |
| 20090246919 | METHOD FOR MANUFACTURING PIXEL STRUCTURE - A method for manufacturing a pixel structure includes forming a first conductive layer on a substrate and patterning the first conductive layer with use of a first mask as an etching mask to form a gate. A dielectric layer is formed over the substrate to cover the gate. A semiconductor material layer is formed on the dielectric layer and patterned with use of the first mask as an etching mask to form a semiconductor layer on the dielectric layer. A second conductive layer is formed over the substrate and patterned with use of a second mask as an etching mask to form a source/drain over the substrate. A third conductive layer is formed over the substrate and patterned with use of a third mask as an etching mask to form a pixel electrode over the substrate. The pixel electrode is electrically connected to the drain. | 10-01-2009 |
| 20090305473 | METHOD FOR FABRICATING THIN FILM TRANSISTOR - A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer. | 12-10-2009 |
| 20100003791 | METHOD FOR MANUFACTURING ELECTRONIC CIRCUIT COMPONENT - An object of the present invention is to provide a method for manufacturing an electronic circuit component such as an organic TFT | 01-07-2010 |
| 20100022055 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME - A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer. | 01-28-2010 |
| 20100029049 | METHOD OF FABRICATING ORGANIC THIN FILM TRANSISTOR USING SURFACE ENERGY CONTROL - Provided is a method of fabricating an organic thin film transistor (OTFT) using surface energy control. The method changes a polarity of a gate insulating layer to a polarity of a semiconductor channel layer to be formed on the gate insulating layer by controlling surface energy of the gate insulating layer, thereby promoting growth of the semiconductor channel layer on the gate insulating layer. According to the method, the interface characteristics between the gate insulating layer and the semiconductor channel layer are improved, and thus it is possible to implement an OTFT that can minimize leakage current and has high field effect mobility and low turn-on voltage. | 02-04-2010 |
| 20100047974 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY SUBSTRATE - A simplified method of manufacturing a thin film transistor array substrate is disclosed. The method includes: forming gate electrodes, gate lines and gate pads on a substrate with the use of a first mask; forming a gate insulation film, a semiconductor layer, and a metal layer on the substrate; forming a first photoresist pattern on the metal layer with the use of a second mask; forming first contact holes for the gate pads with the use of the first photoresist pattern; forming a second photoresist pattern, and providing patterns for data pads, data lines, and thin film transistors with the use of the second photoresist pattern; providing a third photoresist pattern, and forming contact holes for source/drain electrodes and second contact holes the gate pads with the use of the third photoresist pattern; forming a protective film on the substrate and providing a fourth photoresist pattern on the protective film with the use of a third mask; forming third contact holes for the gate pads, contact holes for the data pads, gate lines, and drain electrodes, and contact holes for pixel electrodes, with the use of the fourth photoresist pattern; and forming a transparent conduction film on the fourth photoresist pattern having the contact holes. | 02-25-2010 |
| 20100055851 | PHOTORESIST COMPOSTION, METHOD FOR FORMING THIN FILM PATTERNS, AND METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR USING THE SAME - The present invention relates to a photoresist composition that comprises a resin that is represented by Formula 1, a method for forming a thin film pattern, and a method for manufacturing a thin film transistor array panel by using the same. | 03-04-2010 |
| 20100055852 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects. | 03-04-2010 |
| 20100055853 | METHOD FOR MANUFACTURING PIXEL STRUCTURE - A method for manufacturing a pixel structure is provided. A gate and a gate insulating layer are sequentially formed on a substrate. A semiconductor layer and a second metal layer are sequentially formed on the gate insulating layer. The semiconductor layer and the second metal layer are patterned to form a channel layer, a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and drain are disposed on a portion of the channel layer. The gate, channel, source and drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain. | 03-04-2010 |
| 20100062574 | THIN-FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, LIQUID CRYSTAL DISPLAY PANEL HAVING THE SAME AND ELECTRO-LUMINESCENCE DISPLAY PANEL HAVING THE SAME - A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance. | 03-11-2010 |
| 20100099226 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR - Decrease of the off-state current, increase of the on-state current, and reduction of variations of electrical characteristics. A method for manufacturing a channel-etched inversed staggered thin film transistor includes the following steps: removing, by first dry-etching, a part of a semiconductor layer including an impurity element which imparts one conductivity type, which is exposed from the source and drain electrodes, and partially a part of an amorphous semiconductor layer just below and in contact with the part of the semiconductor layer; removing, by second dry-etching, partially the part of the amorphous semiconductor layer which is exposed by the first dry-etching; and performing plasma treatment on the surface of the part of the amorphous semiconductor layer which is exposed by the second dry-etching so that an altered layer is formed. | 04-22-2010 |
| 20100105176 | Thin Film Transistor Array Panel Used For Liquid Crystal Display And A Manufacturing Method Thereof - A method for manufacturing a TFT array panel is presented. The method includes: forming a gate line and a gate electrode on a substrate with a first mask; depositing an insulation layer on the gate line and on the gate electrode; depositing a semiconductor layer; depositing an n+ amorphous silicon layer; forming a data line, a source electrode and a drain electrode on the substrate with a second mask; removing the exposed portion of the n+ amorphous silicon layer; forming a passivation film on the semiconductor layer, the n+ amorphous silicon layer, the data line, the source electrode and the drain electrode by using a third mask such that a portion of the drain electrode and the semiconductor layer is exposed; removing the exposed portion of the semiconductor layer; and forming a pixel electrode connected to the exposed portion of the drain electrode by using a fourth mask. | 04-29-2010 |
| 20100120209 | ETCHANT COMPOSITION, AND METHOD OF FABRICATING METAL PATTERN AND THIN FILM TRANSISTOR ARRAY PANEL USING THE SAME - An etchant composition is provided. The etchant composition includes about 40 to about 65 wt % of phosphoric acid, about 2 to about 5 wt % of nitric acid, about 2 to about 20 wt % of acetic acid, about 0.1 to about 2 wt % of a compound containing phosphate, about 0.1 to about 2 wt % of a compound simultaneously containing an amino group and a carboxyl group, and a remaining weight percent of water for the total weight of the composition. | 05-13-2010 |
| 20100124804 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured. | 05-20-2010 |
| 20100136755 | Method for fabricating thin film transistor - A method for fabricating a thin film transistor (TFT) on a substrate includes forming a gate electrode; forming a semiconductor layer being insulated from the gate electrode and partially overlapped with the gate electrode; sequentially forming first and second gate insulating layers between the gate electrode and the semiconductor layer, wherein the first gate insulating layer is formed of a material different from the second gate insulating layer and at least one of the first and second gate insulating layers includes a sol-compound; and forming source and drain electrodes at both sides of the semiconductor layer. | 06-03-2010 |
| 20100136756 | Thin film transistor, method for fabricating the same and display device - A method for fabricating a TFT on a substrate includes forming a gate electrode; forming a semiconductor layer insulated from the gate electrode and partially overlapped with the gate electrode; forming a gate insulating layer between the gate electrode and the semiconductor layer, the gate insulating layer including a sol-gel compound; and forming source and drain electrodes at both sides of the semiconductor layer. | 06-03-2010 |
| 20100136757 | METHOD FOR ALIGNING ELONGATED NANOSTRUCTURES - A method of depositing elongated nanostructures that allows accurate positioning and orientation is described. The method involves printing or otherwise depositing elongated nanostructures in a carrier solution. The deposited droplets are also elongated, usually by patterning the surface upon which the droplets are deposited. As the droplet evaporates, the fluid flow within the droplets is controlled such that the nanostructures are deposited either at the edge of the elongated droplet or the center of the elongated droplet. The described deposition technique has particular application in forming the active region of a transistor. | 06-03-2010 |
| 20100151636 | Methods to make fine patterns by exploiting difference of threshold laser fluence of materials and tft fabrication methods using the same - Disclosed are methods of making fine patterns by exploiting difference in threshold laser fluence of materials and a thin film transistor (TFT) fabrication methods using the same, and more particularly, to a method of forming a fine pattern and a method of fabricating a TFT through the same method, in which a plurality of layers different in threshold laser fluence are stacked and then exposed to a laser so that a layer having a low threshold laser fluence can be selectively removed, thereby making fine patterns precisely and forming a cavity of a gate electrode precisely and easily. | 06-17-2010 |
| 20100159652 | METHOD OF MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE - In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes. | 06-24-2010 |
| 20100167476 | PHOTORESIST COMPOSITION AND METHOD OF FABRICATING THIN FILM TRANSISTOR SUBSTRATE - The present invention relates to a photoresist composition for digital exposure and a method of fabricating a thin film transistor substrate. The photoresist composition for digital exposure includes a binder resin including a novolak resin and a compound represented by the chemical formula (1), a photosensitizer including a diazide-based compound, and a solvent: | 07-01-2010 |
| 20100197085 | Method of manufacturing an organic thin film transistor - An organic thin film transistor that has good adhesiveness and good contact resistance as well as allows ohmic contact between an organic semiconductor layer and a source electrode and a drain electrode, and its manufacturing method. There is also provided a flat panel display device using the organic thin film transistor. The organic thin film transistor includes a source electrode, a drain electrode, an organic semiconductor layer, a gate insulating layer, and a gate electrode formed on a substrate, and a carrier relay layer including conductive polymer material formed at least between the organic semiconductor layer and the source electrode or the organic semiconductor layer and the drain electrode. | 08-05-2010 |
| 20100197086 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME AND MASK FOR MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE - A thin film transistor substrate, wherein the moving area of electrons between source and drain electrodes of a thin film transistor (TFT) is minimized, the moving distance of electrons is increased, and the sizes of capacitors defined by a gate electrode together with the respective source and drain electrodes are identical to each other so that an off current generated when the TFT is off can be minimized; a method of manufacturing the thin film transistor substrate; and a mask for manufacturing the thin film transistor substrate. Accordingly, it is possible to minimize an off current induced due to a phenomenon of electron trapping by light. | 08-05-2010 |
| 20100216285 | Method for Manufacturing Crystalline Semiconductor Film and Method for Manufacturing Thin Film Transistor - A crystalline semiconductor film is manufactured by a first step in which a crystalline semiconductor film is formed on and in contact with an insulating film and a second step in which the crystalline semiconductor film is grown in a condition where a generation frequency of nuclei is lower than in the first step. The second step is conducted in a condition where a flow ratio of a semiconductor material gas to a deposition gas is lower than in the first step. Thus, a crystalline semiconductor film whose crystal grains are large and uniform can be obtained and plasma damage to a base film of the crystalline semiconductor film can be reduced compared with a crystalline semiconductor film in a conventional method. | 08-26-2010 |
| 20100227442 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR - A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased. | 09-09-2010 |
| 20100233858 | METHOD OF PREVENTING GENERATION OF ARC DURING RAPID ANNEALING BY JOULE HEATING - Disclosed herein is a rapid annealing method in a mixed structure composed of a heat treatment-requiring material, dielectric layer and conductive layer, comprising that during rapid annealing on a predetermined part of the heat treatment-requiring material, by instantaneously generated intense heat due to Joule heating by application of an electric field to the conductive layer, the potential difference between the heat treatment-requiring material and the conductive layer is set lower than the dielectric break-down voltage of the dielectric layer, thereby preventing generation of arc by dielectric breakdown of the dielectric layer during the annealing. | 09-16-2010 |
| 20100248433 | Method for Manufacturing Thin Film Transistor - It is an object to provide a method for manufacturing a thin film transistor, in which the number of masks to be used is small. A thin film transistor is manufactured as follows: a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked; a resist mask having a recessed portion is formed thereover with the use of a multi-tone mask; a thin-film stack body is formed with first etching; a gate electrode layer is formed with second etching in which an etched first conductive film is side-etched; and then a source electrode and a drain electrode and the like are formed. A crystalline semiconductor film is used for the semiconductor film. | 09-30-2010 |
| 20100261321 | METHOD FOR MANUFACTURING FLEXIBLE SEMICONDUCTOR DEVICE - There is provided a method for manufacturing a flexible semiconductor device. The manufacturing method is characterized by comprising (i) a step of forming an insulating film on the upper surface of a resin film, (ii) a step of forming a pattern of extraction electrodes on the upper surface of the resin film, (iii) a step of forming a semiconductor layer on the insulating film in such a manner that the semiconductor layer is in contact with the pattern of extraction electrodes, and (iv) a step of forming a sealing resin layer on the upper surface of the resin film in such a manner that the sealing resin layer covers the semiconductor layer and the pattern of extraction electrodes, wherein at least one forming step among the above (i) to (iv) is carried out by a printing method. In the manufacturing method, various layers can be formed by a simple printing process without using a vacuum process, photolithography, or the like. | 10-14-2010 |
| 20100279474 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A formation of a gate electrode provided over an oxide semiconductor layer of a thin film transistor is performed together with a patterning of the oxide semiconductor layer. | 11-04-2010 |
| 20100279475 | THIN FILM TRANSISTOR, DISPLAY DEVICE HAVING THIN FILM TRANSISTOR, AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor. | 11-04-2010 |
| 20100285640 | ETCHANT FOR ETCHING METAL WIRING LAYERS AND METHOD FOR FORMING THIN FILM TRANSISTOR BY USING THE SAME - The present invention discloses an etchant for etching at least two different metal layers, the etchant comprising hydrogen peroxide (H | 11-11-2010 |
| 20100291741 | Method of fabricating array substrate - A method of fabricating an array substrate includes sequentially forming a first metal layer, a first inorganic insulating layer and an intrinsic amorphous silicon layer on a substrate, the first metal layer including a first metallic material layer and a second metallic material layer; crystallizing the intrinsic amorphous silicon; forming a gate electrode, a gate line, a gate insulating layer and an active layer; forming an interlayer insulating layer including first and second contact holes respectively exposing both sides of the active layer; forming first and second ohmic contact patterns respectively contacting the both sides of the active layers, a source electrode, a drain electrode, and a data line connecting the source electrode; forming a passivation layer on the source electrode, the drain electrode; and forming a pixel electrode on the passivation layer and contacting the drain electrode. | 11-18-2010 |
| 20100297817 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A method for manufacturing a thin film transistor (TFT) is disclosed. The method is achieved by forming and defining a source and a drain of a thin film transistor through two lithographic processes cycles so that the channel length (L) of the thin film transistor can be reduced to 1.5 to 4.0 μm. Besides, the I | 11-25-2010 |
| 20100304538 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - To reduce variation among TFTs in manufacture of a semiconductor device including n-type thin film transistors and p-type thin film transistors. Further, another object of the present invention is to reduce the number of masks and manufacturing steps, and manufacturing time. A method of manufacturing a semiconductor device includes forming an island-shaped semiconductor layer of a first thin film transistor, then, forming an island-shaped semiconductor layer of the second thin film transistor. In the formation of the island-shaped semiconductor layer of the second thin film transistor, a gate insulating film in contact with the island-shaped semiconductor layer of the second thin film transistor is used as a protection film (an etching stopper film) for the island-shaped semiconductor layer of the first thin film transistor. | 12-02-2010 |
| 20100323482 | TFT ARRAY SUBSTRATE AND THE FABRICATION METHOD THEREOF - A TFT array substrate is provided. The TFT array substrate includes: a gate electrode connected to a gate line; a source electrode connected to a data line that crosses the gate line and defines a pixel region; a drain electrode facing the source electrode with a channel between; a semiconductor layer forming the channel in between the source electrode and the drain electrode; a pixel electrode in the pixel region and contacting the drain electrode; a channel passivation layer formed on the semiconductor layer; a gate pad with a gate pad lower electrode that extends from the gate line; and a data pad having a data pad lower electrode separated from the data line. | 12-23-2010 |
| 20110003442 | METHOD FOR MANUFACTURING FLEXIBLE SEMICONDUCTOR DEVICE - A method for making a flexible semiconductor device includes the following steps. A rigid substrate is provided. A flexible substrate is provided, and placed on the rigid substrate. A semiconductor device is directly formed on the flexible substrate using a semiconductor process. After the rigid substrate is removed, the flexible semiconductor device is formed. | 01-06-2011 |
| 20110014755 | METHOD OF FABRICATING POLYCRYSTALLINE SILICON, TFT FABRICATED USING THE SAME, METHOD OF FABRICATING THE TFT, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE INCLUDING THE TFT - A method of fabricating a polycrystalline silicon (poly-Si) layer includes providing a substrate, forming an amorphous silicon (a-Si) layer on the substrate, forming a thermal oxide layer to a thickness of about 10 to 50 Å on the a-Si layer, forming a metal catalyst layer on the thermal oxide layer, and annealing the substrate to crystallize the a-Si layer into the poly-Si layer using a metal catalyst of the metal catalyst layer. Thus, the a-Si layer can be crystallized into a poly-Si layer by a super grain silicon (SGS) crystallization method. Also, the thermal oxide layer may be formed during the dehydrogenation of the a-Si layer so that an additional process of forming a capping layer required for the SGS crystallization method can be omitted, thereby simplifying the fabrication process. | 01-20-2011 |
| 20110020989 | METHOD FOR FORMING MICROCRYSTALLINE SEMICONDUCTOR FILM AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A microcrystalline semiconductor film having a high crystallinity is formed. Further, a thin film transistor having preferable electric characteristics and high reliability and a display device including the thin film transistor are manufactured with high mass productivity. A step in which a deposition gas containing silicon or germanium is introduced at a first flow rate and a step in which the deposition gas containing silicon or germanium is introduced at a second flow rate are repeated while hydrogen is introduced at a fixed rate, so that the hydrogen and the deposition gas containing silicon or germanium are mixed, and a high-frequency power is supplied. Therefore, a microcrystalline semiconductor film is formed over a substrate. | 01-27-2011 |
| 20110033990 | TRANSISTOR, AND DISPLAY DEVICE, ELECTRONIC DEVICE, AND SEMICONDUCTOR DEVICE USING THE SAME - It is an object of an invention disclosed in the present specification to provide a transistor having low contact resistance. In the transistor, a semiconductor film including an impurity element imparting P-type or N-type conductivity, an insulating film formed thereover, and an electrode or a wiring that is electrically connected to the semiconductor film through a contact hole formed at least in the insulating film are included; the semiconductor film has a first range of a concentration of the impurity element (1×10 | 02-10-2011 |
| 20110033991 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel includes a substrate, a data line and a gate electrode formed on the substrate, a insulating layer formed on the data line and the gate electrode, a semiconductor layer formed on the insulating layer, a drain electrode and a source electrode formed on the semiconductor layer, a passivation layer formed on the drain electrode and the source electrode including a first contact hole to expose a portion of the data line, a second contact hole to expose a portion of the source electrode, a third contact hole to expose a portion of the drain electrode, and a fourth contact hole to expose a portion of gate electrode, a first connector formed on the passivation layer and connected to the data line and the source electrode through the first contact hole and the second contact hole, a gate line formed on the passivation layer and connected to the gate electrode through the fourth contact hole, and a pixel electrode connected to the drain electrode through the third contact hole. | 02-10-2011 |
| 20110097857 | ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - An array substrate for a liquid crystal display device includes a gate line and a data line crossing each other on a substrate to define a pixel region, an insulating layer between the gate line and the data line, a gate electrode extending from the gate line, and a transistor in the pixel region having an active layer on the insulating layer, ohmic contact layers of a first material that are adjacent to ends of the active layer, buffer layers of a second material, which is different from the first material, on the ohmic contact layers, a source electrode contacting one of the buffer layers and a drain electrode contacting another one of the buffer layers, wherein the active layer is in an island shape over the gate electrode and within a boundary defined by a perimeter of the gate electrode. | 04-28-2011 |
| 20110117707 | PIXEL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a pixel structure is provided. First, a first mask process is performed to form a patterned first metal layer on a substrate, wherein the patterned first metal layer includes a gate. Next, a second mask process is performed to form a patterned insulating layer and a patterned semiconductor layer over the gate, wherein the patterned insulating layer is disposed on the patterned first metal layer, and the patterned semiconductor layer is disposed on the patterned insulating layer. Then, a third mask process is performed to define a thin film transistor (TFT) and a pixel electrode connected thereto and to form a passivation layer to cover the TFT. | 05-19-2011 |
| 20110124162 | METHOD OF FABRICATING ARRAY SUBSTRATE - A method of fabricating an array substrate includes forming a gate line and a gate electrode; forming a gate insulating layer, an intrinsic amorphous silicon layer, an inorganic material insulating layer and a heat transfer layer on the gate line and the gate electrode; irradiating a laser beam onto the heat transfer layer to crystallize the intrinsic amorphous silicon layer into a polycrystalline silicon layer; removing the heat transfer layer; patterning the inorganic insulating material layer using a buffered oxide etchant to form an etch-stopper corresponding to the gate electrode forming an impurity-doped amorphous silicon layer and a metal layer on the etch-stopper and the polycrystalline silicon layer; patterning the metal layer to form a data line, a source electrode and a drain electrode and forming a pixel electrode on the passivation layer. | 05-26-2011 |
| 20110124163 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode. | 05-26-2011 |
| 20110136303 | Method and Apparatus for Manufacturing Thin-Film Transistor - A method and apparatus of fabricating a thin film transistor is disclosed, which patterns an ohmic contact layer by a laser patterning process so that it is capable of preventing a semiconductor layer from being damaged, and reducing fabrication time, wherein the method comprises forming a gate electrode pattern on a substrate; forming a gate insulating layer on the gate electrode pattern; sequentially forming a semiconductor layer pattern and an ohmic contact layer pattern on the gate insulating layer; forming source and drain electrode patterns on the ohmic contact layer pattern, wherein the source and drain electrode patterns are provided at a fixed interval therebetween; and removing the ohmic contact layer pattern exposed between the source and drain electrode patterns through the use of laser. | 06-09-2011 |
| 20110151630 | Display element manufacturing method and manufacturing apparatus, thin film transistor manufacturing method and manufacturing apparatus, and circuit forming apparatus - The thin film transistor manufacturing apparatus comprises a surface modification layer forming means, which forms a surface modification layer on a substrate, an illuminating part, which irradiates light that includes ultraviolet rays, a mask, on which the patterns of the source electrode and the drain electrode are drawn, a projection optical system, which illuminates a mask using light from the illuminating part and projects the pattern of the mask to the substrate as a pattern image, and a coating part, which coats a fluid electrode material to a region in which the surface modification layer has been modified by projection of the pattern image in order to form the source electrode and the drain electrode. | 06-23-2011 |
| 20110151631 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THEREOF - A thin film transistor substrate and a method of manufacturing the thin film transistor substrate comprises forming a gate line and a data line intersecting each other with a gate insulating layer interposed and defining a pixel area on the substrate, a thin film transistor electrically connected to the gate line and the data line, and a stepped-structure occurring pattern overlapping at least one of the gate line and the data line; forming a passivation layer having a stepped-structure portion formed by the stepped-structure occurring pattern on the substrate; forming a photoresist pattern having a second stepped-structure portion corresponding to the stepped-structure portion on the passivation layer; patterning the passivation layer using the photoresist pattern as a mask; forming a transparent conductive layer on the substrate; and removing the photoresist pattern where the transparent conductive layer is covered by a stripper penetrating through the stepped-structure portion of the photoresist pattern and forming a pixel electrode connected to the thin film transistor. | 06-23-2011 |
| 20110159647 | Mask Pattern, Method of Fabricating Thin Film Transistor, and Method of Fabricating Organic Light Emitting Display Device Using the Same - A method of fabricating a polycrystalline silicon thin film for a thin film transistor (TFT), a mask pattern used for the method, and a method of fabricating a flat panel display device using the method and the mask pattern. In one embodiment, a mask pattern includes a plurality of regions, each of the regions having at least one of one or more transparent portions or one or more non-transparent portions. A total area of the one or more transparent portions and the one or more non-transparent portions in one of the regions is substantially equal to a total area of the one or more transparent portions and the one or more non-transparent portions in at least one other of the regions. A total area of the transparent portions in the mask pattern is different from a total area of the non-transparent portions in the mask pattern. | 06-30-2011 |
| 20110165740 | Semiconductor Device and Method For Manufacturing Semiconductor Device - An object is to provide a semiconductor device including a microcrystalline semiconductor film with favorable quality and a method for manufacturing the semiconductor device. In a thin film transistor formed using a microcrystalline semiconductor film, yttria-stabilized zirconia having a fluorite structure is formed in the uppermost layer of a gate insulating film in order to improve quality of a microcrystalline semiconductor film to be formed in the initial stage of deposition. The microcrystalline semiconductor film is deposited on the yttria-stabilized zirconia, so that the microcrystalline semiconductor film around an interface with a base particularly has favorable crystallinity while by crystallinity of the base. | 07-07-2011 |
| 20110165741 | DISPLAY DEVICE, METHOD FOR MANUFACTURING THEREOF, AND TELEVISION DEVICE - The invention provides a display device and a method for manufacturing thereof by increasing a material efficiently as well as simplifying steps. Also, the invention provides a technique for forming a pattern such as a wiring, that is used for forming a display device, to have a predetermined shape with an excellent controllability. The method for manufacturing a display device includes the steps of: forming a lyophobic region; selectively irradiating laser beam in the lyophobic region to form a lyophilic region; selectively discharging a composition, that contains a conductive material, in the lyophilic region to form a gate electrode layer; forming a gate insulating layer and a semiconductor layer over the gate electrode layer; discharging a composition containing a conductive material over the semiconductor layer to form a source electrode layer and a drain electrode layer; and forming a pixel electrode layer on the source or drain electrode layer. | 07-07-2011 |
| 20110165742 | PIXEL STRUCTURE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a pixel structure includes providing a substrate having a pixel area. A first metal layer, a gate insulator and a semiconductor layer are formed on the substrate and patterned by using a first half-tone mask or a gray-tone mask to form a transistor pattern, a lower capacitance pattern and a lower circuit pattern. Next, a dielectric layer and an electrode layer both covering the three patterns are sequentially formed and patterned to expose a part of the lower circuit pattern, a part of the lower capacitance pattern and a source/drain region of the transistor pattern. A second metal layer formed on the electrode layer and the electrode layer are patterned by using a second half-tone mask or the gray-tone mask to form an upper circuit pattern, a source/drain pattern and an upper capacitance pattern. A portion of the electrode layer constructs a pixel electrode. | 07-07-2011 |
| 20110171793 | LIQUID CRYSTAL DISPLAY DEVICE AND FABRICATION METHOD THEREOF - A method for fabricating a display includes providing a first substrate divided into a pixel part and first and second pad parts, forming a gate electrode and a gate line in the pixel part of the first substrate and forming a gate pad line in the first pad part of the first substrate, forming a first insulation film and a semiconductor film over the gate electrode, the gate line and the gate pad line, forming an active pattern over the gate electrode from the semiconductor film with the first insulation film interposed therebetween and forming a contact hole exposing a portion of the gate pad line using a single mask, forming source and drain electrodes in the pixel part, forming a pixel electrode in the pixel part, forming a gate pad electrode electrically connected with the gate pad line via the contact hole, forming a second insulation film over the pixel electrode and the gate pad electrode, exposing a portion of the pixel electrode and at least one portion of the gate pad electrode, and attaching the first substrate and a second substrate. | 07-14-2011 |
| 20110183478 | Method of manufacturing TFT and array TFT - A method of manufacturing a thin film transistor includes sequentially forming a gate and at least one insulation layer on a substrate, forming a source electrode and a drain electrode on the at least one insulation layer, and forming a channel layer formed of a semiconductor on a part of the source electrode and the drain electrode, wherein the gate, the source electrode, and the drain electrode are formed by using a hybrid inkjet printing apparatus. | 07-28-2011 |
| 20110183479 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A TFT array panel and a manufacturing method thereof. | 07-28-2011 |
| 20110207269 | TRANSISTOR AND MANUFACTURING METHOD OF THE SAME - A transistor is manufactured by a method including: forming a first wiring layer; forming a first insulating film to cover the first wiring layer; forming a semiconductor layer over the first insulating film; forming a conductive film over the semiconductor layer; and performing at least two steps of etching on the conductive film to form second wiring layers which are apart from each other, wherein the two steps of etching include at least a first etching process performed under the condition that the etching rate for the conductive film is higher than the etching rate for the semiconductor layer, and a second etching process performed under the condition that the etching rates for the conductive film and the semiconductor layer are higher than those of the first etching process. | 08-25-2011 |
| 20110212580 | THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND FLAT PANEL DISPLAY DEVICE HAVING THE SAME - A thin film transistor (TFT) using an oxide semiconductor layer as an active layer, a method of manufacturing the TFT, and a flat panel display (FPD) including the TFT are taught. The TFT includes a gate electrode formed on a substrate, an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer, and the oxide semiconductor layer including a channel region, a source region, and a drain region, and a source electrode and a drain electrode respectively electrically contacting the source region and the drain region. The oxide semiconductor layer is formed of an InZnO or IZO layer (indium zinc oxide layer) including Zr. The carrier density of the IZO layer is controlled to be 1×10 | 09-01-2011 |
| 20110217815 | MANUFACTURING METHOD OF OXIDE SEMICONDUCTOR FILM AND MANUFACTURING METHOD OF TRANSISTOR - An object is to provide a manufacturing method of an oxide semiconductor film with high crystallinity. Another object is to provide a manufacturing method of a transistor with high field effect mobility. In a manufacturing method of an oxide semiconductor film, an oxide semiconductor film is formed over a substrate in an atmosphere in which oxygen is purposely not contained, and then the oxide semiconductor film is crystallized by a heat treatment in an atmosphere containing oxygen. | 09-08-2011 |
| 20110230019 | METHOD OF MANUFACTURING A THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE SAME - An approach for patterning and etching without a mask is provided in a manufacturing a thin-film transistor, a gate electrode, a gate insulating layer, a semiconductor layer, an ohmic contact layer and source metal layer of a substrate. A first photoresist pattern including a first photo pattern and a second photo pattern is formed using a digital exposure device by generating a plurality of spot beams, the first photo pattern is formed to a first region of the base substrate and has a first thickness, and the second photo pattern is formed to a second region adjacent to the first region, and has a second thickness and a width in a range of about 50% to about 60% of a diameter of the spot beam. The source metal layer is patterned to form a source electrode and a drain electrode, and the source electrode and the drain electrode are spaced apart from each other in the first region of an active pattern. | 09-22-2011 |
| 20110237034 | METHOD FOR MANUFACTURING AN ORGANIC SEMICONDUCTOR ELEMENT - In manufacturing a device using an organic TFT, it is essential to develop an element in which a channel length is short or a channel width is narrow to downsize a device. Based on the above, it is an object of the present invention to provide an organic TFT in which characteristic is improved. In view of the foregoing problem, one feature of the present invention is that an element is baked after an organic semiconductor film is deposited. More specifically, one feature of the present invention is that the organic semiconductor film is heated under atmospheric pressure or under reduced pressure. Moreover, a baking process may be carried out in an inert gas atmosphere. | 09-29-2011 |
| 20110256673 | DEPOSITION METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to provide a deposition method in which a gallium oxide film is formed by a DC sputtering method. Another object is to provide a method for manufacturing a semiconductor device using a gallium oxide film as an insulating layer such as a gate insulating layer of a transistor. An insulating film is formed by a DC sputtering method or a pulsed DC sputtering method, using an oxide target including gallium oxide (also referred to as GaO | 10-20-2011 |
| 20110263082 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - In a manufacturing process of a bottom-gate transistor including an oxide semiconductor film, dehydration or dehydrogenation through heat treatment and oxygen doping treatment are performed. A transistor including an oxide semiconductor film subjected to dehydration or dehydrogenation through heat treatment and oxygen doping treatment can be a highly reliable transistor having stable electric characteristics in which the amount of change in threshold voltage of the transistor between before and after the bias-temperature stress (BT) test can be reduced. | 10-27-2011 |
| 20110269274 | THIN FILM TRANSISTORS HAVING MULTIPLE DOPED SILICON LAYERS - Embodiments of the present invention generally relate to a TFT and a method for its fabrication. The TFT disclosed herein is a silicon based TFT in which the active channel comprises amorphous silicon. Over the amorphous silicon, multiple layers of doped silicon are deposited in which the resistivity of the doped silicon layers is higher at the interface with the amorphous silicon layer as compared to the interface with the source and drain electrodes. Alternatively, a single doped silicon layer is deposited over the amorphous silicon in which the properties of the single doped layer change throughout the thickness. It is better to have a lower resistivity at the interface with the source and drain electrodes, but lower resistivity usually means less substrate throughput. By utilizing multiple or graded layers, low resistivity can be achieved. The embodiments disclosed herein include low resistivity without sacrificing substrate throughput. | 11-03-2011 |
| 20110287591 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device including an oxide semiconductor, which has stable electrical characteristics and high reliability. In a manufacturing process of a bottom-gate transistor including an oxide semiconductor layer, heat treatment in an atmosphere containing oxygen and heat treatment in vacuum are sequentially performed for dehydration or dehydrogenation of the oxide semiconductor layer. In addition, irradiation with light having a short wavelength is performed concurrently with the heat treatment, whereby elimination of hydrogen, OH, or the like is promoted. A transistor including an oxide semiconductor layer on which dehydration or dehydrogenation treatment is performed through such heat treatment has improved stability, so that variation in electrical characteristics of the transistor due to light irradiation or a bias-temperature stress (BT) test is suppressed. | 11-24-2011 |
| 20110287592 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device is provided, which comprises at least a steps of forming a gate insulating film over a substrate, a step of forming a microcrystalline semiconductor film over the gate insulating film, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film. The microcrystalline semiconductor film is formed by introducing a silicon hydride gas or a silicon halide gas when a surface of the gate insulating film is subjected to hydrogen plasma to generate a crystalline nucleus over the surface of the gate insulating film, and by increasing a flow rate of the silicon hydride gas or the silicon halide gas. | 11-24-2011 |
| 20110294268 | Thin Film Transistors and Methods of Manufacturing Thin Film Transistors - A thin film transistor includes a layer structure having a gate electrode, a gate insulation layer and a channel layer. A source line may contact the channel layer, and may extend along a direction crossing over the gate electrode. The source line may partially overlap the gate electrode so that both sides of the source line overlapping the gate electrode may be entirely positioned between both sides of the gate electrode. A drain line may make contact with the channel layer and may be spaced apart from the source line by a channel length. The drain line may have a structure symmetrical to that of the source line. Overlap areas among the gate electrode, the source line and the drain line may be reduced, so that the thin film transistor may ensure a high cut-off frequency. | 12-01-2011 |
| 20110318889 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to provide a manufacturing method of a semiconductor device in which a defect in characteristics due to a crack occurring in a semiconductor device is reduced. Provision of a crack suppression layer formed of a metal film in the periphery of a semiconductor element makes it possible to suppress a crack occurring from the outer periphery of a substrate and reduce damage to the semiconductor element. In addition, even if the semiconductor device is subjected to physical forces from the outer periphery in separation and transposition steps, progression (growth) of a crack to the semiconductor device can be suppressed by the crack suppression layer. | 12-29-2011 |
| 20120003795 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - An object is to provide a manufacturing method of a semiconductor device having a high field effect mobility and including an oxide semiconductor layer in a semiconductor device including an oxide semiconductor. Another object is to provide a manufacturing method of a semiconductor device capable of high speed operation. An oxide semiconductor layer is terminated by a halogen element, and thus an increase in the contact resistance between the oxide semiconductor layer and a conductive layer in contact with the oxide semiconductor layer is suppressed. Therefore, the contact resistance between the oxide semiconductor layer and the conductive layer becomes favorable and a transistor having a high field effect mobility can be manufactured. | 01-05-2012 |
| 20120003796 | DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY PANEL HAVING THE SAME - An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride. | 01-05-2012 |
| 20120009742 | Thin Film Transistor, Display Device Having Thin Film Transistor, And Method For Manufacturing The Same - A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device in a high yield are provided. In the thin film transistor, a gate electrode, a gate insulating film, crystal grains that mainly contain silicon and are provided for a surface of the gate insulating film, a semiconductor film that mainly contains germanium and covers the crystal grains and the gate insulating film, and a buffer layer in contact with the semiconductor film that mainly contains germanium overlap with one another. Further, the display device has the thin film transistor. | 01-12-2012 |
| 20120015487 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME INCLUDING FORMING A TEMPERATURE DEPENDENT GATE INSULATING LAYER - The present invention provides a thin film transistor array panel comprising a substrate; a gate line containing Ag formed on the substrate at a low temperature to prevent agglomeration, a first gate insulating layer formed on the gate line, a second gate insulating layer formed on the first gate insulating layer, a data line perpendicularly intersecting the gate line, and a thin film transistor connected to the gate line and the data line, and a manufacturing method thereof. | 01-19-2012 |
| 20120028421 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a thin film transistor array panel includes forming a gate line; forming an insulating layer on the gate line; forming first and second silicon layers first and second metal layers; forming a photoresist pattern having first and second portions; forming first and second metal patterns by etching the first and second metal layers; processing the first metal pattern with SF | 02-02-2012 |
| 20120064678 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a TFT array panel includes forming a photosensitive film pattern with first and second parts in first and second sections on a metal layer, etching the metal layer of a third section using the film pattern as a mask to form first and second metal patterns, etching the film pattern to remove the first part, etching first and second amorphous silicon layers of the third section using the second part as a mask to form an amorphous silicon pattern and a semiconductor, etching the first and second metal patterns of the first section using the second part as a mask to form a source electrode and a drain electrode including an upper layer and a lower layer, and etching the amorphous silicon pattern of the region corresponding to the first section by using the second part as a mask to form an ohmic contact. | 03-15-2012 |
| 20120070945 | ORGANIC SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SAME, ORGANIC TRANSISTOR ARRAY, AND DISPLAY - This disclosure provides an organic semiconductor device including: a substrate; a source electrode and a drain electrode which are formed on the substrate; an insulation partitioned part which is formed on the source electrode and the drain electrode, formed such that an opening part of the insulation partitioned part is disposed above a channel region formed by the source electrode and the drain electrode; an organic semiconductor layer which is formed in the opening part of the insulation partitioned part and on the source electrode and the drain electrode; a gate insulation layer which is formed on the organic semiconductor layer and made of an insulation resin material; and a gate electrode formed on the gate insulation layer, and the insulation partitioned part has a height ranging from 0.1 μm to 1.5 μm. | 03-22-2012 |
| 20120070946 | METHOD FOR FABRICATING A THIN FILM TRANSISTOR SUBSTRATE - A method for fabricating a thin film transistor substrate includes: (a) forming a gate electrode on a substrate using a first photoresist layer; (b) forming an insulating film, an active semiconductor layer, a doped semiconductor layer, an ohmic contact metal film, a passivation film, and a second photoresist layer on the substrate to cover the gate electrode; (c) disposing a multi-tone mask over the second photoresist layer, followed by performing a lithography process to form the second photoresist layer into a patterned photoresist, which has different thicknesses at a location corresponding in position to the gate electrode and on two opposite sides of the location; and (d) performing etching using the patterned photoresist. | 03-22-2012 |
| 20120083078 | METHOD FOR MANUFACTURING TRANSISTOR - To provide a method for manufacturing a transistor which has little variation in characteristics and favorable electric characteristics. A gate insulating film is formed over a gate electrode; a semiconductor layer including a microcrystalline semiconductor is formed over the gate insulating film; an impurity semiconductor layer is formed over the semiconductor layer; a mask is formed over the impurity semiconductor layer, and then the semiconductor layer and the impurity semiconductor layer are etched with use of the mask to form a semiconductor stacked body; the mask is removed and then the semiconductor stacked body is exposed to plasma generated in an atmosphere containing a rare gas to form a barrier region on a side surface of the semiconductor stacked body; and a wiring over the impurity semiconductor layer of the semiconductor stacked body is formed. | 04-05-2012 |
| 20120094445 | ETCHING METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device with high electric characteristics is provided. Part of a stacked semiconductor film in which an amorphous semiconductor film is provided on a crystalline semiconductor film is etched using a mixed gas including an HBr gas, a CF | 04-19-2012 |
| 20120094446 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Electric characteristics of a thin film transistor including a channel formation region including a microcrystalline semiconductor are improved. The thin film transistor includes a gate electrode, a gate insulating film formed over the gate electrode, a microcrystalline semiconductor layer formed over the gate insulating film, a semiconductor layer which is formed over the microcrystalline semiconductor layer and includes an amorphous semiconductor, and a source region and a drain region which are formed over the semiconductor layer. A channel is formed in the microcrystalline semiconductor layer when the thin film transistor is placed in an on state, and the microcrystalline semiconductor layer includes an impurity element for functioning as an acceptor. The microcrystalline semiconductor layer is formed by a plasma-enhanced chemical vapor deposition method. In forming the microcrystalline semiconductor layer, a process gas is excited with two or more kinds of high-frequency electric power with different frequencies. | 04-19-2012 |
| 20120100675 | MANUFACTURING METHOD OF MICROCRYSTALLINE SILICON FILM AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - To provide a manufacturing method of a microcrystalline silicon film having both high crystallinity and high film density. In the manufacturing method of a microcrystalline silicon film according to the present invention, a first microcrystalline silicon film that includes mixed phase grains is formed over an insulating film under a first condition, and a second microcrystalline silicon film is formed thereover under a second condition. The first condition and the second condition are a condition in which a deposition gas containing silicon and a gas containing hydrogen are used as a first source gas and a second source gas. The first source gas is supplied under the first condition in such a manner that supply of a first gas and supply of a second gas are alternately performed. | 04-26-2012 |
| 20120100676 | Thin Film Transistor Substrate of Horizontal Electric Field Type Liquid Crystal Display Device and Fabricating Method Thereof - A thin film transistor substrate of horizontal electric field type liquid crystal display device includes: a gate line and a common line arranged in parallel on a substrate; a data line crossing the gate line and the common line to define a pixel area; a thin film transistor having a gate connected to the gate line and a source electrode connected to the data line; a common electrode extending from the common line into the pixel area; a protective film for covering a plurality of signal lines and electrodes and the thin film transistor; a pixel hole in the protective film having an elongated shape that parallels the common electrode; and a pixel electrode connected to a side surface of a drain electrode of the thin film transistor within the pixel hole. | 04-26-2012 |
| 20120100677 | METHOD FOR MANUFACTURING MICROCRYSTALLINE SEMICONDUCTOR AND THIN FILM TRANSISTOR - A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate. | 04-26-2012 |
| 20120108018 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE - A method for manufacturing a thin film transistor substrate includes a step of forming a gate electrode ( | 05-03-2012 |
| 20120115286 | THIN-FILM TRANSISTOR PRODUCING METHOD - Provided is a thin film transistor manufacture method by which a thin film transistor provided with LDD regions can be produced without increasing the number of photo masks used. An etching stopper layer ( | 05-10-2012 |
| 20120135570 | LIFTING-OFF METHOD AND METHOD FOR MANUFACTURING TFT ARRAY SUBSTRATE - A lifting-off method and a manufacturing method for a thin film transistor (TFT) array substrate using the same are provided. A lifting-off method comprises forming a cavitation jet flow by using a lifting-off solution, and impacting a to-be-lifted-off surface of a substrate by means of the cavitation jet flow to remove a photoresist and a film deposited on the photoresist over the to-be-lifted-off surface. The disclosure may be applied to manufacturing processes for semiconductor devices or TFT array substrate. | 05-31-2012 |
| 20120149157 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A first resist pattern is formed by exposure using a first multi-tone photomask, and a first conductive layer, a first insulating layer, a first semiconductor layer, and a second semiconductor layer are etched, so that an island-shaped single layer and an island-shaped stack are formed. Here, sidewalls are formed on side surfaces of the island-shaped single layer and the island-shaped stack. Further, a second resist pattern is formed by exposure using a second multi-tone photomask, and a second conductive layer and the second semiconductor layer are etched, so that a thin film transistor, a pixel electrode, and a connection terminal are formed. After that, a third resist pattern is formed by exposure from a rear side using metal layers of the first conductive layer and the second conductive layer as masks, and the third insulating layer are etched, so that a protective insulating layer is formed. | 06-14-2012 |
| 20120156834 | METHODS FOR MANUFACTURING ARRAY SUBSTRATES - Disclosed is a patterned photoresist layer on a passivation layer, formed by a lithography process with a multi-tone photomask, having a non-photoresist region, a thin photoresist pattern, and a thick photoresist pattern. The passivation layer corresponding to the non-photoresist region is removed, thereby forming vias to expose a part of a drain electrode in a TFT and a part of a top electrode in a storage capacitor, respectively. The thin photoresist pattern is then ashed to expose the passivation layer in a pixel region. Thereafter, a conductive layer is selectively deposited on the exposed passivation layer and on the sidewalls/bottoms of the vias. Subsequently, the remaining thick photoresist pattern is ashed. | 06-21-2012 |
| 20120156835 | ETCHING METHOD AND MANUFACTURING METHOD OF THIN FILM TRANSISTOR - The amorphous silicon film is formed over the microcrystalline silicon film, and plasma treatment is performed on the amorphous silicon film in a mixed gas atmosphere of H | 06-21-2012 |
| 20120178225 | PRODUCING TRANSISTOR INCLUDING REDUCED CHANNEL LENGTH - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer and a second electrically conductive material layer. The first electrically conductive material layer has a thickness. A resist material layer is deposited over the second electrically conductive material layer. The resist material layer is patterned to expose a portion of the second electrically conductive material layer. Some of the second electrically conductive material layer is removed to expose a portion of the first electrically conductive material layer. The second electrically conductive material layer is caused to overhang the first electrically conductive material layer by removing some of the first electrically conductive material layer. The second electrically conductive material layer, the first conductive material layer, and at least a portion of the substrate are conformally coated with an electrically insulating material layer having a thickness such that the thickness of the first conductive material layer is greater than the thickness of the electrically insulating material layer. | 07-12-2012 |
| 20120184074 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR - A thin film transistor for an organic light emitting diode includes a substrate including a pixel portion and an interconnection portion, a buffer layer on the substrate, a gate electrode and a gate interconnection on the buffer layer, wherein the gate electrode is located at the pixel portion and the gate interconnection is located at the interconnection portion, a gate insulating layer on the substrate, a semiconductor layer on the gate electrode, source and drain electrodes electrically connected to the semiconductor layer, and a metal pattern on the gate interconnection. | 07-19-2012 |
| 20120190157 | MASK AND METHOD OF MANUFACTURING ARRAY SUBSTRATE USING THE SAME - A mask includes: a substrate that includes a central area and a peripheral area disposed around the central area; and lenses disposed in rows and columns, in the central area and the peripheral area. The lenses of opposing sides of the peripheral area may be disposed in different rows or columns. For a given amount of input light, the lenses of the peripheral area may focus less light on a substrate than the lenses of the central area. The mask may be disposed over the substrate in different positions, and then the substrate may be irradiated through the mask, while the mask is in each of the positions. The peripheral portion of the mask may be disposed over the same area of the substrate, while the mask is in different ones of the positions. | 07-26-2012 |
| 20120202324 | MANUFACTURING APPARATUS OF SEMICONDUCTOR DEVICE AND PATTERN-FORMING METHOD - The present invention provides a manufacturing apparatus of a semiconductor device, having a pattern-forming apparatus using a droplet-discharging method that is suitable for a large substrate in mass production. A plurality of pattern-forming apparatuses using a droplet-discharging method and a plurality of heat-treatment chambers are provided, and each of which is connected to one transfer chamber, which is a multi-chamber system. Discharging and baking are conducted efficiently to improve productivity. A gas is blown in the same direction as the scanning direction (or a scanning direction of a discharging head) on a substrate just after a droplet is landed, by providing a blowing means in the pattern-forming apparatus, and a heater is provided in a gas-flow path for local baking. | 08-09-2012 |
| 20120208330 | THIN FILM TRANSISTOR ARRAY AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a thin film transistor array substrate includes: forming a gate pattern on a substrate; forming a first gate insulating film and a second gate insulating film on the substrate; forming a source/drain pattern and a semiconductor pattern on the substrate; forming a passivation film on the substrate; forming a photo-resist pattern on the passivation film; patterning the passivation film using the photo-resist pattern to form a passivation film pattern, the patterning of the passivation film including over-etching the passivation film to form an open region in the passivation film; forming a transparent electrode film on the substrate; removing the photo-resist pattern and a portion of the transparent electrode film on the photo-resist pattern; and forming a pixel electrode on the first gate insulating layer. | 08-16-2012 |
| 20120220084 | METHOD OF FABRICATING POLYCRYSTALLINE SILICON LAYER, TFT FABRICATED USING THE SAME, METHOD OF FABRICATING TFT, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE HAVING THE SAME - A method of fabricating a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; crystallizing the amorphous silicon layer into a polycrystalline silicon layer using a crystallization-inducing metal; forming a metal layer pattern or metal silicide layer pattern in contact with an upper or lower region of the polycrystalline silicon layer corresponding to a region excluding a channel region in the polycrystalline silicon layer; and annealing the substrate to getter the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer to the region in the polycrystalline silicon layer having the metal layer pattern or metal silicide layer pattern. Accordingly, the crystallization-inducing metal existing in the channel region of the polycrystalline silicon layer can be effectively removed, and thus a thin film transistor having an improved leakage current characteristic and an OLED display device including the same can be fabricated. | 08-30-2012 |
| 20120231588 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR - A manufacturing method of thin film transistors is provided. The manufacturing method includes: providing a substrate; forming a gate electrode; forming a gate insulating layer; forming a patterned oxide semiconductor layer; forming a source electrode and a drain electrode; and executing a localized laser treatment. A laser beam is used to irradiate at least a part of the patterned oxide semiconductor layer in the localized laser treatment. An electrical resistitivity of the patterned oxide semiconductor layer irradiated by the laser beam is lower than an electrical resistitivity of the patterned oxide semiconductor layer without being irradiated by the laser beam. | 09-13-2012 |
| 20120231589 | THIN-FILM TRANSISTOR ARRAY DEVICE MANUFACTURING METHOD - The following processes are included: preparing a substrate; forming a first gate electrode above the substrate; forming a second gate electrode above the substrate and adjacent to the first gate electrode; forming a gate insulating film on the first gate electrode and the second gate electrode; forming, on the gate insulating film, a noncrystalline semiconductor film at least in a first region above the first gate electrode and a second region above the second gate electrode; irradiating the noncrystalline semiconductor film a laser beam having continuous convex light intensity distributions; and forming a first source electrode and a first drain electrode above the first region, and a second source electrode and a second drain electrode above the second region. In the irradiating, when irradiating the first region with an inner region of the laser beam, the second region is irradiated with an outer region of the laser beam. | 09-13-2012 |
| 20120238062 | LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME - An LCD is manufactured to provide a wide viewing angle device and may reduce manufacturing costs according to an embodiment. The LCD includes a substrate, a gate line disposed on the substrate, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line contacting the semiconductor layer, a drain electrode contacting the semiconductor layer and separated from the data line, a pixel electrode contacting the drain electrode, a passivation layer disposed on the pixel electrode, and a common electrode disposed on the passivation layer and including a branch electrode overlapping the pixel electrode. In one embodiment, the pixel electrode contacts an end portion of a thin film transistor. The LCD manufacturing process may be shortened and may save manufacturing costs because the LCD process need not make contact holes to connect the pixel electrode and the TFT. | 09-20-2012 |
| 20120244667 | PRECURSOR COMPOSITION FOR OXIDE SEMICONDUCTOR AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL USING THE SAME - Provided is a precursor composition for an oxide semiconductor. The precursor composition for the oxide semiconductor includes a metal complex compound formed by a metal ion and an organic ligand, wherein the precursor composition is represented by the following Formula 1. | 09-27-2012 |
| 20120264260 | TFT ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and gate electrode have first and second conductive layers, the first conductive layer is formed on the substrate, the first conductive layer contains molybdenum nitride , the second conductive layer is formed on the first conductive layer, and the second conductive layer contains copper. The gate insulating layer is disposed on the gate line, gate electrode and the substrate. The channel component is disposed on the gate insulating layer. The source electrode and drain electrode are disposed on the channel component, and data line is disposed on the gate insulating layer. | 10-18-2012 |
| 20120270372 | ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - An array substrate for an in-plane switching mode liquid crystal display device includes a substrate, a gate line disposed along a first direction on the substrate, a data line disposed along a second direction and crossing the gate line to define a pixel region, a thin film transistor connected to the gate line and the data line, pixel electrodes disposed in the pixel region and connected to the thin film transistor, common electrodes disposed in the pixel region and alternating with the pixel electrodes, a semiconductor layer underlying the data line and including a portion having a width greater than a width of the data line, and a first blocking pattern comprising an opaque material and disposed under the semiconductor layer. | 10-25-2012 |
| 20120276697 | MANUFACTURING METHOD OF ARRAY SUBSTRATE - A manufacturing method of an array substrate, comprising the following steps: S1 forming a gate signal line and a gate electrode on a base substrate, successively depositing a gate insulating layer, an active layer, and a metal layer, faulting a mask formed of photoresist on the metal layer, and removing the metal layer outside a region for forming a data line and source/drain electrodes through the mask; S2. simultaneously etching the active layer and ashing the photoresist so as to expose the metal layer within a channel region; S3. etching the active layer exposed by the photoresist after being ashed after the step S2; S4. removing the metal layer within the channel region. | 11-01-2012 |
| 20120289005 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A thin film transistor having low off-state current and excellent electrical characteristics can be manufactured. In an inverted staggered thin film transistor including a semiconductor film in which at least a microcrystalline semiconductor region and an amorphous semiconductor region are stacked, a conductive film and an etching protective film are stacked over the semiconductor film; a mask is formed over the etching protective film; first etching treatment in which the etching protective film, the conductive film, and the amorphous semiconductor region are partly etched is performed; then, the mask is removed. Next, second etching treatment in which the exposed amorphous semiconductor region and the microcrystalline semiconductor region are partly dry-etched is performed using the etched etching protective film as a mask so that the microcrystalline semiconductor region is partly exposed to form a back channel region. | 11-15-2012 |
| 20120289006 | METHOD OF MANUFACTURING POLY-SILICON TFT ARRAY SUBSTRATE - An embodiment of the present disclosure relates to a method of manufacturing a poly-silicon TFT array substrate, which accomplishes a patterning process to form a gate electrode, a poly-silicon semiconductor pattern and a pixel electrode with one process by using an HTM or GTM mask. | 11-15-2012 |
| 20120289007 | MANUFACTURING METHOD FOR THIN FILM TRANSISTOR WITH POLYSILICON ACTIVE LAYER - Embodiments of the disclosed technology relate to a method for manufacturing a thin film transistor (TFT) with a polysilicon active layer comprising: depositing an amorphous silicon layer on a substrate, and patterning the amorphous silicon layer so as to form an active layer comprising a source region, a drain region and a channel region; depositing an inducing metal layer on the source region and the drain region; performing a first thermal treatment on the active layer provided with the inducing metal layer so that the active layer is crystallized under the effect of the inducing metal; doping the source region and the drain region with a first impurity for collecting the inducing metal; and performing a second thermal treatment on the doped active layer so that the first impurity absorbs the inducing metal remained in the channel region. | 11-15-2012 |
| 20120289008 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured. | 11-15-2012 |
| 20120295406 | CARBON NANOTUBE DISPERSION LIQUID AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A carbon nanotube dispersion liquid obtained by mixing carbon nanotubes, a first organic solvent that is a nonpolar solvent, and a second organic solvent that has a polarity higher than that of this first organic solvent and is compatible with this first organic solvent. | 11-22-2012 |
| 20120295407 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A thin film transistor (TFT) and a method of manufacturing the same are provided, the TFT including a gate insulating layer on a gate. A channel may be formed on a portion of the gate insulating layer corresponding to the gate. A metal material may be formed on a surface of the channel. The metal material crystallizes the channel. A source and a drain may contact side surfaces of the channel. | 11-22-2012 |
| 20120309139 | METHOD FOR MANUFACTURING FIN FIELD-EFFECT TRANSISTOR - An embodiment of the present invention discloses a method for manufacturing a FinFET, when a fin is formed, a dummy gate across the fin is formed on the fin, a source/drain opening is formed in both the cover layer and the first dielectric layer at both sides of the dummy gate, the source/drain opening is at both sides of the fin covered by the dummy gate and is an opening region surrounded by the cover layer and the first dielectric layer around it. In the formation of a source/drain region in the source/drain opening, stress is generated due to lattice mismatching, and applied to the channel due to the limitation by the source/drain opening in the first dielectric layer, thereby increasing the carrier mobility of the device, and improving the performance of the device. | 12-06-2012 |
| 20120309140 | MANUFACTURING METHOD FOR THIN FILM SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR THIN FILM SEMICONDUCTOR ARRAY SUBSTRATE, METHOD OF FORMING CRYSTALLINE SILICON THIN FILM, AND APPARATUS FOR FORMING CRYSTALLINE SILICON THIN FILM - A crystalline silicon thin film is formed by irradiating a silicon thin film with a laser beam. The laser beam is a continuous wave laser beam. An intensity distribution of the laser beam in a first region about a center of the intensity distribution is symmetric on an anterior side and a posterior side of the center. The intensity distribution in a second region about the center is asymmetric on the anterior side and the posterior side. The first region is from the maximum intensity of the laser beam at the center to an intensity half of the maximum intensity. The second region is at most equal to the half of the maximum intensity of the laser beam. In the second region, an integral intensity value on the posterior side is larger than on the anterior side. | 12-06-2012 |
| 20120315730 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed. | 12-13-2012 |
| 20120315731 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel is provided, which includes a plurality of gate line, a plurality of common electrodes, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer, a plurality of drain electrodes formed on the semiconductor layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn is not produced on the surfaces of the common electrode. | 12-13-2012 |
| 20120322213 | SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE INCLUDING PERIPHERAL LINES HAVING OPENINGS AND FABRICATING METHOD THEREOF - A liquid crystal display device includes a substrate having a display region and a non-display region. In the display region, the gate line and a data line cross to define a pixel region and a thin film transistor is disposed at the crossing portion of the gate and data lines. The thin film transistor includes a gate electrode and source and drain electrodes. A peripheral line having a plurality of openings is disposed in the non-display region. The openings are slits, rectangles, circles, or triangles. The openings relieve plasma during dry-etching of the peripheral line. A pixel electrode is connected to the drain electrode in the pixel region. | 12-20-2012 |
| 20120322214 | METHOD AND STRUCTURE FOR ESTABLISHING CONTACTS IN THIN FILM TRANSISTOR DEVICES - The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general. | 12-20-2012 |
| 20130071973 | METHOD FOR FABRICATING THIN FILM TRANSISTOR ARRAY SUBSTRATE - A method of fabricating a thin film transistor array substrate is disclosed. The method includes: sequentially forming a first passivation layer, a photo acryl layer and a first transparent metal layer on the substrate provided with the source/drain electrodes and so on; forming a common electrode, which is disposed in the pixel region, and first through third contact holes, which are positioned in regions of the drain electrode, the gate pad and the data pad, respectively, using one of a half-tone mask and a diffractive mask; forming a second passivation layer on the substrate provided with the first through third contact holes; exposing the drain electrode, the gate pad and the data pad by removing the first and second passivation layers from the drain electrode region, the gate pad region and data pad region; and forming a pixel electrode on the second passivation layer opposite to the common electrode by forming a second transparent metal layer on the substrate and performing a third mask procedure for the second transparent metal layer. | 03-21-2013 |
| 20130095617 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME - An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility, A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current. | 04-18-2013 |
| 20130095618 | THIN FILM TRANSISTOR SUBSTRATE, LIQUID CRYSTAL DISPLAY HAVING THE SAME, AND METHOD OF MANUFACTURING THE SAME - In a thin film transistor, first and second thin film transistors are connected to an N | 04-18-2013 |
| 20130122666 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is an object to provide a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. In addition, it is another object to manufacture a highly reliable semiconductor device at low cost with high productivity. In a semiconductor device including a thin film transistor, a semiconductor layer of the thin film transistor is formed with an oxide semiconductor layer to which a metal element is added. As the metal element, at least one of metal elements of iron, nickel, cobalt, copper, gold, manganese, molybdenum, tungsten, niobium, and tantalum is used. In addition, the oxide semiconductor layer contains indium, gallium, and zinc. | 05-16-2013 |
| 20130122667 | THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE - In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented. | 05-16-2013 |
| 20130137224 | MANUFACTURING METHODS FOR LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICES - Fabrication processes for semiconductor devices are presented here. The device includes a support substrate, a buried oxide layer overlying the support substrate, a first semiconductor region located above the buried oxide layer and having a first conductivity type. The device also includes second, third, fourth, and fifth semiconductor regions. The second semiconductor region is located above the first semiconductor region, and it has a second conductivity type. The third semiconductor region is located above the second semiconductor region, and it has the first conductivity type. The fourth semiconductor region is located above the third semiconductor region, and it has the second conductivity type. The fifth semiconductor region extends through the fourth semiconductor region and the third semiconductor region to the second semiconductor region, and it has the second conductivity type. | 05-30-2013 |
| 20130143371 | DUAL-DEPTH SELF-ALIGNED ISOLATION STRUCTURE FOR A BACK GATE ELECTRODE - Doped semiconductor back gate regions self-aligned to active regions are formed by first patterning a top semiconductor layer and a buried insulator layer to form stacks of a buried insulator portion and a semiconductor portion. Oxygen is implanted into an underlying semiconductor layer at an angle so that oxygen-implanted regions are formed in areas that are not shaded by the stack or masking structures thereupon. The oxygen implanted portions are converted into deep trench isolation structures that are self-aligned to sidewalls of the active regions, which are the semiconductor portions in the stacks. Dopant ions are implanted into the portions of the underlying semiconductor layer between the deep trench isolation structures to form doped semiconductor back gate regions. A shallow trench isolation structure is formed on the deep trench isolation structures and between the stacks. | 06-06-2013 |
| 20130149818 | METHOD OF FABRICATING ARRAY SUBSTRATE - A method of fabricating an array substrate includes: forming a line or an electrode on a substrate on which a pixel region is defined, forming a protection layer on the line or the electrode, the protection layer formed of silicon nitride (SiN | 06-13-2013 |
| 20130157422 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A highly reliable semiconductor device which includes a transistor including an oxide semiconductor is provided. In the semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a stacked layer of an insulating layer and an aluminum film is provided in contact with the oxide semiconductor layer. Oxygen doping treatment is performed in such a manner that oxygen is introduced to the insulating layer and the aluminum film from a position above the aluminum film, whereby a region containing oxygen in excess of the stoichiometric composition is formed in the insulating layer, and the aluminum film is oxidized to form an aluminum oxide film. | 06-20-2013 |
| 20130164892 | THIN-FILM TRANSISTOR DEVICE MANUFACTURING METHOD, THIN-FILM TRANSISTOR DEVICE, AND DISPLAY DEVICE - A thin-film transistor device manufacturing method and others according to the present disclosure includes: forming a plurality of gate electrodes above a substrate; forming a gate insulating layer on the plurality of gate electrodes; forming an amorphous silicon layer on the gate insulating layer; forming a buffer layer and a light absorbing layer above the amorphous silicon layer; forming a crystalline silicon layer by crystallizing the amorphous silicon layer with heat generated by heating the light absorbing layer using a red or near infrared laser beam; and forming a source electrode and a drain electrode on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes, and film thicknesses of the gate insulating layer, the amorphous silicon layer, the buffer layer, and the light absorbing layer satisfy predetermined expressions. | 06-27-2013 |
| 20130178023 | ETCHING SOLUTION COMPOSITION AND METHOD OF ETCHING USING THE SAME - An etchant composition for etching a transparent electrode is provided, the etchant composition includes an inorganic acid, an ammonium (NH | 07-11-2013 |
| 20130210202 | METHOD OF PLANARIZING SUBSTRATE AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR USING THE SAME - A method of planarizing a substrate includes forming a conductive pattern on a first surface of a base substrate, forming a positive photoresist layer on the base substrate and the conductive pattern, exposing the positive photoresist layer to light by irradiating a second surface of the base substrate opposite to the first surface with light, developing the positive photoresist layer to form a protruded portion on the conductive pattern, forming a planarizing layer on the base substrate and the protruded portion and eliminating the protruded portion. | 08-15-2013 |
| 20130217191 | THIN FILM TRANSISTOR, DISPLAY DEVICE HAVING THIN FILM TRANSISTOR, AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and methods for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a pair of buffer layers formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the pair of buffer layers, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes the impurity element which serves as a donor. | 08-22-2013 |
| 20130217192 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A method for manufacturing a thin film transistor includes forming a semiconductor layer, a wiring layer and a patterned mask layer in sequence on a substrate on which a gate electrode and a gate insulating layer are formed; patterning the wiring layer and the semiconductor layer based on the patterned mask layer while irradiating external light; removing at least a part of the mask layer; forming a channel portion by etching the wiring layer while controlling irradiation of the external light. Further, the method for manufacturing the thin film transistor can obtain an improved structure by forming the semiconductor layer made of an oxide which reacts to external light irradiated thereto, thus capable of adjusting a selectivity between the semiconductor layer and the wiring layer. | 08-22-2013 |
| 20130230950 | MASK AND METHOD OF MANUFACTURING ARRAY SUBSTRATE USING THE SAME - A mask includes: a substrate that includes a central area and a peripheral area disposed around the central area; and lenses disposed in rows and columns, in the central area and the peripheral area. The lenses of opposing sides of the peripheral area may be disposed in different rows or columns. For a given amount of input light, the lenses of the peripheral area may focus less light on a substrate than the lenses of the central area. The mask may be disposed over the substrate in different positions, and then the substrate may be irradiated through the mask, while the mask is in each of the positions. The peripheral portion of the mask may be disposed over the same area of the substrate, while the mask is in different ones of the positions. | 09-05-2013 |
| 20130252384 | TRENCH FORMING METHOD, METAL WIRING FORMING METHOD, AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method of forming a thin film transistor array panel includes: forming a first insulating layer on a substrate; forming an amorphous carbon layer on the first insulating layer; forming a second insulating layer on the amorphous carbon layer; forming an opening in the amorphous carbon layer by patterning the second insulating layer and the amorphous carbon layer; and forming a trench in the first insulating layer by etching the first insulating layer, the etching the first insulating layer using the amorphous carbon layer including the opening as a mask. | 09-26-2013 |
| 20130273700 | FABRICATING 3D NON-VOLATILE STORAGE WITH TRANSISTOR DECODING STRUCTURE - Disclosed herein are techniques for fabricating a 3D stacked memory device having word line (WL) select gates. The bodies of the WL select gates may be formed from the same material (e.g., highly doped polysilicon) that the word lines are formed. Desired doping profiles in a body of a WL select gate may be achieved by various techniques such as counter-doping. The WL select gates may include TFTs that formed by etching holes in the layer in which word lines are formed. Gate electrodes and gate dielectrics may be formed in the holes. Bodies may be formed in the polysilicon outside of the holes. | 10-17-2013 |
| 20130280867 | METHODS FOR MANUFACTURING THIN FILM TRANSISTOR AND DISPLAY DEVICE - The present invention provides a method for manufacturing a highly reliable semiconductor device with a small amount of leakage current. In a method for manufacturing a thin film transistor, etching is conducted using a resist mask to form a back channel portion in the thin film transistor, the resist mask is removed, a part of the back channel is etched to remove etching residue and the like left over the back channel portion, whereby leakage current caused by the residue and the like can be reduced. The etching step of the back channel portion can be conducted by dry etching using non-bias. | 10-24-2013 |
| 20130295731 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode. | 11-07-2013 |
| 20130302951 | SURROUNDING STACKED GATE MULTI-GATE FET STRUCTURE NONVOLATILE MEMORY DEVICE - A method for forming a surrounding stacked gate fin FET nonvolatile memory structure includes providing a silicon-on-insulator (SOI) substrate of a first conductivity type, patterning a fin active region on a region of the substrate, forming a tunnel oxide layer on the fin active region, and depositing a first gate electrode of a second conductivity type on the tunnel oxide layer and upper surface of the substrate. The method further includes forming a dielectric composite layer on the first gate electrode, depositing a second gate electrode on the dielectric composite layer, patterning the first and second gate electrodes to define a surrounding stacked gate area, forming a spacer layer on a sidewall of the stacked gate electrode, and forming elevated source/drain regions in the fin active region on both sides of the second gate electrode. | 11-14-2013 |
| 20130309821 | THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL AND A METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR ARRAY SUBSTRATE FOR A DISPLAY PANEL - A method of manufacturing a thin film transistor array substrate includes forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming first, second, and third passivation films successively on the substrate. Over the above multi-layered passivation film forming a first photoresist pattern including a first portion formed on part of the drain electrode and on the pixel region, and a second portion. The second portion is thicker than the first portion. Then, patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern, and forming a transparent electrode pattern on the second passivation layer. | 11-21-2013 |
| 20130309822 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An insulating layer which releases a large amount of oxygen is used as an insulating layer in contact with a channel region of an oxide semiconductor layer, and an insulating layer which releases a small amount of oxygen is used as an insulating layer in contact with a source region and a drain region of the oxide semiconductor layer. By releasing oxygen from the insulating layer which releases a large amount of oxygen, oxygen deficiency in the channel region and an interface state density between the insulating layer and the channel region can be reduced, so that a highly reliable semiconductor device having small variation in electrical characteristics can be manufactured. The source region and the drain region are provided in contact with the insulating layer which releases a small amount of oxygen, thereby suppressing the increase of the resistance of the source region and the drain region. | 11-21-2013 |
| 20130323889 | METHOD OF FABRICATING PIXEL STRUCTURE - The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor. | 12-05-2013 |
| 20130337617 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - A liquid crystal display device includes a gate line and a gate electrode connected to the gate line, on a substrate; a gate insulating layer on the gate electrode and the gate line; an active layer on the gate insulating layer over the gate electrode; an ohmic contact layer on the active layer; first source and drain electrodes on the ohmic contact layer; second source and drain electrodes connected to the first source and drain electrodes, respectively; a data line extending from the source electrode and crossing the gate line to define a pixel region; and a pixel electrode in the pixel region and extending from the second drain electrode. | 12-19-2013 |
| 20130337618 | TRANSISTOR DEVICE WITH REDUCED GATE RESISTANCE - A device with reduced gate resistance includes a gate structure having a first conductive portion and a second conductive portion formed in electrical contact with the first conductive portion and extending laterally beyond the first conductive portion. The gate structure is embedded in a dielectric material and has a gate dielectric on the first conductive portion. A channel layer is provided over the first conductive portion. Source and drain electrodes are formed on opposite end portions of a channel region of the channel layer. Methods for forming a device with reduced gate resistance are also provided. | 12-19-2013 |
| 20140004666 | PASSIVATION OF CARBON NANOTUBES WITH MOLECULAR LAYERS | 01-02-2014 |
| 20140004667 | METHOD FOR PROCESSING SUBSTRATE AND METHOD FOR FABRICATING APPARATUS | 01-02-2014 |
| 20140011330 | METHOD FOR MANUFACTURING FINFET WITH IMPROVED SHORT CHANNEL EFFECT AND REDUCED PARASITIC CAPACITANCE - The present application discloses a method for manufacturing a semiconductor device. The method may comprise providing a fin in a semiconductor layer of a SOI substrate, and providing a stack of gate dielectric and gate conductor on only a first side of the fin. The gate conductor may extend laterally away from the first side of the fm in a gate extending direction. The method may comprise doping the fin at its other two opposing sides so as to provide a source region and a drain region. Each of the source and drain regions may have a portion extending laterally away from a second side, opposite to the first side, of the fin in a source/drain extending direction. The gate extending direction and the source/drain extending direction can be parallel to the main surface of the SOI substrate, while being opposite to each other. The method may comprise providing a channel region at a central portion of the fin. | 01-09-2014 |
| 20140017860 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer. | 01-16-2014 |
| 20140030857 | GRAPHENE DEVICE MANUFACTURING APPARATUS AND GRAPHENE DEVICE MANUFACTURING METHOD USING THE APPARATUS - A graphene device manufacturing apparatus includes an electrode, a graphene structure including a metal catalyst layer formed on a substrate, a protection layer, and a graphene layer between the protection layer and the metal catalyst layer, a power unit configured to apply a voltage between the electrode and the metal catalyst layer, and an electrolyte in which the graphene structure is at least partially submerged. | 01-30-2014 |
| 20140038370 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor substrate and a method for manufacturing the same are discussed, in which the thin film transistor comprises a gate line and a data line arranged on a substrate to cross each other; a gate electrode connected with the gate line below the gate line; an active layer formed on the gate electrode; an etch stopper formed on the active layer; an ohmic contact layer formed on the etch stopper; source and drain electrodes formed on the ohmic contact layer; and a pixel electrode connected with the drain electrode. It is possible to prevent a crack from occurring in the gate insulating film during irradiation of the laser and prevent resistance of the gate electrode from being increased. | 02-06-2014 |
| 20140038371 | THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF - A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method steps are: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously. | 02-06-2014 |
| 20140045304 | Coupling Well Structure for Improving HVMOS Performance - A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate, a cushion region between and adjoining the first and the second well regions, an insulation region in a portion of the first well region and extending from a top surface of the first well region into the first well region, a gate dielectric extending from over the first well region to over the second well region, wherein the gate dielectric has a portion over the insulation region, and a gate electrode on the gate dielectric. | 02-13-2014 |
| 20140051217 | GRAPHENE NANORIBBONS AND CARBON NANOTUBES FABRICATED FROM SiC FINS OR NANOWIRE TEMPLATES - Semiconductor structures including parallel graphene nanoribbons or carbon nanotubes oriented along crystallographic directions are provided from a template of silicon carbide (SiC) fins or nanowires. The SiC fins or nanowires are first provided and then graphene nanoribbons or carbon nanotubes are formed on the exposed surfaces of the fin or the nanowires by annealing. In embodiments in which closed carbon nanotubes are formed, the nanowires are suspended prior to annealing. The location, orientation and chirality of the graphene nanoribbons and the carbon nanotubes that are provided are determined by the corresponding silicon carbide fins and nanowires from which they are formed. | 02-20-2014 |
| 20140051218 | THIN FILM SEMICONDUCTOR DEVICE COMPRISING A POLYCRYSTALLINE SEMICONDUCTOR LAYER FORMED ON AN INSULATION LAYER HAVING DIFFERENT THICKNESS - In an organic light emitting diode (OLED) display and a manufacturing method thereof, the OLED display includes a substrate main body; an insulation layer pattern formed on the substrate main body, and including a first thickness layer and a second thickness layer thinner than the first thickness layer; a metal catalyst that is scattered on the first thickness layer of the insulation layer pattern; and a polycrystalline semiconductor layer formed on the insulation layer pattern, and divided into a first crystal area corresponding to the first thickness layer and to a portion of the second thickness layer adjacent to the first thickness layer and a second crystal area corresponding to the remaining part of the second thickness layer. The first crystal area of the polycrystalline semiconductor layer is crystallized through the metal catalyst, and the second crystal area of the polycrystalline semiconductor layer is solid phase crystallized. | 02-20-2014 |
| 20140057399 | Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe Layer - Techniques for forming a smooth silicide without the use of a cap layer are provided. In one aspect, a cap layer-free method for forming a silicide is provided. The method includes the following steps. A semiconductor material selected from: silicon and silicon germanium is provided. At least one silicide metal is deposited on the semiconductor material. The semiconductor material and the at least one silicide metal are annealed at a temperature of from about 400° C. to about 800° C. for a duration of less than or equal to about 10 milliseconds to form the silicide. A FET device and a method for fabricating a FET device are also provided. | 02-27-2014 |
| 20140073093 | SELF-ALIGNED CARBON NANOSTRUCTURE FIELD EFFECT TRANSISTORS USING SELECTIVE DIELECTRIC DEPOSITION - Self-aligned carbon nanostructure field effect transistor structures are provided, which are foamed using selective dielectric deposition techniques. For example, a transistor device includes an insulating substrate and a gate electrode embedded in the insulating substrate. A dielectric deposition-prohibiting layer is formed on a surface of the insulating substrate surrounding the gate electrode. A gate dielectric is selectively formed on the gate electrode. A channel structure (such as a carbon nanostructure) is disposed on the gate dielectric A passivation layer is selectively formed on the gate dielectric. Source and drain contacts are formed on opposing sides of the passivation layer in contact with the channel structure. The dielectric deposition-prohibiting layer prevents deposition of dielectric material on a surface of the insulating layer surrounding the gate electrode when selectively forming the gate dielectric and passivation layer. | 03-13-2014 |
| 20140073094 | METHOD OF FORMING LOW-RESISTANCE WIRE AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR USING THE SAME - This document relates to a method of forming low-resistance metal gate and data wirings and a method of manufacturing a thin film transistor using the same. The method of the wiring includes depositing a metal layer on a base layer; exposing a portion of the base layer by removing a portion of the metal layer; forming grooves in the base layer; forming a seed layer in the grooves of the base layer; and forming a wire consisting of the seed layer and a plated layer by plating a plating material on the seed layer formed in the grooves of the base layer. | 03-13-2014 |
| 20140080271 | METHOD OF FORMING THIN FILM TRANSISTOR - A method of forming TFT is provided. The TFT includes a gate electrode, a gate insulating layer, a first protective pattern, a second protective pattern, a source electrode, a drain electrode, a semiconductor channel layer, and a passivation layer. The first protective pattern and the second protective pattern are disposed on the gate insulating layer above the gate electrode. The source electrode is disposed on the gate insulating layer and the first protective pattern. The drain electrode is disposed on the gate insulating layer and the second protective pattern. The semiconductor channel layer is disposed on the gate insulating layer, the source electrode, and the drain electrode. In an extending direction from the source electrode to the drain electrode, a length of the first protective pattern is shorter than that of the source electrode, and a length of the second protective pattern is shorter than that of the drain electrode. | 03-20-2014 |
| 20140087527 | METHOD OF FORMING THIN FILM POLY SILICON LAYER AND METHOD OF FORMING THIN FILM TRANSISTOR - A method of forming a thin film poly silicon layer includes following steps. Firstly, a substrate is provided. A thin film silicon layer is then formed on the substrate by a silicon thin film deposition process. A heating treatment is then applied to the substrate so as to convert the thin film silicon layer into a thin film poly silicon layer. A method of forming a thin film transistor includes following steps. A first patterning process is performed on the thin film poly silicon layer on the substrate to form a semiconductor pattern. Subsequently, a gate insulation layer, a gate electrode, a source electrode and a drain electrode are formed. | 03-27-2014 |
| 20140087528 | Printed Material Constrained By Well Structures And Devices Including Same - A first patterned contact layer, for example a gate electrode, is formed over an insulative substrate. Insulating and functional layers are formed at least over the first patterned contact layer. A second patterned contact layer, for example source/drain electrodes, is formed over the functional layer. Insulative material is then selectively deposited over at least a portion of the second patterned contact layer to form first and second wall structures such that at least a portion of the second patterned contact layer is exposed, the first and second wall structures defining a well therebetween. Electrically conductive or semiconductive material is deposited within the well, for example by jet-printing, such that the first and second wall structures confine the conductive or semiconductive material and prevent spreading and electrical shorting to adjacent devices. The conductive or semiconductive material is in electrical contact with the exposed portion of the second patterned contact layer to form, e.g., an operative transistor. | 03-27-2014 |
| 20140106515 | AMORPHOUS SILICON THIN FILM TRANSISTOR-LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - In an amorphous silicon thin film transistor-liquid crystal display device and a method of manufacturing the same, gate patterns including a gate line and a gate electrode are formed on an insulation substrate having a display region and a driving circuit region on which a plurality of shift resistors are formed. A gate insulating film, active layer patterns and data patterns including source/drain electrodes are formed successively on the substrate. A passivation layer on the substrate has a first contact hole exposing a drain electrode of the display region and second and third contact holes respectively exposing a gate electrode and source/drain electrode of a first transistor of each of the shift resistors. Electrode patterns on the passivation layer include a first electrode connected to the drain electrode of the display region through the first contact hole and a second electrode connecting the gate electrode to the source/drain electrode of the first transistor through the second and third contact holes. The gate driving circuit including the shift resistors and the wirings are integrated on the insulating substrate without an additional process, thereby simplifying the manufacturing process. | 04-17-2014 |
| 20140134809 | METHOD FOR MANUFACTURING FAN-OUT LINES ON ARRAY SUBSTRATE - A method for manufacturing fan-out lines on an array substrate is disclosed. The fan-out lines comprise an amorphous silicon layer, an ohmic contact layer and a source-drain electrode layer disposed on a gate insulating layer. The manufacturing processes can be conducted by forming a first layer of photoresist on the source-drain electrode layer and performing a half-exposure development process on the first layer of photoresist; etching the amorphous silicon layer, the ohmic contact layer and the source-drain electrode layer by an etching process; removing the first layer of photoresist; foiming a second layer of photoresist and performing full-exposure development process on the second layer of photoresist; and etching the amorphous silicon layer by etching process to form the fan-out lines. | 05-15-2014 |
| 20140134810 | Thin Film Transistor Substrate and Method for Fabricating the Same - The present invention relates to methods for fabricating a thin film transistor substrate. | 05-15-2014 |
| 20140141576 | Manufacturing Method for Switch and Array Substrate - The present invention discloses a manufacturing method for a switch and an array substrate. The method comprises: firstly, forming sequentially a first metal layer, an insulating layer, a semiconductor layer, an ohmic contact layer, a second metal layer, a third metal layer and a photoresist layer on a base substrate; after patterning the photoresist layer, etching the third metal layer and the second metal layer to form the input electrode and the output electrode of the switch; using a stripper comprising at least 30% by weight of amine in order to remove the photoresist layer and the residual second metal layer; and finally, etching the ohmic contact layer. Through the above steps, the present invention can avoid the electrical abnormality of the switch and increase process yield of the array substrate. | 05-22-2014 |
| 20140141577 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method of manufacturing a thin film transistor array panel includes forming a semiconductor on a substrate, forming a gate insulating layer on the semiconductor, forming a sacrificial layer including an opening on the gate insulating layer, forming a copper layer on the sacrificial layer, the copper layer filling the opening, forming a gate wiring by polishing the copper layer by chemical mechanical polishing until the sacrificial layer is exposed, removing the sacrificial layer, forming a source region and a drain region by doping conductive impurities on the semiconductor by using the gate wiring as a mask, forming a first interlayer insulating layer covering the gate wiring, and forming a source electrode and a drain electrode connected to the source region and the drain region, respectively, on the first interlayer insulating layer. | 05-22-2014 |
| 20140147976 | EXPOSURE MASK AND METHOD OF MANUFACTURING A SUBSTRATE USING THE EXPOSURE MASK - An exposure mask includes a first transmission portion, a second transmission portion, and a blocking portion. The first transmission portion is configured to, when illuminated with light, transmit the light at a first energy level. The first transmission portion is disposed in association with formation of a first contact hole in an underlying layer. The second transmission portion is configured to, when illuminated with the light, transmit the light at a second energy level. The second transmission portion is disposed in association with formation of a second contact hole in the underlying layer. The blocking portion is configured to block the light, and is disposed in association with a boundary region between a first region and a second region of the underlying layer. The second transmission portion is further configured to enable the second contact hole to be formed deeper into the underlying layer than the first contact hole. | 05-29-2014 |
| 20140162415 | TOUCH PANEL, TFT-LCD ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF - A touch display comprising a first substrate formed with a common electrode; a second substrate formed with a gate line and a data line, wherein a first thin film transistor and a pixel electrode is provided in a pixel region defined by the gate line and the data line and the pixel region and the common electrode form a liquid crystal capacitor; a touch element provided in the pixel region in the second substrate and used to sense a touch voltage reflecting the change of the liquid crystal capacitance at a touch point; and a touch processing device connected with the touch element and used to obtaining a position coordinates of the touch point according to the touch voltage. | 06-12-2014 |
| 20140187001 | METHOD FOR FABRICATING ARRAY SUBSTRATE - Disclosed is a method for fabricating an array substrate, comprising: forming a pattern layer comprising a gate and a gate connection on a substrate; sequentially forming an insulation layer film and an active layer film on the substrate, and forming a pattern of a gate insulation layer having a first via hole and a pattern of an active layer through a single patterning process, wherein the first via hole is located above the gate connection; sequentially forming a transparent conductive film and a metal film on the substrate, and forming a pattern layer comprising a first electrode and a pattern layer comprising a data line, a source, a drain and a TFT channel through a single patterning process. | 07-03-2014 |
| 20140256094 | FinFETs and Methods for Forming the Same - Methods for forming a semiconductor device and a FinFET device are disclosed. A method comprises forming a dummy gate electrode layer over a substrate, the dummy gate electrode layer having a first height, forming a first etch stop layer on the dummy gate electrode layer, forming a first hard mask layer on the first etch stop layer, and patterning the first hard mask layer. The method further comprises patterning the first etch stop layer to align with the patterned first hard mask layer, and patterning the gate electrode layer to form a dummy gate electrode, the dummy gate electrode aligning with the patterned first etch stop layer, wherein after the patterning the gate electrode layer the first hard mask layer has a vertical sidewall of a second height, the second height being less than the first height, and the first hard mask layer having a rounded top surface. | 09-11-2014 |
| 20140256095 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used. | 09-11-2014 |
| 20140273361 | METHODS FOR THE FABRICATION OF GRAPHENE NANORIBBON ARRAYS USING BLOCK COPOLYMER LITHOGRAPHY - Methods of fabricating patterned substrates, including patterned graphene substrates, using etch masks formed from self-assembled block copolymer films are provided. Some embodiments of the methods are based on block copolymer (BCP) lithography in combination with graphoepitaxy. Some embodiments of the methods are based on BCP lithography techniques that utilize hybrid organic/inorganic etch masks derived from BCP templates. Also provided are field effect transistors incorporating graphene nanoribbon arrays as the conducting channel and methods for fabricating such transistors. | 09-18-2014 |
| 20140273362 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND ARRAY SUBSTRATE - The embodiments of the present invention provide a method for manufacturing a thin film transistor and a method for manufacturing an array substrate. The method for manufacturing the thin film transistor comprises: forming a gate electrode on a transparent substrate; forming a gate insulation layer; forming a transparent semiconductor film and patterning the transparent semiconductor film to form a semiconductor layer with photoresist being remained over the semiconductor layer; from a side of the transparent substrate opposite to the side on which the gate electrode is formed, exposing and developing the remained photoresist by using the gate electrode as a mask to form a channel position photoresist part corresponding to the gate electrode; forming a source/drain metal film and lifting off the channel position photoresist part and the source/drain metal film located over the channel position photoresist part; and patterning the remained source/drain metal film to form a source electrode and a drain electrode. The embodiments of the present invention are suitable to manufacture the product or device containing thin film transistors. | 09-18-2014 |
| 20140287561 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is disclosed in the present invention. The abovementioned method comprises the following steps. Firstly, a gate is formed on a substrate. A gate insulating layer is then formed on the gate, and further an active layer is disposed on the gate insulating layer, wherein the active layer is composed of a microwave absorbing material. Source/drain is defined on the active layer to form the semiconductor device, and a microwave annealing process is finally performed thereon. | 09-25-2014 |
| 20140363934 | THIN FILM SEMICONDUCTORS MADE THROUGH LOW TEMPERATURE PROCESS - Embodiments disclosed herein relate to a TFT and methods for manufacture thereof. Specifically, the embodiments herein relate to methods for forming a semiconductor layer at a low temperature for use in a TFT. The semiconductor layer may be formed by depositing a nitride or oxynitride layer, such as zinc nitride or oxynitride, and then converting the nitride layer into an oxynitride layer with a different oxygen content. The oxynitride layer is formed by exposing the deposited nitride layer to a wet atmosphere at a temperature between about 85 degrees Celsius and about 150 degrees Celsius. The exposure temperature is lower than the typical deposition temperature used for forming the oxynitride layer directly or annealing, which may be performed at temperatures of about 400 degrees Celsius. | 12-11-2014 |
| 20150011054 | FABRICATING METHOD OF ARRAY STRUCTURE - An array structure, which includes a TFT, a passivation layer, a pixel electrode, a first connecting layer and a first spacer is provided. The TFT includes a gate, a source and a drain. The passivation layer overlays the TFT. The pixel electrode is located on the passivation layer. The first connecting layer is located on the pixel electrode and electrically connected to the pixel electrode and the drain. The first spacer is located on the first connecting layer. | 01-08-2015 |
| 20150011055 | MANUFACTURING METHOD OF LOW TEMPERATURE POLY-SILICON TFT ARRAY SUBSTRATE - A manufacturing method of an LTPS-TFT array substrate is provided. The exemplary method comprises a step of sequentially forming a poly-silicon layer and a data-line-metal layer on a base substrate, and performing a patterning process by using a third mask to simultaneously form an active layer and source and drain electrodes, the active layer being provided on the gate insulating layer and corresponding to the gate electrode, and the source and drain electrodes being provided on the active layer. | 01-08-2015 |
| 20150017766 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - There is provided an electronic device including at least a first electrode, a second electrode disposed to be spaced apart from the first electrode, and an active layer disposed over the second electrode from above the first electrode and formed of an organic semiconductor material. A charge injection layer is formed between the first electrode and the active layer and between the second electrode and the active layer, and the charge injection layer is formed of an organic material having an increased electric conductivity when the charge injection layer is oxidized. | 01-15-2015 |
| 20150037943 | METHOD OF FABRICATING DISPLAY DEVICE - A method of fabricating a display device includes forming a thin-film transistor including a gate electrode, a source electrode and a drain electrode on a substrate, forming a first insulating layer and a second insulating layer on the thin-film transistor, forming a common electrode on the second insulating layer by depositing a common electrode material on the second insulating layer, plasma-treating a photoresist pattern on the common electrode material, and etching the common electrode material using the plasma-treated photoresist pattern as a mask, defining a contact hole in the second insulating layer which corresponds to the drain electrode using the plasma-treated photoresist pattern and the common electrode as a mask, forming a third insulating layer on the second insulating layer and the common electrode to expose the contact hole and the drain electrode and forming a pixel electrode connected to the drain electrode on the third insulating layer. | 02-05-2015 |
| 20150037944 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode. | 02-05-2015 |
| 20150050786 | THIN FILM TRANSISTOR - A thin film transistor is provided. The thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, a transition layer, an insulating layer and a gate electrode. The drain electrode is spaced apart from the source electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconductor layer by the insulating layer. The transition layer is sandwiched between the insulating layer and the semiconductor layer. The transition layer is a silicon-oxide cross-linked polymer layer including a plurality of Si atoms. The plurality of Si atoms is bonded with atoms of the insulating layer and atoms of the semiconductor layer. | 02-19-2015 |
| 20150056761 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR AND DISPLAY ARRAY SUBSTRATE USING SAME - A manufacturing method of a thin film transistor includes hard-baking and etching processes for a stop layer. Two through holes are exposed and developed in a photoresistor layer, in which a distance between the two through holes is substantially equal to the channel length of the thin film transistor. Further, the etching stop layer is dry-etched to obtain the thin film transistor having an expected channel length. | 02-26-2015 |
| 20150056762 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - The present invention makes it possible to lower the on resistance of a semiconductor element without hindering the function of a diffusion prevention film in a semiconductor device having the semiconductor element that uses a wire in a wiring layer as a gate electrode and has a gate insulation film in an identical layer to the diffusion prevention film. A first wire and a gate electrode are embedded into the surface layer of an insulation layer comprising a first wiring layer. A diffusion prevention film is formed between the first wiring layer and a second wiring layer. A gate insulation film is formed by: forming a recess over the upper face of the diffusion prevention film in the region overlapping with the gate electrode and around the region; and thinning the part. | 02-26-2015 |
| 20150064857 | MASK FOR EXPOSURE, METHOD OF FABRICATING THE SAME, AND METHOD OF FABRICATING DISPLAY PANEL USING THE MASK - A mask for etching a target layer includes a mask substrate. A phase inversion layer is disposed to correspond to a non-etched area of a pattern target layer. The phase inversion layer is configured to generate inverted light by inverting a phase of incident light and to transmit the inverted light to the non-etched area of a pattern target layer. An inversion offset part is disposed in a center part of the phase inversion layer. The inversion offset part is configured to generate offset light causing destructive interference with the inverted light in the non-etched area and to provide the offset light to the non-etched area. | 03-05-2015 |
| 20150064858 | METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY APPARATUS - An organic light-emitting display apparatus includes a substrate including a plurality of red, green, and blue sub-pixel regions, a pixel electrode in each of the plurality of the red, green, and blue sub-pixel regions on the substrate, a Distributed Bragg Reflector (DBR) layer between the substrate and the pixel electrodes, a high-refractive index layer between the substrate and the DBR layer in the blue sub-pixel region, the high-refractive index layer having a smaller area than an area of a corresponding pixel electrode in the blue sub-pixel region, an intermediate layer including an emissive layer on the pixel electrode, and an opposite electrode on the intermediate layer. | 03-05-2015 |
| 20150072484 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side. | 03-12-2015 |
| 20150118806 | LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF - A liquid crystal display may include a first substrate, a second substrate facing the first substrate, a liquid crystal layer comprising liquid crystal molecules that are interposed between the first substrate and the second substrate, a first electrode disposed on the first substrate, an insulating layer disposed on the first electrode, a second electrode disposed on the insulating layer, a third electrode disposed on the second substrate, and an alignment layer disposed on any one of the second electrode and the third electrode. The second electrode comprises a fine slit structure, and at least one of the liquid crystal layer and the alignment layer comprises a sub-alignment substance. | 04-30-2015 |
| 20150126005 | PHOTORESIST COMPOSITION AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE USING THE SAME - A photoresist composition may include a novolac resin, a diazide-based photosensitive compound, a surfactant represented by Chemical Formula 1 below, and a solvent. | 05-07-2015 |
| 20150126006 | MANUFACTURING METHOD OF ARRAY SUBSTRATE - A manufacturing method of an array substrate includes following steps. A first photolithography process is performed to form a gate electrode on a substrate. A gate insulating layer is formed to cover the substrate and the gate electrode. A second photolithography process is performed to form a patterned semiconductor layer and a patterned etching stop layer. A semiconductor layer and an etching stop layer are successively formed on the gate insulating layer, and a second patterned photoresist is formed on the etching stop layer. The etching stop layer uncovered by the second patterned photoresist is removed. The semiconductor layer uncovered by the second patterned photoresist is removed for forming the patterned semiconductor on the gate insulating layer. A patterned etching stop layer is formed on the patterned semiconductor layer by etching the second patterned photoresist and the etching stop layer. | 05-07-2015 |
| 20150307779 | ETCHANT AND METHOD OF MANUFACTURING DISPLAY DEVICE BY USING THE SAME - An etchant composition is provided comprising a persulfate from 0.5 to 20 wt %; a fluoride compound from 0.01 to 2 wt %; an inorganic acid from 1 to 10 wt %; a N (nitrogen atom)-containing heterocyclic compound from 0.5 to 5 wt %; a chloride compound from 0.1 to 5 wt %; a copper salt from 0.05 to 3 wt %; an organic acid or an organic acid salt from 0.1 to 10 wt %; an electron-donating compound from at 0.1 to 5 wt %; and a solvent of the residual amount. Also provided is a method of manufacturing a display device by using the same. | 10-29-2015 |
| 20150325604 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - The display device includes a substrate, a thin film transistor (TFT), which includes a gate electrode, a semiconductor layer, and source and drain electrodes, on the substrate member, a passivation layer on the TFT and having an opening to expose a portion of the drain electrode, and a pixel electrode directly on the drain electrode and only within the opening. | 11-12-2015 |
| 20150333154 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF - The present invention relates to a thin film transistor, a thin film transistor array panel, and a manufacturing method thereof. A thin film transistor according to an exemplary embodiments of the present invention includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a channel region overlapping the gate electrode, the gate insulating layer interposed between the channel region and the gate electrode; and a source region and a drain region, facing each other with respect to the channel region, positioned in the same layer as the channel region, and connected to the channel region, wherein the channel region, the source region, and the drain region comprise an oxide semiconductor, and wherein a carrier concentration of the source region and the drain region is larger than a carrier concentration of the channel region. | 11-19-2015 |
| 20150346603 | METHOD OF REMOVING PHOTORESIST, EXPOSURE APPARATUS AND METHOD OF MANUFACTURING DISPLAY SUBSTRATE - A method of removing a photoresist, an exposure apparatus and a method of manufacturing a display substrate are disclosed. The method of removing a photoresist includes the following steps: exposing the photoresist ( | 12-03-2015 |
| 20150364706 | METHOD OF MAKING N-TYPE SEMICONDUCTOR LAYER AND METHOD OF MAKING N-TYPE THIN FILM TRANSISTOR - A method of making N-type semiconductor layer includes following steps. A semiconductor carbon nanotube layer is provided. A hafnium oxide layer is deposited on the semiconductor carbon nanotube layer via atomic layer deposition, wherein the atomic layer deposition includes following substeps. The semiconductor carbon nanotube layer is located into an atomic layer deposition system. The semiconductor carbon nanotube layer is heated to a temperature ranging from about 140° C. to about 200° C. A protective gas is continuously introduced into the atomic layer deposition system. The hafnium oxide layer is formed on the semiconductor carbon nanotube layer via introducing hafnium source and water vapor one by one into the atomic layer deposition system in a pulse manner. | 12-17-2015 |
| 20150372027 | THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A TFT substrate includes a TFT including a source electrode having a lower source electrode and an upper source electrode, which are electrically connected to each other, and a drain electrode having a lower drain electrode and an upper drain electrode, which are electrically connected to each other. The lower source electrode and the lower drain electrode are in contact with a lower surface of the semiconductor film, and the upper source electrode and the upper drain electrode are in contact with an upper surface of the semiconductor film. | 12-24-2015 |
| 20150380444 | Active Array Substrate and Manufacturing Method Thereof - An active array substrate includes a flexible substrate, an inorganic barrier layer, and at least one active component. The inorganic barrier layer covers the flexible substrate. The inorganic barrier layer has a through hole therein. The through hole of the inorganic barrier layer exposes the flexible substrate. The active component is disposed on the inorganic barrier layer. | 12-31-2015 |
| 20160005772 | ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE - Embodiments of the invention provide an array substrate, a manufacturing method thereof and a display device. The array substrate comprises: a base substrate; a gate line and a gate electrode formed on the base substrate; a gate insulating layer formed on the gate line and the gate electrode; a source electrode, a drain electrode and a pixel electrode formed on the gate insulating layer, wherein the pixel electrode is directly connected to the drain electrode; and an active layer formed on the gate insulating layer, the source electrode and the drain electrode. | 01-07-2016 |
| 20160013295 | MASK, MANUFACTURING METHOD THEREOF AND MANUFACTURING METHOD OF A THIN FILM TRANSISTOR | 01-14-2016 |
| 20160035752 | Display Device and Method of Manufacturing the Same - A display device and a method of manufacturing the same are disclosed, in which a sensing electrode for sensing a touch of a user is built in a display panel, whereby a separate touch screen is not required on an upper surface of the display panel and thus thickness and manufacturing cost are reduced. | 02-04-2016 |
| 20160035765 | METHOD OF FABRICATING METAL WIRING AND THIN FILM TRANSISTOR SUBSTRATE - A method of fabricating metal wiring, including: sequentially forming first and second conductive layers on a substrate; forming a first photosensitive film pattern on the first and second conductive layers; forming first and second conductive patterns by etching parts of the first and second conductive layers by using the first photosensitive film pattern as a mask; forming a second photosensitive film pattern positioned inside the first photosensitive film pattern by a predetermined interval by ashing the first photosensitive film pattern; etching an exposed first conductive pattern by using the second photosensitive film pattern as a mask; and removing the second photosensitive film pattern. | 02-04-2016 |
| 20160043117 | ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, AND DISPLAY DEVICE - Embodiments of the present disclosure provide an array substrate and a fabrication method thereof, and a display device. The fabrication method of the array substrate includes: forming a gate metal layer, a gate insulating layer, an active layer and a source-drain metal layer on a base substrate. The forming the gate insulating layer, the active layer and the source-drain metal layer on the base substrate comprises: forming a gate insulating film, an active layer film and a source-drain metal film on the base substrate; forming the gate insulating layer, the active layer and the source-drain metal layer by a single patterning process. The number of the exposing process is reduced, the production cycle is shortened and the fabrication cost is reduced. | 02-11-2016 |
| 20160062168 | Display device and thin-film transistor substrate and method for producing same - A display device includes a TFT substrate ( | 03-03-2016 |
| 20160079287 | METHOD FOR PRODUCING A VIA, A METHOD FOR PRODUCING AN ARRAY SUBSTRATE, AN ARRAY SUBSTRATE, AND A DISPLAY DEVICE - The invention relates to the field of display technologies, and discloses a method for producing a via, a method for producing an array substrate, an array substrate and a display device to prevent a chamfer from being formed in producing the via, to promote the product quality and improve the display effect of the display device. The method for producing a via comprises: employing a first etching process to partially etch a top film layer in an area that needs to form a via above an electrode, wherein the vertical etching amount achieved by employing the first etching process is less than the thickness of the top film layer; and employing a second etching process for which the vertical etching rate is larger than the lateral etching rate to etch the remaining part in the area that needs to form a via, until the electrode is exposed. | 03-17-2016 |
| 20160087232 | SEMICONDUCTOR DEVICE WITH BALLISTIC GATE LENGTH STRUCTURE - Embodiments of the invention include a method of fabrication of a semiconductor structure. The method of fabrication includes: Forming a trench in a first dielectric material down to a first conductive material of a bottom gate. A sidewall of the trench contacts a top surface of the first conductive material. Depositing a second conductive material on the sidewall of the trench, which forms an electrical connection with the first conductive material. Depositing a second dielectric material a in the trench, and on the second conductive material. Depositing a gate dielectric material on the second conductive material and the dielectric materials. Forming a channel material on the gate dielectric material. Depositing another conductive material on the channel material and portions of the gate dielectric material to form a source terminal and a drain terminal. | 03-24-2016 |
| 20160116784 | Liquid Crystal Display Device Having Dual Link Structure and Method of Manufacturing the Same - Disclosed is an LCD device having a dual link structure and a method of manufacturing the same, which can reduce a width of a bezel. A link line structure includes a plurality of first and second link lines which are alternately disposed. The first and second link lines are formed on different layers. Also, embodiments herein provide a method which can reduce the number of masks used in a manufacturing process and can easily manufacture the LCD device in consideration of the possibility of misalignment of exposure equipment. | 04-28-2016 |
| 20160118478 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR - A method of manufacturing a thin film transistor substrate is provided, including a first photoresist pattern covers a channel during a process of etching a second photoresist pattern and protects the channel. Thus, an etching stop layer is not required. | 04-28-2016 |
| 20160148804 | METHOD FOR PRODUCING A THIN FILM TRANSISTOR - A method for producing a thin film transistor includes forming a transistor prototype on a substrate, with the transistor prototype including a face having a to-be-treated portion. The to-be-treated portion of the transistor prototype is exposed in an environment full of a supercritical fluid. The supercritical fluid conducts a surface treatment on the to-be-treated portion of the transistor prototype to form a thin film transistor. The method can solve the problem of too many defects of the thin film transistor resulting from a low-temperature process. | 05-26-2016 |
| 20160149146 | METHOD FOR MAKING THIN FILM TRANSISTOR - A thin film transistor is provided. The thin film transistor includes a source electrode, a drain electrode, a semiconductor layer, an insulating layer and a gate electrode. The drain electrode is spaced from the source electrode. The semiconductor layer is electrically connected to the source electrode and the drain electrode. The gate electrode is insulated with the source electrode, the drain electrode and the semiconductor layer by the insulating layer. The gate electrode, the source electrode, and the drain electrode comprise a plurality of first carbon nanotubes. The semiconductor layer comprises a plurality of second carbon nanotubes. A distribution density of the plurality of first carbon nanotubes is about 20 times as much as that of the plurality of second carbon nanotubes. A number of the plurality of second carbon nanotubes in 1 square micrometers is smaller than or equal to 1. | 05-26-2016 |
| 20160163538 | METHOD FOR PRODUCING METAL OXIDE FILM AND METHOD FOR PRODUCING TRANSISTOR - Provided is a technology for efficiently obtaining a metal oxide film having good adhesiveness. A method of producing a metal oxide film includes: an application step of applying a solution containing an organic metal complex onto a substrate; an ozone exposure step of exposing the resultant coating film to ozone; and a heating step of heating the coating film. | 06-09-2016 |
| 20160172441 | NANOWIRE FIELD EFFECT TRANSISTOR WITH INNER AND OUTER GATES | 06-16-2016 |
| 20160254296 | Array Substrate, Method for Manufacturing the Same, and Display Device | 09-01-2016 |
| 20190148420 | ETCH CHEMISTRIES FOR METALLIZATION IN ELECTRONIC DEVICES | 05-16-2019 |
