Class / Patent application number | Description | Number of patent applications / Date published |
438160000 | Utilizing backside irradiation | 13 |
20080227244 | METHOD OF FABRICATING ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE - A method of fabricating an array substrate for a liquid crystal display device comprises forming a gate line, a data line that crosses the gate line and a thin film transistor connected to the gate line and the data line on a substrate, and forming an organic insulating material layer on the gate line, the data line and the thin film transistor. The organic insulating material layer has photo curability, flexibility and dynamic stability. The method further comprises forming a passivation layer that has a drain contact hole from the organic insulating material layer by using a stamp that has a convex portion. The drain contact hole exposes a drain electrode of the thin film transistor. The method also comprises forming a pixel electrode on the passivation layer. The pixel electrode is connected to the drain electrode through the drain contact hole. | 09-18-2008 |
20080227245 | THIN FILM TRANSISTOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed on the gate insulating layer. A data wire having source electrodes, drain electrodes and data lines is formed on the gate insulating layer and the semiconductor pattern. A protective layer is formed on the data wire. Pixel electrodes connected to the drain electrode via contact holes are formed on the protective layer. The gate wire and the data wire are made of Ag alloy containing Ag and an additive including at least one selected from Zn, In, Sn and Cr. | 09-18-2008 |
20080248617 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a base substrate, a first metal pattern, a gate insulating layer, a second metal pattern, a channel layer and a pixel electrode. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode of a switching element. The gate insulating layer is formed on the base substrate including the first metal pattern. The second metal pattern is formed on the gate insulating layer, and includes a source electrode, a drain electrode and a source line. The channel layer is formed under the second metal pattern, and is patterned to have substantially a same side surface as a side surface of the second metal pattern. The pixel electrode is electrically connected to the drain electrode. Therefore, an afterimage on a display panel, thus improving display quality. | 10-09-2008 |
20080299712 | MANUFACTURING METHOD OF A THIN FILM TRANSISTOR ARRAY PANEL - A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion. | 12-04-2008 |
20090004787 | THIN FILM TRANSISTOR ARRAY PANEL FOR LIQUID CRYSTAL DISPLAY - There are provided two subpixels opposite each other with respect to each data line. A pair of gate lines are provided for each row of pixels. A plurality of subsidiary signal lines are provided between the adjoining columns of the pixels. The data lines and the subsidiary signal lines are alternately arranged between the adjoining columns of the pixels. A storage wire is provided between the adjoining rows of the pixel 12+66s. | 01-01-2009 |
20090053863 | Mask and Manufacturing Method of a Semiconductor Device and a Thin Film Transistor Array Panel Using the Mask - An exposure mask is provided, which includes: a light blocking opaque area blocking incident light; a translucent area; and a transparent area passing the most of incident light, wherein the translucent area generates the phase differences in the range of about −70° to about +70°. | 02-26-2009 |
20090061573 | Methods for manufacturing thin film transistor and display device - The present invention provides a method for manufacturing a highly reliable semiconductor device with a small amount of leakage current. In a method for manufacturing a thin film transistor, etching is conducted using a resist mask to form a back channel portion in the thin film transistor, the resist mask is removed, a part of the back channel is etched to remove etching residue and the like left over the back channel portion, whereby leakage current caused by the residue and the like can be reduced. The etching step of the back channel portion can be conducted by dry etching using non-bias. | 03-05-2009 |
20090061574 | Semiconductor Device and Method of Manufacturing The Semiconductor Device - In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer insulating layer are disposed on a substrate, and an input terminal portion that is electrically connected to a wiring of another substrate is provided on an end portion of the substrate. The input terminal portion includes a first layer made of the same material as that of the gate electrode and a second layer made of the same material as that of the pixel electrode. With this structure, the number of photomasks used in the photolithography method can be reduced to 5. | 03-05-2009 |
20090068801 | METHOD OF MANUFACTURING ARRAY SUBSTRATE OF LIQUID CRYSTAL DISPLAY DEVICE - The embodiment of the invention discloses an exemplary method, in which a gate line, a gate electrode, and a pixel electrode are formed in a first step; a multilayer structure is formed on the gate line and the gate electrode in a second step; and a data line and source/drain electrodes are formed in a third step. | 03-12-2009 |
20100003792 | METHOD FOR FABRICATING PIXEL STRUCTURE - A pixel structure fabricating method is provided. A gate and a gate insulation layer covering the gate are formed on a substrate. A channel layer is formed on the gate insulation layer. A conductive layer is formed on the channel layer and gate insulation layer. A black matrix having a color filer layer accommodating opening is formed on the conductive layer. The black matrix includes a first block and a second block which is thicker than the first block. The conductive layer is patterned with the black matrix as a mask to form a source and a drain on the channel layer. A color filter layer is formed within the color filter layer accommodating opening through inkjet printing. A dielectric layer is formed on the black matrix and color filter layer. The dielectric layer is patterned to expose the drain. A pixel electrode electrically connected to the drain is formed. | 01-07-2010 |
20100261322 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed. | 10-14-2010 |
20110212581 | ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - An array substrate for a liquid crystal display device comprises a substrate having a pixel region, a gate line on the substrate, and a data line crossing the gate line to define the pixel region. A thin film transistor (TFT) includes a gate electrode connected to the gate line, an insulating layer on the gate electrode, an active layer on the insulating layer, an ohmic contact layer on the active layer, a source electrode connected to the data line and a drain electrode spaced apart from the source electrode. A pixel electrode connects to the drain electrode and is disposed in the pixel region. An opaque metal pattern is provided on end portions of the pixel electrode. | 09-01-2011 |
20120149158 | FLATTENING METHOD OF A SUBSTRATE - A method of flattening a substrate includes forming a metal layer on an upper surface of a substrate, forming a photoresist layer covering the substrate and the metal layer, radiating light to the photoresist layer, through a lower surface of the substrate opposite to the upper surface, exposing the metal layer by developing the photoresist layer, exposing the upper surface of the substrate by etching the metal layer, etching the exposed upper surface of the substrate, and removing the photoresist layer. | 06-14-2012 |