| Entries |
| Document | Title | Date |
|---|
| 20080305572 | METHOD OF FABRICATING IMAGE DEVICE HAVING CAPACITOR AND IMAGE DEVICE FABRICATED THEREBY - There are provided a method of fabricating an image device having a capacitor and an image device fabricated thereby. The method comprises preparing a substrate having a pixel region and a peripheral circuit region. A lower electrode containing silicon is formed on the substrate of the peripheral circuit region. A capacitor dielectric layer is formed by sequentially stacking a first dielectric layer and a second dielectric layer on the lower electrode, and the first dielectric layer and the second dielectric layer have a different dielectric constant from each other. In this case, one of the first and second dielectric layers is a dielectric layer grown from a material layer formed thereunder and has a lower dielectric constant than that of the other. An upper electrode is formed on the capacitor dielectric layer. | 12-11-2008 |
| 20090011532 | PHOTOELECTRIC-CONVERSION APPARATUS AND IMAGE-PICKUP SYSTEM - A photoelectric-conversion apparatus includes a photoelectric-conversion area where a plurality of photoelectric-conversion elements configured to convert incident light into electrical charges, a plurality of floating-diffusion areas, a plurality of transfer-MOS transistors configured to transfer electrical charges of the photoelectric-conversion element to the floating-diffusion area, and a plurality of amplification-MOS transistors configured to read and transmit a signal generated based on the transferred electrical charges to an output line are provided. An antireflection film is provided on a light-receiving surface of the photoelectric-conversion element. The gate of the amplification-MOS transistor is electrically connected to one floating-diffusion area by providing one conductor in a single contact hole, and the anti-reflection film covers the photoelectric-conversion area except a base part of the contact hole. | 01-08-2009 |
| 20090011533 | ISOLATION TECHNIQUES FOR REDUCING DARK CURRENT IN CMOS IMAGE SENSORS - Isolation methods and devices for isolating regions of a semiconductor device. The isolation method and structure include forming an isolating trench in an active area and filling the trench with a doped conductive material containing silicon. Suitable conductive materials containing silicon include polysilicon and silicon-germanium. There is also provided a method and structure for isolating the regions by providing a trench in an active area of a substrate, growing an epitaxial layer in the trench to fill the trench or to partially fill the trench and depositing an insulating material over the epitaxial layer and within the trench to completely fill the trench. | 01-08-2009 |
| 20090017573 | Image sensor with improved dynamic range and method of formation - Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the channel region, and first and second leads respectively coupled to a source region on one side of the at least one channel region and a drain region on an opposite side of the at least one channel region. The transistor structure has at least two threshold voltages associated with the at least one channel region, and an I-V characteristic of the transistor structure is determined at least in part by the threshold voltages. | 01-15-2009 |
| 20090035888 | TWO EPITAXIAL LAYERS TO REDUCE CROSSTALK IN AN IMAGE SENSOR - An image sensor includes a substrate of a first conductivity type having an image area with a plurality of photosensitive sites, wherein a portion of the charge generated in response to light is collected in the pixel; and a subcollector of a second conductivity spanning the image area that collects another portion of the generated charge that would have otherwise diffused to adjacent photosensitive sites. | 02-05-2009 |
| 20090042331 | Pinned photodiode (PPD) pixel with high shutter rejection ratio for snapshot operating CMOS sensor - A method for forming a pixel image sensor that has a high shutter rejection ratio for preventing substrate charge leakage and prevents generation of photoelectrons within a floating diffusion storage node and storage node control transistor switches of the pixel image sensor. The pixel image sensor that prevents substrate charge leakage of photoelectrons from pixel image sensor adjacent to the pixel image sensor. The pixel image sensor is fabricated on a substrate with an isolation barrier and a carrier conduction well. The isolation barrier formed underneath the floating diffusion storage node allows effective isolation by draining away the stray carriers and preventing them from reaching the floating diffusion storage node. The carrier conduction well in combination with the deep N-well isolation barrier separates the pinned photodiode region from the deep N-well isolation barrier that is underneath the floating diffusion storage node. | 02-12-2009 |
| 20090053848 | Method and apparatus providing imager pixels with shared pixel components - The disclosed embodiments employ shared pixel component architectures that arrange the shared pixel components for a group of pixels within different pixels of the group. | 02-26-2009 |
| 20090053849 | PHOTOELECTRIC CONVERSION DEVICE AND IMAGE PICKUP SYSTEM WITH PHOTOELECTRIC CONVERSION DEVICE - A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region. | 02-26-2009 |
| 20090075416 | Semiconductor imaging device and fabrication process thereof - A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel region part contains an impurity element with a concentration level lower than the impurity concentration level of the first channel region part. | 03-19-2009 |
| 20090111206 | Collector grid, electrode structures and interrconnect structures for photovoltaic arrays and methods of manufacture - The invention teaches novel structure and methods for producing electrical current collectors and electrical interconnection structure. Such articles find particular use in facile production of modular arrays of photovoltaic cells. The current collector and interconnecting structures may be initially produced separately from the photovoltaic cells thereby allowing the use of unique materials and manufacture. Subsequent combination of the structures with photovoltaic cells allows facile and efficient completion of modular arrays. Methods for combining the collector and interconnection structures with cells and final interconnecting into modular arrays are taught | 04-30-2009 |
| 20090117681 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - The object of the present invention is to miniaturize the area occupied by the element and to integrate a plenty of elements in a limited area so that the sensor element can have higher output and smaller size. | 05-07-2009 |
| 20090170232 | METHOD FOR MANUFACTURING IAMGE SENSOR - In a method for manufacturing an image sensor, an interlayer insulating layer including a metal line is formed on a semiconductor substrate. A lower electrode layer is formed on the metal line such that the lower electrode is connected with the metal line. A photoresist pattern corresponding to the metal line is formed on the lower electrode layer. The lower electrode layer is etched using the photoresist pattern to form a lower electrode connected with the metal line. The photoresist pattern is stripped using a solvent containing fluorine. | 07-02-2009 |
| 20090239327 | CMOS IMAGE SENSOR AND METHOD OF FABRICATING THE SAME - In a CMOS image sensor and method of fabricating the same, the CMOS image sensor is comprised of a pixel array generating image signals and a peripheral circuit processing the image signals. In the method, a substrate is provided having a pixel region and a peripheral circuit region. A photo-receiving element and at least one transistor are formed on the pixel region of the substrate and a transistor is formed on the peripheral circuit region of the substrate. A silicide barrier pattern is formed to cover a region where the photo-receiving element is formed. A silicide layer is formed on a predetermined region of the substrate. An interlevel insulation film is formed on the silicide barrier layer. At least one contact hole penetrating the interlevel insulation film is formed, the at least one contact hole exposing a predetermined region of the silicide layer. This is effective to prevent a problem such as an excessive etching due to disagreement of the etch target films between the pixel array and the peripheral circuit. | 09-24-2009 |
| 20100015747 | METHODS OF FABRICATING IMAGE SENSORS INCLUDING IMPURITY LAYER ISOLATION REGIONS - Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer. | 01-21-2010 |
| 20100075454 | SOLID-STATE IMAGE PICKUP DEVICE AND METHOD FOR PRODUCING THE SAME - A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region. | 03-25-2010 |
| 20100112745 | IMAGE SENSOR AND MANUFACTURING METHOD THEREOF - Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode. An expose portion can be formed in the upper electrode layer to selectively expose an upper region of the first photodiode. A passivation layer can be formed on the first substrate on which the expose portion is provided. | 05-06-2010 |
| 20100120190 | IMAGE SENSOR AND METHOD FOR FORMING THE SAME - A reliable image sensor and a method for forming the same are provided. The image sensor includes a photo-detective device. At least one transistor is electrically connected to the photo-detective device for outputting charges stored in the photo-detective device. A transistor directly connected to the photo-detective device includes a gate electrode pattern and an ion-implantation interrupting pattern arranged on the gate electrode pattern. Since the ion-implantation interrupting pattern is located on an upper portion of the gate electrode pattern of the transistor in the vicinity of the photo-detective device, a threshold voltage of the gate electrode pattern of the transistor in the vicinity of the photo-detective device is adjusted to a desired value. | 05-13-2010 |
| 20100129952 | METHOD OF FORMING A SEMICONDUCTOR LAYER - A method of forming a semiconductor layer, which in one embodiment is part of a photodetector, includes forming a silicon shape, applying ozonated water, removing the first oxide layer at a temperature below 600 degrees Celsius, and epitaxially growing germanium. The silicon shape has a top surface that is exposed. The ozonated water is applied to the top surface and causes formation of a first oxide layer on the top surface. The germanium is grown on the top surface. | 05-27-2010 |
| 20100144081 | IMAGE SENSOR PIXEL HAVING PHOTODIODE WITH MULTI-DOPANT IMPLANTATION - An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N | 06-10-2010 |
| 20100144082 | RADIATION DETECTING APPARATUS, SCINTILLATOR PANEL, RADIATION DETECTING SYSTEM, AND METHOD FOR PRODUCING SCINTILLATOR LAYER - A radiation detecting apparatus includes: a sensor panel that has a substrate, and has a plurality of pixels each of which has a photoelectric conversion element for converting light into an electric signal, arranged on the substrate; and a scintillator layer arranged on a reverse side of the pixels with respect to the substrate, wherein the scintillator layer contains an activator added in a main ingredient, and has a higher concentration of the activator in a peripheral area than in a center area, in a surface direction of the scintillator layer. | 06-10-2010 |
| 20100151613 | Solid-state imaging device, method of manufacturing the same, and imaging apparatus - A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor. | 06-17-2010 |
| 20100167447 | METHOD FOR MANUFACTURING BACK SIDE ILLUMINATON IMAGE SENSOR - A method of manufacturing a back side illumination image sensor according to an embodiment includes: forming an ion implantation layer by implanting ions throughout the front side of a first substrate; defining a pixel region by forming a device isolation region on the front side of the first substrate; forming a photosensitive device and a readout circuit on the pixel region; forming an interlayer dielectric layer and a metal line on the front side of the first substrate; bonding a second substrate with the front side of the first substrate where the metal line is formed; removing a lower part of the first substrate under the ion implantation layer; applying wet etching to a back side of the first substrate after removing the lower part; and forming a microlens on the photosensitive device at the back side of the first substrate. | 07-01-2010 |
| 20100167448 | Solid-state imaging device and manufacturing method thereof - A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor. | 07-01-2010 |
| 20100167449 | SOLID-STATE IMAGING DEVICE AND METHOD OF MANUFACTURING THE SAME - A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion. | 07-01-2010 |
| 20100173442 | Image sensor and method for manufacturing the same - An image sensor and a method for manufacturing the same are provided. In the method, a photoresist is formed on a substrate including a photodiode region and a gate electrode opposite to the photodiode region on the basis of the gate electrode. An oxide layer is formed to a specific thickness on both the photodiode region and a part of the gate electrode. The photoresist is removed from the substrate and cleaned. A first oxide film is formed on the substrate, the gate electrode, and the oxide layer remaining on the photodiode region. A nitride film is formed on the first oxide film. And a second oxide film is formed on the nitride film. Blank etching is performed on the first oxide film, the nitride film, and the second oxide film to form a spacer at the side of the gate electrode. | 07-08-2010 |
| 20100173443 | METHOD OF MANUFACTURING A PHOTO-DETECTOR ARRAY DEVICE WITH ROIC MONOLITHICALLY INTEGRATED FOR LASER-RADAR IMAGE SIGNAL - A method of manufacturing a photo-detector array device integrated with a read-out integrated circuit (ROIC) monolithically integrated for a laser-radar image signal. A detector array device, a photodiode and control devices for selecting and outputting a laser-radar image signal are simultaneously formed on an InP substrate. In addition, after the photodiode and the control devices are simultaneously formed on the InP substrate, the photodiode and the control devices are electrically separated from each other using a polyamide, whereby a PN junction surface of the photodiode is buried to reduce surface leakage current and improve electrical reliability, and the structure of the control devices can be simplified to improve image signal reception characteristics. | 07-08-2010 |
| 20100184245 | METHOD FOR MANUFACTURING A BOLOMETRIC DETECTOR - The method is designed for manufacturing a bolometric detector equipped with a membrane suspended above a substrate by means of heat-insulating arms fixed to the substrate by anchoring points. The membrane has a heat-sensitive thin layer with a base comprising at least a semiconducting iron oxide. The method comprises at least a step of localized reduction and/or oxidation of the thin layer of semiconducting iron oxide to modify the degree of oxidation of the iron atom of a part of the thin layer of semiconducting iron oxide. | 07-22-2010 |
| 20100197066 | METHOD OF INTERCONNECT FOR IMAGE SENSOR - A method for fabricating CMOS image sensor device, the method includes providing a semiconductor substrate having a P type impurity characteristic. The semiconductor substrate includes a surface region. The method forms a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing a N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method forms a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region. | 08-05-2010 |
| 20100227427 | Solid-state imaging device, and camera implementing the same - To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film. | 09-09-2010 |
| 20100248410 | Method of fabricating semiconductor device - There is provided a method of fabricating a semiconductor device having plural light receiving elements, and having an amplifying element, the method including: a) forming an active region on the semiconductor substrate for configuring the amplifying element; b) forming a light receiving element region on the semiconductor substrate for forming the plural light receiving elements, with the active region acting as a reference for positioning; c) implanting an impurity into the light receiving element region; d) repeating the process b) and the process c) a number of times that equals a number of diffusion layers in the light receiving element region; e) after implanting the impurity, performing a drive-in process to carry out drive in of the semiconductor substrate; and f) the process e), forming an amplifying element forming process by implanting an impurity in the active region. | 09-30-2010 |
| 20100267185 | SOLID-STATE IMAGE PICKUP DEVICE, ELECTRONIC APPARATUS USING SUCH SOLID-STATE IMAGE PICKUP DEVICE AND METHOD OF MANUFACTURING SOLID-STATE IMAGE PICKUP DEVICE - A back-illuminated type solid-state image pickup device ( | 10-21-2010 |
| 20100291726 | Method of Fabricating a Radiation Detector - The present invention relates to a method of fabricating a radiation detector comprising a photosensitive sensor assembly ( | 11-18-2010 |
| 20100330723 | METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE - In a method of manufacturing a photoelectric conversion device having a pixel region and a peripheral circuit region, a semiconductor compound layer is formed by causing a surface of a diffusion layer or gate electrode of a MOS transistor in the peripheral circuit region to react with a high melting point metal, then an insulating layer is formed in the pixel region and the peripheral circuit region after the step of forming a semiconductor compound layer. A contact hole is formed in the insulating layer to expose a diffusion layer in the pixel region, and a contact hole is formed in the insulating layer to expose the semiconductor compound layer formed in the peripheral circuit region. These holes are formed at different timings. Prior to forming the hole which is formed later, a contact plug is formed in the contact hole which is formed earlier. | 12-30-2010 |
| 20100330724 | SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE - A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion. | 12-30-2010 |
| 20110008925 | CMOS IMAGE SENSOR WITH REDUCED DARK CURRENT - A carbon-containing semiconductor layer is formed on exposed surfaces of a p− doped semiconductor layer abutting sidewalls of a shallow trench. Following formation of a dielectric layer on the carbon-containing semiconductor layer, a surface pinning layer having a p-type doping is formed underneath the carbon-containing semiconductor layer. A shallow trench isolation structure and a photodiode are subsequently formed. Diffusion of defects directly beneath the shallow trench isolation structure, now contained in the carbon-containing semiconductor layer, is suppressed. Further, boron diffusion into the shallow trench isolation structure and into the photodiode is also suppressed by the carbon-containing semiconductor layer, providing reduction in dark current and enhancement of performance of the photodiode. | 01-13-2011 |
| 20110027934 | PHOTOELECTRIC CONVERSION APPARATUS AND IMAGE PICKUP SYSTEM USING PHOTOELECTRIC CONVERSION APPARATUS - A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved. | 02-03-2011 |
| 20110033968 | SOLID-STATE IMAGE PICKUP DEVICE AND METHOD FOR PRODUCING THE SAME - A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region. | 02-10-2011 |
| 20110070677 | SYSTEM AND METHOD FOR CMOS IMAGE SENSING - A method for forming a CMOS image sensing pixel, which is configured to determine a color, includes providing an n-type substrate that includes a first thickness and a first width. The method also includes forming a p-type layer, the p-type layer overlaying the n-type substrate. The p-type layer includes a second thickness and a second width. The second thickness and the second width are associated with a light characteristic. The method additionally includes forming an n-type layer, the n-type layer overlaying the p-type layer. The n-type layer includes a third thickness and a third width. In addition, the method includes forming a pn junction between the p-type layer and the n-type layer. The pn junction includes a fourth width. The method also includes providing a control circuit. The control circuit is electrically coupled to the n-type substrate. | 03-24-2011 |
| 20110086458 | CMOS IMAGE SENSOR WITH ASYMMETRIC WELL STRUCTURE OF SOURCE FOLLOWER - Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged. | 04-14-2011 |
| 20110086459 | METHOD OF FABRICATING A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) IMAGE SENSOR - There are provided a CMOS image sensor and a method for fabrication thereof. The CMOS image sensor having a reset transistor, a select transistor, a drive transistor and a photodiode, includes an active region in shape of a line, a gate electrode of the drive transistor, which is intersected with the active region, a blocking layer interposed between the active region and the gate electrode in which the blocking layer is formed on an intersection region of the active region and the gate electrode, and a metal contact electrically connected to the gate electrode, wherein the metal contact is not electrically connected to the active region by the blocking layer. | 04-14-2011 |
| 20110136288 | MANUFACTURING NANOWIRE PHOTO-DETECTOR GROWN ON A BACK-SIDE ILLUMINATED IMAGE SENSOR - An embodiment relates to a method of manufacturing a device comprising a substrate having a front side and a back-side, a nanowire disposed on the back-side and an image sensing circuit disposed on the front side, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength transmitted through the nanowire. | 06-09-2011 |
| 20120058589 | METHOD OF PRODUCING SEMICONDUCTOR DEVICE - Provided is a method of manufacturing a semiconductor device which can form a high-performance photodiode in which variation in output characteristics and performance deterioration are suppressed. A prescribed gate metal is used to form a shield section | 03-08-2012 |
| 20120100658 | METHOD OF FORMING SEMICONDUCTOR DEVICE - Provided is a method of forming a semiconductor device. The method includes forming an insulating film on a semiconductor substrate, a conductive film on the insulating film, and a first structure and a second structure on the conductive film. The semiconductor substrate has first and second regions. The first and second structures are formed on the first and second regions, respectively. An impurity diffused region is formed in the semiconductor substrate using the first structure as a mask. The impurity diffused region overlaps the first structure. A portion of the first structure, and the conductive film are etched to respectively form a gate structure and a capacitor structure on the first and second regions. | 04-26-2012 |
| 20120122262 | THIN FILM SOLAR CELL MODULE AND METHOD OF MANUFACTURING THE SAME - A thin film solar cell module includes a front substrate; a plurality of thin film solar cells disposed on the front substrate; a rear substrate disposed on the thin film solar cells; a plurality of inter-connection terminals electrically connected to the thin film solar cells, respectively, and exposed to an exterior surface of at least one of the front and rear substrates; and a connector electrically connecting the inter-connection terminals in a series or parallel configuration. | 05-17-2012 |
| 20120171799 | BYPASS DIODE FOR A SOLAR CELL - Methods of fabricating bypass diodes for solar cells are described. In one embodiment, a method includes forming a first conductive region of a first conductivity type above a substrate of a solar cell. A second conductive region of a second conductivity type is formed on the first conductive region. In another embodiment, a method includes forming a first conductive region of a first conductivity type above a substrate of a solar cell. A second conductive region of a second conductivity type is formed within, and surrounded by, an uppermost portion of the first conductive region but is not formed in a lowermost portion of the first conductive region. | 07-05-2012 |
| 20120295387 | METHOD FOR PRODUCING A THIN-FILM PHOTOVOLTAIC CELL HAVING AN ETCHANT-RESISTANT ELECTRODE AND AN INTEGRATED BYPASS DIODE AND A PANEL INCORPORATING THE SAME - A method for producing a thin-film solar cell with a cell level integrated bypass diode includes forming at least first, second and third series-connected cells on a support, each cell being a laminated structure comprising a junction layer including semiconducting material of a first and second type, a front electrode formed of a transparent conductive oxide resistant to an etchant disposed in electrical contact with the semiconducting material of the first type, and a back electrode in electrical contact with the semiconducting material of the second type. A portion of both the back electrode and the junction layer are separated from a selected parent solar cell. Using the separated portion of the back electrode the semiconducting material of the second type of the separated portion of the junction layer is connected to the semiconducting material of the first type of any one chosen solar cell in the array. | 11-22-2012 |
| 20120322193 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof. | 12-20-2012 |
| 20130023083 | METHOD FOR FORMING STRUCTURE FOR REDUCING NOISE IN CMOS IMAGE SENSORS - A method and device is disclosed for reducing noise in CMOS image sensors. An improved CMOS image sensor includes a light sensing structure surrounded by a support feature section. An active section of the light sensing structure is covered by no more than optically transparent materials. A light blocking portion includes an opaque layer or a black light filter layer in conjunction with an opaque layer, covering the support feature section. The light blocking portion may also cover a peripheral portion of the light sensing structure. The method for forming the CMOS image sensors includes using film patterning and etching processes to selectively form the opaque layer and the black light filter layer where the light blocking portion is desired, but not over the active section. The method also provides for forming microlenses over the photosensors in the active section. | 01-24-2013 |
| 20130029449 | Semiconductor Sensor Structures with Reduced Dislocation Defect Densities and Related Methods for the Same - Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique. | 01-31-2013 |
| 20130295710 | PHOTOVOLTAIC MODULES AND METHODS FOR MANUFACTURING PHOTOVOLTAIC MODULES HAVING TANDEM SEMICONDUCTOR LAYER STACKS - Methods of manufacturing photovoltaic modules are provided. One method includes providing a substrate and depositing a lower electrode above the substrate. The method also includes depositing a lower stack of microcrystalline silicon layers above the lower electrode, depositing an upper stack of amorphous silicon layers above the lower stack of microcrystalline silicon layers, and depositing an upper electrode above the upper stack of amorphous silicon layers. At least one of the lower stack and the upper stack includes an N-I-P stack of silicon layers having an n-doped silicon layer, an intrinsic silicon layer, and a p-doped silicon layer. The intrinsic silicon layer has an energy band gap that is reduced by depositing the intrinsic silicon layer at a temperature of at least 250 degrees Celsius. | 11-07-2013 |
| 20130295711 | SELF-POWERED INTEGRATED CIRCUIT WITH MULTI-JUNCTION PHOTOVOLTAIC CELL - A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion. | 11-07-2013 |
| 20140004645 | HIGH EFFICIENCY, LIGHTWEIGHT, FLEXIBLE SOLAR SHEETS | 01-02-2014 |
| 20140051200 | METHOD FOR FABRICATING PHOTO DETECTOR - A photo detector and related fabricating method are disclosed. The photo detector includes a substrate, a first patterned semiconductor layer, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region. The dielectric layer is disposed to cover the substrate and the first semiconductor layer. The patterned conductive layer is disposed on the dielectric layer. The inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region. The first electrodes are electrically connected to the first patterned semiconductor layer. | 02-20-2014 |
| 20140065753 | METHOD OF MANUFACTURING SOLID-STATE IMAGE SENSOR - A method of manufacturing a solid-state image sensor having a pixel region and a peripheral circuit region, includes forming an oxide film on a semiconductor substrate, forming an insulating film on the oxide film, forming a first opening in the insulating film and the oxide film in the peripheral circuit region, forming a trench in the semiconductor substrate in the peripheral circuit region by etching the semiconductor substrate through the first opening using the insulating film as a mask, forming a second opening in the insulating film to penetrate through the insulating film in the pixel region and to reach a predetermined depth of the oxide film, and forming insulators in the trench and the second opening. | 03-06-2014 |
| 20140065754 | METHOD FOR FABRICATING POWER-GENERATING MODULE WITH SOLAR CELL - The invention discloses a method for fabricating power-generating module with solar cell. The method includes the steps of providing a flexible substrate; forming a solar cell unit on the flexible substrate by using a high density plasma at a temperature lower than about 150° C.; and forming a circuit unit on the flexible substrate; wherein the solar cell unit is coupled to the circuit unit, so as to provide the power needed for the operation of the circuit unit. | 03-06-2014 |
| 20140087510 | Manufacturing Method Of An Amorphous-Silicon Flat-Panel X-Ray Sensor - An embodiment of the present invention provides a manufacturing method of an amorphous-silicon flat-panel X-ray sensor; the method reduces the number of mask plates to be used, simplifies the production processes, saves production costs, while also improving the product yield. The manufacturing method comprises: on a substrate, after a gate scan line is formed, forming a data line, a TFT switch element and a photosensitive element through one patterning process, wherein on the mask plate used in the patterning process, a region corresponding to a channel of the TFT switch element is semi-transmissive, whereas regions respectively corresponding to the data line, the photosensitive element and the portion of the TFT switch element other than the channel thereof are non-transmissive; thereafter, on the substrate formed with the TFT switch element and the photosensitive element, a passivation layer and a bias line are formed. | 03-27-2014 |
| 20140206127 | CMOS Image Sensor White Pixel Performance - A method includes forming a photodiode in a substrate and forming source and drain regions in the substrate. A first rapid thermal anneal (RTA) process is performed to anneal the source and drain regions in the substrate. After forming the source and drain regions, a thermal oxide layer is grown over the photodiode by performing a second RTA process. A thickness of the thermal oxide layer is limited to a thickness required to enclose a damaged portion of a surface of the photodiode. | 07-24-2014 |
| 20140342490 | METHOD FOR FABRICATING SENSOR - A method for fabricating a sensor, comprises: forming, on a base substrate, a pattern of a data line ( | 11-20-2014 |
| 20140349437 | IMAGE SENSORS AND METHODS OF MANUFACTURING THE SAME - In image sensors and methods of manufacturing the same, a substrate has a photoelectric conversion area, a floating diffusion area and a recess between the photoelectric conversion area and the floating diffusion area. A plurality of photodiodes is vertically arranged inside the substrate in the photoelectric conversion area. A transfer transistor is arranged along a surface profile of the substrate having the recess and configured to transfer electric charges generated from the plurality of photodiodes to the floating diffusion area. The transfer transistor includes a gate insulation pattern on a sidewall and a bottom of the recess and on a surface of the substrate around the recess, and a gate conductive pattern including polysilicon doped with impurities and positioned on the gate insulation pattern along the surface profile of the substrate having the recess, wherein a cavity is in an upper surface of the gate conductive pattern. | 11-27-2014 |
| 20150050769 | SOLAR-POWERED ENERGY-AUTONOMOUS SILICON-ON-INSULATOR DEVICE - A solar-powered autonomous CMOS circuit structure is fabricated with monolithically integrated photovoltaic solar cells. The structure includes a device layer including an integrated circuit and a solar cell layer. Solar cell structures in the solar cell layer can be series connected during metallization of the device layer or subsequently. The device layer and the solar cell layer are formed using a silicon-on-insulator substrate. Subsequent spalling of the silicon-on-insulator substrate through the handle substrate thereof facilitates production of a relatively thin solar cell layer that can be subjected to a selective etching process to isolate the solar cell structures. | 02-19-2015 |
| 20150079718 | Image Sensors with a High Fill-Factor - A device includes a first chip including an image sensor therein, and a second chip bonded to the first chip. The second chip includes a logic device selected from the group consisting essentially of a reset transistor, a selector, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. | 03-19-2015 |
| 20150118781 | Method and Apparatus for Image Sensor Packaging - A backside illuminated image sensor having a photodiode and a first transistor in a sensor region and located in a first substrate, with the first transistor electrically coupled to the photodiode. The image sensor has logic circuits formed in a second substrate. The second substrate is stacked on the first substrate and the logic circuits are coupled to the first transistor through bonding pads, the bonding pads disposed outside of the sensor region. | 04-30-2015 |
| 20150147843 | METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION APPARATUS - A method of manufacturing a photoelectric conversion apparatus which includes a pixel circuit section having a well where a photoelectric conversion element and an amplification element configured to generate a signal based on an amount of charge generated in the photoelectric conversion element are arranged, and a peripheral circuit section having a MOS transistor. The method includes forming a dielectric film for covering the photoelectric conversion element, the amplification element, and a gate electrode of the MOS transistor and forming, by etching the dielectric film, a side spacer by remaining a portion of the dielectric film on a side surface of the gate electrode while protecting by a resist, wherein an opening is formed in the dielectric film of the pixel circuit section with the etching, and a contact for defining a potential of the well is formed through the opening. | 05-28-2015 |
| 20150349004 | DIE SEAL RING FOR INTEGRATED CIRCUIT SYSTEM WITH STACKED DEVICE WAFERS - An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer. | 12-03-2015 |
| 20150349190 | SHINGLED SOLAR CELL MODULE - A high efficiency configuration for a solar cell module comprises solar cells arranged in a shingled manner to form super cells, which may be arranged to efficiently use the area of the solar module, reduce series resistance, and increase module efficiency. | 12-03-2015 |
| 20150364522 | METHOD OF MANUFACTURING SOLID-STATE IMAGE SENSOR - A method of manufacturing a solid-state image sensor includes forming a first element isolation and a first active region of a pixel area, and a second isolation and a second active region of a peripheral circuit area, forming a gate electrode film covering the first element isolation, the first active region, the second element isolation and the second active region, implanting an n-type impurity selectively into at least a part of the gate electrode film corresponding to the pixel area, and forming, after the implanting of the n-type impurity, a first gate electrode of the pixel area and a second gate electrode of the peripheral circuit area by patterning the gate electrode film. The part of the gate electrode film includes a portion located above a boundary between the first element isolation and the first active region. | 12-17-2015 |
| 20150380446 | MANUFACTURING METHOD OF SENSING INTEGRATED CIRCUIT - A manufacturing method of a sensing integrated circuit including the following acts. A plurality of transistors are formed. At least one dielectric layer is formed on or above the transistors. A plurality of connecting structures are formed in the dielectric layer. The connecting structures are respectively and electrically connected to the transistors. A plurality of separated conductive wells are respectively formed in electrical contact with the connecting structures. | 12-31-2015 |
| 20160020246 | METHOD FOR FABRICATING CMOS IMAGE SENSORS AND SURFACE TREATING PROCESS THEREOF - The present invention provides a method for fabricating a CMOS image sensor including a plurality of steps. Firstly, a substrate is provided. Then, a pixel region covering most of the substrate and a logic circuit region on a periphery of the substrate are formed. After that, at least one trench is formed in the pixel region. Next, a deposition process is performed to fill the at least one trench and cover the pixel region. Then, a planarization process is performed to expose a surface of the pixel region. A first treatment on the exposed surface of the pixel region is next performed by applying a first cleaning solution including hydrogen fluoride (HF) and ethylene glycol (EG). Besides, an amount of HF is lesser than that of EG. | 01-21-2016 |
| 20160035786 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - There is provided a method of fabricating a semiconductor device, including grinding a first surface of a first semiconductor layer to generate a damage layer in a surface region of the first surface of the first semiconductor layer, polishing the damage layer to remove a portion with predetermined thickness of the damage layer; and etching the damage layer and the first semiconductor layer to remove the first semiconductor layer from a third surface of a second semiconductor layer, the third surface contacting to a second surface opposed to the first surface in the first semiconductor layer. | 02-04-2016 |
| 20160043144 | PHOTO ELECTRIC CONVERTER, IMAGING SYSTEM, AND METHOD FOR MANUFACTURING PHOTOELECTRIC CONVERTER - A method for manufacturing a photoelectric converter includes a first step of preparing a semiconductor substrate including a metal oxide semiconductor (MOS) transistor, a second step of forming a plurality of interlayer insulating films above the semiconductor substrate, and a third step of forming a photoelectric conversion portion above the semiconductor substrate. The second step includes a step of forming a first film containing hydrogen. The third step includes a step of forming a first electrode, a step of forming a photoelectric conversion film, and a step of forming a second electrode. The method includes a step of performing heat treatment between the step of forming the first film and the step of forming the photoelectric conversion film. | 02-11-2016 |
| 20160056189 | SOLID-STATE IMAGING APPARATUS AND MANUFACTURING METHOD OF SOLID-STATE IMAGING APPARATUS - The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure. | 02-25-2016 |
| 20160064449 | METHOD OF MANUFACTURING JUNCTION FIELD EFFECT TRANSISTOR, METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD OF MANUFACTURING IMAGING APPARATUS, JUNCTION FIELD EFFECT TRANSISTOR, AND IMAGING APPARATUS - A method of manufacturing a junction field effect transistor having a channel region disposed in a semiconductor substrate, deeper than one of a source region and a drain region, the method includes a first step of forming a first mask having a first opening portion over the semiconductor substrate in which a first semiconductor region of a first conductivity type is disposed, a second step of forming a second semiconductor region of a second conductivity type defined as the channel region, in the first semiconductor region by implantation of ions of second conductivity type opposite to the first conductivity type using the first mask, and a third step of forming a third semiconductor region of the second conductivity type defined as the one of the source region and the drain region, by implantation of ions of the second conductivity type, using the first mask. | 03-03-2016 |
| 20160079303 | MANUFACTURING METHOD OF ELECTRONIC DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of an electronic device processes a surface of a first wafer, bonds a surface of a second wafer to the processed surface of the first wafer, thins the first wafer by polishing a back surface of the first wafer, the back surface being located on an opposite side of the processed surface, forms a groove along a periphery of the back surface of the thinned first wafer by using a dicing blade, attaches a protective layer to the back surface of the first wafer having the groove, via a bonding layer, and polishes a back surface of the second wafer, the back surface being located on an opposite side of the surface attached to the protective layer. | 03-17-2016 |
| 20160079305 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - To provide a semiconductor device having improved performance and reduce a production cost. | 03-17-2016 |
| 20160126286 | METHOD FOR PRODUCING IMAGE PICKUP APPARATUS AND METHOD FOR PRODUCING SEMICONDUCTOR APPARATUS - A method for producing an image pickup apparatus includes: a process of cutting an image pickup chip substrate where electrode pads are formed around each of the light receiving sections to fabricate image pickup chips; a process of bonding image pickup chips determined as non-defective products to a glass wafer to fabricate a joined wafer; a process of filling a sealing member among the image pickup chips on the joined wafer; a machining process including a thinning a thickness of the joined wafer to flatten a machining surface and a forming through-hole interconnections, each of which is connected to each of the electrode pads; a process of forming a plurality of external connection electrodes, each of which is connected to each of the electrode pads via each of the through-hole interconnections; and a process of cutting the joined wafer. | 05-05-2016 |
| 20160137493 | MEMS DEVICE HAVING A GETTER - A microelectromechanical system (MEMS) device includes a high density getter. The high density getter includes a silicon surface area formed by porosification or by the formation of trenches within a sealed cavity of the device. The silicon surface area includes a deposition of titanium or other gettering material to reduce the amount of gas present in the sealed chamber such that a low pressure chamber is formed. The high density getter is used in bolometers and gyroscopes but is not limited to those devices. | 05-19-2016 |
| 20160172416 | VARIABLE OPTICAL FILTER AND A WAVELENGTH-SELECTIVE SENSOR BASED THEREON | 06-16-2016 |
| 20160172418 | METHOD OF MANUFACTURING CMOS IMAGE SENSOR | 06-16-2016 |
| 20160172419 | SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF | 06-16-2016 |
| 20160181305 | SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS | 06-23-2016 |
| 20160380019 | ARRAY SUBSTRATE OF X-RAY SENSOR AND METHOD FOR MANUFACTURING THE SAME - An array substrate of an X-ray sensor and a method for manufacturing the same are provided, the method comprising a step of forming a thin-film transistor element and a photodiode sensor element, wherein the step of forming the thin-film transistor element comprises: forming a gate electrode on an base substrate by a mask process; depositing a gate insulating layer on the base substrate on which the gate electrode is formed; the step of forming the photodiode sensor element comprises: forming an ohmic contact layer on the base substrate through the same mask process while forming the gate electrode; forming a semiconductor layer and a transparent electrode through a mask process on the substrate on which the ohmic contact layer is formed; depositing the gate insulating layer on the base substrate on which the semiconductor layer and the transparent electrode are formed while depositing the gate insulating layer on the base substrate on which the gate electrode is formed. A gate pattern and an ohmic contact layer are formed through the same mask process, and a passivation layer substitutes a channel blocking layer to reduce the number of the mask processes and simplify the manufacturing process and improve throughput and yield of the product. | 12-29-2016 |
