| Entries |
| Document | Title | Date |
|---|
| 20080199814 | Device manufacturing process utilizing a double patterning process - Manufacturing semiconductor device by steps of:
| 08-21-2008 |
| 20080241756 | ENHANCING LITHOGRAPHY FOR VIAS AND CONTACTS BY USING DOUBLE EXPOSURE BASED ON LINE-LIKE FEATURES - By performing a double exposure process on the basis of bar-like or line-like features, critical via and contact openings may be defined as an intersection, thereby obtaining the desired design dimension on the basis of less critical lithography process windows. Hence, process flexibility may be enhanced while overall throughput may not be substantially negatively affected. | 10-02-2008 |
| 20080241757 | Reproducible, high yield method for fabricating ultra-short T-gates on HFETs - A method for fabricating ultra-short T-gates on heterojunction field effect transistors (HFETs) comprising the steps of (a) providing a coating of three layers of resists, with polymethylmethacrylate (PMMA) with high molecular weight on the bottom, polydimethylglutarimide (PMGI) in the middle, and PMMA with low molecular weight on the top; (b) in a first exposure, exposing and developing the layers with a dose of a developer that is high enough to allow the developer to break the top PMMA but low to avoid contributing significantly to the overall dose received in the bottom PMMA layer; and (c) in a second exposure, using an exposure and developing process to define 0.03-0.05 um openings in the bottom PMMA layer. | 10-02-2008 |
| 20080261156 | METHOD OF FORMING A PATTERN IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A GATE USING THE SAME - A method of forming a pattern in a semiconductor device is described. A substrate divided into cell and peripheral regions is provided, and an object layer is formed on a substrate. A buffer pattern is formed on the object layer in the cell region along a first direction. A spacer is formed along a sidewall of the buffer pattern in the cell region, and a hard mask layer remains on the object layer in the peripheral region. The buffer layer is removed, and the spacer is separated along a second direction different from the first direction, thereby forming a cell hard mask pattern. A peripheral hard mask pattern is formed in the peripheral region. A minute pattern is formed using the cell and peripheral hard mask patterns in the substrate. Therefore, a line width variation or an edge line roughness due to the photolithography process is minimized. | 10-23-2008 |
| 20080280230 | PHOTOLITHOGRAPHY PROCESS INCLUDING A CHEMICAL RINSE - The present disclosure provides a plurality of methods of performing a lithography process. In one embodiment, a substrate including a layer of photoresist is provided. The layer of photoresist is exposed. The exposed layer of photoresist is developed. A chemical rinse solution is applied to the developed photoresist. The chemical rinse solution includes an alcohol base chemical. The substrate is spun dry. | 11-13-2008 |
| 20080280231 | Bounce drive actuator and micromotor - Provided is the design and fabrication of the novel bounce drive actuator (BDA) for the development of a new-type micro rotary motor. Although the scratch drive actuator (SDA) micro motor has been developed more than one decade, such device has limited commercial applications due to its shorter lifetime, high power consumption and sudden reverse rotation. In contrast, present invention proposes an innovative BDA micro rotary motor with different actuating mechanism and improved performance. Several significant investigations shown in this research present that the length of the SDA-plate is longer than 75 μm and the plate length of the BDA is less than 75 μm. Under the same driving power and frequency with SDA-based micro motor, the BDA-based micro rotary motor exhibited a consistent “reverse” rotation and a higher speed. BDA has higher flexural rigidity due to its shorter length of plate; thus, the contact area of the bending BDA-plate and the insulator substrate will substantially be reduced even under the same applied voltage as the priming value of SDA-plate. Furthermore, a novel rib and flange structure design for the improvement of lifetime (>100 hrs) and rotational speed (>30 rpm) of BDA micro motor was also demonstrated in this invention. | 11-13-2008 |
| 20080292991 | HIGH FIDELITY MULTIPLE RESIST PATTERNING - An integrated circuit fabrication process as described herein employs a double photoresist exposure technique. After creation of a first pattern of photoresist features on a wafer, a second photoresist layer is formed over the first pattern of photoresist features. The second photoresist layer is subjected to a reflow step that softens and relaxes the second photoresist material. This reflow step causes the exposed surface of the second photoresist layer to become substantially planar. Thereafter, the second photoresist layer can be exposed and developed to create a second pattern of photoresist features on the wafer. The planar surface of the second photoresist layer, which results from the reflow step, facilitates the creation of accurate, precise, and “high fidelity” photoresist features from the second photoresist material. | 11-27-2008 |
| 20080311526 | METHOD FOR A MULTIPLE EXPOSURE, MICROLITHOGRAPHY PROJECTION EXPOSURE INSTALLATION AND A PROJECTION SYSTEM - In a method for multiply exposing at least one substrate coated with a photosensitive layer, a first exposure is carried out in accordance with a first set of exposure parameters on a first projection system, and a second exposure is carried out in accordance with a second set of exposure parameters on a second projection system spatially separated from the first projection system. The projection systems are integrated in a common projection exposure installation. The first exposure can be carried out, for example, with an amplitude mask, the second exposure with a phase mask. The use of a number of projection systems enables multiple exposure that is performed in parallel and is therefore timesaving. | 12-18-2008 |
| 20090023099 | MASK REGISTRATION CORRECTION - A method of manufacturing a semiconductor device comprising forming an active region in a device substrate using a first phase shift mask (PSM) having a first patterned light shielding layer formed thereon, forming a polysilicon feature on the device substrate over the active region using a second PSM having a second patterned light shielding layer formed thereon, forming a contact feature on the polysilicon feature using a third PSM having a third patterned light shielding layer formed thereon, and forming a metal feature on the contact feature using a fourth PSM having a fourth patterned light shielding layer formed thereon, wherein at least one of the third and fourth patterned light shielding layers is patterned substantially similarly to at least one of the first and second patterned light shielding layers. | 01-22-2009 |
| 20090029293 | MANUFACTURING METHOD OF SILICON CARBIDE SEMICONDUCTOR APPARATUS - A manufacturing method of a silicon carbide semiconductor apparatus is provided. The method includes forming a first resist pattern on a surface of a silicon carbide layer formed on a silicon carbide substrate, implanting a first conduction type impurity ion in the silicon carbide layer on which the first resist pattern is formed, forming a second resist pattern by decreasing a width of the first resist pattern with etching and forming a deposition layer on the surface of the silicon carbide layer which is not covered with the second resist pattern, and implanting a second conduction type impurity ion in the silicon carbide layer on which the second resist pattern is formed, through the deposition layer. | 01-29-2009 |
| 20090042143 | Thin-film magnetic head structure, method of manufacturing the same, and thin-film magnetic head - A method of manufacturing a thin-film magnetic head structure comprises the steps of preparing an insulating layer | 02-12-2009 |
| 20090081593 | Method for forming resist pattern and method for manufacturing a semiconductor device - The resist material contains a photo-acid generator having an absorption peak to exposure light having a wavelength of less than 300 nm, and a second photo-acid generator having an absorption peak to exposure light having a wavelength of 300 nm or more. The method for forming a resist pattern comprises a step for selectively exposing which exposes a coating film of the resist material to an exposure light having a wavelength of less than 300 nm, and a step for selectively exposing by using an exposure light having a wavelength of 300 nm or more. The semiconductor device comprises a pattern formed by the resist pattern. The method for forming a semiconductor device comprises a step for forming a resist pattern on an underlying layer by the aforementioned manufacturing method, and a step for patterning the underlying layer by etching using the resist pattern as a mask. | 03-26-2009 |
| 20090087792 | METHOD FOR MANUFACTURING ELECTROLUMINESCENCE ELEMENT - The present invention provides a method for manufacturing an electroluminescence element that has a light emitting layer containing a quantum dot and exhibits excellent life characteristics. In the method, patterning of the light emitting layer can be stably performed by a lift-off method. A photoresist layer is formed on a substrate having a first electrode layer. The photoresist layer is then exposed, developed, and patterned to ensure that a portion of the photoresist layer, which is located in a light emission area, is removed. A coating liquid containing a quantum dot having a silane coupling agent attached to the surface thereof is coated on the resultant substrate having the patterned photoresist layer and cured to form a light emitting layer. The remaining photoresist layer is then removed to lift off a portion of the light emitting layer, which is present on the photoresist layer. | 04-02-2009 |
| 20090092926 | Lithography Systems and Methods of Manufacturing Using Thereof - Multi-beam lithography systems and methods of manufacturing semiconductor devices using the same are disclosed. For example, the method utilizes non-coincidence of boundaries of electrical fields emanating from chrome on glass or phase shifted mask features distributed over two masks for the optimization of lithographic process windows, side lobe suppression, or pattern orientation dependent process window optimization employing one mask with polarization rotating film on the backside. | 04-09-2009 |
| 20090098487 | Method of Forming Variable Patterns Using a Reticle - A method of forming a variable pattern across a wafer using a reticle forms a plurality of first patterns on the wafer. The first pattern is repeated across the wafer and each first pattern has a first readable element. The method also forms a plurality of second patterns on the wafer. The second patterns is repeated across the wafer and each second pattern has a second readable element. The second patterns are positioned relative to the first patterns by aligning a first second pattern relative to one portion of a corresponding first pattern and then incrementally misaligning each successive second pattern in a row or a column relative to its corresponding first pattern. Thus, each corresponding first readable element and second readable element form a corresponding variable pattern. | 04-16-2009 |
| 20090104564 | PATTERNING PROCESS - The invention is directed to a method for patterning a material layer. The method comprises steps of forming a mask layer on the material layer. A multiple patterning process is performed on the mask layer for transferring at least a first pattern from a first photomask through a first photoresist and a second pattern from a second photomask from a second photoresist layer into the mask layer without performing any etching process. The mask layer exposes a portion of the material layer and the mask layer is patterned at the time that the first photoresist layer and the second photoresist layer are developed respectively. An etching process is performed to pattern the material layer by using the mask layer as an etching mask. | 04-23-2009 |
| 20090104565 | METHOD FOR FORMING PHOTOELECTRIC COMPOSITE BOARD - In a method for forming a photoelectric composite board ( | 04-23-2009 |
| 20090111058 | Method of Forming Micro Pattern of Semiconductor Device - The present invention relates to a method of forming a micro pattern of a semiconductor device. According to an aspect of the present invention, a first photoresist layer and a second photoresist layer with different exposure types are formed over a semiconductor substrate on which an etch target layer is formed, performing an exposure process on the second photoresist layer and the first photoresist layer. Second photoresist patterns are formed by developing the second photoresist layer. First photoresist patterns are formed by etching the first photoresist layer using an etch process employing the second photoresist patterns as an etch mask. Auxiliary patterns are formed by developing the first photoresist patterns. The etch target layer is etched by employing the auxiliary patterns. | 04-30-2009 |
| 20090130599 | METHOD FOR FORMING AN ELECTRICAL STRUCTURE COMPRISING MULTIPLE PHOTOSENSITIVE MATERIALS - An electrical structure and method of forming. The method comprises providing a substrate structure. A first layer comprising a first photosensitive material having a first polarity is formed over and in contact with the substrate structure. A second layer comprising photosensitive material having a second polarity is formed over and in contact with the first layer. The first polarity comprises an opposite polarity as the second polarity. Portions of the first and second layers are simultaneously exposed to a photo exposure light source. The portions of the first and second layers are developed such that structures are formed. | 05-21-2009 |
| 20090130600 | Multicolored mask process for making display circuitry - A process for forming a pixel circuit is disclosed comprising: (a) providing a transparent support; (b) forming a multicolor mask having at least four different color patterns; (c) forming integrated electronic components of the pixel circuit having at least four layers of patterned functional material comprising a first conductor, a dielectric, a semiconductor, and a second conductor each layer of patterned functional material corresponding to the four different color patterns of the multicolor mask. The functional material is patterned using a photopattern corresponding to each color pattern. | 05-21-2009 |
| 20090130601 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device may include forming first and second photoresist patterns that intersect with each other on and/or over an etched film, and forming a fine pattern on the etched film by etching the etched film using the first and second photoresist patterns as an etching mask. According to embodiments, a fine pattern, such as a contact hole, may be formed by performing two exposure processes. The method may use existing masks for line and/or space. The method may secure a sufficient etching margin by securing a sufficient thickness of a photoresist film through two photoresist coating processes. | 05-21-2009 |
| 20090130602 | METHOD FOR MANUFACTURING IMAGE SENSOR - A method for manufacturing an image sensor that does not include a reflow process but includes exposing a photoresist film a plurality of times from various angles and then forming one or more micro lenses by developing the exposed photoresist film. | 05-21-2009 |
| 20090142704 | METHOD FOR REDUCING SIDE LOBE PRINTING USING A BARRIER LAYER - A method suitable for reducing side lobe printing in a photolithography process is enabled by the use of a barrier layer on top of a photoresist on a substrate. The barrier layer is absorbing at the imaging wavelength of the underlying photoresist and thus blocks the light from reaching the photoresist. A first exposure followed by a development in an aqueous base solution selectively removes a portion of the barrier layer to reveal a section of the underlying photoresist layer. At least a portion of the revealed section of the photoresist layer is then exposed and developed to form a patterned structure in the photoresist layer. The barrier layer can also be bleachable upon exposure and bake in the present invention. | 06-04-2009 |
| 20090142705 | METHOD FOR FORMING MASK PATTERN - A method for forming a mask pattern for forming a semiconductor device may include coating a photoresist, performing a primary bake process on the photoresist, exposing and developing the photoresist, and then performing a secondary bake process on the photoresist under a nitrogen and/or hydrogen gas atmosphere. | 06-04-2009 |
| 20090148795 | PATTERNING METHOD USING A COMBINATION OF PHOTOLITHOGRAPHY AND COPOLYMER SELF-ASSEMBLYING LITHOGRAPHY TECHNIQUES - Disclosed are embodiments of a lithographic patterning method that incorporates a combination of photolithography and self-assembling copolymer lithography techniques in order to create, on a substrate, a grid-pattern mask having multiple cells, each with at least one sub-50 nm dimension. The combination of different lithographic techniques further allows for precise registration and overlay of the individual grid-pattern cells with corresponding structures within the substrate. The resulting grid-pattern mask can then be used, in conjunction with directional etch and other processes, to extend the cell patterns into the substrate and, thereby form openings, with at least one sub-50 nm dimension, landing on corresponding in-substrate structures. Once the openings are formed, additional structures can be formed within the openings. | 06-11-2009 |
| 20090155724 | Method for fabricating probe needle tip of probe card - Disclosed herein is a method for fabricating a probe needle tip of a probe card, in which, in order to prevent a poor grinding effect caused by irregular removal or flexibility of the photoresists laminated to be high in the course of polishing a first metal loaded into the opening of the photoresists laminated into a multilayer configuration upon formation of the probe needle tip of the probe card, a second metal is laminated on any one of one or more stacked photoresist layers, thus firmly holding the photoresist layers on/beneath the metal. | 06-18-2009 |
| 20090155725 | Method of fine patterning semiconductor device - For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures. | 06-18-2009 |
| 20090170031 | METHOD OF FORMING A PATTERN OF A SEMICONDUCTOR DEVICE - A pattern for a gate line is formed using a first photoresist pattern and a first BARC layer. A pad and patterns for a select line, which has a width that is larger than that of the gate line, are formed using a second photoresist pattern and a second BARC layer. The gate line, the pad and the select line can be formed at a same time. | 07-02-2009 |
| 20090170032 | METHOD OF MANUFACTURING ELECTRONIC DEVICE - A method of manufacturing an electronic device includes forming a photosensitive SOG oxide layer on a multi-layer ceramics substrate having a penetrating electrode, forming an opening by subjecting the photosensitive SOG oxide layer to an exposure treatment and developing treatment so that an upper face of the penetrating electrode is exposed, and forming a passive element on the photosensitive SOG oxide layer, the passive element being connected to the penetrating electrode through the opening. | 07-02-2009 |
| 20090220892 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND RESIST COATING AND DEVELOPING SYSTEM - A method of manufacturing a semiconductor device includes: forming a resist layer on an underlayer, forming an exposed pattern in the resist layer, wherein the exposed pattern comprises a soluble layer and an insoluble layer, forming a resist pattern by removing the soluble layer from the resist layer in which the exposed pattern is formed, removing an intermediate exposed area from the resist pattern, forming a new soluble layer in a surface of the resist pattern from which the intermediate exposed area is removed by applying a reaction material to the resist pattern from which the intermediate exposed area is removed, wherein the reaction material generates a solubilization material that solubilizes the resist pattern, and removing the new soluble layer from the resist pattern. | 09-03-2009 |
| 20090233238 | Double Patterning Strategy For Contact Hole and Trench in Photolithography - A method of lithography patterning includes forming a first resist pattern on a substrate, the first resist pattern including a plurality of openings therein on the substrate; forming a second resist pattern on the substrate and within the plurality of openings of the first resist pattern, the second resist pattern including at least one opening therein on the substrate; and removing the first resist pattern to uncover the substrate underlying the first resist pattern. | 09-17-2009 |
| 20090233239 | Reticle for Use in a Semiconductor Lithographic System and Method for Modifying the Same - A reticle for use in a semiconductor lithographic system includes at least two separated reticle parts. Each part includes a pattern to be transferred lithographically to a substrate. At least one of the two separated reticle parts is independently replaceable. | 09-17-2009 |
| 20090233240 | Method of fabricating Triode-Structure field-emission device - Example embodiments provide a method of fabricating a triode-structure field-emission device. A cathode, an insulating layer, and a gate metal layer may be sequentially formed on a substrate. A first resist pattern having a first opening and a second resist pattern having a second opening smaller than the first opening may be formed to be sequentially laminated on the gate metal layer. Then, the gate metal layer and the insulating layer may be etched using the first resist pattern to form a gate electrode and an insulating layer having a first hole and a second hole corresponding to the first opening. A catalyst layer may be formed on the cathode exposed through the first and second holes using the second resist pattern. After the first resist pattern, second resist pattern, and the catalyst layer on the second resist pattern are removed, an emitter may be formed on the catalyst layer in the second hole. | 09-17-2009 |
| 20090246704 | Manufacturing Method for Conducting Films on Two Surfaces of Transparent Substrate of Touch Control Circuit - A manufacturing method for conducting films on two opposite surfaces of a transparent substrate of a touch control circuit, includes: contacting a first photoresist layer having photosensitive and discolored emulsion on a first conducting coat formed on a first surface of the transparent substrate, and contacting a second photoresist layer on a second conducting coat formed on a second surface of the transparent substrate; exposing the first photoresist layer to form a circuit pattern with distinguishable color on exposed regions of the first photoresist layer; employing the circuit pattern as an aligning benchmark for the second photoresist layer, and exposing the second photoresist layer accordingly; developing and etching those arranged on the two surfaces of the transparent substrate at the same time to form a first conducting film of a touch control circuit from the first conducting coat and form a second conducting film of the touch control circuit from the second conducting coat. Thus the manufacturing steps of the touch control circuit are decreased. | 10-01-2009 |
| 20090253078 | DOUBLE EXPOSURE LITHOGRAPHY USING LOW TEMPERATURE OXIDE AND UV CURE PROCESS - A method of processing a substrate includes forming a first layer having a photosensitive response to incident radiation on the substrate, forming a first pattern in the first layer, and exposing the first pattern to ultra-violet radiation. The exposure of the first pattern to ultra-violet radiation increases the resistance of the first pattern to a developer. The method also includes forming a conformal protective layer over the first pattern and at least a portion of the substrate. The method further includes forming a second layer having a photosensitive response to incident radiation over the conformal protective layer and forming a second pattern in the second layer. | 10-08-2009 |
| 20090258318 | Double patterning method - A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist layer to form a second photoresist pattern over the underlying layer, where the second photoresist pattern is a second grid which overlaps the first grid to form a photoresist web, and etching the underlying layer using the photoresist web as a mask. | 10-15-2009 |
| 20090263748 | Method of manufacturing wiring circuit board - A method of manufacturing a wiring circuit board includes: preparing an insulating layer; forming conductive thin films on the upper surface and the side end surface of the insulating layer; covering the conductive thin films formed on the upper surface and the side end surface of the insulating layer with photoresists; arranging a photomask so that an end portion and a portion to be provided with a conductive layer in the conductive thin film formed on the upper surface of the insulating layer are shaded and exposing the photoresist covering the conductive thin film formed on the upper surface of the insulating layer from above through the photomask; exposing the photoresist covering the conductive thin film formed on the side end surface of the insulating layer from below; forming plating resists by removing unexposed portions of the photoresists so as to form exposed portions into patterns; forming an end portion conductive layer on the end portion of the conductive thin film formed on the upper surface of the insulating layer, and forming the conductive layer on the conductive thin film formed on the upper surface of the insulating thin film at the same time, on the conductive thin films exposed from the plating resists,; removing the plating resists; and removing the conductive thin films having been covered with the plating resists. | 10-22-2009 |
| 20090269703 | COLOR ELECTROPHORETIC DISPLAY AND METHOD OF MANUFACTURING THE SAME - Provided are a color electrophoretic display and a method of manufacturing the same. The color electrophoretic display includes: a plurality of lower electrodes arranged on a lower layer and disposed with a predetermined interval therebetween; a plurality of first to third photoresist chambers arranged on the plurality of lower electrodes; first to third electronic inks accommodated in the plurality of first to third photoresist chambers respectively, and discriminatively operating to an electric field to independently display red, green, and blue colors; and a plurality of upper electrodes disposed with a predetermined interval therebetween and facing the plurality of lower electrodes with the plurality of first to third photoresist chambers being held therebetween. | 10-29-2009 |
| 20090286185 | Method of Manufacturing Semiconductor Device - Disclosed herein is a method of manufacturing a semiconductor device that includes: performing a first exposure process with a first exposure mask having a first space pattern formed in a first direction; performing a second exposure process with a second exposure mask different from the first exposure mask, the second exposure mask having a second space pattern formed in a second direction intersected with the first direction; and forming a contact hole by a developing process. | 11-19-2009 |
| 20090297986 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes: forming a negative resist film having an annular pattern that masks an outer peripheral part of a wafer, on a film to be processed which is formed on the wafer; forming a positive resist film having a predetermined pattern on the negative resist film; and etching the film to be processed using the negative resist film and the positive resist film as a mask. | 12-03-2009 |
| 20090305166 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device according to one embodiment, includes: forming a first mask material film on a workpiece film formed on a semiconductor substrate; forming a resist pattern on the first mask material film; forming a second mask material film having a desired film thickness on the first mask material film so as to cover the resist pattern; carrying out etchback of the second mask material film so as to expose the resist pattern and the first mask material film; processing the resist pattern and the first mask material film simultaneously which are exposed, while leaving the second mask material film of which etchback is carried out; and processing the workpiece film which exposes under the first mask material film. | 12-10-2009 |
| 20090317748 | Method for Forming Fine Patterns of Semiconductor Device - A method for forming fine patterns of a semiconductor device employs a double patterning characteristic using a mask for forming a first pattern including a line pattern and a mask for separating the line pattern, and a reflow characteristic of a photoresist pattern. | 12-24-2009 |
| 20090325104 | PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE - An operation for forming a trench after forming a via hole includes an operation for exposing a region for forming the via hole to light and an operation for exposing a region for forming the interconnect trench. More specifically, even if chemically amplified resist is buried in the via hole after the via hole is formed, then the region for forming of via hole is exposed to light again, so that the inside of the via hole is fully exposed to light. This allows removing the buried resist from the regions in via hole exposed to light, or namely the region and the region, with a developing solution, exposing at least a portion of the inner wall of the via hole to obtain the trench having a desired structure. | 12-31-2009 |
| 20100009293 | Antireflective Coating Compositions - Antireflective coating compositions and related polymers are disclosed. | 01-14-2010 |
| 20100009294 | EXPOSURE METHOD - An exposure method is disclosed. A wafer coated with a photoresist layer having an exposure threshold dose is provided. The wafer has at least a central region and a peripheral region. Then, a compensating light beam having a first dose directs on the photoresist layer within the peripheral region. Next, a patterned light beam having a second dose is then projected, in a step-and-scan manner, onto the photoresist layer, thereby exposing the photoresist layer. The total dose of the first energy and the second energy is above than the exposure threshold dose. | 01-14-2010 |
| 20100028809 | DOUBLE PATTERNING FOR LITHOGRAPHY TO INCREASE FEATURE SPATIAL DENSITY - A method of forming a pattern in at least one device layer in or on a substrate comprises: coating the device layer with a first photoresist layer; exposing the first photoresist using a first mask; developing the first photoresist layer to form a first pattern on the substrate; coating the substrate with a protection layer; treating the protection layer to cause a change therein where it is in contact with the first photoresist, to render the changed protection layer substantially immune to a subsequent exposure and/or developing step; coating the substrate with a second photoresist layer; exposing the second photoresist layer using a second mask; and developing the second photoresist layer to form a second pattern on the substrate without significantly affecting the first pattern in the first photoresist layer, wherein the first and second patterns together define interspersed features having a spartial frequency greater than that of the features defined in each of the first and second patterns separately. The process has particular utility in defining source, drain and fin features of finFET devices with a smaller feature size than otherwise achievable with the prevailing lithography tools. | 02-04-2010 |
| 20100047720 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes the following processes. A first resist layer covering an etching object is patterned to form a first resist pattern. Then, a filling layer that covers the first resist pattern and has a flat upper surface is formed. Then, a second resist layer covering the flat upper surface is patterned to from a second resist pattern. | 02-25-2010 |
| 20100104983 | PATTERN FORMING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND EXPOSURE MASK SET - First, a first exposure process is performed using dipole illumination with only a grating-pattern forming region as a substantial object to be exposed. Next, a second exposure process is performed with only a standard-pattern forming region as a substantial object to be exposed. A development process is then performed to obtain a resist pattern. A mask for the first exposure process is such that a light blocking pattern is formed on the whole surface of a standard-pattern mask part corresponding to the standard-pattern forming region. A mask for the second exposure is such that a light blocking pattern is formed on the whole surface of a grating-pattern mask part corresponding to the grating-pattern forming region. | 04-29-2010 |
| 20100112485 | Reticle set, method for designing a reticle set, exposure monitoring method, inspection method for reticle set and manufacturing method for a semiconductor device - A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask. | 05-06-2010 |
| 20100136487 | PATTERN FORMATION METHOD USING LEVENSON-TYPE MASK AND METHOD OF MANUFACTURING LEVENSON-TYPE MASK - A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step. | 06-03-2010 |
| 20100167210 | MULTI-LAYER EMBEDDED CAPACITANCE AND RESISTANCE SUBSTRATE CORE - A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser. | 07-01-2010 |
| 20100196829 | SEMICONDUCTOR DEVICE FABRICATION METHOD AND SEMICONDUCTOR DEVICE - A resist pattern ( | 08-05-2010 |
| 20100209853 | METHOD FOR SELECTIVELY ADJUSTING LOCAL RESIST PATTERN DIMENSION WITH CHEMICAL TREATMENT - A method forms a first patterned mask (comprising rectangular features and/or rounded openings) on a planar surface and forms a second patterned mask on the first patterned mask and the planar surface. The second patterned mask covers protected portions of the first patterned mask and the second patterned mask reveals exposed portions of the first patterned mask. The method treats the exposed portions of the first patterned mask with a chemical treatment that reduces the size of the exposed portions to create an altered first patterned mask. | 08-19-2010 |
| 20100216075 | METHOD AND APPARATUS FOR GENERATING PERIODIC PATTERNS BY STEP-AND-ALIGN INTERFERENCE LITHOGRAPHY - The present invention provides a method and an apparatus for generating periodic patterns by step-and-align interference lithography, wherein at least two coherent light beams with a pattern are controlled to project onto a substrate to be exposed to form an interference-patterned region on the substrate. Thereafter, by means of moving the substrate or the light beams stepwisely, a patterned region with a large area can be formed on the substrate. According to the present invention, the optical path and exposure time may be shortened to reduce defect formation during lithographic processing and to improve the yield. | 08-26-2010 |
| 20100221665 | Manufacturing method of semiconductor device - A manufacturing method includes forming a stacked film including first/second/third layers on a substrate, forming a first resist pattern on the stacked film, forming a first film pattern by etching the first layer through the first resist pattern, removing the first resist pattern, partially covering the first film pattern with a second resist pattern, slimming the first film pattern exposed from the second resist pattern, forming a second film pattern by etching the second layer exposed from the first layer through the first film pattern, partially covering the second film pattern with a third resist pattern, removing the first film pattern exposed from the third resist pattern, forming sidewall spacers to the second film pattern and remained second layer, removing the remained second layer portion, followed by etching the third layer through the second film pattern and sidewall spacers to form a third film pattern. | 09-02-2010 |
| 20100227276 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In a method of manufacturing a semiconductor device, a protection film can be formed using a double exposure technology to increase a developer resistance of the protection film without increasing the thickness of the protection film for realizing fine patterning. The method comprises forming a protection film on a first resist pattern formed on a substrate; and forming a second resist pattern on the protection film between parts of the first resist pattern. The protection film is formed in at least two layers by using different methods. | 09-09-2010 |
| 20100248153 | METHOD FOR FORMING PATTERN OF SEMICONDUCTOR DEVICE - A method for forming a pattern of a semiconductor device is provided. Specifically, in a method for manufacturing a NAND flash memory device using a spacer patterning process, a dummy pattern, which is not used in an actual device operation, is additionally formed in a peripheral circuit region when a photoresist pattern for forming a string pattern is formed in a cell region. As a result, the edge photoresist pattern is prevented from being bent, and a critical dimension difference between the center region and the edge region of the photoresist pattern lo is not generated, thereby improving a margin of DOF to obtain a reliable semiconductor device. | 09-30-2010 |
| 20100255422 | MANUFACTURING METHOD OF LIQUID DISCHARGE HEAD - A manufacturing method of a liquid discharge head having a liquid flow path which communicates with a discharge port for discharging liquid, includes: providing a first layer made of a first photosensitive resin on a substrate; forming a mold of the flow path from the first layer by exposing a part of the first layer and developing the first layer; applying a light absorbent to a surface of the mold; providing a second layer made of a second photosensitive resin to coat the mold applied with the light absorbent; forming an opening that is to be the discharge port in the second layer by exposing a part of the second layer with light having a wavelength that can be absorbed by the light absorbent and developing the second layer; and forming the flow path by removing the mold. | 10-07-2010 |
| 20100255423 | Pattern forming method, semiconductor device manufacturing method and phase shift photomask having dummy gate patterns - A method for forming a plurality of gate patterns in parallel with each other on a photoresist layer within a circuit block includes forming extension gate patterns on both ends of the gate patterns and on both ends of a dummy gate pattern of the circuit block to reach an edge of the circuit block, and performing a first photolithography process upon the photoresist layer by using a phase shift photomask having first and second openings whose difference in phase is π, the first and second openings alternating between the gate patterns including the extension gate patterns to form phase edges therein. | 10-07-2010 |
| 20100266960 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND EXPOSURE DEVICE - A method of manufacturing a semiconductor device according to an embodiment includes determining a second exposure parameter including exposure parameters except for an exposure amount from a dimension distribution information so that a resist pattern of a first resist pattern formed based on a second pattern has a desired dimension in a plurality of regions to be shot within a surface of a wafer. | 10-21-2010 |
| 20100279231 | METHOD AND DEVICE FOR MARKING OBJECTS - A description is given of methods and devices for product marking of objects using a light-sensitive layer applied to the objects and a light source. The invention may be used, for example, to simultaneously mark or label a first plurality of objects at a first time with individual marks or labels, and to mark or label a second plurality of objects at a second time with individual marks or labels. | 11-04-2010 |
| 20100330503 | METHODS OF FORMING ELECTRONIC DEVICES - Methods of forming electronic devices are provided. The methods involve alkaline treatment of photoresist patterns and allow for the formation of high density resist patterns. The methods find particular applicability in semiconductor device manufacture. | 12-30-2010 |
| 20110003253 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND PATTERN FORMATION METHOD - A method of manufacturing a semiconductor device, includes: a first resist film formation process of forming a first resist film on a processing target surface using a positive-type photoresist material; a first resist pattern formation process of forming a first resist pattern by performing development after exposure in which light is irradiated onto the first resist film; a second resist film formation process of forming a second resist film on the processing target surface, where the first resist pattern is formed, using a photoresist material; and a second resist pattern formation process of forming a second resist pattern by performing exposure in which light is irradiated onto the second resist film and then performing development. The method further includes an insolubilization process for insolubilizing the first resist pattern against a developer and a solvent of a photoresist material used in the second resist pattern formation process. | 01-06-2011 |
| 20110059402 | EXPOSURE METHOD - According to the embodiments, exposure is performed on a resist on a substrate at a first focus position by using a phase shift mask in which a first light transmitting area and a second light transmitting area are formed adjacently via a light shielding pattern and a phase difference between light transmitting through the first light transmitting area and light transmitting through the second light transmitting area is φ≠π, and exposure is performed on the resist at a second focus position different from the first focus position by using the phase shift mask. | 03-10-2011 |
| 20110059403 | METHOD OF FORMING WIRING PATTERN, METHOD OF FORMING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND DATA PROCESSING SYSTEM - A method of forming a pattern includes the following processes. A first lithography process is performed. The first lithography process is applied to a first region of a substrate. A second lithography process is performed. The second lithography process is applied to the first region and to a second region of the substrate, to form a first pattern in the first region, and to form a second pattern in the second region. The first pattern is defined by a first dimension. The first dimension is smaller than a resolution limit of lithography. The second pattern is defined by a second dimension. The second dimension is equal to or greater than the resolution limit of lithography. | 03-10-2011 |
| 20110086313 | METHOD AND SYSTEM OF MANUFACTURING SEMICONDUCTOR DEVICE - In one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can forms a resist film on a substrate. The method can expose a portion of the resist film. The portion is formed on a device area of the substrate and the device area includes a center portion of the substrate. After the exposing the device area, the method can apply a reaction control process for controlling expansion of a reacted region in the resist film. After the applying the reaction control process, the method can expose another portion of the resist film and the another portion is formed on a peripheral area surrounding the device area. After the exposing the peripheral area, the method can heat the resist film, and after the heating, the method can develop the resist film. | 04-14-2011 |
| 20110111348 | SEMICONDUCTOR DEVICE FABRICATION USING A MULTIPLE EXPOSURE AND BLOCK MASK APPROACH TO REDUCE DESIGN RULE VIOLATIONS - A method of fabricating a semiconductor device begins by forming a layer of hard mask material on a substrate comprising a layer of semiconductor material and a layer of insulating material overlying the layer of semiconductor material, such that the layer of hard mask material overlies the layer of insulating material. A multiple exposure photolithography procedure is performed to create a combined pattern of photoresist features overlying the layer of hard mask material, and a recess line pattern is in the hard mask material, using the combined pattern of photoresist features. The method continues by covering designated sections of the recess line pattern with a blocking pattern of photoresist features, and forming a pattern of trenches in the insulating material, where the pattern of trenches is defined by the blocking pattern of photoresist features and the hard mask material. Thereafter, an electrically conductive material is deposited in the trenches, resulting in conductive lines for the semiconductor device. | 05-12-2011 |
| 20110129779 | LASER INDUCED THERMAL IMAGING METHOD, METHOD OF PATTERNING ORGANIC LAYER USING THE SAME AND METHOD OF FABRICATING ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE USING THE SAME - A laser induced thermal imaging (LITI) method, a method of patterning an organic layer using the same and a method of manufacturing an organic light emitting diode (OLED) display device using the same. The LITI method includes preparing a substrate including a transfer layer, preparing a donor substrate including a base film and a light-to-heat conversion layer disposed on the base film, aligning the substrate with the donor substrate, and irradiating laser to the base layer of the donor substrate. Here, the laser is irradiated to the base layer in a region excluding a region corresponding to a pattern to be formed on the substrate. Thus, according to the method, regardless of the size of the pattern to be formed and the size of the laser beam, stitching mura can be prevented. | 06-02-2011 |
| 20110159442 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device is manufactured by a method including processes of trimming and molding resist patterns. A resist layer formed on a substrate is exposed and developed to form the resist patterns. The resist patterns are trimmed using a first gas plasma to change the profiles of the resist patterns. Widths of the trimmed resist patterns are increased using a second gas plasma to form processed resist patterns. | 06-30-2011 |
| 20110159443 | METHOD OF FORMING A PATTERN IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A GATE USING THE SAME - A method of forming a pattern in a semiconductor device is described. A substrate divided into cell and peripheral regions is provided, and an object layer is formed on a substrate. A buffer pattern is formed on the object layer in the cell region along a first direction. A spacer is formed along a sidewall of the buffer pattern in the cell region, and a hard mask layer remains on the object layer in the peripheral region. The buffer layer is removed, and the spacer is separated along a second direction different from the first direction, thereby forming a cell hard mask pattern. A peripheral hard mask pattern is formed in the peripheral region. A minute pattern is formed using the cell and peripheral hard mask patterns in the substrate. Therefore, a line width variation or an edge line roughness due to the photolithography process is minimized. | 06-30-2011 |
| 20110165520 | PATTERN FORMATION METHOD USING LEVENSON-TYPE MASK AND METHOD OF MANUFACTURING LEVENSON-TYPE MASK - A method of forming a pattern including a first pattern portion having a first minimum dimension and a second pattern portion having a second minimum dimension includes a first exposure step of performing exposure using a Levenson-type mask and a second exposure step of performing exposure using a half tone-type mask. When second minimum dimension is 1.3 time or more than the first minimum dimension, the exposure amount of the second exposure step is set to be equal to or smaller than the exposure amount of the first exposure step. | 07-07-2011 |
| 20110183266 | Semiconductor Device Manufacturing Methods - Methods for manufacturing semiconductor devices are disclosed. One preferred embodiment is a method of processing a semiconductor device. The method includes providing a workpiece having a material layer to be patterned disposed thereon. A masking material is formed over the material layer of the workpiece. The masking material includes a lower portion and an upper portion disposed over the lower portion. The upper portion of the masking material is patterned with a first pattern. A polymer material is disposed over the masking material. The masking material and the polymer layer are used to pattern the material layer of the workpiece. | 07-28-2011 |
| 20110189614 | LITHOGRAPHIC APPARATUS AND DEVICE MANUFACTURING METHOD WITH DOUBLE EXPOSURE OVERLAY CONTROL - A device manufacturing method includes a transfer of a pattern from a patterning device onto a substrate. The device manufacturing method further includes transferring a pattern of a main mark to a base layer for forming an alignment mark; depositing a pattern receiving layer on the base layer; in a first lithographic process, aligning, by using the main mark, a first mask that includes a first pattern and a local mark pattern, and transferring the first pattern and the local mark pattern to the pattern receiving layer; aligning, by using the local mark pattern, a second mask including a second pattern relative to the pattern receiving layer; and | 08-04-2011 |
| 20110200945 | METHOD OF MANUFACTURING FLAT PANEL DISPLAY - An alignment mark having high precision and good visibility is formed in a simple manner without modification of a manufacturing line or a significant increase of man hours and a flat panel display is manufactured at low cost and with good productivity. To achieve this, the method includes a step of forming a photosensitive film on a substrate, a step of forming an alignment mark by exposing the photosensitive film by using an exposing mask, and a step of performing position alignment by recognizing the alignment mark in an undeveloped state of the photosensitive film. | 08-18-2011 |
| 20110200946 | MICROLITHOGRAPHY PROJECTION EXPOSURE APPARATUS HAVING AT LEAST TWO OPERATING STATES - A microlithography projection exposure apparatus for producing microelectronic components has at least two operating states. The microlithography projection exposure apparatus includes a reflective mask in an object plane. In the first operating state, a first partial region of the mask is illuminated by a first radiation, which has an assigned first centroid direction having a first centroid direction vector at each point of the first partial region. In the second operating state, a second partial region of the mask is illuminated by a second radiation, which has an assigned second centroid direction having a second centroid direction vector at each point of the second partial region. The first and the second partial region have a common overlap region. Furthermore, the microlithography projection exposure apparatus can be configured in such a way that at each point of at least one partial region of the overlap region the scalar triple product of the normalized first centroid direction vector, the normalized second centroid direction vector and a normalized vector that is perpendicular to the mask is less than 0.05. | 08-18-2011 |
| 20110207054 | SELF-ALIGNED, SUB-WAVELENGTH OPTICAL LITHOGRAPHY - Embodiments of the invention provide a method and an apparatus for performing self-aligned, sub-wavelength optical lithography. One embodiment provides a region of photoresist above a conductive surface having a plurality of periodically arrayed openings extending therethrough. At least a portion of the region of photoresist is then exposed to a light, wherein the intensity of the light is less than the intensity required to cure the photoresist. In so doing, at least one self-aligned, sub-wavelength location in at least one location of the region of photoresist is cured. | 08-25-2011 |
| 20110236833 | Double Patterning Method - A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist layer to form a second photoresist pattern over the underlying layer, where the second photoresist pattern is a second grid which overlaps the first grid to form a photoresist web, and etching the underlying layer using the photoresist web as a mask. | 09-29-2011 |
| 20110256483 | RESIDUE REMOVING LIQUID COMPOSITION AND METHOD FOR CLEANING SEMICONDUCTOR ELEMENT USING SAME - Provided are a residue removing liquid composition capable of completely removing a resist residue and a titanium (Ti)-derived residue that remains after dry etching and ashing in via hole formation in a production process for a semiconductor substrate having metal wiring of aluminium (Al) or an Al alloy, at a low temperature in a short time, not corroding parts of an interlayer insulating material, a wiring material and others, and a cleaning method for semiconductor devices using it. | 10-20-2011 |
| 20110275018 | CIRCUIT ARCHITECTURE ON AN ORGANIC BASE AND RELATED MANUFACTURING METHOD - A method comprises providing a bottom electrode, depositing, on the bottom electrode, an active material comprising a first structural portion having an absorption peak at a UV wavelength, wherein such first structural portion is photo-activatable at such wavelength and which is constituted by monomers or oligomers that, when irradiated at said wavelength, undergo a photo-polymerization and/or photo-cross-linking reaction, or constituted by a polymer that at a UV wavelength undergoes a photo-degradation reaction, and a second electrically active or activatable structural portion which is substantially transparent to such predetermined UV wavelength; exposing a portion of the active material, through a photomask, to UV radiation having such UV wavelength, with photo-activation of the exposed portion of such film; selectively removing either the exposed photo-activated portion or the non-exposed portion, with exposure of a respective portion of the bottom electrode; depositing a head electrode. | 11-10-2011 |
| 20110294072 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING PHOTOLITHOGRAPHY - A method of manufacturing a semiconductor device using a photolithography process may include forming an anti-reflective layer and a first photoresist film on a lower surface. The first photoresist film may be exposed to light and a first photoresist pattern having a first opening may be formed by developing the first photoresist film. A plasma treatment can be performed on the first photoresist pattern and a second photoresist film may be formed on the first photoresist pattern, which may be exposed to light. A second photoresist pattern may be formed to have a second opening by developing the second photoresist film. Here, the second opening may be substantially narrower than the first opening. | 12-01-2011 |
| 20120009523 | METHOD FOR FORMING CONTACT HOLE OF SEMICONDUCTOR DEVICE - A method for forming a contact hole of a semiconductor device, includes forming a hard mask over an etch target layer, forming a first line pattern over the hard mask, forming a second line pattern over the hard mask and the first line pattern in a direction crossing the first line pattern, forming a mesh-type hard mask pattern by etching the hard mask using the first and second line patterns as etch barriers, and forming a contact hole by etching the etch target layer using the mesh-type hard mask pattern as an etch barrier. | 01-12-2012 |
| 20120045721 | METHOD FOR FORMING A SELF-ALIGNED DOUBLE PATTERN - The invention can provide a method of processing a substrate using Double-Patterned-Shadow (D-P-S) processing sequences that can include (D-P-S) creation procedures, (D-P-S) evaluation procedures, and (D-P-S) transfer sequences. The (D-P-S) creation procedures can include deposition procedures, activation procedures, de-protecting procedures, sidewall angle (SWA) correction procedure, and Double Patterned (DP) developing procedures. | 02-23-2012 |
| 20120082937 | STITCHING METHODS USING MULTIPLE MICROLITHOGRAPHIC EXPOSE TOOLS - A method for producing a device in one or more layers of patternable material disposed over a substrate uses multiple exposure tools having different resolution limits and maximum expose field sizes. An abutting field pattern is exposed and stitched in one layer of patternable material using one exposure tool and a first mask. A periphery pattern is then exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The maximum expose field of the first exposure tool is smaller than a size of the device while the maximum expose field of the second exposure tool is at least as large as, or larger, the size of the device so that the combination of the stitched abutting field pattern and the periphery pattern forms a complete pattern in the patternable material. | 04-05-2012 |
| 20120082938 | STITCHING METHODS USING MULTIPLE MICROLITHOGRAPHIC EXPOSE TOOLS - A method for producing a measurement structure for measuring alignment of patterns formed in one or more layers of patternable material uses multiple exposure tools having different resolution limits and maximum expose field sizes. The measurement structure includes multiple complementary and coincident parts. An abutting field pattern is exposed and stitched in a layer of patternable material using a first exposure tool and a first mask. The abutting field pattern includes a first portion of the multiple complementary parts. A periphery pattern is exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The periphery pattern includes a second portion of the multiple complementary parts. A maximum expose field of the first exposure tool is smaller than the maximum expose field of the second exposure tool. | 04-05-2012 |
| 20120208129 | PROCESS FOR FORMING AN ANTI-OXIDANT METAL LAYER ON AN ELECTRONIC DEVICE - A process for forming an anti-oxidant metal layer on an electronic device comprises the steps of providing a substrate; forming a conductive metal layer on the substrate; forming a first photoresist layer on the conductive metal layer; patterning the first photoresist layer to form apertures and first grooves; forming a connecting member having a top surface and a lateral surface in the aperture and the first groove; removing the first photoresist layer to reveal the top surface and the lateral surface; forming a second photoresist layer on the conductive metal layer; patterning the second photoresist layer to form apertures and second grooves; forming an anti-oxidant metal layer in aperture and second groove, the anti-oxidant metal layer covers the top surface and the lateral surface of the connecting member; and removing the second photoresist layer to reveal the anti-oxidant metal layer and the conductive metal layer. | 08-16-2012 |
| 20120219917 | MULTIPLE PATTERNING CONSISTENCY PROCESSING - Disclosed techniques for performing a multiple patterning consistency analysis of an integrated circuit design identify, in a standard cell array of the integrated circuit design, a set of standard cells for multiple patterning consistency analysis. The technique may also identify cell groups in the set where all of the cells in a cell group share a common multiple patterning orientation. The technique may identify unused elements in the standard cell array that are associated with or otherwise available for use in shifting at least some of the standard cells. The technique may shift the unused elements with respect to the cell groups, e.g., insert an unused element between a preferred orientation cell group and a non-preferred orientation cell group to shift the non-preferred group by one standard cell array element and thereby change the multiple patterning orientation of the cell group. The technique may shift the unused elements with the specific objective of reducing the prevalence of cell groups having the non-preferred multiple patterning orientation. | 08-30-2012 |
| 20130157200 | SUSPENSION BOARD WITH CIRCUIT AND PRODUCING METHOD THEREOF - A suspension board with circuit includes a metal supporting board, an insulating base layer formed on the metal supporting board, a conductive pattern formed on the insulating base layer, an insulating cover layer formed on the insulating base layer so as to cover the conductive pattern, and an insertion portion to be inserted into an E-block. A thickness of the insulating cover layer in the insertion portion is larger than a thickness of the insulating cover layer in a portion other than the insertion portion. | 06-20-2013 |
| 20130224664 | METHOD OF MANUFACTURING SOLID-STATE IMAGE SENSOR - A solid-state image sensor is manufactured through a plurality of photolithography processes. The plurality of photolithography processes includes at least one first lithography process including a dividing exposure step of exposing a substrate using a plurality of photomasks, and at least one second lithography process including a non-dividing exposure step of exposing the substrate using one photomask. The at least one first lithography process includes a process for forming a resist pattern to define active regions on the substrate, and a process for forming a resist pattern to define charge accumulation region. | 08-29-2013 |
| 20130252174 | Method for Forming Fine Patterns of Semiconductor Device - A method for forming fine patterns of a semiconductor device employs a double patterning characteristic using a mask for forming a first pattern including a line pattern and a mask for separating the line pattern, and a reflow characteristic of a photoresist pattern. | 09-26-2013 |
| 20140065552 | Methods For Small Trench Patterning Using Chemical Amplified Photoresist Compositions - A method for forming a pattern on a substrate is described. The method includes providing a substrate, forming a photosensitive layer over the substrate, exposing the photosensitive layer to a first exposure energy through a first mask, exposing the photosensitive layer to a second exposure energy through a second mask, baking the photosensitive layer, and developing the exposed photosensitive layer. The photosensitive layer includes a polymer that turns soluble to a developer solution, at least one photo-acid generator (PAG), and at least one photo-base generator (PBG). A portion of the layer exposed to the second exposure energy overlaps with a portion exposed to the first exposure energy. | 03-06-2014 |
| 20140080066 | DOUBLE PATTERNING METHOD - A double patterning method includes providing a first resist film on a substrate using a first photoresist composition. The first resist film is exposed. The exposed first resist film is developed using a first developer to form a first resist pattern. A second resist film is provided in at least space areas of the first resist pattern using a second photoresist composition. The second resist film is exposed. The exposed second resist film is developed using a second developer that includes an organic solvent to form a second resist pattern. The first resist pattern is insoluble or scarcely soluble in the second developer. | 03-20-2014 |
| 20140134543 | LAYOUT DECOMPOSITION METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE APPLYING THE SAME - A layout decomposition method and a method for manufacturing a semiconductor device applying the same are provided. According to the layout decomposition method, a design layout is received by the logic processer of a computing system. A design rule for layout decomposition is then identified by the logic processer, including identifying the loose areas (areas with loosely distributed features) and dense areas (areas with densely distributed features) on a substrate, and identifying first areas with odd-numbered features and second areas with even-numbered features on the substrate. Next, a first mask with a first pattern and a second mask with a second pattern are generated corresponding to results of design rule identification by the computing system. | 05-15-2014 |
| 20140205952 | METHODS OF FORMING PATTERNS FOR SEMICONDUCTOR DEVICE STRUCTURES - Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a second photosensitive resist material, exposing portions of the first and second photosensitive resist materials to radiation, and removing the deprotected outer portion of the first photosensitive resist material and the exposed portions of the first and second photosensitive resist materials. Additional methods include forming a first resist material over a substrate to include a first portion and a relatively thicker second portion, deprotecting substantially the entire first portion and an outer portion of the second portion while leaving an inner portion of the second portion protected, and forming a second resist material over the substrate. A portion of the second resist material is exposed to radiation, and deprotected and exposed portions of the first and second resist materials are removed. | 07-24-2014 |
| 20140205953 | METHOD FOR FORMING SEMICONDUCTOR DEVICE - A method for forming a semiconductor device comprises the following steps: first, a substrate is provided, a first photo-etching process is carried out with a first photomask to form at least one device structure and a plurality of compensation structures, wherein the first photomask comprises at least one device pattern and a plurality of dummy patterns. A photoresist layer is then formed on the device structure and each compensation structures; a second photo-etching process is then carried out with a second photomask to remove each compensation structure. | 07-24-2014 |
| 20140272714 | DOUBLE PATTERNING STRATEGY FOR CONTACT HOLE AND TRENCH IN PHOTOLITHOGRAPHY - A method of lithography patterning includes forming a first resist pattern on a substrate, wherein the first resist pattern including a plurality of openings. A second resist pattern is formed on the substrate and within the plurality of openings of the first resist pattern, wherein the second resist pattern includes at least one opening therein on the substrate. The first resist pattern is removed to uncover the substrate underlying the first resist pattern. | 09-18-2014 |
| 20160048074 | METHODS OF FORMING PATTERNS FOR SEMICONDUCTOR DEVICE STRUCTURES - Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a second photosensitive resist material, exposing portions of the first and second photosensitive resist materials to radiation, and removing the deprotected outer portion of the first photosensitive resist material and the exposed portions of the first and second photosensitive resist materials. Additional methods include forming a first resist material over a substrate to include a first portion and a relatively thicker second portion, deprotecting substantially the entire first portion and an outer portion of the second portion while leaving an inner portion of the second portion protected, and forming a second resist material over the substrate. A portion of the second resist material is exposed to radiation, and deprotected and exposed portions of the first and second resist materials are removed. | 02-18-2016 |
| 20160081187 | CIRCUIT BOARD FORMATION USING ORGANIC SUBSTRATES - A method of forming a circuit board includes forming a conductive pattern on a substrate; forming a first negative resist on the substrate after formation of the conductive pattern; partially exposing the first negative resist on the surface of the conductive pattern to form a first via exposure portion; forming a second negative resist on the substrate after formation of the first via exposure portion; partially exposing the second negative resist on the first via exposure portion to form a second via exposure portion larger than the first via exposure portion; developing the first negative resist and the second negative resist after formation of the second via exposure portion to form a via opening reaching the conductive pattern; and filling the via opening with a conductive material. | 03-17-2016 |
| 20160124308 | ALTERNATING SPACE DECOMPOSITION IN CIRCUIT STRUCTURE FABRICATION - Fabrication of a circuit structure is facilitated, in which a first exposure of a multi-layer structure is performed using a first mask, which defines positioning of at least one edge of an element to be formed above a substrate of the multi-layer structure. A second exposure of the multi-layer structure is performed using a second mask, which defines positioning of at least one other edge of the element. At least some material of the multi-layer structure is removed using, at least in part, the defined positioning of the at least one edge and the at least one other edges of the element, to form the element above the substrate. In some examples, multiple elements are formed, the multiple elements being hardmask elements to facilitate an etch process to etch a substrate material. | 05-05-2016 |
| 20160187783 | PHOTORESIST PATTERN TRIMMING COMPOSITIONS AND METHODS - Photoresist pattern trimming compositions are provided. The compositions comprise: a matrix polymer, an aromatic sulfonic acid and a solvent, wherein the aromatic sulfonic acid comprises one or more fluorinated alcohol group. Also provided are methods of trimming a photoresist pattern using the trimming compositions. The compositions and methods find particular applicability in the manufacture of semiconductor devices. | 06-30-2016 |
| 20190146335 | LINED PHOTOBUCKET STRUCTURE FOR BACK END OF LINE (BEOL) INTERCONNECT FORMATION | 05-16-2019 |
