Class / Patent application number | Description | Number of patent applications / Date published |
257466000 | External physical configuration of semiconductor (e.g., mesas, grooves) | 18 |
20090057806 | SEGMENTED PHOTODIODE - In one embodiment of the present invention, the segmented photodiode includes a p type substrate, a p type epitaxial layer formed on the p type substrate, an n type epitaxial layer formed on the p type epitaxial layer, and p type segmenting region provided in the n type epitaxial layer separately from the p type epitaxial layer and segmenting the photosensitive region, and is configured that a depleted layer (first depleted layer) created in an n type region right under the segmenting section located between the p type segmenting region and the p type epitaxial layer by applying a reverse bias voltage is configured to reach a depleted layer (second depleted layer) formed in a junction surface between the n type epitaxial layer and the p type epitaxial layer so that the photosensitive region is electrically isolated. | 03-05-2009 |
20090194837 | SEMICONDUCTOR LIGHT RECEIVING ELEMENT AND METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT RECEIVING ELEMENT, AND OPTICAL COMMUNICATION SYSTEM - The present invention provides a semiconductor light receiving element capable of reducing capacity while minimizing increase in travel time of carriers. The semiconductor light receiving element includes a semiconductor stacked structure including a first conductivity type layer, a light absorbing layer, and a second conductivity type layer having a light incidence plane in order. The semiconductor light receiving element has an oxidation layer including a non-oxidation region and an oxidation region in a stacking in-plane direction in the light absorbing layer or between the first conductivity type layer and the light absorbing layer. | 08-06-2009 |
20090200633 | SEMICONDUCTOR STRUCTURES WITH DUAL ISOLATION STRUCTURES, METHODS FOR FORMING SAME AND SYSTEMS INCLUDING SAME - A semiconductor structure with dual isolation structures is disclosed. The semiconductor structure may include a protruding isolation structure in a pixel array region of a substrate and an embedded isolation structure in a peripheral device region of the same substrate. A region of the protruding isolation structure extends from an upper surface of the substrate, while another region of the protruding isolation structure may, optionally, be embedded within the substrate. The embedded isolation structure is formed within the substrate and includes an upper surface that is substantially coplanar with the upper surface of the substrate. A method of forming the semiconductor structure with dual isolation structure is also disclosed. | 08-13-2009 |
20090283850 | OPTICAL SENSOR AND METHOD OF MAKING THE SAME - An optical sensor includes a silicon-rich dielectric photosensitive device and a read-out device. The silicon-rich dielectric photosensitive device includes a first electrode, a second electrode, and a photosensitive silicon-rich dielectric layer disposed therebetween. The photosensitive silicon-rich dielectric layer includes a plurality of nanocrystalline silicon crystals therein. The read-out device is electrically connected to the first electrode of the silicon-rich dielectric photosensitive device for reading out opto-electronic signals transmitted from the photo-sensitive silicon-rich dielectric layer. | 11-19-2009 |
20100314706 | VARIABLE RING WIDTH SDD - A silicon drift detector (SDD) comprising electrically isolated rings. The rings can be individually biased doped rings. One embodiment includes an SDD with a single doped ring. Some of the doped rings may not require a bias voltage. Some of the rings can be field plate rings. The field plate rings may all use the same biasing voltage as a single outer doped ring. The ring widths can vary such that the outermost ring is widest and the ring widths decrease with each subsequent ring towards the anode. | 12-16-2010 |
20110073983 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to an embodiment, there is provided a semiconductor device including a semiconductor substrate having a first surface on which an active layer having a light receiving portion is provided and a second surface to be a light receiving surface for the light receiving portion, a wiring layer provided on the active layer, an insulating layer provided to cover the wiring layer, and a supporting substrate joined to the semiconductor substrate via the insulating layer to face the first surface of the semiconductor substrate. A joined body of the semiconductor substrate and the supporting substrate includes an intercalated portion provided between its outer peripheral surface and the active surface. The intercalated portion is provided to penetrate the semiconductor substrate and the insulating layer from the second surface of the semiconductor substrate and to reach inside the supporting substrate. | 03-31-2011 |
20110089519 | Chip Lead Frame and Photoelectric Energy Transducing Module - The invention discloses a chip lead frame and a photoelectric energy transducing module. The chip lead frame includes an insulator and a plurality of conductors. The insulator includes a first surface, a second surface, a first recess structure formed on the first surface, a through hole passing through the second surface and the first recess structure, and a venting structure. The first recess structure forms an accommodating space. The venting structure communicates with the accommodating space so that when a substrate is being bound to the first recess structure, the air in the accommodating space pressed by the substrate could flow through the venting structure out of the insulator without remaining between the substrate and the first recess structure. A photoelectric energy transducing semiconductor structure could be disposed on the substrate and electrically connected to the conductors, so as to form the photoelectric energy transducing module of the invention. | 04-21-2011 |
20110127631 | SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SOLID-STATE IMAGING ELEMENT, AND SEMICONDUCTOR DEVICE - A solid-state imaging device includes a semiconductor substrate configured to include a solid-state imaging element that is provided with a photoelectric conversion region, and a scribe line region that is provided along a periphery of the solid-state imaging element, a wiring layer that is formed to be layered on the semiconductor substrate, a support substrate that is formed to be layered on the wiring layer, and a groove that is provided between a blade region in the scribe line region and the solid-state imaging element, in the semiconductor substrate and penetrates through the semiconductor substrate. | 06-02-2011 |
20110133302 | METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES AND MICROELECTRONIC WORKPIECES FORMED USING SUCH METHODS - Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods are disclosed herein. One embodiment, for example, is directed to a method of processing a microelectronic workpiece including a semiconductor substrate having a plurality of microelectronic dies. The individual dies include integrated circuitry and a terminal electrically coupled to the integrated circuitry. The method can include forming a first opening in the substrate from a back side of the substrate toward a front side and in alignment with the terminal. The first opening has a generally annular cross-sectional profile and separates an island of substrate material from the substrate. The method can also include depositing an insulating material into at least a portion of the first opening, and then removing the island of substrate material to form a second opening aligned with at least a portion of the terminal. In several embodiments, the method may include constructing an electrically conductive interconnect in at least a portion of the second opening and in electrical contact with the terminal. | 06-09-2011 |
20120280352 | SEMICONDUCTOR STRUCTURE WITH HEAT SPREADER AND METHOD OF ITS MANUFACTURE - A semiconductor structure is provided and a method for manufacturing said structure. The semiconductor structure includes a thin film semiconductor having an active region and placed on a diamond substrate. The thin film semiconductor is preferably directly bonded to the diamond layer, or may be adhered thereto by a dielectric adhesion. | 11-08-2012 |
20120286389 | Method of design and growth of single-crystal 3D nanostructured solar cell or detector - Photovoltaic devices conformally deposited on a nano-structured substrate having hills and valleys have corresponding hills and valleys in the device layers. We have found that disposing an insulator in the valleys of the device layers such that the top electrode of the device is insulated from the device layer valleys provides beneficial results. In particular, this insulator prevents electrical shorts that otherwise tend to occur in such devices. | 11-15-2012 |
20130221474 | IMAGE SENSOR AND MANUFACTURING METHOD THEREOF - According to one embodiment, an image sensor includes an image-sensing element region formed by arranging a plurality of image-sensing elements on a semiconductor substrate, and a logic circuit region formed in a region different from the image-sensing element region on the substrate and including a plurality of gate patterns. Further, dummy gate patterns are formed with a constant pitch on the image-sensing element region. | 08-29-2013 |
20140001592 | SEMICONDUCTOR LIGHT-RECEIVING ELEMENT | 01-02-2014 |
20140103480 | Mask, TFT Glass Substrate and the Manufacturing Method Thereof - A mask for partially blocking ultraviolet rays in TFT glass substrate manufacturing process is disclosed. The mask includes a panel pattern area for forming the panel patterns, and an additional pattern area for forming additional patterns in a rim of the panel pattern area. In addition, a TFT glass substrate and the manufacturing thereof are also disclosed. By arranging the additional patterns in the rim of the panel patterns, the microstructures in the rim of the panel patterns are substantially the same with that in the middle of the panel patterns. | 04-17-2014 |
20140103481 | SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, SOLID-STATE IMAGING DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR SUSTRATE - A semiconductor substrate according to the present invention includes: a substrate; an electrode array which is provided on the surface on one side in a thickness direction of the substrate and in which a plurality of electrodes is two-dimensionally arranged in a plan view; and a resin layer which is provided on the surface on one side and seals peripheries of the plurality of electrodes. The plurality of electrodes protrudes by greater than or equal to 5% of its own height on the resin layer and is capable of being accommodated in the resin layer by being compressed in the thickness direction. | 04-17-2014 |
20140374870 | IMAGE SENSOR MODULE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are an image sensor module and a method of manufacturing the same. The image sensor includes: a base substrate having an image sensor mounted groove including a first groove and a second groove having a stepped shape; and an image sensor mounted in a groove of the base substrate. | 12-25-2014 |
20150028444 | INFRARED DETECTION ELEMENT - An infrared detection element includes a substrate, a lower electrode layer, a pyroelectric layer, and an upper electrode layer. The lower electrode layer is fixed to the substrate, and the pyroelectric layer is formed on the lower electrode layer. The upper electrode layer is formed on pyroelectric layer. The lower electrode layer contains pores therein and has a larger thermal expansion coefficient than the pyroelectric layer. | 01-29-2015 |
20160197109 | SOLID-STATE IMAGING DEVICE, PRODUCTION METHOD THEREOF, AND ELECTRONIC DEVICE | 07-07-2016 |