| Entries |
| Document | Title | Date |
|---|
| 20080197438 | Sensor semiconductor device and manufacturing method thereof - This invention discloses a sensor semiconductor device and a manufacturing method thereof, including: providing a wafer having a plurality of sensor chips, forming a plurality of grooves between bond pads on active surfaces of the adjacent sensor chips; forming conductive traces in the grooves for electrically connecting the bond pads; mounting a transparent medium on the wafer for covering sensing areas of the sensor chips; thinning the sensor chips from the non-active surfaces down to the grooves, thereby exposing the conductive traces; cutting the wafer to separate the sensor chips; mounting the sensor chips on a substrate module having a plurality of substrates, electrically connecting the conductive traces to the substrates; providing an insulation material on the substrate module and between the sensor chips so as to encapsulate the sensor chips but expose the transparent medium; and cutting the substrate module to separate a plurality of resultant sensor semiconductor devices. | 08-21-2008 |
| 20080203511 | Sensor-type semiconductor package and method for fabricating the same - The present invention provides a sensor-type semiconductor package and a method for fabricating the same. The method includes the steps of: providing a wafer having a plurality of sensor chips for mounting the wafer on a carrier board having an insulation layer, a plurality of conductive traces, and a substrate; forming a plurality of grooves among the solder pads on the active surfaces of the adjacent sensor chips, so as to expose the conductive traces and form a metal layer in the grooves, to electrically connect to the solder pads on the active surfaces of the adjacent sensor chips and the conductive traces; disposing a transparent medium on the wafer to cover the sensing areas of the sensor chips; removing the substrate, so as to expose the conductive traces and the insulation layer; and cutting the sensor chips along the borders to form a plurality of sensor-type semiconductor packages. This can avoid the formation of slanted grooves on the non-active surface on the wafer and shift in position of the grooves due to failure to align with the cutting lines among the sensor chips, as observed in prior art. Consequently, the problems such as stress concentration and cracking are likely to occur in the contact points of the traces formed in the slanted grooves and the traces in the active surfaces. | 08-28-2008 |
| 20080203512 | Image sensor chip package - A chip package includes a carrier ( | 08-28-2008 |
| 20080217715 | Wafer Level Package Using Silicon Via Contacts for Cmos Image Sensor and Method of Fabricating the Same - The present invention relates to a wafer level package of a CMOS image sensor using silicon via contacts and a method of manufacturing the same. A wafer level package of a CMOS image sensor includes: a wafer where image sensor elements including a plurality of electrode pads are formed; a transparent substrate attached to a front side of the wafer; a via hole formed from a back side of the wafer to underneath of a plurality of electrode pads of the front side; a passivation layer formed on a remaining portion except the underneath of the electrode pads in the via hole and whole back side of the wafer; a via contact formed in the via hole; and a solder bump formed on the via contact of the back side of the wafer. | 09-11-2008 |
| 20080237768 | SOLID-STATE IMAGING APPARATUS - A solid-state imaging apparatus is provided. A solid-state imaging device chip is enclosed in a package having an optically transparent member. An adhesive layer is formed on an internal surface of the package, and a penetration hole is formed in a bottom part of the package to communicate with an open space in the package. | 10-02-2008 |
| 20080251875 | SEMICONDUCTOR PACKAGE - An exemplary semiconductor package includes a substrate, at least one passive component, an insulative layer and a chip. The substrate defines a cavity therein. The at least one passive component is disposed within the cavity, and is electrically connected to the substrate. The insulative layer is received in the cavity, and encases the at least one passive component. The chip is disposed on the insulative layer, and is electrically connected to the substrate. The semiconductor package packaging the at least one passive component within the cavity and under the chip can improve a space usage thereof, thus a packaging scale of the semiconductor package could be reduced. | 10-16-2008 |
| 20080265356 | CHIP SIZE IMAGE SENSING CHIP PACKAGE - An image sensing chip package includes an image sensing chip having an image sensor disposed on a circuit side thereof that includes electrical conductive pads. A glue layer is applied to the circuit side and around the image sensor. A flexible film wraps the chip in such a way that an inner surface of the film faces the circuit side of the chip, an opening thereof corresponds to the image sensor, an area of the inner surface near the edges of the opening attaches to the glue layer, an inner end of each of conductors disposed on the inner surface of said film bonds to each of the electrical conductive pads, and an outer end of each of the conductors is exposed to connect with other electrical elements. A light transparent member is disposed on an outer surface of the film to seal the opening of the film. | 10-30-2008 |
| 20080277752 | Solid state imaging device, semiconductor wafer, optical device module, method of solid state imaging device fabrication, and method of optical device module fabrication - With the reduced size of a solid state imaging device, the invention provides: a solid state imaging device of a chip size and having good environmental durability; a semiconductor wafer used for fabricating a solid state imaging device; an optical device module incorporating a solid state imaging device; a method of solid state imaging device fabrication; and a method of optical device module fabrication. The solid state imaging device comprises: a solid state image pickup device formed on a semiconductor substrate; a light-transparent cover arranged opposite to an effective pixel region, so as to protect (the surface of) the effective pixel region formed in one surface of the solid state image pickup device against external environment; and an adhering section formed outside the effective pixel region in the one surface of the solid state image pickup device, so as to adhere the light-transparent cover and the solid state image pickup device. | 11-13-2008 |
| 20080290438 | IMAGE SENSING DEVICES AND METHODS FOR FABRICATING THE SAME - Image sensing devices and methods for fabricating the same are provided. An exemplary image sensing device comprises a first substrate having a first side and a second side opposing each other. A plurality of image sensing elements is formed in the first substrate at the first side. A conductive via is formed through the first substrate, having a first surface exposed by the first substrate at the first side and a second surface exposed by the first substrate at the second side. A conductive pad overlies the conductive via at the first side and is electrically connecting the image sensing elements. A conductive layer overlies the conductive via at the second side and electrically connects with the conductive pad. A conductive bump is formed over a portion of the conductive layer. A second substrate is bonded with the first substrate at the first side. | 11-27-2008 |
| 20080290439 | Optical device - An optical device includes a metal film that has a first plane and a second plane electrically connected to the first plane. For example, the second plane is integrally formed with the first plane. The second plane is arranged at an obtuse angle θ (90°<θ<180°) with respect to the first plane. An optical semiconductor chip is mounted on the second plane of the metal film, and a light-transmitting sealing material seals the optical semiconductor chip. The light-transmitting sealing material has the metal film provided on a surface thereof. | 11-27-2008 |
| 20080296717 | Packages and assemblies including lidded chips - A lidded chip is provided which includes a chip having a major surface and a plurality of first chip contacts exposed at the major surface. A lid overlies the major surface. A chip carrier is disposed between the chip and the lid, the chip carrier having an inner surface confronting the major surface and an outer surface confronting the lid. A plurality of first carrier contacts of the chip carrier are conductively connected to the first chip contacts. A plurality of second carrier contacts extend upwardly at least partially through the openings in the lid. | 12-04-2008 |
| 20080296718 | Semiconductor device and optical device module having the same - A solid-state imaging device | 12-04-2008 |
| 20080296719 | Infrared detector and manufacturing method thereof - An infrared detector comprises: first and second container members bonded to each other along an annular bonding portion to define a vacuum-sealed inner space, where the second container member has an infrared-transmissive property; an infrared detecting element disposed in the inner space; a first annular metallization layer formed on the bonding portion of the first container member; a second annular metallization layer formed on the bonding portion of the second container member; a solder metal for air-tightly bonding the first metallization layer and the second metallization layer; and a third metallization layer formed in a vicinity of one of the first and second metallization layers such that the third metallization layer overlaps the other of the first and second metallization layers at least partly. | 12-04-2008 |
| 20080303110 | Integrated circuit package and method for operating and fabricating thereof - The invention provides an integrated circuit package and method for operating and fabricating thereof. The package comprises a transparent substrate having a first surface and a second surface opposite to each other and a semiconductor layer formed on the second surface of the transparent substrate. A photosensitive device is fabricated on the semiconductor layer and a metal plug is formed over the second surface of the transparent substrate and they are electrically connected to each other. A solder ball is formed over the second surface of the transparent substrate and electrically connected to the metal plug. In the package, the photosensitive device senses light penetrating the transparent substrate and the semiconductor layer through its backside to produce a signal which is subsequently transmitted to solder ball by the metal plug. Thus, the signal conductive path is shortened. Moreover, the photosensitive device is directly formed on the semiconductor layer without extra steps, for example bonding and notching, fabrication processes are reduced. Thus, fabrication cost is reduced. | 12-11-2008 |
| 20080303111 | Sensor package and method for fabricating the same - The invention discloses a sensor package and a method for fabricating the same. The sensor package includes: a substrate with an opening; a sensor chip disposed in the opening and electrically connected to the substrate; an encapsulant filling spacing between the sensor chip and the opening so as to secure the sensor chip to the substrate; and a transparent cover attached to the substrate via an adhesive layer, wherein the adhesive layer covers the sensor chip and bonding wires and is formed with an opening for exposing sensor region of the sensor chip. Securing the sensor chip in the opening of the substrate reduces the height of the sensor package, and meanwhile the process cost is reduced by eliminating the need of formation of conductive bumps on the sensor chip or the transparent cover and eliminating the need of specially designed substrate. | 12-11-2008 |
| 20080308889 | Image sensing module and method for packaging the same - An image sensing module and a method for packaging the same are disclosed. Meanwhile, the packaging method includes the steps of a) providing a substrate; b) forming plural passive devices on the substrate; c) adhering a chip on the substrate and bonding thereon; d) providing a ring frame, wherein the ring frame includes an opening window and plural pillars for contacting with the substrate; e) adhering a glass piece on the opening window to form a lid assembly; f) covering the lid assembly on the substrate, wherein the plural pillars contacting with the substrate, the plural passive devices and the chip are covered by the lid assembly, and plural gaps are formed between the ring frame and edges of the substrate; and g) filling a filler into the plural gaps to seal the plural passive devices and the chip in the lid assembly and the substrate. | 12-18-2008 |
| 20090008732 | SEMICONDUCTOR PACKAGE - A chip-size semiconductor package can respond also to a semiconductor device in which an electrode pad pitch is narrow. A semiconductor package comprises a semiconductor substrate which has a first principal plane and a second principal plane, a circuit element formed on the first principal plane, two or more electrode pads connected to the circuit element provided on the first principal plane, two or more external connection terminals provided on the second principal plane, one or more through holes which reach at the second principal plane from the first principal plane, and two or more through wirings which connect the two or more electrode pads and the two or more external connection terminals through the one or more through holes respectively. | 01-08-2009 |
| 20090014827 | Image sensor module at wafer level, method of manufacturing the same, and camera module - Provided is an image sensor module at the wafer level including a wafer; an image sensor mounted on one surface of the wafer; a wireless communication chip formed outside the image sensor on the one surface of the wafer; and a protective cover installed on the one surface of the wafer. | 01-15-2009 |
| 20090026567 | Image sensor package structure and method for fabricating the same - A method for fabricating an image sensor package is disclosed, comprising: providing a wafer having a plurality of image sensor integrated circuits, each of which has a photosensitive active region and at least one first bonding pad; joining a transparent protecting material to the wafer wherein the photosensitive active region of the image sensor integrated circuit is covered by the transparent protecting material; forming a plurality of through holes in the transparent protecting material, the through holes being correspondingly to the first bonding pad of the wafer to expose the first bonding pad; and dicing the wafer to form a plurality of image sensor integrated circuit components. The method for fabricating an image sensor package of the present invention decreases the defects of the photosensitive active region and reduces the size of the package structure. | 01-29-2009 |
| 20090045478 | CMOS image sensor package structure - The present invention provides a complementary metal oxide semiconductor (CMOS) sensor package structure that includes a carrier substrate having a top surface and a bottom surface; a metal layer placed on the top surface of the carrier substrate and exposed a portion of the top surface of the metal layer; the plurality of CMOS chips having an active surface thereon formed on a portion of the top surface of the metal layer, and being exposed a portion of the active surface; a plurality of connecting elements formed on the bottom surface of the plurality of CMOS chips and a portion of the top surface of the metal layer; a molding material covers a portion of the top surface of the carrier substrate, a plurality of the connecting elements and the bottom surface of each of the plurality of CMOS chips and a plurality of the conductive elements formed on the top of the plurality of connecting elements on the metal layer. | 02-19-2009 |
| 20090050995 | Electronic device wafer level scale packges and fabrication methods thereof - Electronic device wafer level scale packages and fabrication methods thereof. A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A trench is formed by etching the semiconductor exposing an inter-layered dielectric (ILD) layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the trench is removed, and the ILD layer is subsequently removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an L-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed. | 02-26-2009 |
| 20090050996 | Electronic device wafer level scale packages and fabrication methods thereof - Electronic device wafer level scale packages and fabrication methods thereof. A semiconductor wafer with a plurality of electronic devices formed thereon is provided. The semiconductor wafer is bonded with a supporting substrate. The back of the semiconductor substrate is thinned. A first trench is formed by etching the semiconductor exposing an inter-layered dielectric layer. An insulating layer is conformably deposited on the back of the semiconductor substrate. The insulating layer on the bottom of the first trench is removed to create a second trench. The insulating layer and the ILD layer are sequentially removed exposing part of a pair of contact pads. A conductive layer is conformably formed on the back of the semiconductor. After the conductive layer is patterned, the conductive layer and the contact pads construct an S-shaped connection. Next, an exterior connection and terminal contact pads are subsequently formed. | 02-26-2009 |
| 20090057800 | SMALL-SIZE MODULE - According to one embodiment, a small-size module an IC chip having leads provided on at least two sides of the IC chip, a circuit substrate having a component mounting face, plural pairs of auxiliary substrates which are disposed between the component mounting face of the circuit substrate and the IC chip so as to nip the leads extending from each of the two sides and mount the IC chip on the component mounting face of the circuit substrate, and a through conductor which is provided in at least one of the pair of the auxiliary substrates and bonded conductively to the nipped leads to connect the leads to the circuit substrate. | 03-05-2009 |
| 20090085138 | GLASS CAP MOLDING PACKAGE, MANUFACTURING METHOD THEREOF AND CAMERA MODULE - The present invention is to reduce a manufacturing cost and improve productivity by manufacturing a small module in comparison with a conventional module and simplifying a process. | 04-02-2009 |
| 20090085139 | SOLID-STATE IMAGE SENSING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A solid-state image sensing element includes an effective pixel section in a central area of a light receiving surface thereof, and a ridge-shaped protruding portion is provided around the effective pixel section. A liquid transparent adhesive is applied on the effective pixel section, and a light transparent substrate is placed thereon. The light transparent substrate is in contact with the protruding portion, and is therefore prevented from sliding with the liquid adhesive serving as a lubricant. Thus, the light transparent substrate can be fixed at a predetermined position. | 04-02-2009 |
| 20090102004 | SENSOR PACKAGE - A sensor package includes an image sensing chip having a front surface, a plurality of bumps, a glass cover plate, and a connector. The plurality of bumps are formed on the front surface, and are electrically connected to the image sensing chip. The glass cover plate has a bottom surface facing the front surface, and the glass cover plate has a plurality of transparent conductive wires formed on the bottom surface. A terminal of each of the transparent conductive wires is electrically connected to a respective bump, and another terminal of each of the transparent conductive wires extends out of an orthogonal projection area of the image sensing chip on the bottom surface. The connector is electrically connected to the another terminal of each of the transparent conductive wires. | 04-23-2009 |
| 20090102005 | Wafer level package and mask for fabricating the same - An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure. | 04-23-2009 |
| 20090121303 | Semiconductor package - A semiconductor package. The semiconductor package of the invention comprises: a substrate comprising at least one exposed area with photosensitive devices; a cover for isolating the exposed area from the external atmosphere, wherein one of either the substrate or the cover is a base, and the other is a top structure; and a dam formed on the base to form a cavity, wherein the top of the dam has a recess, the dam is attached the top structure by an adhesive, and the cavity corresponds to the exposed area. | 05-14-2009 |
| 20090121304 | SOLID-STATE IMAGE PICKUP DEVICE, PROCESS FOR PRODUCING THE SAME AND ELECTRONIC DEVICE - A camera module | 05-14-2009 |
| 20090140364 | PACKAGED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The present invention connects a first wiring portion located at one side of a substrate and a second wiring portion located at the other side. A side electrode connected to the first wiring portion is formed, and the second wiring portion is formed on an insulating layer formed on the substrate. An exposed end of the second wiring portion formed when singulated into individual semiconductor package and the side electrode are wired by ink jet system using nano metal particles. Particularly, when copper is used, the wiring by the ink jet system is performed by the reduction of a metal surface oxidation film and/or removal of organic matters by atomic hydrogen. | 06-04-2009 |
| 20090174021 | PHOTODIODE FOR MULTIPLE WAVELENGTH OPERATION - A photodiode includes a substrate having a first semiconductor type surface region on at least a portion thereof, and a second semiconductor type surface layer formed in a portion of the surface region. A multi-layer anti-reflective coating (ARC) is on the second semiconductor type surface layer, wherein the multi-layer ARC comprises at least two different dielectric layers. A layer resistant to oxide etch is above a peripheral portion the multi-layer ARC. Further layers are above the layer resistant to oxide etch, and thereby above the peripheral portion the multi-layer ARC. A window extends down to the multi-layer ARC. A photodiode region is formed by a pn-junction of the first semiconductor type surface region and the second semiconductor type surface layer. | 07-09-2009 |
| 20090200629 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR - A semiconductor device which includes a semiconductor chip formed with a light-reception area, a spacer, and a transparent substrate. The spacer is bonded to the semiconductor chip via a first adhesive and surrounding the light-reception area. The transparent substrate is bonded to the spacer via a second adhesive and disposed above the light-reception area. A first projection having a predetermined height is formed on a surface of the spacer which is on a side of the semiconductor chip, and the first projection abuts on the semiconductor chip. | 08-13-2009 |
| 20090200630 | Solid-state image pickup device and method for manufacturing the same - A solid-state image pickup device which includes a solid-state image pickup chip, a transparent plate disposed to face a light-receiving surface of the solid-state image pickup chip, a frame-like spacer disposed on a peripheral portion of the light-receiving surface of the solid-state image pickup chip for maintaining a space between the solid-state image pickup chip and the transparent plate, and an adhesion layer sealing a circumferential gap formed between the solid-state image pickup chip and the transparent plate, wherein the spacer includes a plurality of partition walls. | 08-13-2009 |
| 20090243015 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a semiconductor device, includes the steps of: forming a resin layer on an upper surface of a substrate including a photodiode such that the resin layer does not cover a light receiving region of the photodiode; forming at least one groove in the resin layer so as to surround the light receiving region; and subsequently mold-sealing the photodiode by loading the substrate into a mold and filling the mold with a molding resin. | 10-01-2009 |
| 20090256229 | Semiconductor Package, Method for Manufacturing the Same, Semiconductor Module, and Electronic Device - In a camera module ( | 10-15-2009 |
| 20090267170 | Apparatus and Method For Using Spacer Paste to Package an Image Sensor - A packaged image sensor assembly utilizes a spacer paste to control the height of a transparent window above an image sensor die to provide safe wire bond clearance. A dam structure is used to control the height of the transparent window. The dam may be formed either entirely from spacer paste or by depositing the spacer paste on an underlying patterned mesa. An additional encapsulant is provided outside of the dam to encapsulate wirebonds and provide additional protection from moisture permeation. | 10-29-2009 |
| 20090267171 | PRE-ENCAPSULATED CAVITY INTERPOSER - A pre-encapsulated cavity interposer, a pre-encapsulated frame, for a semiconductor device. | 10-29-2009 |
| 20090267172 | METHOD OF MANUFACTURING AN IMAGE SENSING MICROMODULE - A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity. | 10-29-2009 |
| 20090267173 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of semiconductor integrated circuits bonded to a structure body in which a fibrous body is impregnated with an organic resin. The plurality of semiconductor integrated circuits are provided at openings formed in the structure body and each include a photoelectric conversion element, a light-transmitting substrate which has stepped sides and in which the width of the projected section on a first surface side is smaller than that of a second surface, a semiconductor integrated circuit portion provided on the second surface of the light-transmitting substrate, and a chromatic color light-transmitting resin layer which covers the first surface and part of side surfaces of the light-transmitting substrate. The plurality of semiconductor integrated circuits include the chromatic color light-transmitting resin layers of different colors. | 10-29-2009 |
| 20090289319 | SEMICONDUCTOR DEVICE - A semiconductor device, that is approximately identical in package size to a semiconductor chip, such as a W-CSP, is devised to secure a wider area for sealing such as laser marking. A semiconductor substrate has a plurality of via electrodes extending from the bottom of the semiconductor substrate to top electrodes, a bottom wire net formed at the bottom of the semiconductor substrate such that the bottom wire net is connected to the via electrodes, and an insulative film covering the bottom wire net. A sealing area having a sealing mark is disposed at the bottom of the semiconductor substrate. The sealing area is located such that the outer circumference of the sealing area is spaced apart from the bottom wire net in a direction parallel to a sealing mark forming surface, and the outer circumference of the sealing area is disposed at the edge of the semiconductor substrate. | 11-26-2009 |
| 20090294887 | Semiconductor device - A semiconductor device comprises a semiconductor substrate comprised of an interposer having one surface and a semiconductor element provided on the one surface of the interposer, the semiconductor element including a light receiving portion for receiving light thereon; a transparent substrate having light-transmitting property and one surface facing the light receiving portion, the transparent substrate arranged in a spaced-apart relationship with the one surface of the interposer through a gap formed between the one surface of the interposer and the one surface of the transparent substrate; and a spacer formed in a shape of a frame, the spacer positioned between the one surface of the interposer and the one surface of the transparent substrate for regulating the gap, and the spacer having an inner surface and an outer surface, wherein the one surface of the interposer, the one surface of the transparent substrate and the inner surface of the spacer form a space which is hermetically sealed, and wherein the spacer has a wall including at least one thin wall portion and a thick wall portion other than the at least one thin wall portion, and a vapor permeability of the at least one thin wall portion is greater than a vapor permeability of the thick wall portion, wherein a vapor allowed to flow into the space through the wall of the spacer from an outside preferentially permeates from the space to the outside through the thin wall portion. The semiconductor device is capable of reliably preventing dust from infiltrating into the semiconductor device and capable of reliably preventing occurrence of dew condensation in an inner wall of the semiconductor device, particularly on an inner surface of a transparent substrate. | 12-03-2009 |
| 20090309179 | PACKAGE SUBSTRATE HAVING EMBEDDED PHOTOSENSITIVE SEMICONDUCTOR CHIP AND FABRICATION METHOD THEREOF - A packaging substrate with an embedded photosensitive semiconductor chip and a method for fabricating the same are provided. The method includes the steps of: disposing the semiconductor chip in an through cavity of a core board with the photosensitive portion of the semiconductor chip being exposed from the through cavity; forming a first circuit layer on the core board at a side opposite to the photosensitive portion so as to electrically connect the electrode pads of the semiconductor chip; and forming a light-permeable layer on the core board at the same side with the photosensitive portion via an adhesion layer so as to allow light to penetrate through the light-permeable layer and reach the photosensitive portion of the semiconductor chip. When fabricated by the method, the packaging substrate dispenses with conductive wires and a surrounding dam and thus is efficiently downsized. | 12-17-2009 |
| 20090321867 | Method for production of packaged electronic components, and a packaged electronic component - The invention relates to a method for production of packaged electronic, in particular optoelectronic, components in a composite wafer, in which the packaging is carried out by fitting microframe structures of a cover substrate composed of glass, and the composite wafer is broken up along trenches which are produced in the cover substrate, and to packaged electronic components which can be produced using this method, comprising a composite of a mount substrate and a cover substrate, with at least one functional element and at least one bonding element, which makes contact with the functional element, being arranged on the mount substrate, with the cover substrate being a microstructured glass which is arranged on the mount substrate, and forms a cavity above the functional element, and with the bonding elements being located outside the cavity. | 12-31-2009 |
| 20100019339 | MOLDED OPTICAL PACKAGE WITH FIBER COUPLING FEATURE - Apparatuses and methods directed to an integrated circuit package having an optical component are disclosed. The package may include an integrated circuit die having at least one light sensitive region disposed on a first surface thereof. By way of example, the die may be a laser diode that emits light through the light sensitive region, or a photodetector that receives and detects light through the light sensitive region. An optical concentrator may be positioned adjacent the first surface of the first die. The optical concentrator includes a lens portion positioned adjacent the light sensitive region and adapted to focus light. | 01-28-2010 |
| 20100019340 | Back illuminated photodetector and method for manufacturing the same - The present invention provides a back illuminated photodetector having a sufficiently small package as well as being capable of suppressing the scattering of to-be-detected light and method for manufacturing the same. A back illuminated photodiode 1 comprises an N-type semiconductor substrate | 01-28-2010 |
| 20100025794 | IMAGE SENSOR CHIP PACKAGE STRUCTURE AND METHOD THEREOF - An image sensor chip package structure includes a transparent substrate, a chip, a sealing ring, a number of conductive posts, and a number of conductive bumps. The transparent substrate has a number of through holes. The through holes pass through the transparent substrate. The chip has an active surface, an image sensitive area, and a number of die pads. The image sensitive area and the die pads are located on the active surface. The sealing ring is disposed between the chip and the transparent substrate and surrounds the image sensitive area and the die pads. The conductive posts are disposed in the through holes, respectively. Here, the chip is electrically connected with the conductive posts via the die pads. The conductive bumps are disposed on the die pads, respectively. The conductive bumps are connected with the conductive posts, respectively. | 02-04-2010 |
| 20100025795 | Image sensing device and packaging method thereof - An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts. | 02-04-2010 |
| 20100032784 | SOLID-STATE IMAGE SENSOR - A solid-state image sensor ( | 02-11-2010 |
| 20100038737 | PLASTIC IMAGE SENSOR PACKAGING FOR IMAGE SENSORS - A package for an image sensor includes a lead frame having a first surface and a second surface opposite the first surface; an image sensor mounted on the first surface of the lead frame; an optical cover spanning the first surface; and a plastic, optically transparent window in the optical cover and aligned with the image sensor. | 02-18-2010 |
| 20100038738 | Capacitive Bypass - An indirect connection to and across a photodiode array. The backside contact is used as one portion which connects to a capacitor. The capacitor forms a shunt across the bulk substrate, thus shunting across the series resistance of the substrate, and reducing the series resistance. | 02-18-2010 |
| 20100084729 | INTEGRATED PHOTODIODE FOR SEMICONDUCTOR SUBSTRATES - A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a light-transparent region in which light, from a light source, is able to reach a surface of the substrate. An application of light onto the light transparent region is sufficient to cause a voltage potential to form across a junction of the heavily doped regions. The substrate section may further comprise one or more electrical contacts, positioned on the substrate section to conduct current, resulting from the voltage potential created with application of light onto the light transparent region, to a circuit on the semiconductor substrate. | 04-08-2010 |
| 20100096717 | ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING ELECTRONIC DEVICE - To reduce cracks in a functional unit of a semiconductor element in a process for manufacturing an electronic device, a frame member surrounds a functional unit and an optically-transparent layer is formed on a wafer. A resin layer is formed by injecting resin into a cavity of an encapsulating metallic mold while a molding surface of the encapsulating metallic mold segment contacts an upper surface of the frame member. After forming the resin layer, an optically-transparent layer is formed inside the frame member. The resin layer is formed by injecting resin while the frame member contacts the molding surface of the encapsulating metallic mold segment. Therefore, pressure applied in the encapsulation is exerted over the frame member around the functional unit. Further, the optically-transparent layer is formed after encapsulation. This avoids pressure applied to the functional unit from the contact of the encapsulating metallic mold segment with the optically-transparent layer. | 04-22-2010 |
| 20100109114 | Semiconductor device and manufacturing method thereof - A semiconductor device manufacturing method includes etching a silicon on insulator (SOI) from its surface (i.e., semiconductor substrate layer) to form a first trench and a second trench. The first trench extends through the SOI substrate and reaches an electrode pad. The second trench terminates in the semiconductor substrate layer. The manufacturing method also includes forming an insulation film that covers the surface of the semiconductor substrate layer as well as the side walls and bottoms of the first and second trenches. The manufacturing method also includes removing the insulation film from the bottoms of the first and second trenches to expose the electrode pad from the first trench bottom and to expose the semiconductor substrate layer from the second trench bottom. The manufacturing method also includes forming a conductive film that covers the semiconductor substrate layer and the side walls and the bottoms of the first and second trenches to form a through via electrically connected to the electrode pad at the first trench bottom and to form a contact part electrically connected to the semiconductor substrate layer at the second trench bottom. The manufacturing method also includes patterning the conductive film on the semiconductor substrate layer to form the external electrodes and to form a potential fixing external electrode electrically connected to the contact part. | 05-06-2010 |
| 20100148293 | Miniaturized implantable sensor platform having multiple devices and sub-chips - An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component. | 06-17-2010 |
| 20110018084 | ENCAPSULANT CAVITY INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF FABRICATION THEREOF - A method for fabricating an encapsulant cavity integrated circuit package system includes: forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity. | 01-27-2011 |
| 20110024861 | MANUFACTURING METHOD FOR MOLDING IMAGE SENSOR PACKAGE STRUCTURE AND IMAGE SENSOR PACKAGE STRUCTURE THEREOF - A manufacturing method for molding an image sensor package structure and the image sensor package structure thereof are disclosed. The manufacturing method includes following steps of providing a half-finished image sensor for packaging, arranging a dam on the peripheral of a transparent lid of the half-finished image sensor, positioning the half-finished image sensor within a mold, and injecting a mold compound into the mold cavity of the mold. The dam is arranged on the top surface of the transparent lid and the inner surface of the mold can exactly contact with the top surface of dam so that the mold compound injected into the mold cavity is prevented from overflowing to the transparent lid by the dam. Furthermore, the arrangement of the dam and the mold compound can increase packaged areas and extend blockage to invasive moisture so as to enhance the reliability of the image sensor package structure. | 02-03-2011 |
| 20110024862 | IMAGE SENSOR PACKAGE STRUCTURE WITH LARGE AIR CAVITY - The present invention discloses an image sensor package structure with a large air cavity. The image sensor package structure includes a substrate, a chip, a cover and a package material. The chip is combined with the substrate. A plastic sheet of the cover is adhered to the chip and a transparent lid of the cover is combined with the plastic sheet to provide a covering over a sensitization area of the chip so as to form an air cavity. The package material is arranged on the substrate and encapsulated around the chip and the cover. The plastic sheet having a predetermined thickness can increase the distance between the transparent lid and the chip to enlarge the air cavity. Thus, the image-sensing effect of the image sensor package structure can be improved and the ghost image problem resulting from multi-refraction and multi-reflection of light can be minimized. | 02-03-2011 |
| 20110037137 | BACK-SIDE ILLUMINATED IMAGE SENSOR PROTECTED AGAINST INFRARED RAYS - An image sensor including a first substrate having a first surface intended to be illuminated and a second surface on the side of which is formed a plurality of photodetection areas, said second surface being covered with a stack of interconnect levels including metal layers topped with insulating material, and of a second substrate placed on the insulating material of the last interconnect level, in which are formed vias in contact with connection elements of the interconnect levels, at least one of the interconnect levels including conductive shielding areas aligned with the photodetection areas. | 02-17-2011 |
| 20110049662 | Semiconductor Device with Optical Sensor and Method of Forming Interconnect Structure on Front and Backside of the Device - A semiconductor device includes a carrier and semiconductor die having an optically active region. The semiconductor die is mounted to the carrier to form a separation between the carrier and the semiconductor die. The semiconductor device further includes a passivation layer disposed over a surface of the semiconductor die and a glass layer disposed over a surface of the passivation layer. The passivation layer has a clear portion for passage of light to the optically active region of the semiconductor die. The semiconductor device further includes an encapsulant disposed over the carrier within the separation to form an expansion region around a periphery of the semiconductor die, a first via penetrating the expansion region, glass layer, and passivation layer, a second via penetrating the glass layer and passivation layer to expose a contact pad on the semiconductor die, and a conductive material filling the first and second vias. | 03-03-2011 |
| 20110101484 | LIGHT-RECEIVING DEVICE AND METHOD OF MANUFACTURING THE SAME - There is provided a device including at least one light-receiving unit | 05-05-2011 |
| 20110147873 | OPTICAL SEMICONDUCTOR DEVICE, AND OPTICAL PICKUP DEVICE AND ELECTRONIC DEVICE USING THE OPTICAL SEMICONDUCTOR DEVICE - A semiconductor substrate is bonded to a glass board in a peripheral portion of the semiconductor substrate by an adhesive layer. A hollow region is formed in a portion surrounded by the semiconductor substrate, the glass board, and the adhesive layer. In the hollow region, reinforcing adhesive layers are formed on a back surface of the semiconductor substrate and at positions corresponding to bumps provided at regular intervals. The reinforcing adhesive layers allow the semiconductor substrate to have strength withstanding to a load of a testing probe. | 06-23-2011 |
| 20110156192 | SOLID-STATE IMAGE SENSING DEVICE HAVING A LAYER ON MICROLENS AND METHOD FOR FABRICATING THE SAME - A solid-state image sensing device comprises: a light receiving unit for receiving light; a microlens formed above the light receiving unit; a fluorine-containing resin material layer formed on the microlens; and a transparent substrate provided over the fluorine-containing resin material layer. A resin layer adheres the fluorine-containing resin material layer and the transparent substrate. | 06-30-2011 |
| 20110204465 | OPTICAL DEVICE AND METHOD OF MANUFACTURING THE DEVICE - In an optical device having a direct attachment structure and a method of manufacturing the optical device, a light-transmissive member can be bonded to an element region without being misaligned. | 08-25-2011 |
| 20110241147 | WAFER LEVEL IMAGE SENSOR PACKAGING STRUCTURE AND MANUFACTURING METHOD OF THE SAME - The present invention discloses a wafer level image sensor packaging structure and a manufacturing method of the same. The manufacturing method includes the following steps: providing a silicon wafer, dicing the silicon wafer, providing a plurality of transparent lids, fabricating a plurality of semi-finished products, performing a packaging process, mounting solder balls, and cutting an encapsulant between the semi-finished products. The manufacturing method of the invention has the advantage of being straightforward, uncomplicated, and cost-saving. Thus, the wafer level image sensor package structure is lightweight, thin, and compact. To prevent the image sensor chip from cracking on impact during handling, the encapsulant will be arranged on the lateral sides of the semi-finished products during the packaging process. | 10-06-2011 |
| 20110278692 | SOLID-STATE IMAGE SENSING DEVICE HAVING A DIRECT-ATTACHMENT STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A solid-state image sensing element includes an effective pixel section in a central area of a light receiving surface thereof, and a ridge-shaped protruding portion is provided around the effective pixel section. A liquid transparent adhesive is applied on the effective pixel section, and a light transparent substrate is placed thereon. The light transparent substrate is in contact with the protruding portion, and is therefore prevented from sliding with the liquid adhesive serving as a lubricant. Thus, the light transparent substrate can be fixed at a predetermined position. | 11-17-2011 |
| 20110284983 | PHOTODIODE DEVICE AND MANUFACTURING METHOD THEREOF - A photodiode device and the manufacturing method of the same are provided. The photodiode device includes a substrate; an epitaxy layer on the substrate, the epitaxy layer including a window layer and a cap layer on the window layer, the cap layer covering a portion of the window layer; and a patterned conductive layer on the cap layer, the patterned conductive layer being formed with a bottom area and a top area wherein the bottom area is greater than the top area. | 11-24-2011 |
| 20120012963 | MICRO DEVICE PACKAGING - In one embodiment, a method for making an optical micro device package includes: providing a substrate wafer having a plurality of solid state light sensors integrate therein; providing a transparent cover wafer coated with a material that alters the transparency characteristics of the cover wafer; forming a layer of light sensitive, photo definable adhesive material on the substrate wafer; selectively removing part of the layer of adhesive material in a pattern for a plurality of adhesive spacers between the substrate wafer and the cover wafer with each spacer surrounding a corresponding one of the light sensors; bonding the substrate wafer and the cover wafer together at the spacers to form a wafer assembly in which each spacer surrounds and seals a corresponding one of the light sensors within a cavity bounded by a spacer and the two wafers; and singulating individual device packages from the wafer assembly. | 01-19-2012 |
| 20120133013 | SEMICONDUCTOR LIGHT RECEIVING ELEMENT AND METHOD FOR MANUFACTURING THE SAME - A semiconductor light receiving element includes a first semiconductor layer having a first conduction type, a second semiconductor layer that is provided on the first semiconductor layer and has a light receiving area, the second semiconductor layer having a second conduction type opposite to the first conduction type, an insulation film provided on the second semiconductor layer, and an electrode provided on the insulation film, the insulation film having a plurality of windows in an area in which the electrode overlaps the plurality of windows, the electrode being electrically connected to the second semiconductor layer via the plurality of windows. | 05-31-2012 |
| 20120161271 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device having a substrate including a photodiode; a resin layer formed on an upper surface of the substrate, the resin layer not covering a light receiving region of the photodiode, the resin layer including at least one groove surrounding the light receiving region; and a molding resin portion formed by mold-sealing the photodiode with the resin layer thereon so as not to cover the light receiving region. | 06-28-2012 |
| 20120175721 | Methods And Materials Useful For Chip Stacking, Chip And Wafer Bonding - Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues. | 07-12-2012 |
| 20120181648 | APPARATUS AND METHODS FOR CONSTRUCTING SEMICONDUCTOR CHIP PACKAGES WITH SILICON SPACE TRANSFORMER CARRIERS - Apparatus and methods are provided for high density packaging of semiconductor chips using silicon space transformer chip level package structures, which allow high density chip interconnection and/or integration of multiple chips or chip stacks high I/O interconnection and heterogeneous chip or function integration. | 07-19-2012 |
| 20120299141 | AVALANCHE PHOTODIODE AND AVALANCHE PHOTODIODE ARRAY - An avalanche photodiode including a semiconductor substrate of a first conductivity type, an avalanche multiplication layer, an electric field control layer, a light absorption layer, and a window layer wherein the layers are laid one on another in this order on a major surface of the semiconductor substrate, an impurity region of a second conductivity type in a portion of the window layer, and a straight electrode on the impurity region and connected to the impurity region, the straight electrode being straight as viewed in a plan view facing the major surface of the semiconductor substrate. | 11-29-2012 |
| 20120306038 | Semiconductor Device and Method of Forming EWLB Semiconductor Package with Vertical Interconnect Structure and Cavity Region - A semiconductor device has a substrate containing a transparent or translucent material. A spacer is mounted to the substrate. A first semiconductor die has an active region and first conductive vias electrically connected to the active region. The active region can include a sensor responsive to light received through the substrate. The first die is mounted to the spacer with the active region positioned over an opening in the spacer and oriented toward the substrate. An encapsulant is deposited over the first die and substrate. An interconnect structure is formed over the encapsulant and first die. The interconnect structure is electrically connected through the first conductive vias to the active region. A second semiconductor die having second conductive vias can be mounted to the first die with the first conductive vias electrically connected to the second conductive vias. | 12-06-2012 |
| 20130062720 | EXTENDED AREA COVER PLATE FOR INTEGRATED INFRARED SENSOR - An integrated circuit chip includes a window cover over etchant holes in a dielectric layer and over a cavity in the substrate of said integrated circuit chip. The window cover extends at least 400 microns beyond the edge of the cavity. An integrated sensor chip with a sensor cover which extends at least 400 microns beyond the edges of a cavity. A method of forming an integrated sensor chip with a sensor cover which extends at least 400 microns beyond the edge of a cavity. | 03-14-2013 |
| 20130175650 | COVER FOR IMAGE SENSOR ASSEMBLY WITH LIGHT ABSORBING LAYER - An image sensor assembly includes an image sensor die attached adjacent to a cavity and a lower surface in a preformed package having substantially vertical surfaces extending from the lower surface to an upper surface of the package. The image sensor die may include a charge-coupled device or an active pixel sensor imager that provides the light receiving surface for capturing the image. A cover is placed over the upper surface of the package. The cover may be a glass cover or an infrared cut filter. A light absorbing layer is applied to the cover in registry with the image sensor die such that the light absorbing layer prevents light from falling on the substantially vertical surfaces of the preformed package without preventing the passage of light that falls on the light receiving surface of the image sensor die. | 07-11-2013 |
| 20130221470 | MULTI-CHIP PACKAGE FOR IMAGING SYSTEMS - A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate. | 08-29-2013 |
| 20130234275 | METHODS OF FABRICATION OF PACKAGE ASSEMBLIES FOR OPTICALLY INTERACTIVE ELECTRONIC DEVICES AND PACKAGE ASSEMBLIES THEREFOR - Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier. | 09-12-2013 |
| 20130277788 | IMAGING UNIT AND IMAGING DEVICE - There is provided an imaging unit including a light-transmissive member through which photographing light brought in via an optical system is transmitted, an image sensor that is disposed facing the light-transmissive member and on which photographing light that has been transmitted through the light-transmissive member is incident so as to convert the incident photographing light into electrical signals, and a holding member that has a disposition hole and holds the light-transmissive member. The light-transmissive member has an outer circumferential face to which an adhesive is applied so as to be attached to and held by the holding member in a state of being disposed in the disposition hole, and the adhesive has light absorptivity and a refractive index that is substantially identical to a refractive index of the light-transmissive member. | 10-24-2013 |
| 20130285185 | IMAGE SENSOR PACKAGE - An image sensor package and image sensor chip capable of being slenderized while enhancing the reliability with respect to physical impact are provided. The image sensor package includes an image sensor chip provided with a pixel domain at a central portion of an upper surface thereof, a substrate disposed at an upper side of the image sensor chip so as to be flip-chip bonded with respect to the image sensor chip, provided with a hole formed at a position corresponding to the pixel domain, and formed of organic material, a printed circuit board at which the substrate provided with the image sensor chip bonded thereto is mounted, and a solder ball configured to electrically connect the substrate to the printed circuit board. | 10-31-2013 |
| 20130313672 | WINDOW STRUCTURE, METHOD OF MANUFACTURING THE SAME, ELECTRONIC DEVICE EQUIPPED WITH A CAMERA INCLUDING A WINDOW STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A window structure includes a window, a design layer structure on the window, a light shield layer on the design layer structure, and a light absorption layer. The design layer structure includes a first hole exposing a portion of the window. The light shield layer includes a second hole in fluid communication with the first hole. The light absorption layer covers at least a portion of the design layer structure exposed by the first and second holes, and includes a third hole exposing a portion of the window. By including the light absorption layer of a gray or black color to cover exposed portions of the design layer structure, a vignette about an image caused by the design layer structure is prevented. | 11-28-2013 |
| 20130320476 | Miniaturized Implantable Sensor Platform Having Multiple Devices and Sub-Chips - An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover plate including a gold perimeter fence deposited on its Si covered outer rim and wherein the bottom substrate is constructed of Si and includes a plurality of partial-Si-vias (PSVs), electronic integrated circuits, device pads, pad interconnects and a gold perimeter fence, wherein the device pads are aligned with a respective device contact pad on the top cover plate and includes gold bumps having a predetermined height, the top cover plate and the bottom substrate being flip-chip bonded to provide a perimeter seal and to ensure electrical connectivity between the plurality of internal devices and at least one external component. | 12-05-2013 |
| 20130334644 | INTEGRATED PHOTODIODE FOR SEMICONDUCTOR SUBSTRATES - A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a light-transparent region in which light, from a light source, is able to reach a surface of the substrate. An application of light onto the light transparent region is sufficient to cause a voltage potential to form across a junction of the heavily doped regions. The substrate section may further comprise one or more electrical contacts, positioned on the substrate section to conduct current, resulting from the voltage potential created with application of light onto the light transparent region, to a circuit on the semiconductor substrate. | 12-19-2013 |
| 20140159185 | IMAGE SENSOR PACKAGE - An image sensor package including a PCB including bonding areas, an image sensor including bonding pads on edge portions thereof on the PCB, bonding wires connecting the bonding pads with the bonding areas, an insulating adhesion film attaching the bonding wires to the bonding pads on the edge portions of the image sensor, a heat spread pattern spaced apart from the bonding wires and the image sensor on the insulating adhesion film, a supporting holder spaced apart from the edge portions of the image sensor, encloses the image sensor, contacts a top surface of the heat spread pattern and the PCB, and includes a supporting portion at an upper portion thereof, and a transparent cover covering the image sensor on the supporting portion of the supporting holder and spaced apart from the top surface of the image sensor is provided. | 06-12-2014 |
| 20140264699 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor package includes a substrate, an image sensor chip mounted on the substrate, a holder disposed on the substrate and surrounding the image sensor chip, and the holder has an inner surface facing the image sensor chip and an outer surface opposite to the inner surface. The semiconductor package further includes a transparent cover combined with the holder, and the transparent cover is spaced apart from and faces the substrate. The holder includes: a hole penetrating the holder from the inner surface to the outer surface. In addition, the semiconductor package further includes a first stopper disposed in the hole and a second stopper disposed at a position corresponding to the hole on the outer surface of the holder. | 09-18-2014 |
| 20140353791 | Miniaturized Implantable Sensor Platform having Multiple Devices and Sub-Chips - This invention describes a hermetically sealed package which can be implanted in the body. The package comprise of stacked substrates where surface of one substrate hosts biosensors which are exposed to body fluids to monitor concentrations of substances selected from analytes, metabolites, and proteins, and body physiological parameters. The structure protects from body fluids devices that interface with the biosensor electrodes for electronic data processing, powering, and wireless communication. Biosensor electrodes are electrically connected to various electronic, optoelectronic, MEM devices using novel partial silicon vias (PSVs) that prevents leakage of body fluids. Various devices are located on different substrates which are stacked to save surface area. One of the substrate forms the cover plate which permits light for powering as well as sending receiving coded data including the analyte levels. | 12-04-2014 |
| 20150295000 | IMAGING APPARATUS - There is provided an imaging apparatus in which improvements in the moisture-proof and insulation properties of an imaging device and miniaturization of the entire apparatus can be realized. The imaging apparatus is configured to include: an imaging device in which a plurality of photoelectric conversion elements are arrayed; a substrate on which the imaging device is provided and which has a larger outer shape than the imaging device; a transparent cover member that is provided on an opposite surface side to a surface of the imaging device facing the substrate and has a larger outer shape than the imaging device; and a sealing resin that fills a gap between the substrate and the cover member in order to seal a side surface of the imaging device. | 10-15-2015 |
| 20150325611 | SEMICONDUCTOR PACKAGES INCLUDING ELECTRICAL INSULATION FEATURES - A semiconductor package can include a substrate and a semiconductor chip inside the semiconductor package mounted on the substrate. A first conductive pattern can be on the substrate inside the semiconductor package and can be electrically connected to an input/output of the semiconductor chip. A holder can be on the substrate, where the holder can be configured to provide a recess in which the semiconductor chip is located. An electrically insulating adhesive layer can be configured to electrically insulate the first conductive pattern from an Electric Static Discharge (ESD) source located outside the semiconductor package and configured to adhere the holder to the substrate. | 11-12-2015 |
| 20150380452 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes: an organic substrate; an integrated circuit and a chip part provided on the organic substrate; a molded section including a central portion and a peripheral portion, and forming, as a whole, a concave shape, the central portion sealing the integrated circuit and the chip part on the organic substrate, and the peripheral portion standing around the central portion; and a solid-state image pickup element provided on the central portion of the molded section, the solid-state image pickup element having a top edge that is lower in position in a thickness direction than a top edge of the peripheral portion of the molded section. | 12-31-2015 |
| 20160049526 | Wire Bond Sensor Package And Method - A packaged chip assembly with a semiconductor substrate, a semiconductor device integrally formed on or in the substrate's top surface, and first bond pads at the substrate's top surface electrically coupled to the semiconductor device. A second substrate includes a first aperture and one or more second apertures extending therethrough, second and third bond pads at the second substrate's top and bottom surfaces, respectively, and conductors electrically coupled to the second and third bond pads. The semiconductor substrate's top surface is secured to the second substrate's bottom surface such that the semiconductor device is aligned with the first aperture, and each of the first bond pads is aligned with one of the second apertures. A plurality of wires are each electrically connected between one of the first bond pads and one of the second bond pads and each passing through one of the one or more second apertures. | 02-18-2016 |
| 20160104806 | HEATED IMAGE SENSOR WINDOW - An image sensor assembly having a sensor window positioned in front of an image sensor, having structure and/or characteristics to prevent the formation of condensation on the sensor window. Structure to prevent the formation of condensation includes thin films which can have anti-condensation, anti-reflective, electrically conductive, and/or thermally conductive properties. The sensor window can further have a textured surface to displace water so as to avoid condensation formation on the window surface. The sensor window, and in some embodiments a frame, can be maintained at an elevated temperature proximate to the image sensor during operation to prevent the formation of condensation. | 04-14-2016 |
| 20160118427 | CHIP SCALE PACKAGE OF IMAGE SENSOR HAVING DAM COMBINATION - Disclosed is a chip scale package of image sensor having a dam combination, comprising an image sensor chip, a dam combination, a transparent lid disposed on the dam combination, and a plurality of external terminals disposed on the backside of the chip. An image sensing area is formed on the active surface of the image sensor chip. A dam combination consists essentially of at least two dam parts and has an image sensing window. The peripheries of the image sensor window are formed by a pre-formed dam part and are adjacent to the image sensing area with horizontal spacing not greater than 200 μm. There is a combination interface between the two dam parts. The combination interface and the post-formed dam part are far away from the image sensing area than the pre-formed dam part to keep residues caused by the disposition of the pre-formed dam part to be away from the 200 μm exclusive region around the image sensing area. | 04-28-2016 |
| 20160163884 | PROCESS OF FABRICATION OF ELECTRONIC DEVICES AND ELECTRONIC DEVICE WITH A DOUBLE ENCAPSULATION RING - An integrated circuit chip is mounted on top of a base wafer, and a protection wafer is mounted on top of the integrated circuit chip. An encapsulation block is formed around the integrated circuit chip and the protection wafer and on a peripheral part of the front face of the base wafer. The encapsulation block includes a first encapsulation ring arranged around the integrated circuit chip and the protection wafer, having an annular beading protruding with respect to the front face of the protection wafer and forming a peripheral groove ( | 06-09-2016 |
| 20160181299 | IMAGE SENSING DEVICE WITH CAP AND RELATED METHODS | 06-23-2016 |
| 20160376146 | WAFER LEVEL MEMS PACKAGE INCLUDING DUAL SEAL RING - A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced. | 12-29-2016 |
| 20220139984 | IMAGE SENSOR PACKAGE - An image sensor package includes a package substrate; an image sensor chip disposed on the package substrate; a dam structure disposed on the image sensor chip and including a dam main body having an opening and a first light absorption layer disposed on an inner wall of the dam main body; a transparent substrate on the dam structure; and an encapsulant contacting the image sensor chip and an outer wall of the dam main body. | 05-05-2022 |
