| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 174263000 | With solder | 48 |
| 20080251289 | DEVICE FOR REPAIR OF A CONTACT PAD OF A PRINTED CIRCUIT BOARD - Methods and devices are provided for repairing a damaged contact pad that is located on a first surface of a printed circuit board and connected to a via that passes through the circuit board. According to the method, a countersink hole is created in the first surface of the printed circuit board in a location that is substantially centered on an axis passing through the via, and a replacement structure is inserted into the countersink hole. The replacement structure has a stem portion, a head portion, and a shoulder portion that connects the stem and head portions, with the angle of the shoulder portion substantially matching the angle of the shoulder of the countersink hole. The stem portion of the replacement structure is permanently attached to sidewalls of the via so as to electrically couple the head portion of the replacement structure to the via. | 10-16-2008 |
| 20080264686 | MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE - The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins. | 10-30-2008 |
| 20080302563 | Wiring board and manufacturing method thereof - In a wiring board, insulation layers and wiring conductors are alternately laminated, and a plurality of strip-shaped wiring conductors for connecting semiconductor elements are arranged side by side on the outermost insulation layer. Each of the wiring conductors partly has a connection pad to which the electrode terminals of the semiconductor elements are connected by flip-chip bonding. In the wiring board, a solder resist layer is deposited over the outermost insulation layer and the strip-shaped wiring conductors so as to have slit-shaped openings for exposing the upper surfaces of the connection pads. The solder resist layer fills up the space between the connection pads adjacent to each other and exposed within the slit-shaped openings. | 12-11-2008 |
| 20080308314 | Implementation structure of semiconductor package - An implementation structure of a semiconductor package includes: a printed wiring board which has via-holes piercing a mounted surface and an opposite surface of the printed wiring board; a via-land which is formed on the opposite surface so as to cover openings of the via-holes on the opposite surface and which is conductively connected to the via-holes; a semiconductor chip which has bumps; and a thermosetting adhesive filled between the semiconductor chip and the mounted surface of the printed wiring board, wherein an anisotropic conductive material is filled inside the via-holes, the bumps are inserted into the via-holes, and the bumps are conductively connected to the via-holes via the conductive particles. | 12-18-2008 |
| 20080314632 | MULTILAYERED PRINTED WIRING BOARD - A multilayered printed wiring board has a core substrate having a through hole opening with a radius R, a through hole structure formed at the through hole opening and including a lid-shaped conductive structure, a first interlaminar resin insulation layer formed over the core substrate and having a first via hole structure with a bottom radius r, and a second interlaminar resin insulation layer formed over the first interlaminar resin insulation layer and having a second via hole structure. The lid-shaped conductive structure is formed over the core substrate at an end portion of the through-hole opening and covering the end portion of the through-hole opening. The first via hole structure is formed on the lid-shaped conductive structure and has an electroless plated film and an electrolytic plated film. The second via hole structure has an electroless plated film and an electrolytic plated film. The first via hole has a gravity center at or beyond a radius D, where D=(R−r/3) and the radius D is measured from a gravity center of the through-hole opening, and the bottom radius r of the first via hole is larger than a bottom radius of the second via hole. | 12-25-2008 |
| 20090025972 | Solder Mounting Structure, Manufacturing Method and Apparatus of the Solder Mounting Structure, Electronic Apparatus, and Wiring Board - A camera module structure ( | 01-29-2009 |
| 20090084598 | CORELESS SUBSTRATE AND METHOD OF MANUFACTURE THEREOF - Disclosed are a coreless substrate and a method of manufacturing the same. The coreless substrate includes a solder resist layer capable of being formed on each of on a first side and a second side of a metal panel. The solder resist layer includes at least one opening. A copper layer may be plated in the at least one opening such that a height of the copper layer exceeds a height of the solder resist layer. Further, at least one dielectric layer is deposited above the copper layer, and at least one microvia drilled in the dielectric layer. The at least one microvia enables an electrical connection between at least one of the first side and the second side of the metal panel and a lower surface of the coreless substrate. | 04-02-2009 |
| 20090095519 | CURRENT DISTRIBUTION STRUCTURE AND METHOD - An electrical structure and method of forming. The electrical structure comprises an interconnect structure and a substrate. The substrate comprises an electrically conductive pad and a plurality of wire traces electrically connected to the electrically conductive pad. The electrically conductive pad is electrically and mechanically connected to the interconnect structure. The plurality of wire traces comprises a first wire trace, a second wire trace, a third wire trace, and a fourth wire trace. The first wire trace and second wire trace are each electrically connected to a first side of the electrically conductive pad. The third wire trace is electrically connected to a second side of the electrically conductive pad. The fourth wire trace is electrically connected to a third side of said first electrically conductive pad. The plurality of wire traces are configured to distribute a current. | 04-16-2009 |
| 20090114436 | SUBSTRATE STRUCTURE - A substrate structure is provided. A plurality of solder pads is positioned on a substrate. A solder mask covers the substrate and has a plurality of openings to respectively expose portions of the solder pads, wherein the openings have the shape of a polygon of at least five sides. | 05-07-2009 |
| 20090120680 | METHOD FOR MANUFACTURING A PRINTED WIRING BOARD - A method of manufacturing a printed wiring board having at least one solder bump includes forming a solder resist layer on a conductor layer. The solder resist layer has at least one opening that exposes a connection pad of the conductor layer, and the at least one opening in the solder resist layer has a depth D, from the solder resist layer to the exposed connection pad, of from 3 μm to 18 μm. The method also includes loading a solder ball into each of the at least one opening in the solder resist layer, and forming a bump on the exposed connection pad by heating the solder ball to a reflow temperature. | 05-14-2009 |
| 20090145651 | MULTILAYER WIRING BOARD AND METHOD FOR PRODUCING THE SAME - A multilayer wiring board | 06-11-2009 |
| 20090218124 | METHOD OF FILLING VIAS WITH FUSIBLE METAL - A method is disclosed in which a blind via in a PCB is filled. The vias are plated with a conductor and then with a fusible metal of lower melting point than the conductor. The plated vias are covered with a photoresist and the fusible metal is removed at locations on the PCB other than where the photoresist is disposed. The photoresist is removed and flux is provided on the PCB before the PCB is heated. The heated fusible metal flows into the via. | 09-03-2009 |
| 20090218125 | MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board includes a first interlaminar resin insulating layer, a first conductor circuit formed on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit, a second conductor circuit formed on the second interlaminar resin insulating layer. A via conductor can be formed in the opening portion. The opening portion of the second interlaminar resin insulating layer can expose a face of the first conductor circuit. The via conductor connects the first conductor circuit and the second conductor circuit. The via conductor includes an electroless plating film formed on inner wall face of the opening portion and includes an electrolytic plating film formed on the electroless plating film and on the exposed face of the first conductor circuit exposed by the opening portion. The second conductor circuit includes the electroless plating film and the electrolytic plating film. | 09-03-2009 |
| 20090250259 | Multilayered printed circuit board and method of manufacturing the same - Disclosed herein is a multilayered printed circuit board, including: a build-up layer including a plurality of insulating layers and a plurality of circuit layers; an insulating resin layer, including bumps, formed on the outermost circuit layer of one side of the build-up layer; and a solder resist layer formed on the outermost layer of the other side of the build-up layer. The multilayered printed circuit board is manufactured by sequentially placing a build-up layer and a solder resist layer on one side of an insulating resin layer, the other side of which is provided with bumps. The present invention is advantageous in that the thickness of the multilayered printed circuit board is decreased, the production processes thereof is simplified, and the production efficiency is increased. | 10-08-2009 |
| 20090255721 | Circuit board assembly - A circuit board assembly includes: a circuit board having opposite first and second surfaces and formed with a first through-hole defined by a hole-defining wall that extends between and that terminates at the first and second surfaces and that cooperates with the first and second surfaces to define first and second turns, respectively, the circuit board further having an abutting wall that extends between and that terminates at the first and second surfaces and that cooperates with the second surface to define a third turn; and an electric wire having a fixed end that is soldered to the circuit board, extending through the first through-hole, and passing over the first, second and third turns of the circuit board so as to form an inflection region between the first and second turns. | 10-15-2009 |
| 20090266599 | Circuit board with high thermal conductivity and method for manufacturing the same - A circuit board having high thermal conductivity comprises a substrate, a plurality of thermal conductive insulating layers, a patterned electrical conductive layer, a plurality of through-holes and a soldering layer. The substrate has an upper surface and a lower surface; the thermal conductive insulating layers are respectively formed on the upper surface and the lower surface of the substrate. The patterned electrical conductive layer is disposed on the surfaces of the thermal conductive insulating layers. The plurality of through-holes are extended through the substrate and electrically connected to the patterned electrical conductive layer, and the soldering layer is partially formed on the patterned electric conductive layer. The present invention also discloses a method for manufacturing the circuit board as above-mentioned. | 10-29-2009 |
| 20090294165 | METHOD OF MANUFACTURING A PRINTED CIRCUIT BOARD - A method of manufacturing a printed circuit board (PCB) includes of disposing thermal transfer vias and electrical vias through the PCB. The method further includes filling holes of the vias with a solder mask. The thermal transfer vias are filled to about 70% of capacity while the electrical vias are completely filled. Once filled, surfaces of the PCB are coated with an organic solderability preservative. | 12-03-2009 |
| 20090314537 | CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE - A package substrate including an outermost interlayer resin insulating layer, a pad structure formed on the outermost interlayer resin insulating layer, a conductive connecting pin for establishing an electrical connection with another substrate, the conductive connecting pin being secured to the pad structure via a solder, and via holes formed through the outermost interlayer resin insulating layer and for electrically connecting the pad structure to one or more conductive circuits formed below the outermost interlayer resin insulating layer, the via holes being positioned directly below the pad structure. | 12-24-2009 |
| 20090321125 | Plastic Land Grid Array (PLGA) Module and Printed Wiring Board (PWB) With Enhanced Contact Metallurgy Construction - An enhanced contact metallurgy construction for plastic land grid array (PLGA) modules and printed wiring boards (PWBs). The PWB may, for example, have subcomposite laminate construction and/or a double-sided LGA site. A plurality of preform contacts are each respectively soldered to one of a plurality of metal pads on a PLGA module carrier and/or a PWB. Each of the preform contacts comprises a metal preform base (e.g., copper, nickel) soldered to one of the plurality of metal pads and an electrolytic noble metal plating (e.g., gold) over the metal preform base. An electrolytic non-noble metal underplating (e.g., nickel) may be interposed between the metal preform base and the electrolytic noble metal plating. In one embodiment, the electrolytic non-noble metal underplating is 80-400 microinches thick to provide an enhanced diffusion barrier, and the electrolytic noble metal plating is 30-60 microinches thick and incorporates one or more hardening agents to provide enhanced wear and corrosion resistance. | 12-31-2009 |
| 20100018763 | PRINTED CIRCUIT BOARD BALL GRID ARRAY SYSTEM HAVING IMPROVED MECHANICAL STRENGTH - A printed circuit board (PCB) ball grid array (BGA) system is provided. In one embodiment, the PCB BGA system includes a PCB, a PCB BGA pad formed on the PCB, a plated through-hole via disposed at least partially through the PCB proximate the PCB BGA pad, and a soldermask disposed over the PCB. The soldermask includes: (i) a BGA pad opening through which the PCB BGA pad is exposed, and (ii) a via opening through which a central portion of the plated through-hole via is exposed. The via opening has an inner diameter that is less than the outer diameter of the plated through-hole via. | 01-28-2010 |
| 20100065323 | PRINTED WIRING BOARD - A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 μm or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved. | 03-18-2010 |
| 20100101852 | MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE - The present invention provides a multilayer printed wiring board having a filled viahole structure advantageously usable for forming a fine circuit pattern thereon, and having an excellent resistance against cracking under a thermal shock or due to heat cycle. The multilayer printed wiring board is comprised of conductor circuitry layers and interlaminar insulative resin layers deposited alternately one on another, the interlaminar insulative resin layers each having formed through them holes each filled with a plating layer to form a viahole. The surface of the plating layer exposed out of the hole for the viahole is formed substantially flat and lies at a substantially same level as the surface of the conductor circuit disposed in the interlaminar insulative resin layer. The thickness of the conductor circuitry layer is less than a half of the viahole diameter and less than 25 μm. The inner wall of the hole formed in the interlaminar insulative resin layer is roughened and an electroless plating layer is deposited on the roughened surface. An electroplating layer is filled in the hole including the electroless plating layer to form the viahole. The interlaminar insulative resin layer is formed from a composite of a fluororesin showing a high fracture toughness and a heat-resistant thermoplastic resin, a composite of fluororesin and thermosetting resin or a composite of thermosetting and thermoplastic resins. | 04-29-2010 |
| 20100139968 | MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A method for manufacturing a multilayer printed wiring board includes preparing a first resin insulative material having a first conductive circuit on or in the first resin insulative material, forming a second resin insulative material on the first resin insulative material and the first conductive circuit, forming on a surface of the second resin insulative material a first concave portion to be filled with a conductive material for formation of a second conductive circuit, forming on the surface of the second resin insulative material a pattern having a second concave portion and post portions to be filled with the conductive material for formation of a plane conductor, and filling the conductive material in the first concave portion and the second concave portion such that the second conductive circuit and the plane conductor are formed. | 06-10-2010 |
| 20100155129 | PRINTED WIRING BOARD - A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening about 0.55 to about 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of about 200 μm or less. | 06-24-2010 |
| 20100187003 | CIRCUIT BOARD STRUCTURE AND FABRICATION METHOD THEREOF - Provided are a circuit board structure and a fabrication method thereof, including the steps of: forming a first circuit layer in a first dielectric layer and exposing the first circuit layer therefrom; forming a second dielectric layer on the first dielectric layer and the first circuit layer, and forming a second circuit layer on the second dielectric layer; forming a plurality of first conductive vias in the second dielectric layer for electrically connecting to the first circuit layer to thereby dispense with a core board and electroplated holes and thus facilitate miniaturization. Further, the first dielectric layer is liquid before being hardened and is formed on the first dielectric layer that enhances the bonding between layers of the circuit board and the structure. | 07-29-2010 |
| 20100218986 | METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD - A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the resists, and forming a wiring having a pad and a conductive circuit thinner than the pad by removing the metal film exposed through the removing of the plating resist, a solder-resist layer on the surface of the board and wiring, in the layer an opening exposing the pad and a portion of the circuit contiguous to the pad, a solder film on the pad and portion of the circuit exposed through the opening, and a solder bump on the pad by solder reflow. | 09-02-2010 |
| 20100243309 | Connecting structure for circuit board and connecting method using the same - Disclosed is a connection structure for a circuit board using a solder bump to arrange circuit boards. The circuit board connection structure includes a solder bump prepared on one of two circuit boards and a perforated part formed at the other of the circuit boards to receive the solder bump. Facing both circuit boards towards each other and inserting the solder bump into the perforated part, the circuit boards are desirably arranged. | 09-30-2010 |
| 20110024180 | PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME - Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a bump pad formed in the insulating member so as to be connected to the circuit pattern and protruding from an outer surface of the insulating member, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost. | 02-03-2011 |
| 20110056741 | STACK STRUCTURE OF CIRCUIT BOARD - A stack structure of a circuit board includes a first substrate, a second substrate and a fixing element. The first substrate has a first component area, a plurality of supporting solder elements, and a plurality of signal solder elements, wherein the plurality of signal elements is disposed in the first component area. The first substrate stacks on the second substrate. The plurality of supporting solder elements is disposed between the first and the second substrates for providing a supporting force. The fixing element secures the first substrate and the second substrate, and the supporting solder elements are disposed around the fixing element. | 03-10-2011 |
| 20110088938 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed are a printed circuit board including a core substrate including core circuit layers on both sides thereof, a first build-up layer formed on one side of the core substrate, a second build-up layer formed on the other side of the core substrate, and first and second protective layers formed on the first and second build-up layers, respectively, wherein the first build-up layer includes a trench circuit layer as an outermost circuit layer formed by a trench-forming technology, and the trench circuit layer is embedded in the first protective layer, and a method of manufacturing the printed circuit board. Thanks to the formation of the outermost circuit layer by the trench-forming technology, it is difficult to separate the outermost circuit layer from the outermost insulating layer. | 04-21-2011 |
| 20110226519 | Electric Connection Structure And Method For Fabricating The Same - An electric connection structure and a method for fabricating the same are provided. The present invention provides a fixing thread fixed to a substrate and disposed on an upper surface of the substrate. The fixing thread is fixed to the substrate by shuttling between, binding, or penetrating through the upper surface and the bottom surface of the substrate. And then, a bare end of a signal line is fixed to the upper surface of the substrate by welding a solder thereby. When the solder is cooled down to solidify, the fixing thread generates a pull force applied on the solder pulling the solder toward the upper surface of the substrate. | 09-22-2011 |
| 20110247872 | DEBOND INTERCONNECT STRUCTURES - The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress. | 10-13-2011 |
| 20110297433 | SOLDER BUMP FORMATION ON A CIRCUIT BOARD USING A TRANSFER SHEET - A method of forming solder bumps on electrodes of a circuit board without producing bridging using a solder transfer sheet which does not require alignment includes superposing a circuit board and a solder transfer sheet having a solder layer adhered to at least one side of a supporting substrate, performing heating under pressure to a temperature lower than the solidus temperature of the solder to selectively perform solid phase diffusion bonding of the solder layer to electrodes, and peeling the transfer sheet from the circuit board. The solder layer is in the form of a continuous solder coating or in the form of a monoparticle layer of solder particles which are adhered to the supporting substrate by an adhesive layer. | 12-08-2011 |
| 20120103678 | WIRING CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - It is an object to form a conductive intermediate layer having a function of maximally preventing a solder leaching phenomenon with a low environment load and with good productivity. | 05-03-2012 |
| 20120168219 | ACTIVE RESIN COMPOSITION, SURFACE MOUNTING METHOD AND PRINTED WIRING BOARD - A surface mounting method includes applying an active resin composition to at least part of a surface of a printed wiring substrate; mounting a surface mount device on the substrate; performing reflow soldering; applying an under-filling resin into a space of interest; before and/or after applying the under-filling resin, performing a vacuum treatment and/or heating at a temperature lower than the curing reaction-initiating temperature of any of the applied active resin composition and the under-filling resin; and subsequently, thermally curing the resin composition and the under-filling resin. The active resin composition contains an epoxy resin in an amount of 100 parts by weight, a blocked carboxylic acid compound in an amount of 1-50 parts by weight and/or a carboxylic acid compound in an amount of 1-10 parts by weight, and a curing agent which can initiate curing reaction at 150° C. or higher, in an amount of 1-30 parts by weight. | 07-05-2012 |
| 20130014982 | WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board has a first wiring board having a first solder-resist layer, a second wiring board connected to the first wiring board and positioned in a first opening portion formed in the first solder-resist layer of the first wiring board, and a third wiring board connected to the first wiring board and positioned in a second opening portion formed in the first solder-resist layer of the first wiring board such that the second wiring board and the third wiring board are on the same side of the first wiring board. The first opening portion of the first wiring board and the second opening portion of the first wiring board form either a common opening portion accommodating the second and third wiring boards in the first solder-resist layer or separate opening portions separately accommodating the second wiring board and the third wiring board in the first solder-resist layer. | 01-17-2013 |
| 20130056254 | VIA STRUCTURE FOR TRANSMITTING DIFFERENTIAL SIGNALS - An electrical system including (1) a printed circuit board including first and second signal pads located on a top surface of the printed circuit board and arranged to transmit a first differential signal, first and second signal vias extending through the printed circuit board and arranged to transmit the first differential signal, a first signal trace located on the top surface of the printed circuit board and connecting the first signal pad and the first signal via, and a second signal trace located on the top surface of the printed circuit board and connecting the second signal pad and the second signal via; and (2) a connector including first and second signal contacts arranged to transmit the first differential signal. The first differential signal transmitted through the printed circuit board and the connector has a common central axis. | 03-07-2013 |
| 20130062111 | STACKED SUBSTRATE MODULE - A stacked substrate module includes a first and a second substrate. The first substrate has several pads which extend respectively from a stacked area of the first substrate to the outside of the stacked area. The second substrate has several welding areas arranged on the outer lateral side thereof; each welding area extends respectively from the outer lateral side of the second substrate to an upper and a lower surface of the second substrate. The second substrate is stacked in the stacked area of the first substrate, wherein the lateral side of the second substrate is aligned to the edge of the stacked area of the first substrate. The aforementioned pads correspond to the welding areas respectively. It is suitable to position a solder paste between the pads and the welding areas which can be reflowed to connect the pads and the welding areas. | 03-14-2013 |
| 20130112469 | MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD OF MULTILAYER PRINTED WIRING BOARD - This invention provides a multilayer printed wiring board in which electric connectivity and functionality are obtained by improving reliability and particularly, reliability to the drop test can be improved. No corrosion resistant layer is formed on a solder pad | 05-09-2013 |
| 20130153282 | PRINTED CIRCUIT BOARD - A printed circuit board including a board, a plating layer and a solder mask layer is provided. The board has a plated through hole for inserting a termination into the board. The plated through hole passes through a surface of the board. An annual ring around the plated through hole covers the surface of the board. The plating layer is formed in the plated through hole and electrically connected to the annual ring. The solder mask layer covers the surface of the board and a portion of the outer circle of the annual ring. The plated through hole and other portion of the outer circle of the annual ring are exposed in an opening of the solder mask layer. | 06-20-2013 |
| 20130180772 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - Embodiments provide a wiring board which is structured to be suitable for connection with components, whereby its reliability can be improved. An embodied wiring board of the invention has pads and a solder resist in which opening portions which expose the pads are formed. Protrusion-shaped members are fixed to some of the surfaces of the pads. The surfaces of the pads and the surfaces of the protrusion-shaped members are covered with solder bumps. The height of the solder bumps is larger than the height H | 07-18-2013 |
| 20130206468 | ELECTRICAL INTERCONNECT IC DEVICE SOCKET - A surface mount electrical interconnect is disclosed that provides an interface between a PCB and solder balls of a BGA device. The electrical interconnect includes a socket substrate and a plurality of electrically conductive contact members. The socket substrate has a first layer with a plurality of openings configured to receive solder balls of the BGA device and has a second layer with a plurality of slots defined therethrough that correspond to the plurality of openings. The contact members may be disposed in the openings in the first layer and through the plurality of slots of the second layer of the socket substrate. The contact members can be configured to engage a top portion, a center diameter, and a lower portion of the solder ball of the BGA device. Each contact member electrically couples a solder ball on the BGA device to the PCB. | 08-15-2013 |
| 20140166354 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a circuit board plate, a conductive ring, a solder mask and at least one insulating pad. The circuit board plate includes a surface and a conductive through hole passing through the surface and the circuit board plate, wherein the conductive through hole have a conductive layer disposed on a wall thereof. The conductive ring on the surface surrounds an opening of the conductive through hole on the surface and electrically connects to the conductive layer. The solder mask is disposed on the surface. The conductive ring is exposed outside of the solder mask. The insulating pad has a thickness. The first surface of the insulating pad is adapted to contact the solder mask or the surface and sited at periphery of the conductive ring. The second surface of the insulating pad is adapted for spacing a distance between a solder coating tool and the solder mask. | 06-19-2014 |
| 20140196940 | THROUGH MOLD VIA RELIEF GUTTER ON MOLDED LASER PACKAGE (MLP) PACKAGES - Improved Molded Laser Package (MLP) Packages which include a relief path for pressure and reduces the risk of shorting adjacent solder balls are provided. The MLP packages may include a gutter integrally connected to one or more through mold vias allowing a path to relieve pressure created when moisture gets entrapped in through mold vias, during the manufacturing process, while also reducing the risk of solder shorts between adjacent solder balls located in the through mold vias. Additionally, MLP packages which include gutters integrally connected to one or more through mold vias may enable tighter bump pitch and thinner packages. As a result, process margins and risks associated with surface mount technology (SMT) may be improved and provide more flexibility on inventory staging. | 07-17-2014 |
| 20140291006 | PRINTED CIRCUIT BOARD SOLDER MOUNTING METHOD AND SOLDER MOUNT STRUCTURE - A printed circuit board solder mounting method of solder-jointing a first-land formed on a first-printed-circuit-board and a second-land formed on a second-printed-circuit-board together, includes: filling a solder-filling-hole with cream solder, the solder-filling-hole provided so as to be open in a planar region of the first-land; arranging a solder-drawing-hole so that the solder-drawing-hole and the solder-filling-hole face each other, the solder-drawing-hole being formed so as to be open in a planar region of the second region, having a center position to be superposed on a center position of the solder-filling-hole, and having a solder wettability higher than a solder wettability of the solder-filling-hole; melting the cream solder in the solder-filling-hole by reflow heating and causing at least part of the cream solder to ascend to the solder-drawing-hole facing the solder-filling-hole; and jointing the first-land and the second-land together by solidifying the cream solder interposed between the first-land and the second-land. | 10-02-2014 |
| 20150014043 | PRINTED WIRING BOARD AND ELECTRIC TOOL SWITCH PROVIDED THEREWITH - A printed wiring board including a connection part that is connected to a projecting portion of an external member by soldering, the connection part including a first hole in which the projecting portion is inserted, a main land to which the projecting portion is soldered, a metallic pattern that is drawn from the main land, and a sub-land that is connected to the main land through the metallic pattern, wherein the main land is constructed with a metallic film configured to cover a peripheral region of the first hole in at least a front face of the printed wiring board including the front face and a back face, the front face to which the soldering is performed and the back face on a side opposite to the front face, and the metallic film is not formed on a sidewall forming the first hole, and where the sub-land is constructed with a metallic film configured to cover a sidewall formed by a second hole piercing the printed wiring board and a peripheral region of the second hole in both the front face and the back face of the printed wiring board. | 01-15-2015 |
| 20150060127 | COMBINED PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A combined printed wiring board includes a multilayer printed wiring board, and a wiring film fixed to a surface of the multilayer printed wiring board and including a first wiring structure formed to connect multiple semiconductor elements and a second wiring structure formed to connect the multilayer printed wiring board and each of the semiconductor elements. | 03-05-2015 |
| 20160056102 | DUAL SIDE SOLDER RESIST LAYERS FOR CORELESS PACKAGES AND PACKAGES WITH AN EMBEDDED INTERCONNECT BRIDGE AND THEIR METHODS OF FABRICATION - A coreless package substrate with dual side solder resist layers is disclosed. The coreless package substrate has a top side and a bottom side opposite of the top side and includes a single build-up structure formed of at least one insulating layer, at least one via, and at least one conductive layer. The coreless package substrate also includes a bottom plurality of contact pads on the bottom side, and a top plurality of contact pads on the top side. A bottom solder resist layer is on the bottom side, and a top solder resist layer is on the top side. The concept of dual side solder resist is extended to packages with interconnect bridge with C4 interconnection pitch over a wide range. | 02-25-2016 |
