Entries |
Document | Title | Date |
20080196934 | CIRCUIT BOARD PROCESS - A circuit board process is provided. First, multiple carriers is provided, and a first conductive layer having multiple concave structures is formed on each carrier. A dielectric layer is then provided, and the carriers with the first conductive layers are laminated on a first and a second surface of the dielectric layer respectively, wherein portions of the first conductive layers are embedded in the first and second surfaces. Next, the carriers are removed. Thereafter, the first conductive layer corresponding to at least one concave is removed to expose a portion of the dielectric layer. Next, the exposed dielectric layer is removed to form an opening. A second conductive layer is then formed on the inner wall of the opening, wherein the second conductive layer is electrically connected to the first conductive layers on both sides of the dielectric layer. | 08-21-2008 |
20080202803 | Wiring structure, forming method of the same and printed wiring board - There is disclosed a wiring structure or the like capable of sufficiently improving a connection property between a body to be wired and a wiring pattern (layer) connected to the body to be wired. In a semiconductor-embedded substrate | 08-28-2008 |
20080217050 | MULTI-LAYERED INTERCONNECT STRUCTURE USING LIQUID CRYSTALLINE POLYMER DIELECTRIC - A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures. | 09-11-2008 |
20080223611 | PRINTED WIRING BOARD AND ELECTRIC APPARATUS - A printed wiring board having a wiring layer formed by a wiring pattern for wiring an electronic circuit comprised of an electric part mounted thereon and including a connecting terminal, a first conductor layer formed by a first conductor pattern that is maintained at either a power potential or a ground potential when the electronic circuit is in operation, a second conductor layer formed by a second conductor pattern that is maintained at either the power potential or the ground potential when the electronic circuit is in operation; and a through hole having the connecting terminal of the electric part inserted therein and including, formed on an internal wall thereof, a conductor film that is directly connected to the first conductor pattern and not directly connected to the second conductor pattern. | 09-18-2008 |
20080230263 | Electroplating solution, method for manufacturing multilayer printed circuit board using the same solution, and multilayer printed circuit board - The objective of present invention is to provide an electroplating solution capable of forming the upper face of a via-hole and the upper face of a conductor circuit in the same layer in approximately the same plane at the time of manufacturing a multilayer printed circuit board. The electroplating solution of the present invention is characterized by containing 50 to 300 g/L of copper sulfate, 30 to 200 g/L of sulfuric acid, 25 to 90 mg/L of chlorine ion, and 1 to 1000 mg/L of an additive comprising at least a levelling agent and a brightener. | 09-25-2008 |
20080236880 | MOUNTING BOARD INCLUDING A FLAT-TYPE ELECTRICAL ELEMENT AND CAPABLE OF BEING REDUCED IN SIZE, AND LEAD-ATTACHED ELECTRIC ELEMENT THAT IS FLAT IN SHAPE AND HAS A LEAD BONDED TO EACH ELECTRODE FACE - A lead-attached electrical element and a mounting board to which the lead-attached electrical element is mounted both contribute to a reduction in the size of the mounting board as well as facilitate rework. The lead-attached electrical element is constituted from an electrical element and two leads. Each lead includes a main portion which is bonded to a respective electrode face of the electrical element, and a bent portion which is inclined with respect to the main portion. The mounting board is constituted from a PC (printed circuit) board and the lead-attached electrical element. Two conductive lands are provided on a surface of the PC board. The lead-attached electrical element has been inserted into an aperture in the PC board, and bent portions of the leads attached to the electrical element are bonded to the conductive lands so that the electrical element is suspended in the aperture by the leads. | 10-02-2008 |
20080245555 | CIRCUIT SUBSTRATE WITH PLATED THROUGH HOLE STRUCTURE AND METHOD - A circuit substrate includes an outer plated through hole structure and an inner plated through hole structure located within the outer plated through hole structure. In one example, the circuit substrate includes a core and an outer plated through hole structure having a first metal layer configured over the core to form an outer plated through hole. The circuit substrate also includes an inner plated through hole structure located within the outer plated through hole structure having a second metal layer positioned inside of the outer plated through hole with an insulation layer interposed between the first and second metal layers. Methods for making such a circuit substrate are also described. | 10-09-2008 |
20080245556 | OPTIMIZING THE PCB LAYOUT ESCAPE FROM AN ASIC USING HDI - Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB. | 10-09-2008 |
20080245557 | OPTIMIZING ASIC PINOUTS FOR HDI - Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB. | 10-09-2008 |
20080251287 | SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A substrate includes a storage portion which is defined by a base for mounting a light emitting element and a wall portion standing up on and from the base. A package is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion is connected to a cover to thereby seal a light emitting element. A seal structure is composed of an uneven portion formed on the lower surface side surface of the base, a close contact layer formed on the surface of the uneven portion, a power supply layer formed on the close contact layer, and an electrode layer formed on the surface of the power supply layer. The uneven portion includes a first recessed portion formed at a position spaced in the radial direction from the outer periphery of a through electrode or from the inner wall of a through hole, and a second recessed portion formed at a position spaced further outwardly from the first recessed portion. | 10-16-2008 |
20080251288 | MULTILAYER HIGH-FREQUENCY CIRCUIT BOARD - A multilayer high-frequency circuit board includes a signal line, ground layers, and an interlayer circuit. A signal line where a high-frequency signal flows is formed in the signal line layer. The ground layers are laminated on both sides of the signal line layer, each of which is grounded. The interlayer circuit is provided in the signal line layer and includes a ground connecting portion connected to the ground layers and a signal line connecting portion connected to the signal line. One of the signal line connecting portion and the ground connecting portion surrounds an outer periphery of the other of the signal line connecting portion and the ground connecting portion concentrically with the one being separated from the outer periphery of the other along the signal line layer. An inner periphery of the one and the outer periphery of the other have a similar shape excluding a complete circle. | 10-16-2008 |
20080264684 | Carrier member for transmitting circuits, coreless printed circuit board using the carrier member, and method of manufacturing the same - Disclosed herein is a carrier member for transmitting circuits, which is a component of a coreless printed circuit board having circuit patterns embedded therein, and which can be used to provide a high-density and highly reliable printed circuit board by forming protrusions only on the lower ends of the circuit patterns, a coreless printed circuit board using the carrier member, and methods of manufacturing the carrier member and the coreless printed circuit board. | 10-30-2008 |
20080264685 | Electromagnetic bandgap structure and printed circuit board - An electromagnetic bandgap structure and a printed circuit board that solve a mixed signal problem are disclosed. In accordance with embodiments of the present invention, the electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, stacked in the first metal layer; a second metal layer, stacked in the first dielectric layer, and having a holed formed at a position of the second dielectric layer; a second dielectric layer, stacked in the second metal layer; a metal plate, stacked in the second dielectric layer; a first via, penetrating the hole formed in the second metal layer and connecting the first metal layer and the metal plate; a third dielectric layer, stacked in the metal plate and the second dielectric layer; a third metal layer, stacked in the third dielectric layer; and a second via, connecting the second metal layer to the third metal layer. | 10-30-2008 |
20080277152 | Printed Circuit Board and Its Designing Method, and Designing Method of Ic Package Terminal and Its Connecting Method - The invention provides a printed circuit board capable of mounting BGA or other IC package of narrow terminal interval by using through-holes of conventional size. On one principal surface of printed circuit board ( | 11-13-2008 |
20080277153 | System and Method for Capacitive Coupled VIA Structures in Information Handling System Circuit Boards - Power supplied to an information handling system electronic component through a circuit board has component package inductance parasitic effects compensated by configuring connections to the electronic component to have increased parasitic capacitance. For instance, power and ground vias that connect a processor to power and ground planes of the circuit board are aligned to create a desired parasitic capacitance that reduces the impact of parasitic inductance relating to signal compensation, power delivery and high speed decoupling. The desired distributed capacitance is modeled by altering the radius associated with the equivalent line charge of the power via, the distance associated with the line charges between power and ground vias, and the via barrel length. | 11-13-2008 |
20080277154 | PROCESS FOR MAKING STUBLESS PRINTED CIRCUIT BOARDS - A process of copper plating a through-hole in a printed circuit board, and the printed circuit board made from such process. The process comprises: providing a printed circuit board with at least two copper interconnect lines separated by an insulator in the vertical direction; providing a through-hole in the printed circuit board in the vertical direction such that the interconnect lines provide a copper land in the through-hole; applying a seed layer to an interior surface of the through-hole; removing an outermost portion of the seed layer from the interior surface of the through-hole with a laser; applying copper on the seed layer. | 11-13-2008 |
20080283286 | PRINTED CIRCUIT BOARD - A printed circuit board includes a base insulating layer, first to third signal lines, a first cover insulating layer and a conductive layer. Wide parts are formed in the first to third signal lines. The first cover insulating layer is provided on the base insulating layer so as to cover the wide parts. The conductive layer is provided on the first cover insulating layer so as to cover a portion above the wide parts. | 11-20-2008 |
20080289869 | Novel via structure for improving signal integrity - The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration. | 11-27-2008 |
20080308313 | Split wave compensation for open stubs - In accordance with a first embodiment, the present invention provides a circuit substrate comprising a first surface; a second surface; a first via having a first end near said first surface and a second end near said second surface; a second via having a first end near said first surface and a second end near said second surface; a first conductive element electrically coupling said first end of said first via and said first end of said second via; a second conductive element electrically coupling said second end of said first via and said second end of said second via; an input signal line coupled to said first via; and an output signal line coupled to said second via. | 12-18-2008 |
20080314631 | Novel via structure for improving signal integrity - The embodiment of the invention is about a novel via structure which can be incorporated into printed circuit boards, integrated circuit packages, and integrated circuits in order to reduce crosstalk, to improve signal integrity and to achieve EM emission compliance. A 4-layer (2 signal layers and 2 power layers or 2 signal layers and 2 ground layers) circuit board assembly was used for demonstrating the effect of the novel via structure. The same concept can be applied to any multi-layer circuit board. Layers that have an electrical property can be added above, under, or within the basic 4-layer circuit board to achieve a multi-layer circuit board. For 2-layer and 3-layer circuit boards, a deformed version of the proposed via structure based upon the same concept will be needed for a coplanar waveguide configuration. | 12-25-2008 |
20090000813 | PACKAGING SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF - A packaging substrate structure includes a dielectric layer with a plurality of dielectric pillars disposed on a portion of a large-dimension opening area of the dielectric layer; and a first circuit layer with a plurality of first circuits disposed on a portion of the dielectric layer, and a conductive block disposed in the large-dimension opening area of the dielectric layer having the dielectric pillars. The dielectric pillars reduce the difference of the electrical current density distribution between the large-dimension opening area and small-dimension opening areas during electroplating, thereby overcoming the conventional drawback of insufficient thickness or a hollow center of the conductive block that results in an uneven thickness of the circuit layer. The invention further provides a method of manufacturing the packaging substrate structure. | 01-01-2009 |
20090008143 | Board having buried patterns and manufacturing method thereof - A board having buried patterns is disclosed. The board may include an insulation panel, a first pattern buried in one side of the insulation panel, a second pattern buried in the other side of the insulation panel with a predetermined insulating thickness between the first pattern and the second pattern, and a via which electrically connects the first pattern and the second pattern. The board having buried patterns according to certain embodiments of the invention can have greater rigidity compared to a board having exposed patterns, for the same insulating thickness. Also, a carrier-insulation set having a particular amount of thickness can be utilized to satisfy the thickness requirement in employing an existing roller apparatus intended for thicker boards. | 01-08-2009 |
20090008144 | SLANTED VIAS FOR ELECTRICAL CIRCUITS ON CIRCUIT BOARDS AND OTHER SUBSTRATES - Circuit boards, microelectronic devices, and other apparatuses having slanted vias are disclosed herein. In one embodiment, an apparatus for interconnecting electronic components includes a dielectric portion having a first surface and a second surface. A first terminal is disposed on the first surface of the dielectric portion for connection to a first electronic component. A second terminal is disposed on the second surface of the dielectric portion for connection to a second electronic component. The apparatus further includes a passage extending through the dielectric portion along a longitudinal axis oriented at an oblique angle relative to the first surface. The passage is at least partially filled with conductive material electrically connecting the first terminal to the second terminal. | 01-08-2009 |
20090014206 | PRINTED WIRING BOARD AND ELECTRONIC APPARATUS INCLUDING SAME - A printed wiring board, which may be included in an electronic apparatus, includes a pair of signal pads including a first signal pad and a second signal pad formed on a front side thereof and configured to transmit differential signals, a ground pad formed at a position in proximity to the pair of signal pads, and a via configured to connect the ground pad to a ground pattern formed either on a back side or on an inner layer of the printed wiring board directly or via a lead wire led out from the ground pad. The via is located at a substantially equal position spaced away from the first signal pad and the second signal pad. | 01-15-2009 |
20090020326 | WIRING BOARD AND METHOD OF MANUFACTURING WIRING BOARD - A wiring board and method of forming the wiring board. The wiring board includes a first substrate, and a second substrate having a smaller mounting area than a mounting area of the first substrate. A base substrate is laminated between the first substrate and the second substrate such that the first substrate extends beyond an edge of the second substrate, and at least one via formed in at least one of the first substrate or the second substrate. A thickness of a portion of the base substrate that is sandwiched between the first substrate and the second substrate is greater than a thickness of a portion of the base substrate that is not sandwiched between the first substrate and the second substrate. | 01-22-2009 |
20090038837 | Multilayered printed circuit board and manufacturing method thereof - A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board. | 02-12-2009 |
20090050358 | Electrical connector with elastomeric element - An electrical connector is provided. The electrical connector includes a substrate and an elastomeric element extending outwardly from the substrate. The elastomeric element extends outwardly from a base portion thereof at the substrate to an end portion thereof that is opposite the base portion. An electrical contact engages an electrically conductive element of the substrate. The electrical contact has a portion extending over at least a portion of the end portion of the elastomeric element. | 02-26-2009 |
20090050359 | Circuit board having electrically connecting structure and fabrication method thereof - A circuit board having an electrically connecting structure and a method for fabricating the same are provided. A circuit board body having inner-layer circuits is provided. A circuit layer is formed on at least an outermost surface of circuit board body, and including electrically connecting pads and circuits. The electrically connecting pads are partially electrically connected to the circuits, and are partially electrically connected to the inner-layer circuits via conductive vias. An insulating protective layer is disposed on the circuit board body and is formed with openings therein for exposing the electrically connecting pads. Conductive posts are formed on the electrically connecting pads. Standalone metal pads are formed on the insulating protective layer but are not used for electrical connection. The conductive posts and electrically connecting pads are absent from the insulating protective layer beneath the standalone metal pads, such that circuits can be formed under the insulating protective layer. | 02-26-2009 |
20090056998 | METHODS FOR MANUFACTURING A SEMI-BURIED VIA AND ARTICLES COMPRISING THE SAME - Disclosed herein is a method comprising drilling a first hole in a multilayered device; the multilayered device comprising a fill layer disposed between and in intimate contact with two layers of a first electrically conducting material; the fill layer being electrically insulating; plating the first hole with a slurry; the slurry comprising a magnetic material, an electrically conducting material, or a combination comprising at least one of the foregoing materials; filling the first hole with a fill material; the fill material being electrically insulating; laminating a first layer and a second layer on opposing faces of the multilayered device to form a laminate; the opposing faces being the faces through which the first hole is drilled; the first layer and the second layer each comprising a second electrically conducting material; drilling a second hole through the laminate; the second hole having a circumference that is encompassed by a circumference of the first hole; and plating the surface of the second hole with a third electrically conducting material. | 03-05-2009 |
20090056999 | PRINTED WIRING BOARD - A printed wiring board suppresses characteristic impedance mismatch that occurs when the printed wiring board is equipped with a through-type coaxial connector, and includes ground layers stacked in a plurality of layers via insulating layers; a through-hole; a clearance serving as an anti-pad provided in an area between the through-hole and the ground layers; and signal wiring extending from the through-hole to between prescribed ones of the ground layers through the clearance. The prescribed ones of the ground layers have a wiring-impedance adjustment area for adjusting the impedance of the signal wiring, the wiring-impedance adjustment area being arranged so as to overlap a portion of the signal wiring in the clearance. | 03-05-2009 |
20090057000 | Connecting element - Connecting element for mounting on a printed circuit board, which connecting element has at least two connecting lines which cross one another and are not electrically connected between respectively associated contacts. | 03-05-2009 |
20090071705 | Printed circuit board having embedded components and method for manufacturing thereof - A PCB (printed circuit board) having embedded components and a method for manufacturing thereof are disclosed. The PCB may include a dielectric substrate having a cavity formed in one side, a first component inserted in the cavity such that an electrode of the first component faces the one side of the dielectric substrate, a second component mounted on one side of the first component such that an electrode of the second component faces the same direction as the electrode of the first component, a first dielectric layer formed on one side of the dielectric substrate such that the first dielectric layer covers the second component, and a second dielectric layer formed on the other side of the dielectric substrate such that the second dielectric layer covers the first component. In this PCB, multiple components of differing thickness can be mounted, and vias can be formed more easily. | 03-19-2009 |
20090071706 | METHOD FOR PRODUCING MULTILAYERED WIRING SUBSTRATE, MULTILAYERED WIRING SUBSTRATE, AND ELECTRONIC APPARATUS - A method for producing a multilayered wiring substrate includes forming a lyophobic area on a first conductive layer, forming an insulating layer with an opening portion on the first conductive layer by applying a functional liquid containing an insulating layer forming material on a periphery of the lyophobic area, laminating the first conductive layer and a second conductive layer via the insulating layer, and electrically connecting the first and the second conductive layers to each other via the opening portion formed in the insulating layer. In the method, when forming the insulating layer, the functional liquid is applied such that an angle of a portion of the functional liquid in contact with the lyophobic area becomes larger than a forward contact angle of the functional liquid, thereby allowing a position of the portion of the functional liquid in contact with the lyophobic area to move inside the lyophobic area to form the opening portion having an opening size smaller than a size of the lyophobic area. | 03-19-2009 |
20090078457 | ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING SAME - A three-dimensional coil pattern, whose internal electrode is connected to external electrodes through a via, is formed within photosensitive resin colored by colorant. This structure allows this electronic component to be lower profile. Cured and colored resin that works as a protecting section of the coil pattern prevents irregular reflection on the internal electrode or the via due to illuminating the component when the component is mounted, so that the component can be handled with more ease. | 03-26-2009 |
20090078458 | PASTE COMPOSITION, INSULATING FILM, MULTILAYER INTERCONNECTION STRUCTURE, PRINTED-CIRCUIT BOARD, IMAGE DISPLAY DEVICE, AND MANUFACTURING METHOD OF PASTE COMPOSITION - A disclosed paste composition includes a filler and a resin. The filler includes insulating filling material particles made of at least one of silica and titania, and insulating particles made of at least one of silica and titania whose surfaces have been hydrophobic treated, or insulating particles having at least their surfaces made of a material other than silica or titania. The volume of the insulating filling material particles is more than or equal to 20% of the total volume of the filler and less than or equal to 80% of the total volume of the filler. | 03-26-2009 |
20090101402 | CIRCUIT BOARD, AND ELECTRONIC DEVICE - A circuit board having a plurality of wiring layers is provided that includes interlayer signal wires that provide an electrical connection between circuit patterns disposed on different wiring layers and ground planes formed in a manner to surround the interlayer signal wire on at least a part of the wiring layers that are penetrated through by the interlayer signal wires. It is desirable that an inner circumference of the ground planes on the wiring layers is a circle centered around the interlayer signal wires. It is further desirable that distances between the ground plane and the interlayer signal wire on each wiring layer on which the ground planes are formed are approximately equal. | 04-23-2009 |
20090107716 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a differential pair having a first differential trace and a second differential trace, a first via having an upper cap and a lower cap, and a second via having an upper cap and a lower cap. The first differential trace includes a first segment and a second segment, the second differential trace includes a third segment and a fourth segment. The first and the third segments are electrically coupled to the upper caps of the first and the second vias respectively. The second and the fourth segments are electrically coupled to the lower caps of the first and the second vias respectively. The first and the third segments extend from corresponding upper caps in different directions, the second and the fourth segments extend from corresponding lower caps in different directions. | 04-30-2009 |
20090107717 | ELECTRICALLY CONDUCTIVE STRUCTURE OF CIRCUIT BOARD AND CIRCUIT BOARD USING THE SAME - An electrically conductive structure includes a first conductive structure and a second conductive structure. Each has a conducting section at one end and a coupling section at the other end. The first and second conducting sections are electrically connected to a power and ground contact of an electronic device, respectively. The first and second coupling sections are respectively connected with power and ground layer of a circuit board. The first coupling sections are connected with the first conducting section through first extending sections and the second coupling sections are connected with the second conducting section through second extending sections. At least two coupling sections of the conductive structures are arranged in pairs. The first conductive structure and the second conductive structure are arranged in a staggered array to form two wiring loops having opposite current directions, thereby generating a magnetic flux cancellation effect. | 04-30-2009 |
20090120677 | WIRING SUBSTRATE AND ASSOCIATED MANUFACTURING METHOD - A wiring substrate for mounting electronic parts and a method for manufacturing the same are provided. The wiring substrate includes a substrate that includes a first surface, a second surface and a plurality of through-holes that extend through the substrate from the first surface to the second surface so as to define a plurality of inner walls respectively. The wiring substrate further includes an external conductor that is formed on at least one of the first surface or the second surface of the substrate. A through-hole conductor is formed on one of the plurality of inner walls so as to define a through-hole conductor space and so as to be electrically connected to the external conductor. Also included is a conductive post with first and second post ends, the first post end being positioned in the through-hole conductor space such that the first post end is in contact with and is electrically connected to the through-hole conductor, and the second post end projects out of the conductor space. | 05-14-2009 |
20090120678 | Printed Circuit Board Interconnecting Structure With Compliant Cantilever Interposers - An interconnecting structure for interconnecting two electronic modules. The structure includes a dielectric substrate having a copper trace deposited on the lower surface thereof, and a copper pad disposed on the upper surface of the substrate directly above one end of the trace. A first copper plate-up area deposited on the pad, and a second copper plate-up area is deposited on the distal end of the trace. A slot, semi-circumscribing the pad and extending on both sides of the trace toward the distal end of the trace, is cut through the substrate to allow the proximal end of the trace to be displaced in a cantilevered manner below the lower side of the substrate when a force is applied to the pad. | 05-14-2009 |
20090120679 | CONDUCTIVE THROUGH VIA STRUCTURE AND PROCESS FOR ELECTRONIC DEVICE CARRIERS - Conductive through vias are formed in electronic devices and electronic device carrier, such as, a silicon chip carrier. An annulus cavity is etched into the silicon carrier from the top side of the carrier and the cavity is filled with insulating material to form an isolation collar around a silicon core region. An insulating layer with at least one wiring level, having a portion in contact with the silicon core region, is formed on the top side of the carrier. Silicon is removed from the back side of the carrier sufficient to expose the distal portion of the isolation collar. The core region is etched out to expose the portion of the wiring level in contact with the silicon core region to form an empty via. The via is filled with conductive material in contact with the exposed portion of the wiring level to form a conductive through via to the wiring level. A solder bump formed, for example, from low melt C4 solder, is formed on the conductive via exposed on the carrier back side. The process acts to make the conductive via fill step independent of the via isolation step. | 05-14-2009 |
20090126981 | WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board | 05-21-2009 |
20090126982 | WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board | 05-21-2009 |
20090133918 | DOUBLE-SIDED WIRING BOARD, MANUFACTURING METHOD OF DOUBLE-SIDED WIRING BOARD, AND MOUNTING DOUBLE-SIDED WIRING BOARD - In one embodiment of the present invention, a connecting device of a double-sided wiring board includes a first-side connecting land portion configured by a first-side conductive layer and a first-side connecting conductive layer and a second-side connecting land portion configured by a second-side conductive layer; the first-side connecting land portion and the second-side connecting land portion face each other at respective central portions with an insulating substrate sandwiched therebetween; a substrate hole is formed corresponding to a peripheral end portion of the first-side connecting land portion and a peripheral end portion of the second-side connecting land portion; and the peripheral end portion of the first-side connecting land portion and the peripheral end portion of the second-side connecting land portion are connected to each other via the substrate hole. | 05-28-2009 |
20090139759 | LAMINATED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREFOR - A laminated ceramic electronic component includes a plurality of ceramic green sheets. In each of the ceramic green sheets, which are not backed with a carrier film, coil conductor patterns and lead-out electrodes are formed by a screen printing method and simultaneously a conductive paste is filled in holes for via holes to form via holes. The coil conductor patterns include first lands provided at one end of the coil conductor patterns so as to cover the via holes for connection between layers and second lands to be connected to the via holes provided at the other end of the conductive patterns. The second lands are larger in diameter than the first lands, such that the area of the second lands is about 1.10 to about 2.25 times as wide as the area of the first lands. | 06-04-2009 |
20090151996 | PRODUCT HAVING THROUGH-HOLE AND LASER PROCESSING METHOD - A processing method of forming a through-hole in a workpiece by means of a pulsed laser beam includes the steps of providing a removable sacrifice layer on the workpiece, forming a through-hole in the workpiece by the laser beam in a state where the sacrifice layer is provided, and removing the sacrifice layer from the workpiece after the step of forming the through-hole. | 06-18-2009 |
20090159325 | ANISOTROPICALLY CONDUCTIVE CONNECTOR AND ANISOTROPICALLY CONDUCTIVE CONNECTOR DEVICE - An anisotropically conductive connector and an anisotropically conductive connector device. The anisotropically conductive connector includes a supporting member, a plurality of through-holes each extending in a thickness-wise direction of the supporting member, and anisotropically conductive sheets respectively held in the through-holes of the supporting member. Each anisotropically conductive sheet includes a frame plate, a plurality of through-holes each extending in a thickness-wise direction of the frame plate, and a plurality of anisotropically conductive elements arranged in the respective through-holes of the frame plate. Each of the anisotropically conductive elements includes a conductive part, conductive particles contained in an elastic polymeric substance in a state oriented so as to align in a thickness-wise direction of the element, and an insulating part to cover the outer periphery of the conductive part and including an elastic polymeric substance. | 06-25-2009 |
20090166076 | Insulating material and printed circuit board having the same - An insulating material, a printed circuit board that utilizes the insulating material, and a method of manufacturing the printed circuit board. The method includes perforating at least one through-hole corresponding with the at least one, which is in correspondence with the via, in a first insulator; applying a surface treatment on the first insulator by irradiating an ion beam; forming a first seed layer over an inner wall of the through-hole and over one or either side of the first insulator; forming a first plating resist over one or either side of the first insulator on which the first seed layer is formed; performing electroplating in correspondence with the circuit pattern and the via; removing the first plating resist; and removing a portion of the first seed layer by flash etching. This method can improve adhesion between the insulator and the circuit patterns to allow fine-line circuit patterns. | 07-02-2009 |
20090166077 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board is provided. The wiring board includes: a core substrate; wiring layers formed on the core substrate; and a reinforcement conductor which penetrates through the core substrate and which is formed by flat-plate-shaped conductor portions that intersect each other in a plan view. The reinforcement conductor is formed by intersecting vertical crosspieces and horizontal crosspieces and assumes a lattice form in the plan view. | 07-02-2009 |
20090166078 | MULTI-LAYERED WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - In a multi-layered wiring substrate according to an exemplary aspect of the present invention, a conductor formed in an edge face area functions as a pad for mounting a connector. | 07-02-2009 |
20090166079 | MICROSTRUCTURE AND METHOD OF MANUFACTURING THE SAME - A microstructure that comprises an insulating base material having through micropores filled with metal at a high filling ratio and that can be used as an anisotropically conductive member is provided. The microstructure comprises an insulating base material having through micropores with a pore size of from 10 to 500 nm at a density of from 1×10 | 07-02-2009 |
20090173531 | Printed circuit board and manufacturing method thereof - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing the printed circuit board can include forming a first protective layer over one surface of a core substrate, forming a first circuit pattern over the other surface of the core substrate by a first process, removing the first protective layer, forming a second protective layer over the other surface of the core substrate, and forming a second circuit pattern over the one surface of the core substrate by a second process. | 07-09-2009 |
20090173532 | WIRING BOARD HAVING A NON-THROUGH HOLE WITH A VENT HOLE - A wiring board has a substrate having a first surface and a second surface opposite to the first surface, at least one wiring layer being formed between the first surface and the second surface. A non-through hole is formed in the substrate with a depth from the first surface to reach the wiring layer, an inner surface of the non-through hole being plated. A vent hole is formed in the substrate to extend between an end of the non-through hole and the second surface of the substrate. A plated portion of the non-through hole is connected to the wiring layer. An inner diameter of the vent hole is smaller than an inner diameter of the plated portion of the non-through hole. | 07-09-2009 |
20090183908 | Method for Manufacturing Conductive Contact Holder, and Conductive Contact Holder - A method for manufacturing a conductive contact holder includes forming, from an insulating material, a holder member for holding a plurality of conductive contacts; forming, from a conductive material, a substrate having a hollow portion to which the holder member can be fitted; and fixing the holder member formed from the insulating material by fitting the substrate into the hollow portion of the substrate formed from the conductive material. | 07-23-2009 |
20090183909 | Coreless substrate - A coreless substrate having a plurality of function pads, etched from a metal sheet and having a protruded shape; an insulating layer, the insulating layer being formed on one side of the function pads, a circuit corresponding to a pattern being formed on the insulating layer, a via hole being formed on the insulating layer to electrically connect the function pads and the circuit; and a solder resist, being formed on the insulating layer to protect the surface of the insulating layer. The coreless substrate has a signal delivery characteristic that is improved by eliminating the inner via hole. | 07-23-2009 |
20090188710 | SYSTEM AND METHOD FOR FORMING FILLED VIAS AND PLATED THROUGH HOLES - Methods and apparatus for creating a filled, backdrilled plated through hole in a printed circuit board are disclosed. According to one aspect of the present invention, a method includes defining a hole in a printed circuit board panel. The hole has a first surface, and includes at least a first portion and a second portion. The method also includes plating the first surface with a conductive material, to create a plated surface, and removing at least a first area of the plated surface. The first area of the plated surface is associated with the second portion, and removing the first area of the plated surface includes expanding a size of the hole associated with the second portion. Finally, the method includes filling the hole with a non-conductive material. | 07-30-2009 |
20090188711 | GROUND STRADDLING IN PTH PINFIELD FOR IMPROVED IMPEDANCE - High-speed communication links are improved by having differential pairs of traces in a connector pinfield on layers of a multilayer printed circuit board (PCB) to straddle respective rows of reference (ground) pins rather than the respective rows of signal vias. Thus, a desirable increase in the size of each an anti-pad to surrounding each signal via pad can be incorporated without forcing tracing of adjacent differential pairs closer to one another, and thus increased cross talk is avoided. Thereby, 50 ohm or close to 50 ohm impedance for each signal via is achieved. Spacing and routing between traces of each differential pair are advantageously adjusted for skew compensation and impedance optimization utilizing three dimensional computational electromagnetic tools. | 07-30-2009 |
20090205862 | Printed circuit board and manufacturing method thereof - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The printed circuit board can include a first insulation layer, a second insulation layer stacked over the first insulation layer, a circuit pattern and a via land buried in the second insulation layer, and a via made of a conductive material penetrating the first insulation layer and integrated with the via land. The circuit pattern and via land can be buried in the insulation material, and the circuit pattern, via land, and via can be formed simultaneously as an integrated structure. Thus, the electrical reliability between the wiring pattern and the via can be increased, the heat-releasing effect of the via can be improved, and the procedure for forming the circuit patterns, via lands, and vias can be simplified, allowing greater productivity in manufacturing the substrate. | 08-20-2009 |
20090211798 | PGA TYPE WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A PGA type wiring board includes a wiring board to which a head portion of a pin is joined to a pad portion with solder interposed therebetween, and a pin fixing plate having a through hole formed therein through which a shank portion of the pin is inserted, and having an adhesive layer formed on one surface thereof. The pin fixing plate is bonded to the wiring board with the adhesive layer interposed therebetween while the shank portion of the pin is inserted through the through hole. The through hole is shaped in a stepped form with a two-step configuration when viewed in cross section. | 08-27-2009 |
20090211799 | Printed wiring board and manufacturing method therefor - The present invention provides a printed wiring board which can prevent a plating failure in a connection hole such as a via to be formed in the printed wiring board, thereby can enhance the connection reliability and a manufacturing method therefor. The printed wiring board | 08-27-2009 |
20090218123 | MULTILAYER INTERCONNECTION BOARD - A multilayer interconnection board includes a plurality of laminated ceramic layers. Wiring electrodes are disposed on principal surfaces of the ceramic layers, and dot patterns are arranged around the wiring electrodes. The dot patterns are arranged such that the density distribution thereof is varied such that the ratio of the presence of the dot patterns in the vicinity of the wiring electrode is relatively large and the ratio of the presence is reduced as the distance from the wiring electrode increases. | 09-03-2009 |
20090229874 | MULTILAYER WIRING BOARD - A coreless wiring board has no core board but a laminated structure in which a conductor layer and resin insulating layers are alternately laminated into a multilayer. Each of the resin insulating layers is formed to contain a glass cloth in an epoxy resin. A plurality of via holes taking a shape of an inverse truncated cone and having steps on internal wall surfaces is formed to penetrate each of the resin insulating layers, and a filled via conductor for electrically connecting the conductors is formed in each of the via holes. | 09-17-2009 |
20090229875 | Printed circuit board having fine pattern and manufacturing method thereof - A printed circuit board having a fine pattern and related manufacturing method that includes providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate. | 09-17-2009 |
20090236137 | Method for Forming Resist Pattern, Method for Producing Circuit Board, and Circuit Board - There are provided a method for forming a resist pattern for preparing a circuit board having a landless or small-land-width through-hole(s) to realize a high-density circuit board, a method for producing a circuit board, and a circuit board. A method for forming a resist pattern, comprising the steps of forming a resin layer and a mask layer on a first surface of a substrate having a through-hole(s), and removing the resin layer on the through-hole(s) and on a periphery of the through-hole(s) on the first surface by supplying a resin layer removing solution from a second surface opposite to the first surface of the substrate, and a method for producing a circuit board using the method for forming a resist pattern, and a circuit board. | 09-24-2009 |
20090236138 | MULTILAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A coreless wiring board has no core board but a laminated structure in which a conductor layer and resin insulating layers are alternately laminated into a multilayer. Each of the resin insulating layers is formed to contain a glass cloth in an epoxy resin. A plurality of via holes is formed to penetrate each of the resin insulating layers, and a filled via conductor for electrically connecting the conductor layers is formed in the via holes respectively. A tip of the glass cloth contained in each of the resin insulating layers is protruded from an internal wall surface of the via hole and cuts into a sidewall of the filled via conductor. | 09-24-2009 |
20090242261 | PRINTED WIRING BOARD AND ASSOCIATED MANUFACTURING METHODOLOGY - A printed wiring board disperses stress throughout an inner conductor layer, ensuring the flatness of a substrate. Embedding wires into the outermost insulating layer and forming the wires in a tapered shape that widens downward reduces the amount of stress applied on the edge of the inner conductor layer. This also prevents cracks from forming within the insulating layer, while maintaining favorable yield rates. Via diameters may also be reduced to increase circuit density. | 10-01-2009 |
20090255720 | Ground-plane slotted type signal transmission circuit board - A ground-plane slotted type signal transmission circuit board is proposed, which is designed for use with a high-speed digital signal processing system for providing a low-loss signal transmission function. The proposed circuit board structure is characterized by the formation of a slotted structure (i.e., elongated cutaway portion) in the ground plane at the beneath of each signal line. Since the slotted structure is a void portion, the electric field of a gigahertz signal being transmitting through the overlaying signal line would be unable to induce electric currents in the void portion of the ground plane. This feature allows the prevention of a leakage current that would otherwise flow from the signal line to the ground plane, and therefore can help prevent unnecessary power loss of the transmitted signal. | 10-15-2009 |
20090260868 | Printed circuit board and method of manufacturing the same - The printed circuit board includes the via formed with the electroplating layer unlike a conventional via formed with an electroless plating layer and an electroplating layer and having a cylindrical shape, and thus exhibits good interlayer electrical connection and high reliability of physical contact upon thermal stress caused by the variance in physical properties of material depending on changes in temperature. The via has no upper land, and thus a fine circuit pattern of the circuit layer can be formed on the via. | 10-22-2009 |
20090272569 | Component Assembly - A component assembly includes an electric component with a body and a carrier substrate on which the component is fixed by means of a conductive adhesive layer. External electrical contacts that have a planar surface are arranged on the lower side of the body. The conductive adhesive acts upon the body in at least one contact region that is devoid of the external electrical contacts. | 11-05-2009 |
20090283315 | HIGH DENSITY PACKAGE SUBSTRATE AND METHOD FOR FABRICATING THE SAME - The invention provides a high density package substrate and a method for fabricating the same. A double-sided copper clad laminate containing an upper copper foil and a lower copper foil is provided. A bottom pad is disposed on the lower copper foil, aligned to a predetermined position of a through hole. The through hole is formed by laser drilling through the upper copper foil and the substrate, but not through the bottom pad. A seed layer is formed conformally lining the through hole, and a metal layer is formed on the seed layer by plating to form a plated through hole (PTH). | 11-19-2009 |
20090283316 | CIRCUIT BOARD VIAHOLES AND METHOD OF MANUFACTURING THE SAME - Provided are a circuit board with a viahole and a method of manufacturing the same. The circuit board includes: a substrate formed of an insulating material; a conductive layer disposed on the substrate; a plated layer comprising nickel and disposed on the conductive layer; and a viahole passing through the substrate, the conductive layer, and the plated layer, wherein a crystal growth direction of nickel in the plated layer is parallel to a thickness-wise direction of the substrate. | 11-19-2009 |
20090288871 | THIN FILM CIRCUIT BOARD DEVICE - A thin film circuit board device includes: a first thin film circuit board having a first protrusion provided with a first conductive contact; a second thin film circuit board having a second protrusion provided with a second conductive contact; and an insulator film disposed between the first and second thin film circuit boards. The first and second protrusions are disposed one above the other. The insulator film is free of a portion that extends between the first and second protrusions. The first and second protrusions are folded together in such a manner that the first and second conductive contacts are brought into contact with each other at the fold thereof. | 11-26-2009 |
20090288872 | Printed circuit board including outmost fine circuit pattern and method of manufacturing the same - Disclosed herein is a printed circuit board including an outmost fine circuit pattern. In the board, an end of a via, which has the minimum diameter, is connected to the outmost circuit layer of a substrate. The end surface, having the minimum diameter, is positioned at the outmost layer, so that the outmost circuit layer of the substrate, which needs to have a relatively high density in order to mount chips, compared to other circuit layers, can be more finely formed. | 11-26-2009 |
20090288873 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board is provided. The wiring board includes: a resin substrate having a through-hole therethrough; metal foil patterns formed on the resin substrate; and a first wiring layer formed on the metal foil patterns and on an inner surface of the through-hole, wherein the first wiring layer includes: a first power feeding layer; and a first plated layer laminated on the first power feeding layer; a resin member filled in the through-hole and between adjacent wiring patterns of the first wiring layer, wherein an end surface of the resin member is flush with a surface of the first wiring layer; and a second wiring layer formed on the surface of the first wiring layer and formed to cover an end surface of the through-hole, wherein the second wiring layer includes: a second power feeding layer; and a second plated layer laminated on the second power feeding layer. | 11-26-2009 |
20090294164 | Printed circuit board including landless via and method of manufacturing the same - Disclosed herein is a printed circuit board including a landless via and a method of manufacturing the printed circuit board. The printed circuit board includes a landless via having no upper land. The via includes a circuit pattern having a line width smaller than the minimum diameter of the via. The via does not have an upper land on an end surface thereof having the minimum diameter, and thus a circuit pattern connected to the via is finely formed, resulting in the high-density circuit pattern. Thus, a compact printed circuit board having a reduced number of layers is realized. | 12-03-2009 |
20100000777 | PRINTED CIRCUIT BOARD - A printed circuit board includes a first signal via, a second signal via, and a first ground via. A distance between the first ground via and the first signal via is substantially equal to a distance between the first ground via and the second signal via. | 01-07-2010 |
20100006334 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board including an insulative material, a first conductive circuit formed on the insulative material, a resin insulation layer including a first insulation layer formed on the insulative material and on the first conductive circuit and which insulates between lines of the first conductive circuit, the first insulation layer including inorganic particles having a first average diameter, and a second insulation layer formed on the first insulation layer and including a recessed portion and an opening portion, the second insulation layer including inorganic particles having a second average diameter smaller than the first average diameter, a second conductive circuit formed in the recessed portion, and a via conductor formed in the opening portion and which connects the first conductive circuit to the second conductive circuit. | 01-14-2010 |
20100006335 | MULTILAYER CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - In a multilayer ceramic substrate manufactured by a non-shrinking process, a bonding strength of an external conductive film formed on a primary surface of the multilayer ceramic substrate is increased. After a laminate of a multilayer ceramic substrate is formed from first ceramic layers and second shrinkage suppressing ceramic layers, and an underlayer is formed along one primary surface of the multilayer ceramic substrate, an external conductive film is formed on the underlayer. A non-sintering ceramic material powder in a non-sintered state is included in both the external conductive film and the underlayer, and this non-sintering ceramic material powder is fixed due to diffusion of a glass component from the first ceramic layers. | 01-14-2010 |
20100018762 | BUILDUP PRINTED CIRCUIT BOARD - A printed circuit board includes a first insulation layer that is formed of a resin material into which fiber cloth is embedded. A second insulation layer is formed of a resin material, and is stacked on a front surface of the first insulation layer on which a heating process has been performed. A conductive land is formed on a front surface of the second insulation layer. A via is provided in a through hole penetrating through the first insulation layer and the second insulation layer. The through hole is filled with a conductive material, and the via is connected to the conductive land. | 01-28-2010 |
20100025098 | WIRELESS COMMUNICATION DEVICE WITH IMPROVED SENSITIVITY OF ANTENNA THEREOF - A wireless communication device includes a circuit board, a metallic plate, and at least one conductive member. The circuit board includes a grounding point. The metallic plate is positioned on the circuit board. The at least one conductive member is sandwiched between the circuit board and the metallic plate, and is configured for electrically connecting the metallic plate to the grounding point of the circuit board. | 02-04-2010 |
20100032201 | Suspension board with circuit, producing method thereof, and positioning method of suspension board with circuit - A suspension board with circuit includes a metal supporting board, a conductive layer laminated on the metal supporting board, and a via layer interposed between the metal supporting board and the conductive layer. The conductive layer includes a conductive pattern, and a reference portion serving as a positioning reference for placing the suspension board with circuit on a load beam. | 02-11-2010 |
20100038124 | EMBEDDED STRUCTURE AND METHOD FOR MAKING THE SAME - An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface. | 02-18-2010 |
20100038125 | ADDITIONAL FUNCTIONALITY SINGLE LAMINATION STACKED VIA WITH PLATED THROUGH HOLES FOR MULTILAYER PRINTED CIRCUIT BOARDS - Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed therethrough; and a counter paste filled within the via. | 02-18-2010 |
20100044092 | METHOD AND APPARATUS FOR OPTICALLY TRANSPARENT VIA FILLING - A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit. | 02-25-2010 |
20100059264 | ELECTRONIC APPARATUS AND PRINTED WIRING BOARD - According to an aspect of the present invention, there is provided a printed wiring board including: a substrate including a pair of edges and a fixing hole adjacent to the pair of edges and configured to receive a bolt; a land provided in a vicinity of the fixing hole and extending in a direction from the fixing hole toward a center of the substrate and along the pair of edges; and an insulating height adjuster provided between the fixing hole and the pair of edges and configured to have substantially the same height as the land. | 03-11-2010 |
20100065322 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board includes a pad exposed from an opening portion of an outermost insulating layer. The pad includes: a first metal layer a surface of which is exposed from the wiring board; a second metal layer provided on the first metal layer and formed of a material effective in preventing a metal contained in a via inside the board from diffusing into the first metal layer; and a third metal layer provided between the second metal layer and the via, and formed of a material harder to be oxidized than that of the second metal layer. The thickness of the third metal layer is relatively thick, and is preferably selected to be three times or greater than a thickness of the second metal layer. A side surface of the third metal layer and a surface of the third metal layer to which the via is to be connected are roughed. | 03-18-2010 |
20100071951 | MULTILAYER WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER WIRING BOARD - The multilayer wiring board is provided with a lower layer wiring ( | 03-25-2010 |
20100078210 | Microelectronic device - A method of manufacturing a microelectronic device including imprinting a layer on a substrate with an imprinted pattern, the imprinted pattern defining a first anchor impression within the layer that includes a first base region positioned adjacent the layer and a first distal region positioned opposite the first base region, the first distal region defining a cross sectional area greater than a cross sectional area of the first base region, and the imprinted pattern defining a second anchor impression within the layer that includes a second base region positioned adjacent the layer and a second distal region positioned opposite the second base region, the second distal region defining a cross sectional area greater than a cross sectional area of the second base region and greater than a cross sectional area of the first distal region. | 04-01-2010 |
20100078211 | Memory module and topology of circuit board - Provided is a module having a symmetric topology. The module may include a pair of diverging via bodies configured to receive complementary signals. The pair of diverging via bodies may be further configured to diverge the complementary signals in at least three pairs of diverged complementary signals. The module may further include at least three pairs of connecting via bodies configured to receive the at least three pairs of diverged complementary signals from the pair of diverging via bodies and configured to transmit the at least three pairs of diverged complementary signals to components. | 04-01-2010 |
20100078212 | MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A method for manufacturing a multilayer printed wiring board suitable for forming fine conductive circuits. A multilayer printed wiring board is formed with a first insulative material and a first conductive circuit formed on the first insulative material. A second insulative material is formed on the first insulative material and the first conductive circuit, and has an opening portion that reaches the first conductive circuit. A second conductive circuit is formed on the second insulative material and a via conductor is formed in the opening portion and connecting the first conductive circuit and the second conductive circuit. An insulative thin film is formed on at least part of the side surface of the first conductive circuit, and the via conductor is directly connected to the surface of the first conductive circuit exposed through the opening portion. | 04-01-2010 |
20100084178 | BOND STRENGTH AND INTERCONNECTION IN A VIA - A via is provided on a printed circuit board with at least one additional depression encompassing the via, such that the via passes through a portion of the depression. Solder can pool in the depression, allowing for a stronger mechanical bond and eliminating many issues with respect to a lack of coplanarity between a lead and the printed circuit board. The depression can be provided with plugged and unplugged vias, and improves the mountings associated with both. | 04-08-2010 |
20100089631 | WIRING BOARD AND MANUFACTURING METHOD OF THE SAME - A wiring board, includes a substrate main body; a piercing electrode configured to pierce the substrate main body; a first wiring pattern provided at a first surface side of the substrate main body, the first wiring pattern having a pad, the pad being electrically connected to one end part of the piercing electrode, the pad being where an electronic component is mounted; and a second wiring pattern provided at a second surface side of the substrate main body, the second surface side being situated at a side opposite to the first surface side, the second wiring pattern having an outside connection pad, the outside connection pad being electrically connected to another end part of the piercing electrode. | 04-15-2010 |
20100089632 | PRINTED WIRING BOARD AND A METHOD OF PRODUCTION THEREOF - A printed wiring board has an insulating resin substrate having a first surface and a second surface, the insulating resin substrate having one or more penetrating-holes passing through the insulating resin substrate from the first surface to the second surface, a first conductor formed on the first surface of the insulating resin substrate, a second conductor formed on the second surface of the insulating resin substrate, and a through-hole conductor structure formed in the penetrating-hole of the insulating resin substrate and electrically connecting the first conductor and the second conductor. The penetrating-hole has a first portion having an opening on the first surface and a second portion having an opening on the second surface. The first portion and the second portion are connected such that the first portion and the second portion are set off from each other. | 04-15-2010 |
20100096176 | CONTACT STRUCTURE OF A WIRES AND METHOD MANUFACTURING THE SAME, AND THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE CONTACT STRUCTURE AND METHOD MANUFACTURING THE SAME - In a method of fabricating a thin film transistor array substrate for a liquid crystal display, a gate line assembly is formed on a substrate with a chrome-based under-layer and an aluminum alloy-based over-layer while proceeding in the horizontal direction. The gate line assembly has gate lines, and gate electrodes, and gate pads. A gate insulating layer is deposited onto the insulating substrate such that the gate insulating layer covers the gate line assembly. A semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer. A data line assembly is formed on the ohmic contact layer with a chrome-based under-layer and an aluminum alloy-based over-layer. The data line assembly has data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads. The sidewall of the under-layers for the gate line assembly and the data line assembly is exposed through the contact holes. An IZO-based layer is deposited onto the substrate, and patterned to thereby form pixel electrodes, subsidiary gate pads, and subsidiary data pads. The pixel electrodes are connected to the sidewall of the drain electrodes, and the subsidiary gate and data pads are connected to the sidewall of the gate and the data pads. | 04-22-2010 |
20100101851 | WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate, includes a first wiring layer, an insulating layer formed on the first wiring layer, a via conductor filled to penetrate the insulating layer in a thickness direction and connected to a connection portion of the first wiring layer, and a second wiring layer which is formed on the insulating layer and whose connection portion is connected to the via conductor, wherein, out of the first wiring layer and the second wiring layer, the connection portion of one wiring layer is formed as a land whose diameter is larger than a diameter of the via conductor, and the connection portion of other wiring layer is formed as a landless wiring portion whose diameter is equal to or smaller than a diameter of the via conductor. | 04-29-2010 |
20100116540 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - An end of a first line and an end of a second line of a first write wiring pattern are arranged on both sides of a third line of a second write wiring pattern. Circular connection portions are provided at the ends of the first line and the second line. In addition, through holes are formed in respective portions of a base insulating layer below the connection portions. Each connection portion comes in contact with a connecting region of a suspension body within the through hole. | 05-13-2010 |
20100126764 | DIE GROUND LEAD - In order to improve signal to noise ratio and reduce electromagnetic interference, it is presently contemplated to connect ground potential on an electronic package mounted to a printed circuit board directly to a commonly grounded surface of a device via an improved die ground lead with a first end connected to an electrical circuit within the electronic package, and a second end extending away from the electronic package and compressively contacting, rather than forming a bonded or soldered connection to, the commonly grounded surface. By way of example and not limitation, the improved die ground lead may be any one of a tie bar, a metal lead, a pogo pin, and a spring. The use of this configuration for the ground connection between the electrical circuit and the commonly grounded surface results in significantly less physical distance than conventional ground paths for electrical circuits within electronic packages. | 05-27-2010 |
20100126765 | MULTI-LAYER PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A method of manufacturing a multi-layer PCB having external contact pads formed on one side can include: forming an outermost insulation layer, in which openings are formed corresponding with the external contact pads; forming a mask, in which openings are formed corresponding with the external contact pad and with a circuit pattern, on the outermost insulation layer; forming the external contact pads and the circuit pattern in the openings of the outermost insulation layer and the openings of the mask; removing the mask; forming a build-up layer by stacking layers over the outermost insulation layer such that the external contact pads and the circuit pattern are covered; forming a first solder resist layer on the build-up layer; and forming a second solder resist layer on an opposite side of the outermost insulation layer; and forming openings in the second solder resist layer such that the external contact pads are exposed. | 05-27-2010 |
20100132996 | ELECTROMAGNETIC BANDGAP STRUCTURE AND PRINTED CIRCUIT BOARD - In accordance with an embodiment of the present invention, an electromagnetic bandgap structure includes a plurality of conductive plates, and a multi-via connection part, which electrically connects any two of the plurality of conductive plates with each other. Here, the multi-via connection part includes: a first multi-via, including a first via, having one end part connected to one of the two conductive plates, and at least one other via connected in serial to the first via through a conductive trace; a second multi-via, including a second via, having one end part connected to the other of the two conductive plates, and at least one other via connected in serial to the second via through a conductive trace; and a conductive connection pattern, connecting any one of the vias included in the first multi-via and any one of the vias included in the second multi-via with each other. | 06-03-2010 |
20100132997 | MULTILAYER WIRING SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A multilayer wiring substrate is manufactured through a recess forming step, a gold-diffusion-prevention-layer forming step, a terminal forming step, resin-insulating-layer forming step, a conductor forming step, and a metal-layer removing step. In the recess forming step, a copper foil layer is half-etched so as to form recesses. In the gold-diffusion-prevention-layer forming step, a gold diffusion prevention layer is formed in each recess. In the terminal forming step, a gold layer, a nickel layer, and a copper layer are stacked in sequence on the gold diffusion prevention layer to thereby form a surface connection terminal. In the resin-insulating-layer forming step, a resin insulating layer is formed, and, in the conductor forming step, via conductors and conductor layers are formed. In the metal-layer removing step, the copper foil layer and the gold diffusion prevention layer are removed so that the gold layer projects from the main face of the laminated structure. | 06-03-2010 |
20100139967 | WIRING BOARD AND FABRICATION METHOD THEREFOR - A wiring board includes an insulating board, wiring sub boards, and insulating layers having via holes in which conductors are formed by plating. The insulating board and the wiring sub boards are horizontally laid out. The insulating layers are laid out to respectively cover a first boundary portion between the insulating board and each of the wiring sub boards, and a second boundary portion between the wiring sub boards, and continuously extend from the insulating board to wiring sub boards. Resins which constitute the insulating layers are filled in the first boundary portion and the second boundary portion. The conductors are electrically connected to the wiring layers. | 06-10-2010 |
20100147575 | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing a printed circuit board can include: processing a first hole, which has a tapered shape, in one side of a substrate by using a laser drill; processing a second hole, which has a tapered shape and which connects with the first hole, in the other side of the substrate by using a laser drill in a position corresponding to that of the first hole; and forming a conductive portion, which electrically connects both sides of the substrate through the first hole and the second hole, by performing plating. This method may be used for providing reliable interlayer connections. | 06-17-2010 |
20100155128 | PRINTED ELECTRONIC CIRCUIT BOARDS AND OTHER ARTICLES HAVING PATTERNED COONDUCTIVE IMAGES - The present invention provides an article of manufacture using an electrophotographic printer to produce printed electronic circuits by printing a second conductive powder layer and a first thermoplastic layer in registration. The second conductive powder layer is permanently fixed to the first layer before removing conductive powder from portions of the substrate other than that coated with the thermoplastic patterned image. | 06-24-2010 |
20100163295 | COAXIAL PLATED THROUGH HOLES (PTH) FOR ROBUST ELECTRICAL PERFORMANCE - In some embodiments, coaxial plated through holes (PTH) for robust electrical performance are presented. In this regard, an apparatus is introduced comprising an integrated circuit device and a substrate coupled with the integrated circuit device, wherein the substrate includes: a plated through hole, the plated through hole filled with dielectric material and a coaxial copper wire, and conductive traces to separately route the plated through hole and the coaxial copper wire. Other embodiments are also disclosed and claimed. | 07-01-2010 |
20100163296 | STRUCTURE OF MULTIPLE COAXIAL LEADS WITHIN SINGLE VIA IN SUBSTRATE AND MANUFACTURING METHOD THEREOF - A plurality of coaxial leads is made within a single via in a circuit substrate to enhance the density of vertical interconnection so as to match the demand for higher density multi-layers circuit interconnection between top circuit layer and bottom circuit layer of the substrate. Coaxial leads provide electromagnetic interference shielding among the plurality of coaxial leads in a single via. | 07-01-2010 |
20100181103 | LABEL ASSEMBLY AND CIRCUIT BOARD USING THE SAME - A label assembly includes a support and a label body. The label body is configured to allow a label to be attached thereto. The support includes an upright post, and a fixing portion formed at a distal end of the post opposite to the label body. The fixing portion is configured to removably attach the label assembly to a circuit board. A circuit board supporting the label assembly is further provided. | 07-22-2010 |
20100200287 | PRINTED WIRING BOARD, AND DESIGN METHOD FOR PRINTED WIRING BOARD - A multi-layer printed wiring board includes a first insulating layer, a second insulating layer having a dissipation factor higher than a dissipation factor of the first insulating layer, a first conductive layer, and a first via connected to a lead wire in the first conductive layer. The first via includes a stub extending through the second insulating layer. | 08-12-2010 |
20100206626 | PRINTED CIRCUIT BOARD UNIT - A printed circuit board unit includes a substrate and at least one connecting pad on the substrate. The connecting pad is used for electrically connecting to an electronic device by welding method. The connecting pad has at least one venting opening thereon. Therefore, the steam and gas by-produced in reflow soldering process can escape into the environment from the venting opening. Accordingly, the problem of large bubbles formed in the connecting pads is solved. | 08-19-2010 |
20100212949 | Interconnect structure - A interconnect structure includes a substrate, a pair of interconnect pads, a pair of transmission lines. The substrate is stacked with at least one layer, and each of the layers has a first surface plane and a second surface plane. The pair of interconnect pads are formed on a first surface plane of a first layer of the substrate. The pair of transmission lines are formed on the first surface plane of the first layer, and the pair of transmission lines have a Y-type close trace portion for connection to the pair of interconnect pads. Further, the first surface plane of the layer is formed with a via hole which is formed within a groin region defined by the Y-type close trace portion and extends to a second surface plane of the first layer, wherein the second surface of the first layer is a power plane or a ground plane. | 08-26-2010 |
20100212950 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board includes a first substrate portion including a first feed-through conductor portion in a vertical direction, a second substrate portion provided on the first substrate portion and including a second feed-through conductor portion in a vertical direction of a corresponding part to the first feed-through conductor portion, and a feed-through electrode including the first feed-through conductor portion and the second feed-through conductor portion. | 08-26-2010 |
20100236823 | RING OF POWER VIA - Systems and methods for providing plated through-holes (PTH) in PCBs, which advantageously allow improved soldering capabilities, are described herein. Such systems and methods are achieved by reducing the heat sinking effects of PTHs by providing one or more vias surrounding the PTHs to provide an electrical connection between the PTH and the internal and bottom conductive layers of a PCB. In this regard, the PTHs are spaced apart from at least one of the internal conductive layers (e.g., ground or power layers), so the heat sinking effects are reduced. This feature enables molten solder to substantially fill the entire PTH before freezing, thereby improving the mechanical and electrical connection between an electrical component and the PCB. | 09-23-2010 |
20100252318 | MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board including insulating layers, conductor layers stacked alternately over the insulating layers, respectively, and viaholes formed in the insulation layers and electrically connecting the conductor layers through the insulation layers. The viaholes include a first group of viaholes and a second group of viaholes. The viaholes in the first group are tapered toward the viaholes in the second group, and the viaholes in the second group are tapered toward the viaholes in the first group. The viaholes in the first group and the the viaholes in the second group are formed in the insulating layers, respectively, and the viaholes are formed by plating openings formed after lamination of respective ones of the insulating layers, and each of the insulating layers is about 100 μm or less in thickness. | 10-07-2010 |
20100270066 | PRINTED CIRCUIT BOARD DESIGN SYSTEM AND METHOD - A printed circuit board (PCB) design system and method allows for PCB layouts that can be manufactured using a PCB manufacturing technology selected from multiple PCB manufacturing technologies with minimal or no modification to the PCB layout. Accordingly, a PCB layout of a PCB meets the requirements, or nearly meets the requirements, for multiple manufacturing technology design rules. In accordance with the exemplary embodiment, the PCB layout is designed to meet all design rules of a High Density Interconnect (HDI) manufacturing technology while minimizing requirements for layout changes when the PCB is manufactured using an Interstitial Via Hole (IVH) manufacturing technology. An IVH PCB includes a plurality of vias positioned within reserved via areas that form connections between at least some conductive elements on the board layers. The conductive elements and the plurality of vias form a layout such that a majority of reserved via areas, of all of the reserved via areas on the printed circuit board, are adequate to accommodate mechanically drilled vias manufactured in accordance with the HDI manufacturing technology. | 10-28-2010 |
20100276191 | METHOD OF PRODUCING WIRE-CONNECTION STRUCTURE, AND WIRE-CONNECTION STRUCTURE - For electrically connecting a wiring formed on one surface of an insulating substrate such as an FPC to an individual electrode arranged facing the other surface of the substrate, firstly, a through hole and a notch are formed by irradiating a laser beam from above onto the FPC. Next, the FPC is arranged to be positioned such that the individual electrode, the through hole and the notch are overlapped in a plan view. Next, an electroconductive liquid droplet having a diameter greater than a width of the notch is jetted, toward an area formed with the notch, from the one surface side of the FPC. The landed electroconductive liquid droplet flows along the notch in a thickness direction of the substrate due to an action of a capillary force and reaches assuredly to the individual electrode, thereby electrically connecting the wiring and electrode arranged sandwiching the insulating substrate assuredly. | 11-04-2010 |
20100288550 | ELEMENT MOUNTING SUBSTRATE AND METHOD OF FABRICATING THE SAME, CIRCUIT DEVICE AND METHOD OF FABRICATING THE SAME, AND MOBILE APPLIANCE ( as amended - There has been such a problem that conventional element mounting substrates and circuit devices using such substrates are not easily thinned, as there is a wiring layer formed on each of the substrates and that a part of the wiring layer is protruded and used as a bump electrode. In an element mounting substrate of this invention and a circuit device using such substrate, a through hole is arranged on an insulating base material, and a wiring layer is protruded from the surface of the insulating base material through the through hole. The protruding section of the wiring layer is used as a bump electrode, and a semiconductor element is mounted on the insulating base material. With such structure, the element mounting substrate is thinned, and the circuit device using such substrate is also thinned. | 11-18-2010 |
20100319979 | PRINTED CIRCUIT BOARD AND METHOD FOR DRILLING HOLE THEREIN - A method for defining a stepped hole in a printed circuit board (PCB) by drilling layers of the PCB by different sized drill bits along a same axis. The stepped hole in the layers of the PCB are decreased in diameters sequentially. | 12-23-2010 |
20100326716 | Core via for chip package and interconnect - In integrated circuit packages, core vias are created to provide electrical connections between circuitry on one face of the core substrate material with circuitry on an opposing face of the core substrate material. Provided are methods for forming a via in a packaging substrate and packaging substrates having core vias formed in the core substrate material. Methods for forma a core via in a packaging substrate in which a first hole is created through the core substrate and filled with a low permittivity filler material. A second co-axially aligned hole is then created in the low permittivity filler material wherein the second hole is smaller in diameter than the first hole. The second hole is then filled with conducting material to provide a conducting via through the core substrate material. | 12-30-2010 |
20110000706 | MULTILAYER WIRING SUBSTRATE - A multilayer wiring substrate includes a center wiring layer arranged in a center of the substrate in a thickness direction, and wiring layers stacked on one side of the center wiring layer and the other side of the center wiring layer via an insulating layer. The wiring layers on one side of the center wiring layer and the wiring layers on the other side are provided in a same layer number. The insulating layers on one side of the center wiring layer and the insulating layers on the other side are provided in a same layer number. | 01-06-2011 |
20110011637 | MULTILAYER PRINTED CIRCUIT BOARD - A multilayer printed circuit board, including: a signal interconnection which transmits and receives an electrical signal between electronic components; a ground interconnection connected to a ground of a circuit; a power interconnection connected to a power layer to supply power to electronic components; at least one ground layer installed in an inner layer; at least one clearance which passes through the ground layer; and a ground via which connects the ground interconnection with the ground layer. The signal interconnection and the ground interconnection or the signal interconnection and the power interconnection are installed in a pair, and a pair of interconnection vias for interlayer connection are inserted through the clearance installed in the ground layer so that one of the pair of interconnection vias is connected to the ground layer by the ground interconnection. | 01-20-2011 |
20110024177 | METHOD FOR SOLDERING ELECTRONIC COMPONENTS OF CIRCUIT BOARD AND CIRCUIT BOARD STRUCTURE THEREOF - A method for soldering electronic components of a circuit board and a circuit board structure thereof are presented. The method includes providing a circuit board first; disposing at least one solder hole and at least one heat collecting hole on the circuit board, in which the heat collecting hole is disposed around the solder hole to form a heat collecting area; extending a pin of an electronic component into the solder hole; filling a solder within the solder hole through a soldering process; and keeping heat of the solder in the heat collecting area by the heat collecting hole. Thus, the pin of the electronic component within the solder hole is successfully combined with the solder. | 02-03-2011 |
20110024178 | SUBSTRATE OF A WIRING BOARD AND A DRILLING METHOD THEREOF - A substrate of a wiring board is provided with at least one through-hole and includes an upper conductive layer, a lower conductive layer and an insulation layer. The lower conductive layer is opposite to the upper layer and the insulation layer is configured between the upper conductive layer and the lower conductive layer. The through-hole is formed by penetrating the upper conductive layer, the insulation layer and the lower conductive layer and is provided with a wall at the insulation layer, with a surface roughness of the wall being within 10 microns. | 02-03-2011 |
20110024179 | METHOD FOR PRODUCING CIRCUIT BOARD AND CIRCUIT BOARD - A method for producing a circuit board, the method includes the steps of: forming a lower wiring pattern on a substrate; forming an insulating film on the substrate to cover the lower wiring pattern; forming an opening in the insulating film to expose the lower wiring pattern; forming an upper wiring pattern on the insulating film; and forming an interconnect material pattern on a sidewall of the opening in the insulating film for connecting the lower wiring pattern and the upper wiring pattern. | 02-03-2011 |
20110042130 | Multilayered wiring substrate and manufacturing method thereof - A multilayered wiring substrate and a manufacturing method thereof are disclosed. The multilayered wiring substrate includes: a stacked body including an insulating member and first and second metal cores stacked with the insulating member interposed therebetween, and having a through hole penetrating the first and second metal cores; first and second insulation layers formed on an external surface, excluding an inner wall of the through hole, of the first and second metal cores, respectively; first and second inner layer circuit patterns and first and second outer layer circuit patterns formed on the first and second insulation layers, respectively; first and second via electrodes electrically connecting the first and second inner layer circuit patterns and the first and second outer layer circuit patterns; a third insulation layer formed on the inner wall of the through hole; and a through electrode made of a conductive material filled in the through hole and electrically connecting the first and second outer layer circuit patterns. | 02-24-2011 |
20110048787 | PHOTO-PATTERNABLE DIELECTRIC MATERIALS AND FORMULATIONS AND METHODS OF USE - Silsesquioxane polymers, silsesquioxane polymers in negative tone photo-patternable dielectric formulations, methods of forming structures using negative tone photo-patternable dielectric formulations containing silsesquioxane polymers, and structures made from silsesquioxane polymers. | 03-03-2011 |
20110048788 | Method for forming a via in a substrate and substrate with a via - The present invention relates to a method for forming a via in a substrate and a substrate with a via. The method includes the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a groove that has a side wall and a bottom wall on the first surface of the substrate; (c) forming a conductive metal on the side wall and the bottom wall of the groove so as to form a central groove; (d) forming an annular groove that surrounds the conductive metal on the first surface of the substrate; (e) forming an insulating material in the central groove and the annular groove; and (f) removing part of the second surface of the substrate to expose the conductive metal and the insulating material. | 03-03-2011 |
20110048789 | ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - An electronic component is provided with a first conductor, an insulator for covering a surface of the first conductor, a via hole penetrating the insulator, and a second conductor located on a surface of the insulator and electrically connected to the first conductor through the via hole, and includes a shielding film having conductivity, being interposed between the first conductor and the second conductor, and covering an interface between the first conductor and the insulator in the via hole by extending continuously at least from the surface of the first conductor constituting a bottom surface of the via hole to an inner wall surface of the via hole. | 03-03-2011 |
20110056739 | SUBSTRATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate structure is provided. The method includes the following steps. A substrate is provided. The substrate has a patterned first metal layer, a pattern second metal layer and a through hole. After that, a first dielectric layer and a second dielectric layer are formed at a first surface and a second surface of the substrate, respectively. The second surface is opposite to the first surface. Then, the first dielectric layer and the second dielectric layer are patterned. After that, a first trace layer is formed at a surface of the patterned first dielectric layer. The first trace layer is embedded into the patterned first dielectric layer and is coplanar with the first dielectric layer. Then, a second trace layer is formed on a surface of the second dielectric layer. | 03-10-2011 |
20110056740 | THROUGH-HOLE ELECTRODE SUBSTRATE AND MANUFACTURING METHOD THEREOF - A through-hole electrode substrate includes a substrate including a plurality of through-holes, a plurality of through-hole electrodes arranged within each of the plurality of through-holes, and a first insulation layer arranged on one surface of the substrate, wherein the first insulation layer includes a plurality of first openings which expose each of the plurality of through-holes, the plurality of through-holes includes a leaning through-hole leaning from one surface to the other surface of the substrate, and each of the plurality of first openings is arranged to match an open position of the leaning through-hole. | 03-10-2011 |
20110079420 | Ceramic multilayer and method for manufacturing the same - The present invention provides a multi-layered ceramic substrate including a first insulating sheet having a first via contact; and a second insulating sheet joined to the first insulating sheet, wherein the second insulating sheet has a second via contact aligned with the first via contact up and down to be joined to the first via contact, wherein the first via contact has a form extended to the inside of the second via contact. | 04-07-2011 |
20110079421 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a printed circuit board, including: a base substrate; insulation layers which are formed on both sides of the base substrate and in which trenches are formed; and circuit layers including circuit patterns and vias formed in the trenches using a plating process. The printed circuit board is advantageous in that trenches are formed in both sides of a base substrate, so that a fine circuit pattern can be simultaneously formed on both sides thereof, thereby simplifying the manufacturing process thereof. | 04-07-2011 |
20110094786 | PRINTED CIRCUIT BOARD - A printed circuit board includes a number of signal layers, a number of ground layers, a first transmission line, a second transmission line, a first via, and a second via. The first transmission is located on one of the number of signal layers. The second transmission line is located on another of the number of signal layers. The first and second vias pass through the printed circuit board. The first via is electrically coupled to the first and second transmission lines, and is isolated from the number of ground layers. The second via is electrically coupled to one or more of the number of ground layers, and is isolated from the other of the number of ground layers to increase an inductance, thus compensating capacitive nature of an open stub and improving signal integrity. | 04-28-2011 |
20110094787 | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole passes through the printed circuit board. A number of thermal engravings are defined in the layer around the through hole. Each thermal engraving is a groove defined in the surface of the layer, without covered with the layer of copper. The number of thermal engravings are not in contact with each other. | 04-28-2011 |
20110100697 | INTERCONNECT STRUCTURE HAVING A VIA WITH A VIA GOUGING FEATURE AND DIELECTRIC LINER SIDEWALLS FOR BEOL INTEGRATION - An interconnect structure including a lower interconnect level with a first dielectric layer having a first conductive material embedded therein; a dielectric capping layer located on the first dielectric layer and some portions of the first conductive material; an upper interconnect level including a second dielectric layer having at least one via opening filled with a second conductive material and at least one overlying line opening filled with the second conductive material disposed therein, wherein the at least one via opening is in contact with the first conductive material in the lower interconnect level by a via gouging feature; a dielectric liner on sidewalls of the at least one via opening; and a first diffusion barrier layer on sidewalls and a bottom of both the at least one via opening and the at least one overlying line opening. A method of forming the interconnect structure is also provided. | 05-05-2011 |
20110108316 | AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION - A contact structure and assembly and a method for manufacturing the same for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact. | 05-12-2011 |
20110127080 | Electronic Assemblies without Solder and Methods for their Manufacture - The present invention provides an electronic assembly | 06-02-2011 |
20110132651 | CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A circuit board and a method of manufacturing the circuit board are provided. The method includes forming at least one protruded bump on a first side of a conductive board, forming a dielectric layer on the first side of the conductive board where the at least one bump is formed so as to cover the at least one bump; and etching a second side of the conductive board so as to partially remove the board to form a pattern. | 06-09-2011 |
20110147067 | METHOD AND APPARATUS FOR OPTICALLY TRANSPARENT VIA FILLING - A method and apparatus for filling a via with transparent material is presented, including the steps of providing a panel having a via, occluding the via with transparent material in a workable state so that a portion of the occluding material is internal to the via and a portion of the material is external to said via. The external and internal portions are separated so the transparent filler material, when set, forms a smooth and featureless surface. This causes the filled via to have a substantially even and uniform appearance over a wide range of viewing angles when lit. | 06-23-2011 |
20110168438 | INTERCONNECTION STRUCTURE AND METHOD THEREOF - The present invention discloses an interconnection structure which is formed by a method comprising providing a first conductive substrate, a second conductive substrate, and an insulating substrate; respectively forming a first circuit and a second circuit on the first conductive substrate and the second conductive substrate; forming a conductive bump on the second circuit; and connecting the insulating substrate with the first circuit and the second circuit by pressing the first conductive substrate, the insulating substrate and the second conductive substrate, wherein the conductive bump penetrates the insulating substrate to contact the first circuit. | 07-14-2011 |
20110174528 | METHOD OF FORMING CIRCUIT INTERCONNECTION, CIRCUIT BOARD, AND CIRCUIT INTERCONNECTION FILM HAVING FILM THICKNESS LARGER THAN WIDTH THEREOF - A method of forming a circuit interconnection on a circuit board includes: forming a trench that corresponds to a shape of the circuit interconnection on an interconnection base material that forms the circuit interconnection; distributing a catalyst for forming a conductive layer on the trench; and forming a conductive circuit interconnection film that forms the circuit interconnection by distributing a plating solution in a range that includes the trench and depositing a conductive material from the plating solution through the catalyst for forming the conductive layer. | 07-21-2011 |
20110180313 | METHOD OF FORMING CIRCUIT INTERCONNECTION, CIRCUIT BOARD, AND CIRCUIT INTERCONNECTION FILM HAVING FILM THICKNESS LARGER THAN WIDTH THEREOF - A method of forming a circuit interconnection on a circuit board includes: forming a trench that corresponds to a shape of the circuit interconnection on an interconnection base material that forms the circuit interconnection; performing a liquid repellent process of at least the base material surface of the interconnection base material and a side wall surface of the trench with respect to a liquid body that includes a catalyst for forming a conductive layer; distributing the liquid body that includes the catalyst for forming a conductive layer on the trench; and forming a conductive circuit interconnection film that forms the circuit interconnection by distributing a plating solution in a range that includes the trench and depositing a conductive material from the plating solution through the catalyst for forming the conductive layer. | 07-28-2011 |
20110247871 | MULTI-LAYER PRINTED CIRCUIT BOARD COMPRISING FILM AND METHOD FOR FABRICATING THE SAME - A multi-layer printed circuit board (PCB) and a method for fabricating the same are provided. The multi-layer printed circuit board may include a first film and a first insulation layer. The first film may include a first via therein and the first film may further include a first conductive pattern on an upper surface thereof and the first conductive layer may be electrically connected to the first via. The first insulation layer may be on the upper surface of the first film and the first insulation layer may include a second via therein and a second conductive pattern on an upper surface thereof and the second conductive pattern may be electrically connected to the second via. The second via may be electrically connected to the first conductive pattern. | 10-13-2011 |
20110253439 | CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. Two insulating layers are formed on the two metal layers. Two including upper and bottom conductive layers are formed on the two insulating layers. Then, the two insulating layers and the two conductive layers are laminated so that the two metal layers bonded to each other are embedded between the two insulating layers. A part of the two insulating layers and a part of the two conductive layers are removed to form a plurality of blind holes exposing the two metal layers. A conductive material is formed in the blind holes and on the remained two conductive layers. The sealed area of the two metal layers is separated to form two separated circuit substrates. | 10-20-2011 |
20110266044 | Thin Film Circuit Board Device - A thin film circuit board device includes a multi-layered circuit unit that includes an upper circuit layer, a lower circuit layer and an insulation layer. The upper circuit layer has at least one first contact part. The lower circuit layer is disposed below the upper circuit layer and has at least one second contact part. The insulation layer is disposed between the upper and lower circuit layers and has at least one through hole corresponding to the first and second contact parts. The pressurizing unit is attached to the multi-layered circuit unit so as to press the first and second contact parts against each other within the through hole to establish an electrical connection. | 11-03-2011 |
20110297432 | PRINTED CIRCUIT BOARD - A printed circuit board includes signal layers, ground layers, and a power layer, which are superposed. A closed trace is set along edges of each of the signal layers and the power layers. A number of vias are defined in each trace at intervals. Each via extends through the signal layers, the ground layers, and the power layer. Each via is electrically connected to the traces of the signal layers and the power layer, and electrically connected to the ground layers. | 12-08-2011 |
20110303452 | Electromagnetic bandgap structure and printed circuit board - An electromagnetic bandgap structure, including: a first metal layer; a first dielectric layer, stacked in the first metal layer; a metal plate, stacked in the first dielectric layer; a via, having one end part which is connected to the first metal layer; a second dielectric layer, stacked in the metal plate and the first dielectric layer; and a second metal layer, stacked in the second dielectric layer, whereas the other end part of the via is connected to a via land which is placed in a hole formed in the metal plate, and the via land is connected to the metal plate through a metal line. | 12-15-2011 |
20120006591 | Wiring Substrate and Method for Manufacturing Wiring Substrate - A wiring substrate that prevents the occurrence of delamination near an interface between an insulation layer and an electrode pad, which is formed in a recess of the insulation layer. An adjustment layer is formed in an opening in a resist, which is applied to a support body, to adjust the shape of the electrode pad. The adjustment layer includes a flat surface, which is substantially parallel to the support body, and an inclined surface, which extends from a rim of the flat surface toward the support body and to the side wall of the opening. A pad body of the electrode pad and an insulation layer including a wire is formed on the adjustment layer. The support body and adjustment layer are etched to expose the pad body. | 01-12-2012 |
20120012378 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided. | 01-19-2012 |
20120012379 | Printed circuit board - A printed circuit board including: an insulation layer; a first pattern buried in one surface of the insulation layer; a first resin layer laminated on one surface of the insulation layer to cover the first pattern; a second pattern buried in the other surface of the insulation layer; a via electrically connecting the first pattern with the second pattern; and a second resin layer laminated on the other surface of the insulation layer to cover the second pattern. | 01-19-2012 |
20120018208 | COUPLER APPARATUS - According to one embodiment, a coupler apparatus includes a coupling element and a ground plane. The coupling element comprises a conductive material and configured to be subjected to power feeding to a feeding point. The ground plane comprises a conductive material and faces the coupling element. The coupling element has one or more through holes along an alignment direction of the coupling element and the ground plane. | 01-26-2012 |
20120024585 | Electrical Connector, Electrical Connection System and Lithographic Apparatus - An electrical connector comprises a high voltage pad and a high voltage plate. When connected to another electrical connector, the two plates, which are at the same voltage as the pads, form a region of high voltage in which the field is low. The pads are positioned in that region. An electrostatic clamp of an EUV lithographic apparatus may have such a pad and plate, for connecting to the electrical connector. By placing the interconnection in a low field region, triple points (points of contact between a conductor, a solid insulator and a gas) may be present in that region. | 02-02-2012 |
20120031660 | METHOD OF MANUFACTURING CIRCUIT BOARD AND CIRCUIT BOARD - A circuit board having a plurality of first holes formed in a semiconductor substrate to extend therethrough; insulating layers formed on a back surface of the semiconductor substrate in the plurality of first holes, the insulating layers between the back surface and the first holes being differed in thickness; second holes formed in the insulating layers to communicate with the first holes; and an electro-conductive layer formed inside of the first holes and the second holes to extend through the semiconductor substrate | 02-09-2012 |
20120073870 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided. | 03-29-2012 |
20120073871 | MULTI-LAYERED SUBSTRATE - The present invention directs to double-sided multi-layered substrate a base, at least a through-hole passing through the base, patterned first and second metal layers formed on the two opposite surfaces of the base, and first and second plating layers. The first plating layer covers a sidewall of the through-hole and the bottom surface surrounding a bottom opening of the through hole. The second plating layer covers the first plating layer and the top surface surrounding a top opening of the through hole. | 03-29-2012 |
20120097442 | PRINTED CIRCUIT BOARD INCORPORATING FIBERS - A printed circuit board includes a cell portion which includes cells having a plurality of through bores are arranged in a base material; and a base material portion which exists around an outer edge of the cell portion. The base material is formed of a prepreg, the prepreg includes a fiber material in which fiber threads are oriented in a first direction and in a second direction which is perpendicular to the first direction, and a resin material in which the fiber material is impregnated. The through bores are arranged along a third direction between the first direction and the second direction, wherein one side of the outer edges of the cell extends along the third direction. | 04-26-2012 |
20120103677 | THROUGH WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF - A through wiring substrate includes a substrate including a first face and a second face, and a plurality of through-wires formed by filling, or forming a film of, an electrically-conductive substance in through-holes that penetrate between the first face and the second face. The through-wires are separated from each other, and, include at least one overlap section in a plan view of the substrate. | 05-03-2012 |
20120125677 | CROSSTALK REDUCTION BETWEEN SIGNAL LAYERS IN A MULTILAYERED PACKAGE BY VARIABLE-WIDTH MESH PLANE STRUCTURES - A first selection of mesh line segments of a mesh layer are of a first width and a second selection of mesh line segments of the mesh layer are of a second width, wherein the second width is greater than the first width. The second selection of mesh line segments of the second width are positioned in parallel to a selection of signal lines in a signal layer that are likely to introduce crosstalk, wherein the widening of the mesh line segments shadowing the selection of signal lines increases the likelihood that the return current associated with the signal will flow in the wider mesh line segment, thereby increasing the likelihood of containing the electromagnetic fields associated with the signal such that crosstalk to other signals is reduced or contained. | 05-24-2012 |
20120125678 | Electrical Connector - The electrical connector may include one or more contacts and a contact substrate. The contact may include a wadded wire element and a sleeve. The electrical connector may be used to connect a first electrical component to a second electrical component. The electrical components may be integrated circuit chip packages, printed circuit boards, wire contacts, headers, and wiring harnesses. The contact which includes the sleeve is able to provide more electrical power at a given temperature than the contact which includes the wadded wire element but not the sleeve. The sleeve may include an element retention feature. The element retention feature may help retain the wadded wire element within the sleeve. The sleeve may include a sleeve retention feature. The sleeve retention feature may help retain the sleeve within the contact substrate. | 05-24-2012 |
20120152605 | CIRCUITIZED SUBSTRATE WITH DIELECTRIC INTERPOSER ASSEMBLY AND METHOD - A circuitized substrate and method of making same in which quantities of thru-holes are formed within a dielectric interposer layer. The substrate includes two printed circuit board (PCB) layers bonded to opposing sides of the interposer with electrically conductive features of each PCB aligned with the interposer thru-holes. Resistive paste is positioned on the conductive features located adjacent the thru-holes to form controlled electrically resistive connections between conductive features of the two PCBs. A circuitized substrate assembly and method of making same are also disclosed. | 06-21-2012 |
20120152606 | PRINTED WIRING BOARD - A printed wiring board including an insulation layer, a conductive layer formed on the insulation layer and including a via conductor pad and a chip capacitor mounting pad, an outermost resin insulation layer formed on the insulation and conductive layers and having a via hole reaching the conductor pad and an opening exposing the mounting pad, an electrode having a via conductor portion in the hole and a land portion extending from the via conductor such that the electrode protrudes from the surface of the outermost layer, a solder bump for mounting an IC formed on the land portion such that the bump is at a portion of the electrode protruding from the surface of the outermost layer, and a solder structure for mounting a chip capacitor formed on the mounting pad such that the structure extends from the mounting pad and projects from the surface of the outermost layer. | 06-21-2012 |
20120160554 | MULTILAYER PRINTED CIRCUIT BOARD AND METHOD FOR MAKING SAME - An exemplary multilayer printed circuit board includes a first circuit substrate, a third circuit substrate, a second circuit substrate between the first and third circuit substrates, a first anisotropically conductive adhesive layer between the first and second circuit substrates, and a second anisotropically conductive adhesive layer between the second and third circuit substrates. The first circuit substrate includes a first conductive terminal and a first through hole. The second circuit substrate includes a second conductive terminal and two through holes (i.e. second and third through holes). The third circuit substrate includes a third conductive terminal and a fourth through hole. The first anisotropically conductive adhesive layer fills the first and third through holes to electrically connect the first and second conductive terminals. The second anisotropically conductive adhesive layer fills the second and fourth through holes to electrically connect the second and third conductive terminals. | 06-28-2012 |
20120160555 | METHOD FOR CONNECTING A PLURALITY OF ELEMENTS OF A CIRCUIT BOARD, CIRCUIT BOARD, AND USE OF SUCH A METHOD - The invention relates to a method for connecting a plurality of elements for a circuit board, comprising the following steps:
| 06-28-2012 |
20120168218 | ANISOTROPICALLY CONDUCTIVE MEMBER AND METHOD FOR PRODUCING THE SAME - Provided is an anisotropically conductive member that has a dramatically increased density of disposed conductive paths, can be used as an electrically connecting member or inspection connector for electronic components such as semiconductor devices even today when still higher levels of integration have been achieved, and has excellent flexibility. The anisotropically conductive member includes an insulating base and a plurality of conductive paths made of a conductive material, insulated from one another, and extending through the insulating base in the thickness direction of the insulating base, one end of each of the conductive paths protruded on one side of the insulating base, the other end of each of the conductive paths exposed or protruded on the other side thereof. The insulating base is made of a resin material and the conductive paths are formed at a density of at least 1,000,000 conductive paths/mm | 07-05-2012 |
20120186867 | MULTI-LAYER PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD - A multi-layer printed circuit board including a first insulating layer, a first conductor layer having circuits on one surface of the first insulating layer, a second conductor layer having circuits on the opposite surface of the first insulating layer, a second insulating layer on the second conductor and first insulating layers, and a third conductor layer having circuits on the second insulating layer on the opposite side of the second conductor layer. The first and second insulating layers have first and second via holes formed in openings of the first and second insulating layers and made of conductive materials filling the openings such that circuits in the first and third conductor layers are connected to one or more circuits in the second conductor layer, and the first and second via holes have bottom ends facing the second conductor layer and top ends larger than the bottom ends. | 07-26-2012 |
20120186868 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board having a penetrating hole formed by forming holes with different shapes from both surfaces of a substrate. In such a penetrating hole, the depth of a first opening portion formed in the first-surface side of the substrate is shallower than the depth of a second opening portion formed in the second-surface side, and the diameter of a first opening is greater than the diameter of a second opening. Even if the gravity line of the first opening portion and the gravity line of the second opening portion are shifted from each other, the region of the second opening portion inserted into the inner space of the first opening portion may be made larger. | 07-26-2012 |
20120193133 | HERMETIC CIRCUIT RING FOR BCB WSA CIRCUITS - A wafer-scale assembly circuit including a plurality of metal interconnect layers, where each metal layer includes patterned metal portions and where at least some of the patterned metal portions are RF signal lines. The circuit further includes at least one benzocyclobutene layer provided between two metal interconnect layers that includes at least one trench via formed around a perimeter of the benzocyclobutene layer at a circuit sealing ring, where the trench via provides a hermetic seal at the sealing ring. The benzocyclobutene layer also includes a plurality of stabilizing post vias formed through the benzocyclobutene layer adjacent to the trench via proximate to the sealing ring and extending around the perimeter of the benzocyclobutene layer, where the stabilizing vias operate to prevent the benzocyclobutene layer from shrinking in size. | 08-02-2012 |
20120193134 | Circuit Interconnect with Equalized Crosstalk - Systems and methods are provided a circuit interconnect. In one embodiment of the disclosure, the circuit interconnect includes a dielectric layer. A parallel synchronous bus is disposed on the dielectric layer. The parallel synchronous bus includes at least four conductive traces. The conductive traces are non-uniformly spaced from one another along a portion of the bus where the conductive traces are physically aligned in parallel so that crosstalk interference among the conductive traces is equalized across the conductive traces. | 08-02-2012 |
20120199388 | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A printed circuit board including: an insulation layer; a first circuit pattern formed over one surface of the insulation layer, the first circuit pattern having a side thereof slanted with respect to the insulation layer; and a second circuit pattern formed over the other surface of the insulation layer, the second circuit pattern having a side thereof slanted with respect to the insulation layer, wherein the side of the second circuit pattern is less slanted than the side of the first circuit pattern. | 08-09-2012 |
20120211272 | THIN FILM CIRCUIT BOARD DEVICE - A thin film circuit board device includes a multi-layered circuit unit having an upper circuit layer formed with an upper circuit having at least one first contact part, a lower circuit layer formed with a lower circuit having at least one second contact part disposed beneath the first contact part, and an insulating layer disposed between the upper and lower circuit layers and having at least one through hole. One of the upper and lower circuit layers has at least one preformed protruding portion that protrudes into the through hole toward the other one of the upper and lower circuit layers. One of the first and second contact parts is disposed on the preformed protruding portion so as to be in constant contact with the other one of the first and second contact parts. | 08-23-2012 |
20120228017 | WIRING BOARD FOR ELECTRONIC PARTS INSPECTING DEVICE AND ITS MANUFACTURING METHOD - A wiring board for an electronic parts inspecting device that can be designed and produced relatively quickly, inexpensively, and with a few number of jigs is provided. In certain embodiments the wiring board comprises a board main body having a front surface, a probe pad area having probe pads located in a central portion of the front surface, an outer connecting terminal area having outer connecting terminals located in a peripheral portion of the front surface, and wherein probe pads are connected to outer connecting terminals by front surface wirings formed between the probe pad area and the outer connecting terminal area. While certain embodiments further comprise inner wirings and first via conductors to connect the probe pads and outer connecting terminals, it is preferable to have no or a minimal amount of such inner wirings. Lastly, a method of manufacturing the same is provided. | 09-13-2012 |
20120234590 | PRINTED CIRCUIT BOARD - A printed circuit board includes first to sixth layers, and first to third traces. The first trace is arranged on the first layer. The second trace is arranged on the third layer. The third trace is arranged on the sixth layer. The second trace is electrically connected to the first trace through a first vertical interconnection access (via). The second trace is electrically connected to the third trace through a second via. | 09-20-2012 |
20120234591 | ELECTROMAGNETIC BANDGAP STRUCTURE AND PRINTED CIRCUIT BOARD - An electromagnetic bandgap structure including: at least three conductive plates; a first stitching via, configured to electrically connect any one of the conductive plates to another conductive plate; and a second stitching via, configured to electrically connect the one conductive plate to yet another conductive plate, wherein the first stitching via electrically connects the one conductive plate to another conductive plate by allowing a part of the first stitching via to be connected through a planar surface above or below the one conductive plate, and the second stitching via electrically connects the one conductive plate to yet another conductive plate by allowing a part of the second stitching via to be connected through a planar surface that is different from the planar surface through which the part of the first stitching via is connected, the two planar surfaces being placed in a same direction based on the conductive plates. | 09-20-2012 |
20120241207 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes first to fourth layers. A power supply is arranged on the first layer. An electronic component is arranged on the fourth layer. A first via and a second via extend through the PCB and are electrically connected to the electronic component. The PCB further includes third to seventh vias. A length of a transmission path of the current flows from the power supply to electronic component through the third via and the seventh via is almost the same as a length of a transmission path of the current flows from the power supply to the electronic component through the fourth to sixth vias. | 09-27-2012 |
20120255769 | PRINTED CIRCUIT BOARD - A printed circuit board including: a first insulation layer; a second insulation layer stacked over the first insulation layer; a circuit pattern and a via land buried in the second insulation layer; and a via penetrating the first insulation layer and integrated with the via land, the via made of a conductive material. | 10-11-2012 |
20120261177 | DEVICE PACKAGING STRUCTURE AND DEVICE PACKAGING METHOD - Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface. | 10-18-2012 |
20120261178 | INTERCONNECTION SUBSTRATE DESIGN SUPPORTING DEVICE, METHOD OF DESIGNING INTERCONNECTION SUBSTRATE, PROGRAM, AND INTERCONNECTION SUBSTRATE - A via disposition information acquiring unit acquires via disposition information indicating a disposition of the plurality of first vias ( | 10-18-2012 |
20120267156 | MULTILAYER STACKED CIRCUIT ARRANGEMENT WITH LOCALIZED SEPARATION SECTION - A multilayer stacked circuit arrangement with localized separation section, has a first flat cable and first signal transmission lines arranged on the first flat cable. A second flat cable is stacked on and bonded to the first flat cable. The second flat cable further has signal transmission lines arranged on it. A bonding substance layer is formed between a first non-separation section of the first flat cable and a second non-separation section of the second flat cable for properly stacking the first and second flat cables where the separation sections are spaced apart from each other. A conductive via extends between the first non-separation section and the second non-separation section. At least some of the second signal transmission lines of the second flat cable are connected through the conductive via to the first signal transmission lines of the first flat cable. | 10-25-2012 |
20120267157 | PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME - Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost. | 10-25-2012 |
20120279774 | CIRCUIT BOARD - A multilayer circuit board, comprising: a plurality of printed circuit board layers arranged stacked together; and a conductively plated via passing through at least one of the printed circuit board layers in a direction hereinafter referred to as the via direction; wherein a surface of a further one of the printed circuit board layers comprises a conducting region surrounding a non-conducting region; the non-conducting region is substantially centered around a point on the surface of the further printed circuit board layer where the via direction intersects the surface; a back-drilled hole passes through the point on the surface; and a smallest width dimension, that includes the point on the surface, of the non-conducting region (e.g. diameter) is greater than the diameter of the back-drilled hole. | 11-08-2012 |
20120279775 | CIRCUIT BOARD VIAHOLES AND METHOD OF MANUFACTURING THE SAME - Provided are a circuit board with a viahole and a method of manufacturing the same. The circuit board includes: a substrate formed of an insulating material; a conductive layer disposed on the substrate; a plated layer comprising nickel and disposed on the conductive layer; and a viahole passing through the substrate, the conductive layer, and the plated layer, wherein a crystal growth direction of nickel in the plated layer is parallel to a thickness-wise direction of the substrate. | 11-08-2012 |
20120285736 | METHOD OF PRODUCING CIRCUIT BOARD BY ADDITIVE METHOD, AND CIRCUIT BOARD AND MULTILAYER CIRCUIT BOARD OBTAINED BY THE METHOD - The present invention relates to a method of producing a multilayer circuit board including: a film-forming step of forming a swellable resin film on the surface of an insulative substrate, a circuit groove-forming step of forming circuit grooves having a depth equal to or greater than the thickness of the swellable resin film on the external surface of the film, a catalyst-depositing step of depositing a plating catalyst or the precursor thereof on the surface of the circuit grooves and the surface of the swellable resin film, a film-separating step of swelling the swellable resin film with a particular liquid and then separating the swollen resin film from the insulative substrate surface, and a plating processing step of forming an electrolessly plated film only in the region where the plating catalyst or the plating catalyst formed from the plating catalyst precursor remains unseparated after separation of the film. | 11-15-2012 |
20120292091 | CIRCUIT BOARD HAVING BYPASS PAD - An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided. | 11-22-2012 |
20120298409 | CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Provided are a circuit board and a method of manufacturing the same which increase a peel strength between a prepreg and a copper plating layer. The method includes: providing a substrate including a first circuit pattern and a first prepreg; forming a plurality of holes on a top surface of the first prepreg; removing silica fillers contained in inner walls of the plurality of holes; and performing copper plating on the top surface of the first prepreg. | 11-29-2012 |
20120325542 | Circuit Board - Lamination circuit board in which ground and conductor layers are laminated via an electrically insulating layer. Various configurations allow the ground layer to realize characteristic impedance matching in the circuit board: (a) One having at least a removal region where at least a projection region, being the conductor layer orthogonally projected onto the ground layer, is removed; (b) One in which in the lamination the conductor layer, a signal transmission line, and the ground layer are laminated in that order via the electrically insulating layer, and having at least a removal region where the conductor layer and the signal transmission line overlap; and (c) One in which in the lamination a signal transmission line, the ground layer, and the conductor layer are laminated in that order via the electrically insulating layer, and having at least a removal region where the conductor layer and the signal transmission line overlap. | 12-27-2012 |
20130008704 | BRIDGING STRUCTURE OF A TOUCH PANEL - A bridging structure of a touch panel is provided, which includes a transparent conducting layer, an insulating layer, and a conducting layer sequentially stacked on a transparent substrate. The transparent conducting layer includes the first and second transparent conducting portions, and the transparent conducting connection portions. The first and second transparent conducting portions are interlaced with each other. Each of the transparent conducting connection portions connects the adjacent first transparent conducting portions to each other along the first direction. The first transparent conducting portions and the transparent conducting connection portions can be electrically insulated from the second transparent conducting portions by the insulating layer. The conducting layer comprises the conducting connection portions, and the conductive via plugs formed in the insulating layer and located on the second transparent conducting portions. The conducting layer connects the adjacent second transparent conducting portions to each other along the second direction. | 01-10-2013 |
20130020120 | WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board has a laminated structure having a recessed portion on a first-surface side of the laminated structure and a solder resist layer on a second-surface side of the laminated structure on the opposite side of the first-surface side. The laminated structure has a first-surface side pad formed in the bottom of the recessed portion and a second-surface side pad formed on the second-surface side of the laminated structure, the solder resist layer has a first opening portion and a second opening portion formed in the solder resist layer, the first opening portion is exposing the second-surface side pad, the second opening portion is formed on a back face of the recessed portion, and the back face of the recessed portion does not include the second-surface side pad. | 01-24-2013 |
20130025925 | WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board has a first rigid wiring board having an accommodation portion, a second rigid wiring board accommodated in the accommodation portion, an insulation layer formed over the first rigid wiring board and the second rigid wiring board, and a joint conductor extending in a direction from a first surface of the first rigid wiring board to a second surface of the first rigid wiring board on the opposite side of the first surface of the first rigid wiring board such that the joint conductor is penetrating through the boundary between the first rigid wiring board and the second rigid wiring board and joining the first rigid wiring board and the second rigid wiring board. | 01-31-2013 |
20130025926 | CIRCUIT SUBSTRATE - A circuit substrate having a base layer, a patterned conductive layer, a dielectric layer and a conductive block is provided. The patterned conductive layer is disposed on the base layer and having an inner pad. The dielectric layer is disposed on the base layer and covering the patterned conductive layer. The conductive block penetrates the dielectric layer, the conductive block being substantially coplanar with the dielectric layer and connecting the inner pad. | 01-31-2013 |
20130037315 | DELAY LINE STRUCTURE - A delay line structure disposed on a substrate having a dielectric base layer formed with a via, a layout layer and a grounding layer with a grounding circuit, includes two parallel spiral delay lines having a first outer straight section, a first outer bent section, an inner spiral region, a second outer bent section and a second outer straight section. The inner spiral region bends reciprocally between the first and second outer straight sections to form several inner bent parts and several inner straight parts. A grounding guard trace is disposed among the first and second outer straight sections and the inner straight parts and is coupled electrically to the grounding circuit, wherein each of the first and second outer bent sections and the inner bent parts has a width smaller than each of the first and second outer straight sections and the inner straight parts. | 02-14-2013 |
20130037316 | STRUCTURE AND CIRCUIT BOARD - A structure ( | 02-14-2013 |
20130043068 | TOUCH PANEL AND MANUFACTURING METHOD THEREOF - The present disclosure provides a manufacturing method for a touch panel comprising: disposing an electrode layer extending from touch area of a substrate to periphery area of the substrate, wherein the periphery area surrounds the periphery of the touch area. The method further includes disposing an insulation layer in the periphery area of the substrate to form a shielding layer, making the shielding layer cover the overlapping electrode in the periphery area and making the electrode layer of the touch area and the overlapping electrode locate on the same layer of the substrate so as to avoid fluctuation of resistance value in the electrode layer due to height difference. Meanwhile, adopting the disposition method also maintains insulating performance of the shielding layer. The present disclosure also provides a touch panel made by the manufacturing method. | 02-21-2013 |
20130056253 | VIA STRUCTURE FOR TRANSMITTING DIFFERENTIAL SIGNALS - A printed circuit board includes first and second signal pads located on a top surface of the printed circuit board and arranged to transmit a first differential signal, first and second signal vias extending through the printed circuit board and arranged to transmit the first differential signal, a first signal trace located on the top surface of the printed circuit board and connecting the first signal pad and the first signal via, and a second signal trace located on the top surface of the printed circuit board and connecting the second signal pad and the second signal via. The first and second signal vias are located on opposite sides of a line connecting the first and second signal pads. | 03-07-2013 |
20130075145 | WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate includes an insulating layer, a connection pad buried in the insulating layer in a state that an upper surface of the connection pad is exposed from an upper surface of the insulating layer and a lower surface and at least a part of a side surface of the connection pad contact the insulating layer, and a concave level difference portion formed in the insulating layer around an outer periphery part of the connection pad, wherein an upper surface of the connection pad and an upper surface of the insulating layer are arranged at a same height. | 03-28-2013 |
20130075146 | MANUFACTURING METHOD OF SUBSTRATE, MANUFACTURING METHOD OF WIRING SUBSTRATE, GLASS SUBSTRATE AND WIRING SUBSTRATE - There is provided that a substrate comprising a glass substrate | 03-28-2013 |
20130081870 | MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A method for manufacturing a multilayer printed wiring board includes preparing a metal layer having metal member portions and connector portions connecting the metal member portions, forming laminated multilayer structures having electronic components and the metal member portions, respectively, forming cut penetrating holes in the connector portions of the metal layer, respectively, such that the connector portions of the metal layer are cut, and forming interlayer insulation layers on the laminated multilayer structures such that the laminated multilayer structures are interposed between the interlayer insulation layers. The forming of the interlayer insulation layers includes filling the cut penetrating holes with a resin derived from one or more interlayer insulation layers on the laminated multilayer structures. | 04-04-2013 |
20130092428 | PRINTED WIRING BOARD AND METHOD OF MANUFACTURE THEREOF - A printed wiring board, including a printed wiring member which respectively has object conductor that is subjected to electromagnetic wave shielding on at least one surface of an insulating layer; and an electromagnetic wave shielding member which has an electromagnetic wave shielding layer composed of a low-resistance section and a high-resistance section on at least one surface of a base film. The printed wiring member and the electromagnetic wave shielding member are bonded together with interposition of insulating adhesive layers, and with arrangement of the electromagnetic wave shielding layer separately and in opposition so that the object conductor is covered. The electromagnetic wave shielding layer and the object conductor are composed of the same type of conductive material, and the electromagnetic wave shielding layer is not exposed at the circumferential end faces of the printed wiring board. | 04-18-2013 |
20130112468 | MIDPLANE ESPECIALLY APPLICABLE TO AN ORTHOGONAL ARCHITECTURE ELECTRONIC SYSTEM - A midplane has a first side to which contact ends of a first differential connector are connected and a second side opposite the first side to which contact ends of a second differential connector are connected. The midplane includes a plurality of vias extending from the first side to the second side, with the vias providing first signal launches on the first side and second signal launches on the second side. The first signal launches are provided in a plurality of rows, with each row having first signal launches along a first line and first signal launches along a second line substantially parallel to the first line. The second signal launches are provided in a plurality of columns, with each column having second signal launches along a third line and second signal launches along a fourth line substantially parallel to the third line. | 05-09-2013 |
20130118792 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein is a method for manufacturing a printed circuit board, including: applying a solder resist to an insulating material; forming a cavity in the insulating material and the solder resist; forming a seed layer on a surface of the insulating material including the inside of the cavity; forming circuit patterns by plating the inside of the cavity; removing the seed layer formed on the surface of the solder resist; reapplying the solder resist on the solder resist from which the seed layer is removed; and opening a bump forming region of the reapplied solder resist, whereby micro circuits can be easily implemented. | 05-16-2013 |
20130126222 | METHOD FOR PRODUCING AN ELECTRICAL MULTI-LAYER COMPONENT AND ELECTRICAL MULTI-LAYER COMPONENT - A method for producing an electrical multi-layer component is described, wherein a first ceramic layer ( | 05-23-2013 |
20130126223 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A cover insulating layer is formed on a base insulating layer. One of write wiring traces includes first to third lines, and the other write wiring trace includes fourth to sixth lines. The one and other write wiring traces constitute a signal line pair, the second and fifth lines are arranged on an upper surface of the cover insulating layer, and the third and sixth lines are arranged on an upper surface of the base insulating layer. At least parts of the second and fifth lines are respectively opposed to the sixth and third lines with the cover insulating layer sandwiched therebetween. The second and third lines are electrically connected to the first line, and the fifth and sixth lines are electrically connected to the fourth line. The fourth line is electrically connected to at least one of the fifth and sixth lines through a jumper wiring on a lower surface of the base insulating layer. | 05-23-2013 |
20130126224 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: a base substrate; an outer circuit layer formed on an upper portion of the base substrate and including a connection pad; a first solder resist formed on the upper portion of the base substrate so that the connection pad of the outer circuit layer is exposed; and a second solder resist formed on an upper portion of an outer circuit layer and formed so that the connection pad is exposed. | 05-23-2013 |
20130126225 | STRUCTURAL BODY AND INTERCONNECT SUBSTRATE - A structural body includes: a first conductor and a second conductor of which at least portions are opposite to each other; a third conductor, interposed between the first conductor and the second conductor, of which at least a portion is opposite to the first conductor and the second conductor, and has a first opening; an interconnect provided in the inside of the first opening; and a conductor via which is electrically connected to the first conductor and the second conductor and is electrically insulated from the third conductor, wherein the interconnect is opposite to the first conductor and the second conductor, one end thereof being electrically connected to the third conductor at an edge of the first opening and an other end thereof being formed as an open end. | 05-23-2013 |
20130133939 | WIRED CIRCUIT BOARD - A wired circuit board includes an insulating layer formed with a first opening and a second opening, a conductive layer formed on the insulating layer and including a terminal overlapping the first opening, and a wire having a part thereof overlapping the second opening and continued to the terminal, a metal pedestal portion formed under the insulating layer and disposed around the first opening so as to overlap the second opening and support an electronic element, and a conductive portion filling the second opening to provide electrical conduction between the wire and the metal pedestal portion. | 05-30-2013 |
20130140072 | MULTI-LAYERED CIRCUIT BOARD AND ELECTRO-STATIC DISCHARGE PROTECTION STRUCTURE - An electro-static discharge (ESD) protection structure includes a first insulation layer (having a first surface, a second surface opposite to the first surface, and a through hole), a patterned conductive layer (located on the first surface), an electro-static releasing layer (located on the second surface), and a solder mask layer. At least one portion of the patterned conductive layer surrounds the through hole. The electro-static releasing layer is electrically insulated from the patterned conductive layer. At least one portion of the electro-static releasing layer is around the through hole. The solder mask layer covers the first insulation layer and a portion of the patterned conductive layer and exposes a portion of the patterned conductive layer surrounding the through hole. A multi-layered circuit board including a second insulation layer, a power supply layer, a third insulation layer and the ESD protection structure is also provided. | 06-06-2013 |
20130146349 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a printed circuit board including: a first circuit pattern formed on a first insulator; a second insulator formed on the first insulator; a second circuit pattern having a pad of which a portion is embedded in the second insulator and a via which penetrates the second insulator to electrically connect the first circuit pattern and the pad; and a third circuit pattern formed on the second insulator, and it is possible to reduce a size of the via without increasing an aspect ratio. | 06-13-2013 |
20130153280 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a printed circuit board including: a substrate; first upper and lower insulating layers covering upper and lower sides of the substrate; a via penetrating the substrate and the first upper and lower insulating layers to form an electrical connection; and second upper and lower insulating layers covering or surrounding the via, wherein the first upper and lower insulating layers or the second upper and lower insulating layers include a general circuit region including general circuit patterns and circuit patterns connected to the via and a microcircuit region including microcircuit patterns having a smaller circuit line width than that of the general circuit region. | 06-20-2013 |
20130153281 | LIGHT SOURCE MOUNT - A mount for a semiconductor device, the mount comprising: an insulating substrate having first and second parallel face surfaces, an edge surface that connects the parallel surfaces and having formed therein a recess having an opening on the first face surface; an electrically conductive plug seated in the recess and having a first exposed surface on or near the edge surface and a second exposed surface on or near the first face surface. | 06-20-2013 |
20130168148 | MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING SAME - A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely. | 07-04-2013 |
20130175077 | PRINTED CIRCUIT BOARD WITH REDUCED CROSS-TALK - A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board. | 07-11-2013 |
20130186679 | MULTILAYER WIRING STRUCTURE AND METHOD OF MANUFACTURING THE SAME - The multilayer wiring structure includes: a substrate; a connection hole formed to pass through one surface and another surface of the substrate; and electrode wirings formed on the substrate, wherein the electrode wirings includes: a plurality of first wirings formed on one surface of the substrate; a plurality of second wirings formed on another surface of the substrate; and a plurality of connection wirings formed on an inner surface of the connection hole and electrically connecting the plurality of first wirings and the plurality of second wirings, respectively. | 07-25-2013 |
20130192887 | FLAT WIRING MATERIAL AND MOUNTING BODY USING THE SAME - A flat wiring material includes a plurality of conductors arranged in parallel, an insulating covering member covering collectively the plurality of conductors while allowing both end portions of the plurality of conductors to be exposed, an engaging member disposed at a position on the covering member and close to at least one of the exposed both end portions of the plurality of conductors and including an insertion portion that is formed at an end portion extending in the width direction for being inserted into and engaged with a through-hole formed on a mounting substrate, and a fixing member fixing the engaging member to the covering member. The insertion portion of the engaging member includes an opening allowing an elastic deformation thereof upon the insertion into the through-hole and a protruding portion for preventing disengagement in a direction opposite to the insertion direction after being inserted into the through-hole. | 08-01-2013 |
20130206466 | MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board includes a core substrate having a through-hole formed through the substrate, an interlayer insulation layer formed on the substrate and having a via conductor formed through the insulation layer, and a conductor layer formed on the insulation layer and connected to the via in the insulation layer. The substrate has multiplayer insulation structure, outer power layer formed on surface of the structure, outer ground layer formed on opposite surface of the structure, inner power layer formed inside the structure and inner ground layer formed inside the structure, each of the inner layers has tapered end having angle satisfying 2.808-15-2013 | |
20130206467 | CIRCUIT BOARD - A circuit board includes a circuit substrate, a first dielectric layer, a first conductive layer, a second conductive layer and a second dielectric layer. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via. The second conductive layer is electrically connected to the first circuit layer via the first conductive layer. The second dielectric layer is disposed on the first dielectric layer and covers the second conductive layer and the second surface of the first dielectric layer. | 08-15-2013 |
20130213705 | METHOD OF FABRICATING PRINTED-WIRING BOARD, AND PRINTED-WIRING BOARD - A method of fabricating a printed-wiring board, includes: forming a through-hole across a thickness of a printed-wiring board, the forming of the through-hole including forming a first opening part having a first diameter, forming a second opening part having a second diameter, and forming a third opening part provided between the first opening part and the second opening part, wherein the second diameter is larger than the first diameter, and the third opening part is formed in a tapered shape whose diameter decreases toward the first opening part from the second opening part. | 08-22-2013 |
20130220690 | PRINTED CIRCUIT BOARD FOR MOBILE PLATFORMS - The invention provides a printed circuit board for mobile platforms. An exemplary embodiment of the printed circuit board for mobile platforms includes a core substrate having a first side. A ground plane covers the first side. A first insulating layer covers the ground plane. A plurality of first signal traces and a plurality of first ground traces are alternatively arranged on the first insulating layer. A second insulating layer connects to the first insulating layer. A plurality of second signal traces separated from each other is disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto. | 08-29-2013 |
20130233607 | WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE - A wiring substrate includes an insulation substrate including a first surface, a second surface on an opposite side of the first surface, and first and second through-holes penetrating the insulation substrate from the first surface to the second surface; a wiring layer formed on the first surface of the insulation substrate; a first via formed in the first through-hole and connected to the wiring layer; a bus line positioned away from the wiring layer and the first via, and formed on the first surface of the insulation substrate; and a second via formed in the second through-hole and connected to the bus line. | 09-12-2013 |
20130269994 | PRINTED CIRCUIT BOARD WITH STRENGTHENED PAD - A print circuit board (PCB) includes a first surface defining a number of first pads and a second surface defining a number of second pads. The number of the first pads is equal to the number of the second pads. Each first pad corresponds to one second pad and the first pad and the corresponding second pad form a pair of pads. Each pair of pads defines at least one via hole and each of the via hole connects the first pad and the second pad of each pair of pads. | 10-17-2013 |
20130269995 | PRINTED CIRCUIT BOARD - A printed circuit board is provided. The printed circuit board includes a number of welding points in a row for soldering of a series of welding feet of a component thereto. Each welding point includes a welding hole defined in the printed circuit board and a C-shaped welding pad surrounding the welding hole. The welding pads have an opening facing an adjacent welding pad. | 10-17-2013 |
20130313009 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a printed circuit board (PCB) and the PCB are provided. The method includes: filling a resin in a via-hole formed at a substrate from one surface side of the substrate; emitting light for a predetermined period of time to the resin filled in the via-hole from the other surface side of the substrate; and applying another resin on the other surface of the substrate. | 11-28-2013 |
20130313010 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board includes a core layer, a through-hole penetrating through the core layer in its thickness direction, a first wiring layer formed on a first surface of the core layer, a through-hole wiring formed in the through-hole and electrically connected to the first wiring layer, and a curved first chamfered portion formed in a boundary portion between an inner side surface of the through-hole and the first surface of the core layer. The first wiring layer includes a first metal layer formed outside the first chamfered portion on the first surface of the core layer and a second metal layer formed on the first chamfered portion and the first metal layer. | 11-28-2013 |
20130319747 | MULTILAYER ELECTRONIC STRUCTURES WITH VIAS HAVING DIFFERENT DIMENSIONS - A multilayer composite electronic structure comprising at least two feature layers extending in an X-Y plane and separated by a via layer comprising a dielectric material that is sandwiched between two adjacent feature layers, the via layer comprising via posts that couple adjacent feature layers in a Z direction perpendicular to the X-Y plane, wherein a first via has different dimensions in the X-Y plane from a second via in the via layer. | 12-05-2013 |
20130319748 | WIRED CIRCUIT BOARD AND PRODUCING METHOD THEREOF - A wired circuit board includes an insulating layer to be formed with an opening extending therethrough in a thickness direction of the wired circuit board, a conductive layer formed on one surface of the insulating layer in the thickness direction and including a one-side terminal portion, an other-side terminal portion formed on the other surface of the insulating layer in the thickness direction, disposed so as to overlap the opening and the one-side terminal portion when projected in the thickness direction, and used to be connected to an electronic element via a conductive adhesive, and a conductive portion filling the opening to provide electrical conduction between the one-side terminal portion and the other-side terminal portion. | 12-05-2013 |
20130319749 | PRODUCTION METHOD OF MULTILAYER PRINTED WIRING BOARD AND MULTILAYER PRINTED WIRING BOARD - Multilayer printed wiring boards may be prepared by forming a via hole by laser irradiation in insulating layer formed by a prepreg, comprised of a glass cloth impregnated with a thermosetting resin composition, and subjecting the via hole to a glass etching treatment with a glass etching solution and then to a desmear treatment with an oxidizing agent solution. By such a process, etch back phenomenon and excessive protrusion of glass cloth from the wall surface of a via hole can be sufficiently suppressed, and a highly reliable via can be formed. Particularly, a highly reliable via can be formed in a small via hole having a top diameter of 75 μm or below. | 12-05-2013 |
20130327564 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board and a manufacturing method thereof are provided. According to the method, a dielectric layer is formed on a dielectric substrate, and the dielectric layer contains active particles. A surface treatment is performed on a surface of the dielectric first conductive layer is formed on the activated surface of the dielectric layer. A conductive via is formed in the dielectric substrate and the dielectric layer. A patterned mask layer is formed on the first conductive layer, in which the patterned mask layer exposes the conductive via and a part of the first conductive layer. A second conductive layer is formed on the first conductive layer and conductive via exposed by the patterned mask layer. The patterned mask layer and the first conductive layer below the patterned mask layer are removed. | 12-12-2013 |
20130333934 | MULTILAYER ELECTRONIC STRUCTURE WITH STEPPED HOLES - A multilayer electronic structure comprising a plurality of layers extending in an X-Y plane consisting of a dielectric material surrounding metal via posts that conduct in a Z direction perpendicular to the X-Y plane, wherein at least one multilayered hole crosses at least two layers of the plurality of layers and comprises at least two hole layers in adjacent layers of the multilayer composite electronic structure, wherein the at least two holes in adjacent layers have different dimensions in the X-Y plane, such that a perimeter of the multilayered hole is stepped and where at least one hole is an aperture to a surface of the multilayer electronic structure. | 12-19-2013 |
20140000952 | PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME | 01-02-2014 |
20140000953 | CIRCUIT SUBSTRATE | 01-02-2014 |
20140020945 | Multilayer Electronic Support Structure with Integral Constructional Elements - A multilayer electronic support structure comprising at least one pair of adjacent feature layers extending in an X-Y plane that are separated by a via layer; said via layer comprising a dielectric material that is sandwiched between the two adjacent feature layers and at least one constructional element through the dielectric material spanning between said pair of adjacent feature layers in a Z direction perpendicular to the X-Y plane; wherein said at least one constructional element is characterized by having a long dimension in the X-Y plane that is at least 3 times as long as a short dimension in the X-Y plane and wherein the at least one constructional element is fully encapsulated within the dielectric material and is electrically isolated from its surrounding. | 01-23-2014 |
20140027167 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD - Disclosed herein is a printed circuit board, including: a first insulating layer; a second insulating layer formed on the first insulating layer; a first circuit patterns embedded in the first insulating layer; a first via formed on a top of the first circuit pattern and embedded in the first insulating layer; a second circuit pattern formed on the first via and the first insulating layer and embedded in the second insulating layer; a second via formed on the top of the second circuit pattern and embedded in the second insulating layer; and a third circuit pattern formed on the second insulating layer. | 01-30-2014 |
20140027168 | PRINTED WIRING BOARD, PRINTING METHOD, AND LIQUID DEVICE - A printed wiring board, in which a pattern is formed by screen printing, includes: a land group including lands each provided corresponding to a through-hole; and a dummy pattern provided in proximity to the land group, and free from electrical connection. | 01-30-2014 |
20140041921 | CONFORMAL 3D NON-PLANAR MULTI-LAYER CIRCUITRY - A method for making conformal non-planar multi-layer circuitry is described. The method can include providing a substrate having a non-planar surface and depositing a first conformal dielectric layer on the substrate, the first conformal dielectric layer conforming to the non-planar surface of the substrate and having a non-planar surface. The method can also include applying a first conformal circuitry layer on the first conformal dielectric layer. The method can include depositing a second conformal dielectric layer on the first conformal circuitry layer, the second conformal dielectric layer conforming to a non-planar surface of the first conformal circuitry layer, and applying a second conformal circuitry layer on the second conformal dielectric layer. Successive layers can be sequentially deposited. Microvias may provide electrical connections between circuit layers. | 02-13-2014 |
20140048323 | WIRING BOARD - A wiring board including an insulating board formed such that an inner insulating layer is laminated under a front insulating layer, a pair of semiconductor element connection pads for a signal, formed on the front insulating layer, and a pair of strip-shaped wiring conductors formed on the inner insulating layer, having connection ends connected to the pair of pads for the signal under the pair of pads through via holes, and having parallel extending portions extending to an outer peripheral portion from the connection ends on the inner insulating layer in parallel to each other, where a part from the connection end to one part of the parallel extending portion has a width smaller than a width of a residual part, and length equal to or less than one-sixteenth of a wavelength of a signal transmitting in the pair of strip-shaped wiring conductors. | 02-20-2014 |
20140054079 | MULTILAYER FLEXIBLE PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME - A method for manufacturing a multilayer FPCB includes certain steps. A first printed circuit substrate is provided, the first printed circuit substrate includes a first copper layer and a first protective film, the film defining a first opening. A second printed circuit substrate is provided, this substrate includes a second copper layer and a second protective film. The second protective film defines a second opening. The first printed circuit substrate is laminated together with the second printed circuit substrate by an adhesive sheet. The adhesive sheet defines a third opening in communication with and aligned with the first opening and the second opening. The first copper layer is then etched to form a first outer wiring layer and the third copper layer is also etched to form a second outer wiring layer, thereby obtaining a multilayer FPCB. | 02-27-2014 |
20140060912 | PACKAGE SUBSTRATE AND ELECTRONIC DEVICE - In a package substrate, adjacent bumps in a first array of bumps being an outermost array arranged along a first side of the package substrate are arranged being shifted in a first axial direction that is a normal direction of the first side and in a second axial direction that intersects perpendicularly with the first axial direction in a plan view. Adjacent bumps in a second array of bumps arranged in the inside of the first array of bumps are arranged being shifted in the first axial direction and in the second axial direction in a plan view. | 03-06-2014 |
20140069704 | Method and structure for forming contact pads on a printed circuit board using zero under cut technology - A method and an apparatus for forming a contact pad on a printed circuit board over a filled plate via or blind in which an additional metallic or a non metallic coating is applied to a final surface finished plate which encapsulates the side walls of the wear resistant surface plate, and also covers the side walls of the metal layer plated onto the filled via and the wrap around plated metal which was plated in the via and onto the surface of the base metal to the extents of the pad geometry. This prevents subsequent undermining through the etching process and ensuring the integrity and reliability of the vias' electrical connection when an underlying base metal such as but not limited to copper and the surface plated metal are formed when plating metal in the via and consequently onto the surface. | 03-13-2014 |
20140069705 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a first part, a second part below the first part, a third part between the first and second parts, and at least one barrier layer including a metal different from a metal of the first to third parts. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure. | 03-13-2014 |
20140069706 | HIGH-FREQUENCY PACKAGE - In a multilayer substrate, a quasi-coaxial line is formed as a structure for transmitting a high-frequency signal generated by a mounted high-frequency device from an uppermost layer to a lowermost layer to externally output and for transmitting an externally input high-frequency signal from the lowermost layer to the high-frequency device. The quasi-coaxial line has: a central conductor being a vertical through hole via that connects between a metal pattern formed on an upper surface of the uppermost layer and a metal pattern formed on a lower surface of the lowermost layer; and outer conductors being a plurality of interlayer vias that are circularly arranged around the central conductor and connect between two or more layers. Whole or a part of the vertical through hole via is substituted by a capacitor structure formed of conductor pads facing each other without any via. | 03-13-2014 |
20140083757 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME - A printed circuit board includes a first, second, and third dielectric layers, and a first, second, and third trace layers. The first trace layer and the second trace layer are formed on opposite surfaces of the first dielectric layer. The second dielectric layer is formed on the second trace layer, a first blind hole is defined in the first surface and terminated at a position in the first dielectric layer, a first conductive via is formed in the first blind hole. A second blind hole is formed in the second dielectric layer and the first dielectric layer. A second conductive via is formed in the second blind hole. The third trace layer is electrically connected with the second conductive via. The first trace layer is electrically connected with the second trace layer through the first conductive via and the second conductive via. | 03-27-2014 |
20140116769 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board including an insulative material, a first conductive circuit formed on the insulative material, a resin insulation layer including a first insulation layer formed on the insulative material and on the first conductive circuit and which insulates between lines of the first conductive circuit, the first insulation layer including inorganic particles having a first average diameter, and a second insulation layer formed on the first insulation layer and including a recessed portion and an opening portion, the second insulation layer including inorganic particles having a second average diameter smaller than the first average diameter, a second conductive circuit formed in the recessed portion, and a via conductor formed in the opening portion and which connects the first conductive circuit to the second conductive circuit. | 05-01-2014 |
20140144691 | METHOD FOR SHORTENING VIA STUB AND PRINTED CIRCUIT BOARD DESIGNED BASED ON THE METHOD - A method for shortening a via stub includes: designing a first via hole to connect signal lines of a top layer and a bottom layer of a printed circuit board; and designing a second via hole to connect signal lines of the bottom layer and one of a number of middle layers of the printed circuit board. The printed circuit board include n layers, n is an even number, and the number of the one of the number of middle layers counting top down or bottom up is less than or equal to n/2. A related printed circuit board is also provided. | 05-29-2014 |
20140144692 | MULTILAYER CIRCUIT SUBSTRATE - A multilayer circuit substrate obtained by alternately stacking conductor layers and insulator layers. The conductor layers include a core layer having a greater thickness than any of the other conductor layers and located in an inner layer of the multilayer circuit substrate. A first conductor layer facing the core layer through an insulator layer has first signal wires that transmit high frequency signals, and through-holes are formed in the core layer along the first signal wires in a location facing the first signal wires. | 05-29-2014 |
20140151106 | WIRING BOARD AND METHOD FOR MANUFACTURING WIRING BOARD - An electrically conductive path is configured from a first copper plate, a second copper plate, and solder. The first copper plate has a first bent section extended from a first joining section joined to an electrically insulative board and bent toward the rear surface of the electrically insulative board. The second copper plate has a second bent section which is extended from a second joining section joined to the electrically insulative board, is bent toward the front surface of the electrically insulative board, and is disposed so as to cover, together with the first bent section, the inner wall surface of a base-material through-hole. Through-holes are provided in the portions of the second copper plate which face the inside of the base-material through-hole. Solder is filled between the first bent section and the second bent section. | 06-05-2014 |
20140158415 | MICRO DEVICE TRANSFER HEAD ARRAY WITH METAL ELECTRODES - A monopolar and bipolar micro device transfer head array and method of forming a monopolar and bipolar micro device transfer array are described. In an embodiment, a micro device transfer head array includes a base substrate, a first insulating layer formed over the base substrate, and an array of mesa structures. A second insulating layer may be formed over the mesa structure, a patterned metal layer over the second insulating layer, and a dielectric layer covering the metal layer. | 06-12-2014 |
20140166353 | ELECTRICAL INTERCONNECT FORMED THROUGH BUILDUP PROCESS - This disclosure relates generally to an electronic chip package that can include a die and a buildup layer substantially enveloping the die. Electrical interconnects can be electrically coupled to the die and passing, at least in part, through the buildup layer. An optical emitter can be electrically coupled to the die with a first one of the electrical interconnects and configured to emit light from a first major surface of the electronic chip package. A solder bump can be electrically coupled to the die with a second one of the electrical interconnects and positioned on a second major surface of the electronic chip package different from the first major surface. | 06-19-2014 |
20140182914 | UNIVERSAL SERIAL BUS HYBRID FOOTPRINT DESIGN - A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps. | 07-03-2014 |
20140182915 | CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a circuit board. A circuit board in accordance with an embodiment of the present invention includes a base substrate; an interlayer insulating layer covering the base substrate; a via structure passing through at least the interlayer insulating layer of the base substrate and the interlayer insulating layer in the vertical direction; and an etch stop pattern disposed on the interlayer insulating layer in the horizontal direction to surround the via structure and made of an insulating material. | 07-03-2014 |
20140182916 | CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - The present invention relates to a circuit board, which can miniaturize a conductor pattern formed around a via and improve current pass characteristics of the via at the same time by including a via passing through an insulating layer to be in contact with an upper conductor pattern and a lower conductor pattern and having a bent portion whose cross-sectional area or diameter changes discontinuously. | 07-03-2014 |
20140182917 | METHOD FOR FORMING CAVITY, APPARATUS FOR FORMING CAVITY, METHOD FOR MANUFACTURING CIRCUIT BOARD, AND CIRCUIT BOARD - A method for forming cavity in substrate includes setting start position on closed loop line having circumference L for substrate, consecutively irradiating laser from laser device upon board for the substrate such that holes are formed, and moving the device in loop from the start position along the line such that penetrating hole is formed through the board. The start position of first loop is set as base position, the moving includes shifting the start position by distance d after each loop and controlling such that the moving satisfies p=Σd | 07-03-2014 |
20140182918 | METHOD OF MANUFACTURING MODULE AND TERMINAL ASSEMBLY | 07-03-2014 |
20140202752 | WIRING BOARD AND DESIGN METHOD FOR WIRING BOARD - A wiring board includes a first wiring line and a second wiring line formed on a substrate, a first land and a second land respectively formed at a connection portion of the first wiring line and the second wiring line. A second wiring line has a longer wiring length than the first wiring line. The land is structured with a wiring pattern of a single wiring line. The wiring board also includes a first pad electrode and a second pad electrode respectively formed on the first land and a second land through an insulating film, a first interlayer connection via and a interlayer connection via embedded in the insulating film and electrically connecting the land to the pad electrode. And a wiring length of the wiring pattern of the first land is longer than the wiring length of the wiring pattern of the second land. | 07-24-2014 |
20140202753 | Z-Directed Delay Line Components for Printed Circuit Boards - A Z-directed signal delay line component for insertion into a printed circuit board while allowing electrical connection to internal conductive planes contained with the PCB. In one embodiment the Z-directed delay line component is housed within the thickness of the PCB allowing other components to be mounted over it. The delay line embodiments include a W-like line and a plurality of spaced apart, semi-circular line segment connected such that current flow direction alternates in direction between adjacent semi-circular line segments, each of which in other embodiments can be varied by use of shorting bars. Several Z-directed delay line components may be mounted into a PCB and serially connected to provide for longer delays. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body. | 07-24-2014 |
20140209368 | ELECTRICAL CONNECTION WITH REDUCED TOPOGRAPHY - The formation of substrate electrical connections on thin film heads is one source of resulting surface topography. In accordance with one implementation, such topography can be reduced by a process that includes depositing a first layer of basecoat, creating electrical recessed vias in one or more plating processes, and depositing a second layer of basecoat on top of the electrical vias and on top of the first layer of basecoat. In one implementation, the first and second layers of basecoat have a combined height that is substantially equal to the height of the electrical recessed vias. In one implementation, the resulting topographical features are small enough that they can be planarized without creating a lack of uniformity in the total basecoat thickness across the wafer. | 07-31-2014 |
20140209369 | PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a ground layer, a first layer, a second layer, a connector footprint, and a pair of differential signal lines. The connector footprint comprises first and second bonding pads. The PCB defines a first signal via in a central portion of a space bound by the first bonding pad, and a second signal via in a central portion of a space bound by the second bonding pad. A number of first ground vias on the first bonding pad and a number of second ground vias on the second bonding pad are electrically connected to the ground layer. First annular slots surrounding corresponding first ground via are defined in the ground layer. Second annular slots surrounding corresponding second ground vias are defined in the ground layer. Connection slots are defined in the ground layer and communicate between the first annular slots and the second annular slots. | 07-31-2014 |
20140262468 | System and Method for an Improved Interconnect Structure - Presented herein are an interconnect structure and method for forming the same. The interconnect structure comprises a contact pad disposed over a substrate and a connector disposed over the substrate and spaced apart from the contact pad. A passivation layer is disposed over the contact pad and over connector, the passivation layer having a contact pad opening, a connector opening and a mounting pad opening. A post passivation layer comprising a trace and a mounting pad is disposed over the passivation layer. The trace may be disposed in the contact pad opening and contacting the mounting pad, and further disposed in the connector opening and contacting the connector. The mounting pad may be disposed in the mounting pad opening and contacting the opening. The mounting pad separated from the trace by a trace gap, which may optionally be at least 10 μm. | 09-18-2014 |
20140262469 | RADIO FREQUENCY FEEDTHROUGH - A radio frequency feedthrough for optoelectronic housings is provided that includes a multilayer ceramic body and a signal conductor that extends through the ceramic layers in an S-shape. In an upper region of the multilayer ceramic body, a ground layer is recessed in a V-shape, and in a central region of the multilayer ceramic body the signal conductor extends coaxially. | 09-18-2014 |
20140284092 | SPLIT PAD FOR CIRCUIT BOARD - An electronic device such as a circuit board has a contact pad for connection to a contact of a component, and a pad portion interconnection. The contact pad has physically separate pad portions. The pad portion interconnection electrically connects the pad portions of the contact pad, independently of any mounted connection on the pad portions. Providing multiple pad portions for a single contact pad allows the contact pad to function even if one of the pad portions is damaged such as by peeling off. An example application is an EMC (Electromagnetic Compatibility) and/or ESD (Electro-Static Discharge) test circuit board. | 09-25-2014 |
20140291005 | WIRING BOARD - A wiring board includes a core substrate having a number of through-holes, and buildup insulating layers and buildup wiring layers alternately laminated on upper and lower surfaces of the core substrate, in which a first through-hole group is arranged in a first region in the core board at a first arrangement density, the first region being opposed to the semiconductor element connection pad formation region, a second through-hole group is arranged in a second region at a second arrangement density lower than the first arrangement density, the second region being located in an outer peripheral portion of the core substrate and away from the first region, and a third through-hole group is arranged in a third region at a third arrangement density higher than the second arrangement density, the third region being located between the first region and the second region. | 10-02-2014 |
20140305688 | PRINTED WIRING BOARD AND PRINTED CIRCUIT BOARD - A printed wiring board includes a first conductive layer, a second conductive layer arranged at a gap with respective to the first conductive layer, a third conductive layer, a first via conductor and a second via conductor, and a third signal wiring pattern. A first signal wiring pattern is arranged on the first conductive layer, a second signal wiring pattern is arranged on the second conductive layer, and a third signal wiring pattern that is arranged on the third conductive layer. The third conductive layer is arranged between the first conductive layer and the second conductive layer via an insulating layer. The first via conductor and the second via conductor, which are arranged to be mutually adjacent, connect the first signal wiring pattern to the second signal wiring pattern. The third signal wiring pattern connects the first via conductor to the second via conductor. | 10-16-2014 |
20140318847 | MULTILAYER WIRING SUBSTRATE - A multilayer wiring substrate is provided which is less apt to cause the warping and the degradation of the surface flatness, and which is able to effectively suppress the occurrence of cracks. A multilayer wiring substrate | 10-30-2014 |
20140353025 | PRINTED CIRCUIT BOARD - A printed circuit board includes a first insulating layer; a pad formed on the first insulating layer; a second insulating layer covered on the first insulating layer having the pad thereon; and a via hole formed in the second insulating layer. The pad has a surface that is non-planar. | 12-04-2014 |
20140353026 | WIRING BOARD - A wiring board according to the present invention includes an insulating layer | 12-04-2014 |
20140360770 | PRINTED CIRCUIT BOARD - An exemplary printed circuit board includes a planar base, a first signal via defined in the base, a second signal via defined in the base, a first ground via defined in the base adjacent to the first signal via, a second ground via defined in the base adjacent to the second signal via, a first through hole defined in the base between the first signal via and the first ground via, and a second through hole defined in the base between the second signal via and the second ground via. | 12-11-2014 |
20150014042 | LAMINATED ELECTRONIC COMPONENT - A laminated electronic component is configured such that insulator layers and conductor patterns are laminated and a coil is formed in a laminate of the insulator layers and the conductor patterns by connecting the conductor patterns among the insulator layers, where the coil includes conductor pattern pairs each composed of two conductor patterns arranged so as to sandwich each insulator layer, and includes a first connecting portion connecting both end portions of the two conductor patterns so as to connect the two connecting patterns in parallel and a second connecting portion connecting a plurality of the conductor pattern pairs in series, where the first connecting portion and the second connecting portion are arranged so as to be displaced from each other in a direction of a line length of a coil pattern. | 01-15-2015 |
20150021084 | COPPER CLAD LAMINATE, PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a copper clad laminate, a printed circuit board, and a method of manufacturing the same. The copper clad laminate includes: an insulating layer having one surface and the other surface; and first and second copper foil layers having one surface, which is a smooth surface, and the other surface, which is a rough surface having a roughness larger than that of the smooth surface, respectively, wherein one surface of the insulating layer contacts the rough surface of the first copper foil layer and the other surface of the insulating layer contacts the smooth surface of the second copper foil layer. | 01-22-2015 |
20150027769 | DEPOSITION BY SPIN COATING OF A PATTERNED THIN LAYER ON A SUBSTRATE - The method for producing a patterned layer of first material on a surface of a substrate comprises the following successive steps:
| 01-29-2015 |
20150034376 | PRINTED CIRCUIT BOARD STRUCTURE - A printed circuit board (PCB) structure comprises two signal layers with and a ground layer sandwiched between the two signal layers, and at least two adjacent vias. Each of the signal layers comprises a plurality of signal traces. The via through the PCB structure is used for connecting signal traces on different signal layers together. The ground layer comprises at least one insulation region. Each of the vias comprises at least two pads and a connecting portion connecting the at least two pads together. The pads are respectively mounted on the at least two signal layer. Projections of the adjacent pads on the ground layer are contained in the same insulation region. | 02-05-2015 |
20150047892 | PCB BACKDRILLING METHOD AND SYSTEM - A printed circuit board (PCB) backdrilling method is disclosed, where a conductive layer is disposed between a surface of a PCB on an intended-for-backdrilling side of a plated through hole (PTH) and a target signal layer of the PCB, and the method includes: performing a first backdrilling on the PTH with a first preset depth starting from the surface of the PCB; controlling the backdrill bit to move along the drill hole formed in the first backdrilling toward the target signal layer; and when the backdrill bit is in contact with the conductive layer, completing a second backdrilling with a second preset depth starting from the conductive layer. | 02-19-2015 |
20150053473 | STRUCTURE - A structure ( | 02-26-2015 |
20150053474 | FUNCTIONAL ELEMENT BUILT-IN SUBSTRATE AND WIRING SUBSTRATE - An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized. According to the present invention, there is provided a functional element built-in substrate including a functional element provided with an electrode terminal on one surface side of the functional element, and a wiring substrate including a laminated structure in which the functional element is embedded so that the electrode terminal of the functional element faces the front surface side of the structure, and which is formed at least in a side surface region of the functional element by laminating a plurality of wiring insulating layers each including a wiring, the functional element built-in substrate being featured in that the electrode terminal and the back surface side of the wiring substrate are electrically connected to each other through the wiring of the laminated structure, and in that, in a pair of the wiring insulating layers included in the laminated structure and that are in contact with each other, the cross-sectional shape of the wiring in each of the wiring insulating layers, which cross-sectional shape is taken along the plane perpendicular to the extension direction of the wiring in the wiring insulating layer, has a relationship that the cross-sectional area of the wiring in the back surface side wiring insulating layer is larger than the cross-sectional area of the wiring in the front surface side wiring insulating layer. | 02-26-2015 |
20150060126 | MODULES FOR INCREASING USEABLE SPACE ON CIRCUIT BOARDS - The described embodiments relate generally to electronic devices and to three dimensional modules for increasing useable space on a circuit board associated therewith. In some embodiments, the modules can have a cuboid geometry, and can include a number of surfaces having embedded circuit traces configured to interconnect electronic components arranged on various surfaces of the module. One of the surfaces of module can include at least one communication interface configured to interconnect the circuit traces on the module to associated circuit paths on a circuit board to which the module is coupled. In some embodiments the module can be operative as a standoff between the circuit board and another component of the electronic device. | 03-05-2015 |
20150068796 | PRINTED CIRCUIT BOARD INCLUDING CONTACT PAD - Provided is a printed circuit board (PCB) used as a signal transmission line of a terminal, comprising a first ground layer elongating in one direction, a first dielectric layer deposited on a top of the first ground layer and elongating in the same direction as the first ground layer, a signal transmission line deposited on a top of the first dielectric layer and elongating in the same direction as the first dielectric layer, a ground pad elongating from one end of the first ground layer and in contact with an external ground, and a signal line pad extended from one end of the signal transmission line and in contact with an external signal line. | 03-12-2015 |
20150101856 | ELIMINATING POOR REVEAL OF THROUGH SILICON VIAS - A method and structure for eliminating through silicon via poor reveal is disclosed. In one embodiment, the method includes obtaining a wafer having a front side, a back side and partially etched and metalized through silicon vias each extending from a portion of the front side through a portion of the back side, terminating before reaching an end surface of the back side. A region of the back side of the wafer is patterned and etched to expose and reveal a portion of each of the plurality of through silicon vias. A metal layer is deposited on the back side of the wafer to form a back side metallization. The metal layer covers all of the back side including the etched region of the back side and the exposed portions of each of the through silicon vias. | 04-16-2015 |
20150101857 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - There is provided a method for manufacturing a printed circuit board including: preparing a substrate having a conductive layer formed on at least a portion thereof; forming an insulating layer formed with an opening through which a portion of the conductive layer is exposed on the substrate; forming a plating seed layer on the insulating layer and the exposed conductive layer; forming an electroplating layer on the plating seed layer by overplating the plating seed layer; and etching the overplated portion in a lump to form a circuit layer in the opening. | 04-16-2015 |
20150101858 | CAVITIES CONTAINING MULTI-WIRING STRUCTURES AND DEVICES - A method is disclosed for making an interconnection component. The steps include forming a mask layer covering a first opening in a sheet-like element that has first and second opposed surfaces; forming a plurality of mask openings in the mask layer, wherein the first opening and a portion of the first surface are partly aligned with each mask opening; and forming electrical conductors on spaced apart portions of the first surface and on spaced apart portions of the interior surface within the first opening which are exposed by the mask openings. The element may consist essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. Each conductor may extend along an axial direction of the first opening and the first conductors may be fully separated from one another within the first opening. | 04-16-2015 |
20150107888 | INTERCONNECTION SUBSTRATE - An interconnection substrate includes: a substrate having a first surface and a second surface opposite the first surface; and a transmission line including two parallel through-hole interconnections that are exposed to the first and second surfaces and are formed inside the substrate. Also, at least one of the two through-hole interconnections includes a narrow portion having a smaller diameter than a diameter of the through-hole interconnection in the first surface and a diameter of the through-hole interconnection in the second surface. | 04-23-2015 |
20150114706 | CIRCUIT BOARD VIA CONFIGURATIONS FOR HIGH FREQUENCY SIGNALING - A circuit board comprises a plurality of layers, first and second reference conductive vias extending in a vertical direction through at least a portion of the plurality of layers, first and second signal conductive vias extending in the vertical direction between and spaced apart in a horizontal direction from the first and second reference conductive vias through at least a portion of the plurality of layers, and a dielectric region extending in the vertical direction between the first and second signal conductive vias. An air via extends in the vertical direction through the dielectric region between the first and second signal conductive vias. An anti-pad extends in the horizontal direction between the first and second reference conductive vias and surrounding in the horizontal direction the first and second signal conductive vias, the air via, and the dielectric region. | 04-30-2015 |
20150144391 | CONNECTION DEVICE AND CONNECTION METHOD FOR HIGH-FREQUENCY DIGITAL SIGNALS - In order to improve the signal integrity, for a connection device for twinax cables the connecting pad belonging to the respective drain wire is disposed directly between the two connecting pads of the two leads belonging to the same data line. Groups of connecting pads can be disposed so that they are offset with respect to one another in order to prevent crosstalk. To this end the data lines can be fastened to the connection device, which for example consists of a circuit board. | 05-28-2015 |
20150144392 | Multipolar Connector - A multipolar connector is provided. It is possible to prevent deformation of a particular pin-shaped terminal of plural pin-shaped terminals arranged in a line in a direction perpendicular to a connection direction of the multipolar connector, and also possible to prevent positional displacements of the particular pin-shaped terminal and other pin-shaped terminals. The multipolar connector ( | 05-28-2015 |
20150144393 | CIRCUIT BOARD - A structure ( | 05-28-2015 |
20150296609 | MULTI-CIRCUIT-LAYER CIRCUIT BOARD - A multi-circuit layer circuit board includes: two circuit layers formed on a substrate, the same circuit layer including a plurality of signal lines and a plurality of ground reference planes. At least one of the signal lines is formed between any two adjacent ground reference planes. The ground reference planes of one circuit layer are electrically coupled to the ground reference planes of the other circuit layer via a plurality of vias. One of the signal lines of one circuit layer is not overlapped with one signal line of the other circuit layer. The signal lines have a toggle rate higher than 800 MHz. | 10-15-2015 |
20150296612 | Composite Body Having a Decorative Surface, an Electrically Conductive Structure and an Electronic Circuit - A composite body comprises a substrate ( | 10-15-2015 |
20150313017 | ABOVE MOTHERBOARD INTERPOSER WITH QUARTER WAVELENGTH ELECTRICAL PATHS - A multi-layer interposer substrate includes multiple layers of single interposer substrates. Each single interposer substrate has a first array of interposer interconnects, each interposer interconnect in the first array of interposer interconnects corresponding to interconnects in an array of processor interconnects, a second array of interposer interconnects, each interposer interconnect in the second array of the interposer interconnects corresponding to an array of circuit interconnects on a circuit substrate, and at least one conductive trace in the interposer substrate in connection with at least one interconnect in the first array of interposer interconnects. The conductive trace has a parallel portion parallel to the interposer substrate such that no electrical connection exists between the interconnect and a corresponding one of the interposer interconnects in the second array of interposer interconnects. An array of connections for a peripheral circuit on each single interposer is connected to the at least one conductive trace. | 10-29-2015 |
20150334821 | VIA STRUCTURE - A via structure includes a ground conductor, a floated conductor and a signal conductor. The ground conductor is electrically coupled to a reference potential. The floated conductor is electrically insulated from the ground conductor. The signal conductor is located between and insulated from the ground conductor and the floated conductor. | 11-19-2015 |
20150334835 | PRINTED CIRCUIT BOARD OF PROBE CARD - The present invention relates to a printed circuit board of a probe card. The printed circuit board comprises a first side, a second side, a plurality of plated through holes and at least one electric barrier. The first side includes a plurality of first contacts and a plurality of second contacts respectively corresponding to the first contacts. The second side includes a plurality of third contacts respectively corresponding to the second contacts and a plurality of second-side traces extended to a predefined/specific region. The plated through holes penetrate through the first side and the second side, so that the third contacts are electrically connected to the second contacts. The at least one electric barrier is installed among at least two of the second side traces. | 11-19-2015 |
20150351227 | WIRING BOARD - A wiring board in the present invention includes an insulating layer, a via-hole penetrating from an upper surface to a lower surface of the insulating layer, a wiring formation layer, and a grounding or power supply conductor, in which the wiring formation layer is formed of a plurality of strip-shaped conductors, and an insulating resin portion filled in at least between the strip-shaped conductors, the grounding or power supply conductor is formed to partially face the strip-shaped conductors, and a relative permittivity of the insulating layer is higher than a relative permittivity of the insulating resin portion. | 12-03-2015 |
20150366052 | REFLECTED SIGNAL ABSORPTION IN INTERCONNECT - Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect stub. In one instance, a printed circuit board (PCB) assembly may comprise a substrate and an interconnect (such as a via) formed in the substrate to route an electrical signal within the PCB. The interconnect may include a stub formed on the interconnect. At least a portion of the stub may be covered with an absorbing material to at least partially absorb a portion of the electric signal that is reflected by the stub. The absorbing material may be selected such that its dielectric loss tangent is greater than one, for a frequency range of a frequency of the reflected portion of the electric signal. A dielectric constant of the absorbing material may be inversely proportionate to the frequency of the reflected electric signal. Other embodiments may be described and/or claimed. | 12-17-2015 |
20160007471 | VIA ADDING METHOD AND PRINTED CIRCUIT BOARD - A via adding method comprising: identifying a target area where a via is to be added in a printed circuit board; determining a starting point for starting a search for a location of the via in the target area; and moving a search point along a path in an intersecting direction that intersects a radial direction around the starting point while moving the search point in the radial direction and determining whether the via is to be added at a moved search point. | 01-07-2016 |
20160013108 | MULTI-LAYERED PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF | 01-14-2016 |
20160014887 | STRUCTURE, WIRING BOARD AND ELECTRONIC DEVICE | 01-14-2016 |
20160027712 | PACKAGE SUBSTRATE - A package substrate is disclosed. The package substrate includes a molding layer, a redistribution structure, and a build-up structure. The redistribution structure is embedded in the molding layer with a surface exposed by the molding layer. The build-up structure is formed on the bottom surface of the molding layer. An inner stress caused by a CTE difference between different materials in the package substrate is reduced by forming at least one groove which is arranged around the periphery of the redistribution structure onto the top surface of the molding layer, thereby improving the problem of the redistribution structure cracking in the prior art. | 01-28-2016 |
20160029488 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes a metal core; a through via penetrating through the metal core; and an insulating film formed between the metal core and the through via. | 01-28-2016 |
20160037627 | SUBSTRATE REINFORCING STRUCTURE - A substrate reinforcing structure for preventing and suppressing deformation or the like of a substrate with a fixed electric component socket. | 02-04-2016 |
20160037653 | INSULATING FILM, PRINTED CIRCUIT BOARD USING THE SAME, AND METHOD OF MANUFACTURING THE PRINTED CIRCUIT BOARD - There are provided an insulating film, a printed circuit board including the insulating film, and a method of manufacturing the printed circuit board. The insulating film includes a first insulating material; a second insulating material; and a metal thin film disposed between the first insulating material and the second insulating material. | 02-04-2016 |
20160050753 | INTERPOSER AND FABRICATION METHOD THEREOF - A method for fabricating an interposer is provided, which includes the steps of: providing a substrate body having opposite first and second sides and a plurality of conductive through holes communicating the first and second sides; forming an insulating layer on the first side of the substrate body, wherein the insulating layer has a plurality of openings correspondingly exposing the conductive through holes; and forming a plurality of conductive pads in the openings of the insulating layer, wherein the conductive pads are electrically connected to the corresponding conductive through holes, thereby dispensing with the conventional wet etching process and hence preventing an undercut structure from being formed under the conductive pads. | 02-18-2016 |
20160050754 | PRINTED WIRING BOARD - A printed wiring board includes three or more than three through holes. An inner wall of the through hole is covered by conductive coating. Same size leads of an electronic component are inserted into the through holes. The through holes are soldered by dip soldering the printed wiring board in melting solder. The through holes have two or more diameters. The diameter of the through hole having more adjacent through holes is not larger than the diameter of the through hole having less adjacent through holes. | 02-18-2016 |
20160079950 | VIA SYSTEM OF PRINTED CIRCUIT BOARD AND METHOD OF MAKING SAME - A printed circuit board (PCB) includes a top outer layer, a bottom outer layer, a signal transmission layer, an inner signal transmission layer, and a via system defined in the PCB. The via system includes two pairs of vias configured to transmit signals from a transmitter to a receiver. A signal transmission pathway is defined in the top outer layer, the signal transmission layer, and the inner signal transmission layer. Signals are sent from the transmitter to a first pair of vias, the signals are transmitted from the first pair of vias to a second pair of vias, and the signals are sent from the second pair of vias to the receiver. The two pairs of vias and the signal transmission pathway provide impedance matching to the signals. | 03-17-2016 |
20160086687 | CONDUCTIVE MATERIAL AND CONNECTED STRUCTURE - There is provided a conductive material which has a rapid reaction rate and is high in fluxing effect. The conductive material according to the present invention includes a conductive particle having solder at at least an external surface, an anionically hardenable compound, an anionic hardener, and an organic acid having a carboxyl group and having a functional group that is an esterified carboxyl group. | 03-24-2016 |
20160095202 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a first metal layer having a first via hole penetrating through an upper surface of the first metal layer and a lower surface thereof; a plated part provided to a surface of the first via hole; an insulating film provided to a surface of the plated part; and a first via formed by providing a conductive material to at least a portion of a region surrounded by an outer surface of the insulating film. Since the circuit board may implement fineness of the first via while forming the first metal layer to be thicker than the related art, warpage may be decreased and heat dissipation performance may be improved. | 03-31-2016 |
20160113111 | CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a circuit board plate, a conductive ring, a solder mask and at least one insulating pad. The circuit board plate includes a surface and a conductive through hole passing through the surface and the circuit board plate, wherein the conductive through hole have a conductive layer disposed on a wall thereof. The conductive ring on the surface surrounds an opening of the conductive through hole on the surface and electrically connects to the conductive layer. The solder mask is disposed on the surface. The conductive ring is exposed outside of the solder mask. The insulating pad has a thickness. The first surface of the insulating pad is adapted to contact the solder mask or the surface and sited at periphery of the conductive ring. The second surface of the insulating pad is adapted for spacing a distance between a solder coating tool and the solder mask. | 04-21-2016 |
20160113120 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a printed wiring board includes forming on carrier a laminate including a second metal foil, a resin layer laminated on the second foil and a first metal foil laminated on the resin layer, irradiating laser upon the first foil such that opening is formed through the first foil and resin layer and exposes surface of the second foil at bottom, plating the first foil such that a via conductor is formed in the opening and a first conductor layer including the first foil and an electroplating film is formed on surface of the resin layer, removing the carrier from the laminate, patterning the first conductor layer on the resin layer, and patterning the second foil such that a second conductor layer including the second foil is formed on opposite surface of the resin layer. The second foil has thickness greater than thickness of the first foil. | 04-21-2016 |
20160128185 | CONFORMAL 3D NON-PLANAR MULTI-LAYER CIRCUITRY - A method for making conformal non-planar multi-layer circuitry is described. The method can include providing a substrate having a non-planar surface and depositing a first conformal dielectric layer on the substrate, the first conformal dielectric layer conforming to the non-planar surface of the substrate and having a non-planar surface. The method can also include applying a first conformal circuitry layer on the first conformal dielectric layer. The method can include depositing a second conformal dielectric layer on the first conformal circuitry layer, the second conformal dielectric layer conforming to a non-planar surface of the first conformal circuitry layer, and applying a second conformal circuitry layer on the second conformal dielectric layer. Successive layers can be sequentially deposited. Microvias may provide electrical connections between circuit layers. | 05-05-2016 |
20160143140 | PRINTED CIRCUIT BOARD HAVING POWER/GROUND BALL PAD ARRAY - A printed circuit board includes a laminated core including at least an internal conductive layer, and a build-up layer on the laminated core. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area that is comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P. | 05-19-2016 |
20160157347 | PRINTED CIRCUIT BOARDS HAVING PROFILED CONDUCTIVE LAYER AND METHODS OF MANUFACTURING SAME | 06-02-2016 |
20160174374 | VERTICAL TRENCH ROUTING IN A SUBSTRATE | 06-16-2016 |
20160174375 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE | 06-16-2016 |
20160181188 | AMELIORATED COMPOUND CARRIER BOARD STRUCTURE OF FLIP-CHIP CHIP-SCALE PACKAGE | 06-23-2016 |
20160183360 | PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE UTILIZING THE SAME | 06-23-2016 |
20160183372 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME | 06-23-2016 |
20160192475 | WIRING BOARD - The wiring board in the present invention includes: an insulating board; external connection pads for a differential signal and external connection pads for grounding or a power supply formed on a lower surface of the insulating board; and a through-conductor formed in the insulating board. Each of the external connection pads is formed in a two-dimensional arrangement, a diameter and an arrangement pitch of the external connection pad for a differential signal are smaller than a diameter and an arrangement pitch of the external connection pad for grounding or a power supply, and an arrangement pitch of the through-conductor connected to the external connection pad for a differential signal is less than or equal to an arrangement pitch of the external connection pad for a differential signal. | 06-30-2016 |
20160379922 | SPACER CONNECTOR - A fabricating process for a spacer connector is disclosed. A core substrate with a plurality of through holes is prepared. A conductive carrier with a dielectric adhesive configured on a top surface is prepared. The core substrate is then pasted on a top surface of the dielectric adhesive layer. The dielectric adhesive exposed in the through hole is then etched. An electric plating process to form metal pillar in the core substrate is performed using the conductive carrier as one of the electrode. | 12-29-2016 |
20160381796 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A printed circuit board and a method of manufacturing a printed circuit board are provided. The printed circuit board includes an insulating layer, a circuit layer embedded in the insulating layer, a solder resist layer disposed on one surface of the insulating layer, the solder resist layer having a cavity of a through-hole shape to expose a part of the circuit layer from the insulating layer, and a metal post embedded in the solder resist layer and exposed to outside via an opening of the solder resist layer, and the metal post includes a first post metal layer, a post barrier layer, and a second post metal layer disposed in that order. | 12-29-2016 |
20180027668 | METHOD OF MANUFACTURING CONDUCTIVE LAYER AND WIRING BOARD | 01-25-2018 |