Entries |
Document | Title | Date |
20080206926 | SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD - A transition layer | 08-28-2008 |
20080227239 | SEMICONDUCTOR-CHIP EXFOLIATING DEVICE AND SEMICONDUCTOR-DEVICE MANUFACTURING METHOD - A semiconductor-chip exfoliating device for exfoliating a semiconductor chip | 09-18-2008 |
20090061561 | METHOD OF PRODUCING ELECTRONIC APPARATUS - To provide a method of producing an electronic apparatus that is inexpensive, contributes to high productivity, and can achieve good communication characteristics. A method of producing an electronic apparatus composed of an IC chip ( | 03-05-2009 |
20090061562 | METHOD OF FABRICATING MICROELECTROMECHANICAL SYSTEMS DEVICES - A method of fabricating microelectromechanical systems devices is disclosed. A silicon substrate having a plurality of microelectromechanical systems elements formed on a first surface thereof is provided. A guard layer defining a plurality of recesses is applied to the silicon substrate such that respective microelectromechanical systems elements are located within respective recesses. The silicon substrate is then segmented into discrete parts and an adhesive layer is bonded to a second surface of the silicon substrate. The guard layer is next segmented into discrete parts corresponding to the discrete parts of the silicon substrate, thereby forming individual microelectromechanical systems devices. Finally, the adhesive layer is selectively exposed to a light source allowing removal of individual microelectromechanical systems devices. | 03-05-2009 |
20090124048 | Semiconductor device and method of manufacturing semiconductor device - A semiconductor device is configured of a semiconductor chip which is sandwiched by first and second resin films having a wiring pattern. Plural semiconductor chips can be fabricated collectively by sandwiching the semiconductor chips by the first and second resin films, and productivity can be improved. | 05-14-2009 |
20090209064 | Lead frame land grid array - A package includes a first plated area, a second plated area, a die attached to the first plated area, and a bond coupling the die to the second plated area. The package further includes a molding encapsulating the die, the bond, and the top surfaces of the first and second plated areas, such that the bottom surfaces of the first and second plated areas are exposed exterior to the package. Additional embodiments include a method of making the package. | 08-20-2009 |
20090215229 | Board on chip package and method of manufacturing the same - A ball grid array type board on chip package may include an integrated circuit chip having an active surface that supports a plurality of contact pads. An interposer may be adhered to the active surface of the integrated circuit chip. At least one hole may be provided through the interposer to expose the contact pads. A board, which may have a first surface supporting a plurality of metal lines, may have a second surface adhered to the interposer. The board may have an opening through which the contact pads may be exposed. A plurality of bonding wires may connect the contact pads to the metal lines through the opening. | 08-27-2009 |
20090317945 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - Size of a chipping is made small, suppressing blinding of a blade, when performing dicing of a wafer. | 12-24-2009 |
20100047968 | ADHESIVE SHEET FOR PRODUCING A SEMICONDUCTOR DEVICE, AND A METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE USING THE SAME - The present invention relates to an adhesive sheet for producing a semiconductor device, which is used when a semiconductor element is caused to adhere onto an adherend and the semiconductor element is wire-bonded, in which a lipophilic lamellar clay mineral is contained. | 02-25-2010 |
20100075462 | METHOD OF FORMING SEMICONDUCTOR PACKAGE - A method of forming a semiconductor package ( | 03-25-2010 |
20100081234 | METHOD OF FORMING A PACKAGE WITH EXPOSED COMPONENT SURFACES - A method of forming a semiconductor package includes forming a coating over a first device, attaching the first device to a substrate using an adhesive, encapsulating the first device using an encapsulant material, releasing the first device from the substrate using the adhesive, removing a portion of the encapsulant material that is over the first device to expose the coating, and removing the coating over the first device to expose a portion of the first device. | 04-01-2010 |
20100267203 | METHOD FOR ISOLATING FLEXIBLE FILM FROM SUPPORT SUBSTRATE - Method for isolating a flexible film from a support substrate and method for fabricating an electronic device are provided. The method for isolating a flexible film from a support substrate includes providing a substrate with a top surface. A surface treatment is subjected to the top surface of the substrate, forming a top surface with detachment characteristics. A flexible film is formed on the top surface with detachment characteristics. The flexible film within the top surface with detachment characteristics is cut and isolated. | 10-21-2010 |
20100317154 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a semiconductor constituent provided with a semiconductor substrate and a plurality of electrodes for external connection provided under the semiconductor substrate. A lower-layer insulating film is provided under and around the semiconductor constituent. A plurality of lower-layer wirings are electrically connected to the electrodes for external connection of the semiconductor constituent, and provided under the lower-layer insulating film. An insulation layer is provided on the lower-layer insulating film in the periphery of the semiconductor constituent. An upper-layer insulating film is provided on the semiconductor constituent and the Insulation layer. A plurality of upper-layer wirings are provided on the upper-layer insulating film. A base plate on which the semiconductor constituent and the insulation layer are mounted is removed. | 12-16-2010 |
20100323475 | Integrated circuit device - An integrally packaged optronic integrated circuit device ( | 12-23-2010 |
20110065240 | LEAD FRAME AND METHOD OF FORMING SAME - A lead frame and a method of making a lead frame for a semiconductor package. The lead frame is formed by stamping a lead frame material into a desire configuration. The stamped lead frame is then affixed to a support material. When assembling a semiconductor package using the lead frame, during saw singuation, the saw does not have to cut through much lead frame material. Thus, the saw blade does not wear quickly. | 03-17-2011 |
20110092022 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects which are connected to the electrode pads and extend over an insulation film. The semiconductor device also includes a plurality of columnar electrodes each of which has a main body section and a protrusion section, and a sealing section which has a top face having a height the same as the top faces of the protrusion sections. The semiconductor device also includes solder balls formed on the protrusion sections. The semiconductor device also has a plurality of trenches in the sealing section. Each trench has a depth which reaches the boundary between the main body and protrusion of the electrode. The side faces of the protrusion section are exposed face defined by the trenches. Each solder ball is electrically connected to the top face and side faces of the protrusion section of each electrode. | 04-21-2011 |
20110117701 | Fiducial Scheme Adapted for Stacked Integrated Circuits - A method for stacking integrated circuit substrates and the substrates used therein are disclosed. In the method, an integrated circuit substrate having top and bottom surfaces is provided. The substrate is divided vertically into a plurality of layers including an integrated circuit layer having integrated circuit elements constructed therein and a buffer layer adjacent to the bottom surface. An alignment fiducial mark extending from the top surface of the wafer into the substrate to a depth below that of the circuit layer is constructed. The vias are arranged in a pattern that provides a fiducial mark when viewed from the bottom surface of the substrate. The pattern can be chosen such that it is recognized by a commercial steeper/scanner/contact mask aligner when viewed from said backside of said wafer. After the substrate is thinned, the alignment fiducial mark is then used to position a mask used in subsequent processing. | 05-19-2011 |
20110151623 | EXPOSED MOLD - A method for forming a semiconductor device can include providing a patterned layer of mold compound having a plurality of individual mold compound structures overlying a base film. The plurality of mold compound structures are aligned with a plurality of semiconductor dice to interpose the individual mold compound structures between the plurality of semiconductor dice. A pressure is applied to the individual mold compound structures to fill spaces between each of the plurality of semiconductor dice with the mold compound. The mold compound structures can be formed on the base film using a photosensitive mold compound. The mold compound structures can also be formed through the use of a patterned mask and a screen printing process. | 06-23-2011 |
20120070939 | STACKED DIE ASSEMBLIES INCLUDING TSV DIE - A method of through substrate via (TSV) die assembly includes positioning a plurality of TSV die with their topside facing down onto a curable bonding adhesive layer on a carrier. The plurality of TSV die include contactable TSVs that include or are coupled to bondable bottomside features protruding from its bottomside. The curable bonding adhesive layer is cured after the positioning. A plurality of second IC die each having a plurality of second bonding features are bonded onto the plurality of TSV die to form a plurality of stacked die assemblies on the carrier. Debonding after the bonding separates the carrier from the plurality of stacked die assemblies. The plurality of stacked die assemblies are then singulated to form a plurality of singulated stacked die assemblies. | 03-22-2012 |
20120190152 | Methods for Fabricating Integrated Passive Devices on Glass Substrates - A method includes forming a plurality of dielectric layers over a semiconductor substrate; and forming integrated passive devices in the plurality of dielectric layers. The semiconductor substrate is then removed from the plurality of dielectric layers. A dielectric substrate is bonded onto the plurality of dielectric layers. | 07-26-2012 |
20120329212 | RECOVERY METHOD FOR POOR YIELD AT INTEGRATED CIRCUIT DIE PANELIZATION - A method for making a packaged integrated circuit is provided. The method includes making a first panel of encapsulated die. In some embodiments, if a threshold number of die are not positioned in proper positions in the first panel, the die are separated from the first panel. The separated die are subsequently encapsulated in other panels of encapsulated die. Conductive interconnects can be formed over the other panels. The other panels are then separated into integrated circuit packages. | 12-27-2012 |
20130089952 | Packaging Process Tools and Packaging Methods for Semiconductor Devices - Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region. | 04-11-2013 |
20130095611 | Packaging Methods for Semiconductor Devices - Packaging methods for semiconductor devices are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates. | 04-18-2013 |
20130143361 | Packaging Process Tools and Systems, and Packaging Methods for Semiconductor Devices - Packaging process tools and systems, and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure for supporting package substrates or integrated circuit die during a packaging process for the integrated circuit die. The mechanical structure includes a low thermal conductivity material disposed thereon. | 06-06-2013 |
20130217184 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND ELECTRONIC DEVICE MANUFACTURING METHOD - A method of manufacturing a semiconductor device, includes: placing a semiconductor element on an adhesive layer that is placed on a support body having a first through hole; placing a part in an area that includes a portion corresponding to the first through-hole, the portion being on the adhesive layer placed on the support body; forming a substrate on the adhesive layer by forming a resin layer on the adhesive layer, on which the semiconductor element and the part have been placed, the substrate including the semiconductor element, the part, and the resin layer; and detaching the substrate from the adhesive layer by pressing the part through the first through-hole. | 08-22-2013 |
20130337608 | SEMICONDUCTOR DEVICE, AND PROCESS FOR MANUFACTURING SEMICONDUCTOR DEVICE - According to the present invention, a structure of a semiconductor device in which adhesive deposits are reduced and yield is excellent; and a process for manufacturing the same can be provided. A process for manufacturing a semiconductor device according to the present invention includes: a step of arranging plural semiconductor elements ( | 12-19-2013 |
20140162406 | FLEXIBLE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a method of transferring semiconductor elements formed on a non-flexible substrate to a flexible substrate. Also, provided is a method of manufacturing a flexible semiconductor device based on the method of transferring semiconductor elements. A semiconductor element grown or formed on the substrate may be efficiently transferred to the resin layer while maintaining an arrangement of the semiconductor elements. Furthermore, the resin layer acts as a flexible substrate supporting the vertical semiconductor elements. | 06-12-2014 |
20140315350 | WAFER PROCESS FOR MOLDED CHIP SCALE PACKAGE (MCSP) WITH THICK BACKSIDE METALLIZATION - A wafer process for MCSP comprises: depositing a metal bump on bonding pads of chips; forming a first packaging layer at front surface of wafer covering metal bumps while forming an un-covered ring at the edge of wafer to expose the ends of each scribe line located between two adjacent chips; thinning first packaging layer to expose metal bumps; grinding back surface of wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer and a thick metal layer at bottom surface of wafer in recessed space in a sequence; cutting off the edge portion of wafer; and separating individual chips from wafer by cutting through first packaging layer, the wafer and the metal seed and metal layers along the scribe line. | 10-23-2014 |
20150372187 | SYSTEMS AND METHODS FOR PREPARING GAN AND RELATED MATERIALS FOR MICRO ASSEMBLY - The disclosed technology relates generally to a method and system for micro assembling GaN materials and devices to form displays and lighting components that use arrays of small LEDs and high-power, high-voltage, and or high frequency transistors and diodes. GaN materials and devices can be formed from epitaxy on sapphire, silicon carbide, gallium nitride, aluminum nitride, or silicon substrates. The disclosed technology provides systems and methods for preparing GaN materials and devices at least partially formed on several of those native substrates for micro assembly. | 12-24-2015 |
20160035692 | STACKED PACKAGING IMPROVEMENTS - A plurality of microelectronic assemblies are made by severing an in-process unit including an upper substrate and lower substrate with microelectronic elements disposed between the substrates. In a further embodiment, a lead frame is joined to a substrate so that the leads project from this substrate. Lead frame is joined to a further substrate with one or more microelectronic elements disposed between the substrates. | 02-04-2016 |
20160079116 | WAFER WITH IMPROVED PLATING CURRENT DISTRIBUTION - A semiconductor wafer is provided including a plurality of dies, each of the plurality of dies including a plurality of semiconductor devices, a plurality of die seals, each of the plurality of die seals being formed at a perimeter of one of the plurality of dies, and a plurality of electrically conductive links, each of the plurality of conductive links connecting one of the plurality of die seals with another one of the plurality of die seals. | 03-17-2016 |
20160079203 | WAFER PROCESS FOR MOLDED CHIP SCALE PACKAGE (MCSP) WITH THICK BACKSIDE METALLIZATION - A wafer process for molded chip scale package (MCSP) comprises: depositing metal bumps on bonding pads of chips on a wafer; forming a first packaging layer at a front surface of the wafer to cover the metal bumps; forming an un-covered ring at an edge of the wafer to expose two ends of each scribe line of a plurality of scribe lines; thinning the first packaging layer to expose metal bumps; forming cutting grooves; grinding a back surface of the wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer at a bottom surface of the wafer in the recessed space; cutting off an edge portion of the wafer; flipping and mounting the wafer on a substrate; depositing a metal layer covering the metal seed layer; removing the substrate from the wafer; and separating individual chips from the wafer by cutting through the first packaging layer, the wafer, the metal seed layers and the metal layers along the scribe lines. | 03-17-2016 |
20160086855 | SYSTEMS AND METHODS FOR CONTROLLING RELEASE OF TRANSFERABLE SEMICONDUCTOR STRUCTURES - The disclosed technology relates generally to methods and systems for controlling the release of micro devices. Prior to transferring micro devices to a destination substrate, a native substrate is formed with micro devices thereon. The micro devices can be distributed over the native substrate and spatially separated from each other by an anchor structure. The anchors are physically connected/secured to the native substrate. Tethers physically secure each micro device to one or more anchors, thereby suspending the micro device above the native substrate. In certain embodiments, single tether designs are used to control the relaxation of built-in stress in releasable structures on a substrate, such as Si (1 0 0). Single tether designs offer, among other things, the added benefit of easier break upon retrieval from native substrate in micro assembly processes. In certain embodiments, narrow tether designs are used to avoid pinning of the undercut etch front. | 03-24-2016 |
20160111375 | TEMPORARY BONDING OF PACKAGES TO CARRIER FOR DEPOSITING METAL LAYER FOR SHIELDING - Techniques for batch processing LGA and BGA packages for forming a very thin conformal metal film over the packages are described. An array of the packages is mounted on a carrier wafer coated with an adhesive layer. For BGA packages, there is a significant space between the bottom of the package body and the bottom of the balls, and this space must be blocked during the PVD process for forming the metal film. The techniques include ways to accommodate the thickness of the BGA while forming a seal around the perimeter of the package body during the metal deposition process. After the carrier wafer is removed from the PVD chamber, a pick and place vacuum nozzle pulls up on each package vertically. The force tears the thin metal film around the bottom edges of the package, resulting in a shielded package. | 04-21-2016 |