| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 714041000 | For reliability enhancing component (e.g., testing backup spare, or fault injection) | 20 |
| 20080215925 | DISTRIBUTED FAULT INJECTION MECHANISM - Methods and systems are provided for testing distributed computer applications using finite state machines. A finite state machine definition for use in a distributed computer system is combined with the fault injections definitions contained within a fault injection campaign that is created for testing the computer application employing that finite state machine. The definition and combination of the finite state machine definition and the fault injection campaign is carried out automatically or manually, for example using a graphical user interface. This combination creates at least one modified finite state machine definition containing the desired injected faults. The modified finite state machine definition is separate from the originally identified finite state machine definition, and the originally identified finite state machine remains intact without injected faults. Trigger points within the finite state machine definition are identified for each fault injection test definition, and the modified finite state machine definition containing the fault injection test definition associated with a given trigger point are used in place of the original finite state machine definition upon detection of that trigger point during runtime of the finite state machine definition. | 09-04-2008 |
| 20110167304 | SYSTEM, METHOD AND COMPUTER READABLE MEDIUM FOR PROVIDING REDUNDANCY IN A MEDIA DELIVERY SYSTEM - In a digital video system, high availability distribution is provided using spare modules such as an integrated receiver decoder, multimedia transcoder and streaming module in support of the primary modules. The primary modules multicast status messages which are monitored by the spare modules. When failure of a primary module is detected, the spare module takes over the role of the failed module, for example by joining the same multicast groups as the failed module and taking over processing of the streams of the failed module. Multiple redundancy schemes are described. | 07-07-2011 |
| 20120084608 | Mechanism for Performing Verification of Template Integrity of Monitoring Templates Used for Customized Monitoring of System Activities - A mechanism for performing verification of template integrity of monitoring templates used for customized monitoring of system activities. A method of embodiments of the invention includes calculating a first hash code for a monitoring template, the monitoring template to customize a performance monitor to serve as a universal monitor to facilitate a plurality of monitoring tools to perform monitoring of activities of a plurality of system components of the computer system, extracting the first hash code from the monitoring template, and calculating a second hash code for the monitoring template. The method further includes verifying integrity of the monitoring template by comparing the first hash code with the second hash code, and the integrity of the monitoring template is determined to be satisfactory if the first hash code matches the second hash code. | 04-05-2012 |
| 20120110386 | AUTOMATED EMERGENCY POWER SUPPLY TEST USING VARIABLE LOAD BANK STAGES - An automated emergency power supply system (EPSS) and testing solution that records generator load values and engine exhaust temperature values to evaluate whether an EPSS test satisfies legislated test criteria. The EPSS test is carried out under software control, which initiates a test by instructing an automatic transfer switch (ATS) to change its status to a test status, causing the essential loads to be powered by a generator instead of a main utility power source. Power monitors record the ATS and generator status during the test as well as electrical parameter data from the ATS and generator and exhaust temperature data and other engine parameter data from the generator. When the test is concluded, the ATS is instructed to return the status to normal so that power delivery is resumed from the main power source. The electrical and engine parameter data is analyzed and compared against legislated test criteria to determine a pass/fail result of the EPSS test. | 05-03-2012 |
| 20120151273 | MULTIPLE POINTS IN TIME DISK IMAGES FOR DISASTER RECOVERY - An enterprise disaster recovery system, including a processor for running at least one data application that reads data from at least one data disk and writes data to the at least one data disk over a period of time, a recovery test engine that (i) generates in parallel a plurality of processing stacks corresponding to a respective plurality of previous points in time, each stack operative to process a command to read data at a designated address from a designated data disk and return data at the designated address in an image of the designated data disk at the previous point in time corresponding to the stack, and (ii) that generates in parallel a plurality of logs of commands issued by the at least one data application to write data into designated addresses of designated data disks, each log corresponding to a respective previous point in time. | 06-14-2012 |
| 20120324293 | CONFIGURING A GENERIC COMPUTING DEVICE UTILIZING SPECIFIC COMPUTING DEVICE OPERATION INFORMATION - A method begins with the specific computing device token sending a distributed storage network (DSN) access request to DSN memory via the generic computing device. The DSN access request identifies specific computing device operation information that is stored as one or more of-sets of encoded data slices in the DSN memory. The method continues with the specific computing device token receiving the one or more of sets of encoded data slices from the DSN memory via the generic computing device and decoding the one or more of sets of encoded data slices to retrieve the specific computing device operation information. The method continues with enabling the generic computing device to function as a specific computing device in accordance with the specific computing device operation information. | 12-20-2012 |
| 20130238940 | METHOD FOR RANKING ANALYSIS TOOLS - Analysis tools are used for resolving a service request for software performance problems. Ranking of the analysis tools includes measuring a plurality of times to resolution of a plurality of service requests for software performance problems after runnings of a plurality of analysis tools are initiated; capturing sets of errors in the plurality of service requests; storing identities of the plurality of analysis tools with the times to resolution of the service requests and the sets of errors; determining an average time to resolution of each of the plurality of analysis tools for each set of errors; organizing the plurality of analysis tools into one or more categories using the sets of errors; and ranking the analysis tools within each category using the average times to resolution of the analysis tools within the category. | 09-12-2013 |
| 20130326279 | RESOURCE PLANNING FOR DATA PROTECTION VALIDATION - A solution for validating a set of data protection solutions is provided. A validation scenario can be defined, which can include data corresponding to a set of attributes for the validation scenario. The attributes can include a time frame for the validation scenario. The validation scenario also can include a set of backup images to be validated, each of which is generated using one of the set of data protection solutions. The set of backup images can be identified using the time frame. A set of resource requirements for implementing the validation scenario can be determined based on the set of backup images and the set of attributes for the validation scenario. | 12-05-2013 |
| 20130339800 | FAILOVER ESTIMATION USING CONTRADICTION - A failover guaranty estimator module performs a proof by contradiction method showing that a cluster failover guaranty can be met for the cluster. For potential failures for which failover is guaranteed, the method assumes a particular host set of one or more hosts fails, leaving one or more working hosts. The method performs a per-failure host set method for the failure host set. The per-failure host set method determines an amount of memory usage within each working host of the assumed working host set that would guaranty that a largest of the virtual machines in the failure host set would be orphaned. The per-failure host set method determines if the virtual machines in the failure set, other than the largest virtual machine in that set, would force the determined amount of memory usage within working hosts, resulting in, the failover guaranty not being met. | 12-19-2013 |
| 20140189432 | DATA RECOVERY USING A CLOUD-BASED REMOTE DATA RECOVERY CENTER - A Remote Metadata Center provides Distaster Recovery (DR) testing and metadata backup services to multiple business organizations. Metadata associated with local data backups performed at business organizations is transmitted to the Remote Metadata Center. Corresponding backup data is stored in a data storage system that is either stored locally at the business organization or at a data storage facility that is at a different location than the Remote Metadata Center and the business organization. DR testing can be staged from the Remote Data Center using the metadata received and optionally with assistance from an operator at the business organization and/or the data storage facility. | 07-03-2014 |
| 20150293827 | APPARATUS FOR ERROR SIMULATION AND METHOD THEREOF - The present invention relates to an apparatus for computing an error rate comprising: a first circuit interface being connected to a first sub-circuit receiving data and computing output data through a predetermined computation process; a second circuit interface and being connected to a first test circuit receiving the same data, which is inputted to the first sub-circuit, and computing output data through the predetermined computation process; an error injecting part injecting an error to the first test circuit; an error detecting part comparing output data of the first sub-circuit to output data of the first test circuit; and an error rate computing part computing input node error probability of the first sub-circuit by statistic processing of the compared result. The apparatus and method for computing error rate of the present invention is able to shorten the time required to obtain error probability, compared to the direct simulation of the full circuit. | 10-15-2015 |
| 20150318058 | ERROR INJECTION AND ERROR COUNTING DURING MEMORY SCRUBBING OPERATIONS - Embodiments relate to performing a memory scrubbing operation that includes injecting an error on a write operation associated with a memory address. One or more errors are detected during a two-pass scrub operation on the memory address. Based on a result of the two-pass scrub operation, one or more of a hard error counter associated with the memory address and a soft error counter associated with the memory address is selected. The one or more selected counters are updated based on the result of the two-pass scrub operation. | 11-05-2015 |
| 20150347256 | ERROR INJECTION AND ERROR COUNTING DURING MEMORY SCRUBBING OPERATIONS - Embodiments relate to performing a memory scrubbing operation that includes injecting an error on a write operation associated with a memory address. One or more errors are detected during a two-pass scrub operation on the memory address. Based on a result of the two-pass scrub operation, one or more of a hard error counter associated with the memory address and a soft error counter associated with the memory address is selected. The one or more selected counters are updated based on the result of the two-pass scrub operation. | 12-03-2015 |
| 20150378859 | FAULT INJECTION TESTING APPARATUS AND METHOD - Provided are fault injection testing apparatus and method which inject faults that may occur in a system or a source file that a user wants to examine and examine which processes are performed by the system or source file when the faults occur. | 12-31-2015 |
| 20160011952 | COMPLIANCE TESTING THROUGH SANDBOX ENVIRONMENTS | 01-14-2016 |
| 20160098333 | DETECTION OF FAULT INJECTION ATTACKS - An apparatus for detecting fault injection includes functional circuitry and fault detection circuitry. The functional circuitry is configured to receive one or more functional input signals and to process the functional input signals so as to produce one or more functional output signals. The functional circuitry meets a stability condition that specifies that stability of a designated set of one or more of the functional input signals during a first time interval guarantees stability of a designated set of one or more of the functional output signals during a second time interval that is derived from the first time interval. The fault detection circuitry is configured to monitor the designated functional input and output signals, to evaluate the stability condition based on the monitored functional input and output signals, and to detect a fault injection attempt in response to detecting a deviation from the stability condition. | 04-07-2016 |
| 20160110274 | MICROCONTROLLER FAULT INJECTION METHOD AND SYSTEM - Temporary fault injection to existing hardware is performed using only software without changing an implementation of the hardware. A fault injection interrupt process starts on an operation of a CPU using an interrupt that is not used by software, and an internal state of hardware is updated to the same value as a result obtained when a fault has occurred during the interrupt process. A clock of the CPU during the interrupt process is accelerated so that a period of time of the interrupt process is smaller than a period of time until a fault becomes effective. | 04-21-2016 |
| 20160196196 | Insertion of Faults into Computer Systems | 07-07-2016 |
| 20180024900 | METHODS AND SYSTEM FOR DETECTING FALSE DATA INJECTION ATTACKS | 01-25-2018 |
| 20180024904 | TEST SUPPORT DEVICE AND TEST SUPPORT METHOD | 01-25-2018 |
