| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 711210000 | Resolving conflict, coherency, or synonym problem | 8 |
| 20080244219 | METHOD AND APPARATUS FOR CONTROLLING A SINGLE-USER APPLICATION IN A MULTI-USER OPERATING SYSTEM - A control system enables a plurality of users to execute a single-user application simultaneously in a multi-user OS which causes address conflicts under simultaneous execution and save results for each user avoiding the address conflicts. The control system comprises a control unit | 10-02-2008 |
| 20080270743 | System and Method for Achieving Enhanced Memory Access Capabilities - A computer system, related components such as a processor agent, and related method are disclosed. In at least one embodiment, the computer system includes a first core, at least one memory device including a first memory segment, and a first memory controller coupled to the first memory segment. Further, the computer system includes a fabric and at least one processor agent coupled at least indirectly to the first core and the first memory segment, and also coupled to the fabric. A first memory request of the first core in relation to a first memory location within the first memory segment proceeds to the first memory controller by way of the at least one processor agent and the fabric. | 10-30-2008 |
| 20080282057 | Database Heap Management System With Variable Page Size and Fixed Instruction Set Address Resolution - A heap management system for a database uses “sets” of pages to store database information. As memory for each successive set of pages is allocated, more memory is allocated for storing rows in each page of the set. Similarly, the maximum number of rows of information storable in each page of each set is greater for each successive set of pages. The number of computer instructions needed to resolve (or calculate) the memory address for a particular row is fixed. Given a target row number, (and the number of rows in the first page, and the width of the column or column group), only a fixed number of computer instructions need to be executed to resolve the starting memory address for the target row. In addition, information of the same type (i.e., one or more columns of a table) may be stored in different pages, and these pages may be located in discontiguous memory segments. This allows space for new rows to be allocated, without requiring all pre-existing rows to be moved to a different memory segment. | 11-13-2008 |
| 20080288744 | DETECTING MEMORY-HAZARD CONFLICTS DURING VECTOR PROCESSING - A method for performing parallel operations in a computer system when one or more memory hazards may be present, which may be implemented by a processor, is described. During operation, the processor receives instructions for detecting conflict between memory addresses in vectors when memory operations are performed in parallel using at least a portion of the vectors, and tracking positions in at least one of the vectors of any detected conflict between the memory addresses. Next, the processor executes the instructions for detecting the conflict between the memory addresses and tracking the positions. | 11-20-2008 |
| 20090006806 | Local Memory And Main Memory Management In A Data Processing System - A data processing system ( | 01-01-2009 |
| 20090313453 | DATA CONFLICT RESOLUTION FOR SOLID-STATE MEMORY DEVICES - In a particular embodiment, a controller is disclosed that is adapted to control read/write access to a storage media. The controller includes data corruption detection logic to reconstruct a logical block address (LBA) lookup table from metadata stored at the storage media upon restart and re-initialization after a power loss event. The controller further includes duplicate conflict resolution logic to identify a valid data block from multiple data blocks that refer to a single LBA. The duplicate conflict resolution logic counts a first number of valid physical pages and a second number of different sectors in each of the multiple data blocks. The duplicate conflict resolution logic selects the valid data block from the multiple data blocks based on at least one of the first and second numbers. | 12-17-2009 |
| 20100325385 | DETECTION OF ZERO ADDRESS EVENTS IN ADDRESS FORMATION - One or more registers used to form an address usable in accessing storage are examined to determine if a zero address event has occurred in forming the address. In response to an indication that a zero address event has occurred in address formation, an alert is provided to the program using the address to access storage. | 12-23-2010 |
| 20110320763 | USING ADDRESSES TO DETECT OVERLAPPING MEMORY REGIONS - The described embodiments determine if two addressed memory regions overlap. First, a first address for a first memory region and a second address for a second memory region are received. Then a composite address is generated from the first and second addresses. Next, an upper subset and a lower subset of the bits in the addresses are determined. Then, using the upper and lower subsets of the addresses, a determination is made whether the addresses meet a condition from a set of conditions. If so, a determination is made whether the lower subset of the bits in the addresses meet a criteria from a set of criteria. Based on the determination whether the lower subset of the bits in the addresses meet a criteria, a determination is made whether the memory regions overlap or do not overlap. | 12-29-2011 |
