| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 708603000 | Sum of products generation | 6 |
| 20080307031 | Fast Modular Zero Sum and Ones Sum Determination - In one embodiment, a state determiner comprises a plurality of logic circuits and a second logic circuit. Each logic circuit corresponds to a respective bit position of a result of an adder. A first logic circuit corresponds to a least significant bit of the result and is coupled to receive a least significant bit of each operand of the adder and a carry-in input to the adder. Each remaining logic circuit is coupled to receive a respective bit from the respective bit position of each operand and a less significant bit adjacent to the respective bit of each operand. Each logic circuit is configured to generate an output signal indicative of whether or not a specific result occurs in the respective bit position of the result responsive only to inputs that the logic circuit is coupled to receive as stated previously. Coupled to receive the output signals from the logic circuits, the second logic circuit is configured to generate a sum signal indicative, when asserted, that the specific result occurs in each bit position of the result of the adder. | 12-11-2008 |
| 20110106871 | Apparatus and method for performing multiply-accumulate operations - A data processing apparatus and method for performing multiply-accumulate operations is provided. The data processing apparatus includes data processing circuitry responsive to control signals to perform data processing operations on at least one input data element. Instruction decoder circuitry is responsive to a predicated multiply-accumulate instruction specifying as input operands a first input data element, a second input data element, and a predicate value, to generate control signals to control the data processing circuitry to perform a multiply-accumulate operation by: multiplying said first input data element and said second input data element to produce a multiplication data element; if the predicate value has a first value, producing a result accumulate data element by adding the multiplication data element to an initial accumulate data element; and if the predicate value has a second value, producing the result accumulate data element by subtracting the multiplication data element from the initial accumulate data element. Such an approach provides a particularly efficient mechanism for performing complex sequences of multiply-add and multiply-subtract operations, facilitating improvements in performance, energy consumption and code density when compared with known prior art techniques. | 05-05-2011 |
| 20120278375 | Exponentiation System - A method for computation, including defining a sequence of n bits that encodes an exponent d, such that no more than a specified number of successive bits in the sequence are the same, initializing first and second registers using a value of a base x that is to be exponentiated, whereby the first and second registers hold respective first and second values, which are successively updated during the computation, successively, for each bit in the sequence computing a product of the first and second values, depending on whether the bit is one or zero, selecting one of the first and second registers, and storing the product in the selected one of the registers, whereby the first and second registers hold respective first and second final values upon completion of the sequence, and returning x | 11-01-2012 |
| 20130054666 | METHOD FOR PREDICTING THE DURATION OF A FUTURE TIME INTERVAL - A method for predicting a value for a length of a future time interval in which a physical variable changes is described, in which at least one measured value for the length of a past time interval and an instantaneously measured value for a length of an instantaneous time interval are taken into account, m values for lengths of past time intervals being added. A first value precedes the instantaneously measured value by k−1, and an mth value precedes the instantaneously measured value by k−m. The m added values are divided by a value for a length of a past time interval which precedes the instantaneously measured value by k. A ratio of the mentioned values is formed. For determining the value to be predicted, an average error is initially added to the instantaneously measured value, forming a sum. The formed ratio is subsequently applied to this sum. | 02-28-2013 |
| 20160179471 | MINIMIZING PROCESSING LOAD WHEN SOLVING MAXIMUM SATISFIABILITY PROBLEM | 06-23-2016 |
| 20220137926 | ARITHMETIC APPARATUS AND MULTIPLY-ACCUMULATE SYSTEM - An arithmetic apparatus includes input lines and one or more multiply-accumulate devices. An electrical signal corresponding to an input value is input into the input lines within a predetermined input period. Multiplication units generate a product value by multiplying the input value by a weight value. An accumulation unit accumulates the charge corresponding to the generated product value. A charging unit charges, after the input period, the accumulation unit in which the charge corresponding to the product value is accumulated. An output unit outputs, after charging by the charging unit starts, a multiply-accumulate signal representing a sum of the product values by performing threshold determination on a voltage retained by the accumulation unit by using a predetermined threshold value. The charging by the charging unit is performed on a common charging mode and a common threshold value is set as the predetermined threshold value. | 05-05-2022 |
