Class / Patent application number | Description | Number of patent applications / Date published |
708207000 | Maximum/minimum determination | 54 |
20080288565 | METHOD TO COMPARE AND SORT BINARY DATA - A binary data comparison method is performed as follows. First, bits of a plurality of binary data are provided, and bit x of the plurality of binary data are summed, where x=n, n−1, . . . , 1 or 0, and bit x is the most significant bit (MSB). If the sum is equal to 1, the binary data having bit x=1 is determined as the maximum. If the sum is larger than or equal to 2, the binary data having bit x=0 is masked by setting all bits of the binary data to zero. The above processes are repeated in which bit x is iterated by bit x−1 if the sum is not equal to 1 until the maximum is found. | 11-20-2008 |
20090024681 | FILTER CIRCUIT AND FILTERING METHOD FOR REMOVING CONSECUTIVE NOISE FROM SAMPLED DIGITAL SIGNALS - A filter circuit removes noise from digital data which is successively input in synchronism with a sampling clock signal. The filter circuit serves to filter the digital data by calculating the average value of every two of the current, previous and twice previous values, determining one of the three average values that is closest to the previous filtered value at each time in synchronism with a sampling clock, outputting the current filtered value by performing an average operation on at least the closest one of the closest average value and previous filtered value. By this process, it is possible to effectively remove noise superimposed on consecutive samples, and also to make the waveform of the filtered output signal smooth. | 01-22-2009 |
20090037503 | TIME DELAY AND FREQUENCY OFFSET CALCULATION SYSTEM AND RELATED METHODS - Time delay and frequency offset calculation systems and related methods. System implementations include modules coupled together configured to calculate a time delay and a corresponding frequency offset of a second signal delayed in time relative to a first signal with the maximum value of a magnitude of a delay optimization function. Implementations of a method for calculating a time delay and frequency offset calculate the maximum value of the delay optimization function by generating the cross-correlation of one or more adjacent discrete Fourier transformed blocks corresponding to the first signal and second signal, respectively, of two or more discrete Fourier transformed blocks. The maximum value of the delay optimization function is then identified. Implementations of the method may compare the identified maximum value of the magnitude of the delay optimization function with a threshold to determine whether to continue processing for additional adjacent discrete Fourier transformed blocks. | 02-05-2009 |
20090112956 | Fast Batch Verification Method And Apparatus There-of - A fast batch verification method and apparatus are provided. In the method of batch-verifying a plurality of exponentiations, (a) a predetermined bit value t is set to an integer equal to or greater than 1; (b) a maximum Hamming weight k is set to an integer equal to or greater than 0 and less than or equal than the predetermined bit value t; (c) n verification exponents s | 04-30-2009 |
20090144350 | Maximum simplex volume criterion-based endmember extraction algorithms - Provided herein are algorithms and processes to extract endmembers from hyperspectral image data in real time. A Simplex Growing Algorithm is effective to estimate a p number of endmembers to be generated, to select one or more initial endmembers as a simplex of k members and to add a k+1 endmember to the simplex that yields a maximum simplex volume until k=p, thereby extracting one or more endmembers from the data. Alternatively, N-FINDR algorithms form an initial simplex set of p endmembers obtained from the hyperspectral image data, find a maximum volume of one or more initial p endmembers therewithin, replace one or more of the p endmembers within the simplex with one or more of the found p endmembers of maximum volume, and refind a maximum volume of p endmember(s) and replace p endmember(s) until no increase in p endmember(s) volume is found. | 06-04-2009 |
20090164540 | APPARATUS AND METHOD FOR UPDATING CHECK NODE OF LOW DENSITY PARITY CHECK CODE - Provided is an apparatus and method for updating a check node of a LDPC code at a high speed. The apparatus includes: a minimum value calculating unit for calculating a first minimum value of an input bit by sequentially calculating each bit of the first minimum value, and calculating a second minimum value using the calculated first minimum value; a node minimum value calculating unit for performing row splitting the calculated first and second minimum values by a check node and calculating a first minimum value and a second minimum value of each of the row-split nodes; and a minimum value deciding unit for deciding one of the calculated first and second minimum values of each of the row-split nodes as a minimum value corresponding to each degree of the input bit. | 06-25-2009 |
20090248768 | ROAD SHAPE ESTIMATING DEVICE, ROAD SHAPE ESTIMATING METHOD AND PROGRAM - A road shape estimating device has a data obtaining processing unit for obtaining interpolation point data for shape interpolation points, a radius calculation processing unit for calculating a radius of curvature at each of the shape interpolation points based on the interpolation point data, a corner detection processing unit for detecting a corner based on the radius of curvature at each of the shape interpolation points and for setting a candidate start point and a candidate end point, and a minimum radius calculation processing unit for setting a center ideal point based on the candidate start point and the candidate end point of the corner, a front ideal point on the candidate start point side of the center ideal point, and a rear ideal point on the candidate end point side of the center ideal point, and for calculating an ideal radius of curvature of the corner as a minimum radius. | 10-01-2009 |
20090307293 | METHOD FOR DETERMINING AN OPTIMUM SAMPLING FREQUENCY, AND A POWER ANALYZER PERFORMING THE METHOD - A method for determining an optimum sampling frequency to be performed by a power analyzer includes the following computer-implemented steps: sampling a time domain signal to obtain a sampling signal according to a predetermined sampling frequency; obtaining two reference sampling signals using higher and lower sampling frequencies compared to the predetermined sampling frequency; transforming the sampling signal and the reference sampling signals to frequency domain signals; computing a sum-of-amplitudes for each of the three frequency domain signals; estimating a minimum sum-of-amplitudes value and a corresponding re-sampling frequency; obtaining a new reference sampling signal using the re-sampling frequency; transforming the new reference sampling signal to a frequency domain signal, and computing a sum-of-amplitudes therefor; and re-estimating the minimum sum-of-amplitudes value and the corresponding re-sampling frequency. The re-sampling frequency that conforms with a predetermined convergence standard is the optimum sampling frequency. | 12-10-2009 |
20090327378 | Instruction-Based Parallel Median Filtering - An instruction-based parallel median filtering processor and method sorts in parallel each combination of pairs of inputs into greater and lesser values; determines from that sorting the minimum, maximum and median filter values of the inputs; processes one of those values and provides the processed value as an input; and applies an instruction for providing one of the values to the processing step, and at least one other instruction for enabling indication of at least one of the maximum, minimum, median filter values. | 12-31-2009 |
20100115014 | Instruction and logic for performing range detection - A technique to accelerate range detection in a spline calcuation. In one embodiment, an instruction and corresponding logic are provided to perform range detection within a computer or processor. | 05-06-2010 |
20100115015 | DATA PROCESSING METHOD AND APPARATUS - A method of data processing. The method comprises applying a filter to an input sample set comprising sample values selected from an input sequence of input sample values, so as to generate a corresponding output sample value having an output sample value position with respect to the input sample set, in which the filter has a maximum output range. The method further comprises deriving a permissible output value range from an input group of two or more input sample values in the input sample set which surround the output sample value position, detecting whether the output of the filter is outside the permissible output value range and, if so, limiting the output of the filter to lie within the permissible output value range. | 05-06-2010 |
20100146020 | System and Method for the Parallelization of Saturated Accumulation Operations - A system and method for parallelization of saturated accumulation is provided. In the method, an input sequence is divided into a plurality of subsequences. For each subsequence, three parallel saturating additions are performed. The local saturation minimum is the saturating addition of the global saturation minimum and the values of the subsequence. The local midpoint is the saturating addition of the values of the subsequence and the local saturation maximum is the saturating addition of the global saturation maximum and the values of the subsequence. In embodiments, the accumulation total for a subsequence is calculated as the saturating addition of the accumulation total for prior subsequences and the local midpoint of the current subsequence, wherein the accumulation total of the last subsequence is the result of the saturated accumulation for the sequence. In another embodiment, the saturated addition of subsequence results are further parallelized before the final result is reached. | 06-10-2010 |
20100146021 | MODULAR-3 CALCULATION APPARATUS AND METHOD - A modular-3 calculation method for binary number includes: determining whether two 1s consecutive from MSB exist in a binary number, when a target value for modular-3 calculation is inputted, and generating a first binary number by substituting the two 1s with 0 whenever the consecutive two 1s exist; performing a modular-3 calculation on the first binary number; and determining the result of the modular-3 calculation. | 06-10-2010 |
20100179974 | Signal Processing Method for Hierarchical Empirical Mode Decomposition and Apparatus Therefor - A signal processing method for performing hierarchical empirical mode decomposition (H-EMD) and an apparatus therefor are provided. In an embodiment, when empirical mode decomposition is performed on an input signal, an artificial assisting signal and the input signal are combined to assist the search for extrema and frequency reduction is performed in each iteration to eliminate the artificial assisting signal and make mode decomposition convergent so as to avoid mode mixing. In addition, in an embodiment, a hierarchical decomposition method is provided to decompose the input signal into a fewer number of fundamental modes. For needs in application, one of the fundamental modes can be further decomposed to produce a number of supplementary modes. In an embodiment, the H-EMD with appropriate frequency reduction can result in modes substantially independent of the form or the way of envelopes and can be applied to decompose multi-dimensional signals. | 07-15-2010 |
20100198892 | PARALLEL RESIDUE ARITHMETIC OPERATION UNIT AND PARALLEL RESIDUE ARITHMETIC OPERATING METHOD - A parallel residue arithmetic operation unit is provided to make it possible to reduce processing delay, and to make an additional multiplier or a residue arithmetic circuit unnecessary, so that a circuit can become small in size. In the parallel residue arithmetic operation unit, a parallel CRC calculation circuit ( | 08-05-2010 |
20100211622 | DATA PROCESSING DEVICE - In a determination as to similarity on parts of a piece of data, high-speed processing is performed without the need for a database. Division signal lines (L | 08-19-2010 |
20100235414 | Scalable Montgomery Multiplication Architecture - A Montgomery multiplication device calculates a Montgomery product of an operand X and an operand Y with respect to a modulus M and includes a plurality of processing elements. In a first clock cycle, two intermediate partial sums are created by obtaining an input of length w−1 from a preceding processing element as w−1 least significant bits. The most significant bit is configured as either zero or one. Then, two partial sums are calculated using a word of the operand Y, a word of the modulus M, a bit of the operand X, and the two intermediate partial sums. In a second clock cycle, a selection bit is obtained from a subsequent processing element and one of the two partial sums is selected based on the value of the selection bit. Then, the selected partial sum is used for calculation of a word of the Montgomery product. | 09-16-2010 |
20100235415 | PROCESSING APPARATUS FOR CALCULATING AN APPROXIMATE VALUE TO AN ANALYTICAL VALUE WITH A TOLERANCE MAINTAINED AND A METHOD THEREFOR - In an approximation computation apparatus, a location monitor designates, each time the number of data of a received data sequence exceeds an integer l, a starting location of the received data for calculating reduced received-data; a dimensionality reducer dimensionally reduces each data sequence including the received data after the corresponding designated starting location by random projection to generate the reduced received-data; an object selecting controller controls an object in response to a result of monitoring from the location monitor of the number of the received data reaching another integer n, deletes currently-stored object data, selects the reduced received-data after the oldest reduced received-data in the reduced received-data, and substitutes and updates an object data sequence to the selected reduced received-data; and a coefficient approximator calculates an approximate value of a wavelet coefficient on the basis of the object data and a wavelet matrix. | 09-16-2010 |
20100241678 | METHOD OF FINDING SOLUTION OF EQUATION AND RECORDING MEDIUM STORING PROGRAM FOR IMPLEMENTING THE SAME - The present invention relates to a solution-finding method, which finds an approximate solution of an equation having difficulty in obtaining an actual solution and a complicated equation in numerical analysis. The method obtains an approximate solution of an equation having a solution in a predetermined interval. Initial values are calculated based on upper and lower limits of the interval. The initial values are applied to a solution-finding equation, including a sign function and the upper and lower limits, and the solution-finding equation is arranged so that a definite integral formula for the sign function is included in the equation. The definite integral formula in the solution-finding equation is calculated using numerical integration, and results of the definite integral formula are applied to the solution-finding equation, thus obtaining an approximate solution. This performance is iterated until the approximate solution satisfies an allowable error. | 09-23-2010 |
20100281086 | EFFICIENT DECISION METHOD FOR REAL NON-LINEAR ARITHMETIC CONSTRAINTS - A system and method for solving a decision problem having Boolean combinations of linear and non-linear operations includes translating the non-linear real operations using a COordinate Rotation DIgital Computer (CORDIC) method programmed on a computer device into linear operations maintaining a given accuracy. Linear and translated linear operations are combined into a formula. Satisfiablity of the formula is solved using a decision procedure for Boolean combinations of linear operations over integers and reals. | 11-04-2010 |
20100299379 | Non-Negative Matrix Factorization as a Feature Selection Tool for Maximum Margin Classifiers - Non-negative matrix factorization, NMF, is combined with identification of a maximum margin classifier by minimizing a cost function that contains a generative component and the discriminative component. The relative weighting between the generative component and the discriminative component are adjusting during subsequent iterations such that initially, when confidence is low, the generative model is favored. But as the iterations proceed, confidence increases and the weight of the discriminative component is steadily increased until it is of equal weight as the generative model. Preferably, the cost function to be minimized is: | 11-25-2010 |
20110016166 | Numeric Decision Device - A numeric decision device for determining a numeric of a specific order in a plurality of numerics includes a plurality of reception ends, a plurality of multiplexer modules each for outputting a numeric received by a reception end or a default value, a comparison module for comparing output signals of the plurality of multiplexer modules to generate a plurality of comparison results and for determining an extreme value, a decoding module for generating a plurality of decoding results according to the plurality of comparison result, a driving module for controlling the plurality of multiplexer modules, the comparison module and the decoding module to operate a default time corresponding to the specific order, and an output unit for outputting the extreme value after the comparison module operates for the default time to determine the numeric of the specific order. | 01-20-2011 |
20110055301 | ALIGNMENT OF MULTIPLE LIQUID CHROMATOGRAPHY-MASS SPECTROMETRY RUNS - The problem of aligning multiple liquid chromatography mass spectrometry (LC-MS) runs to a common reference time frame is solved to facilitate comparison among LC-MS runs. The alignment of multiple LCMS can be achieved by solving a sparse system of linear equations to optimally stretch or compress local retention times for maximal similarity among the multiple runs. The multiple LCMS runs can be aligned simultaneously, thereby providing the advantage of efficient use of data by employing a sparse solver. A method of quality control in retention time alignment is also provided. | 03-03-2011 |
20110060780 | SYSTEMS, METHODS, AND APPARATUS FOR CALIBRATING, CONTROLLING, AND OPERATING A QUANTUM PROCESSOR - Quantum annealing may include applying and gradually removing disorder terms to qubits of a quantum processor, for example superconducting flux qubits of a superconducting quantum processor. A problem Hamiltonian may be established by applying control signals to the qubits, an evolution Hamiltonian established by applying disorder terms, and annealing by gradually removing the disorder terms. Change in persistent current in the qubits may be compensated. Multipliers may mediate coupling between various qubits and a global signal line, for example by applying respective scaling factors. Two global signal lines may be arranged in an interdigitated pattern to couple to respective qubits of a communicatively coupled pair of qubits. Pairs of qubits may be communicatively isolated and used to measure a response of one another to defined signals. | 03-10-2011 |
20110093517 | Systems and Methods for Adaptive Target Search - Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include both a main data processing circuit and an adaptive setting determination circuit. The main data processing circuit receives a series of data samples and includes: an equalizer circuit and a data detector circuit. The equalizer circuit receives the series of data samples and provides an equalized output. The equalizer circuit is controlled at least in part by a coefficient. The data detector circuit receives the equalizer output and provides a main data output based at least in part on a target. The adaptive setting determination circuit receives the series of data samples and the main data output, and operates in parallel with the main data processing circuit to adaptively determine the coefficient and the target. | 04-21-2011 |
20110106868 | Floating point multiplier with partial product shifting circuitry for result alignment - A floating point multiplier includes a data path in which a plurality of partial products are calculated and then reduced to a first partial product and a second partial product. Shift amount determining circuitry | 05-05-2011 |
20110125819 | MINIMUM MEAN SQUARE ERROR PROCESSING - A first systolic array receives an input set of time division multiplexed matrices from a plurality of channel matrices. In a first mode, the first systolic array performs triangularization on the input matrices, producing a first set of matrices, and in a second mode performs back-substitution on the first set, producing a second set of matrices. In a first mode, a second systolic array performs left multiplication on the second set of matrices with the input set of matrices, producing a third set of matrices. In a second mode, the second systolic array performs cross diagonal transposition on the third set of matrices, producing a fourth set of matrices, and performs right multiplication on the second set of matrices with the fourth set of matrices. The first systolic array switches from the first mode to the second mode after the triangularization, and the second systolic array switches from the first mode to the second mode after the left multiplication. | 05-26-2011 |
20110179098 | METHOD FOR SCALAR MULTIPLICATION, METHOD FOR EXPONENTIATION, RECORDING MEDIUM RECORDING SCALAR MULTIPLICATION PROGRAM, RECORDING MEDIUM RECORDING EXPONENTIATION PROGRAM - There are provided a computation method for scalar multiplication or exponentiation and a scalar multiplication program or an exponentiation program which can compute at high speed. In the computation method for scalar multiplication and the scalar multiplication program for computing scalar multiplication by n of a rational point Q in G with respect to a non-negative integer n using an electronic computer, since φ | 07-21-2011 |
20110191398 | METHOD AND APPARATUS FOR DETERMINING A MINIMUM/MAXIMUM OF A PLURALITY OF BINARY VALUES - For determining a minimum/maximum of a plurality of binary values a bit position in the plurality of binary values is determined subsequent to which all bit values are the same. From the plurality of binary values those binary values are selected the bit values of which at the bit position determined in the preceding step and all subsequent positions, if any, has a predetermined value. The preceding steps are then repeated until only one binary value remains which is provided as the minimum or maximum. | 08-04-2011 |
20110225220 | Montgomery Multiplication Architecture - A Montgomery multiplication device calculates a Montgomery product of an operand X and an operand Y with respect to a modulus M and includes a plurality of processing elements. In a first clock cycle, two intermediate partial sums are created by obtaining an input of length w−1 from a preceding processing element as w−1 least significant bits. The most significant bit is configured as either zero or one. Then, two partial sums are calculated using a word of the operand Y, a word of the modulus M, a bit of the operand X, and the two intermediate partial sums. In a second clock cycle, a selection bit is obtained and one of the two partial sums is selected based on the value of the selection bit. Then, the selected partial sum is used for calculation of a word of the Montgomery product. | 09-15-2011 |
20110225221 | MODAL INTERVAL PROCESSOR - A logic circuit computes various modal interval arithmetic values using a plurality of arithmetic function units. A multiplexer gates the desired arithmetic values to a storage register. | 09-15-2011 |
20110258244 | SMOOTHING APPARATUS FOR PEAK WINDOWING - A smoothing apparatus for peak windowing includes an operator for generating a first input signal for smoothing using an input signal for peak windowing and a predetermined clipping threshold level. The apparatus also includes a subtractor for subtracting a feedback signal from the first input signal, and a maximum operator for generating a second input signal. The apparatus also includes a feedback path for generating a feedback signal for a next smoothed input signal by multiplying samples of the second input signal by window coefficients in a first window coefficient combination and a predetermined gain and summing up the multiplication results. The apparatus further includes a convolutional operator for generating a smoothed signal by multiplying samples of the second input signal by window coefficients in a second window coefficient combination for low pass filtering and summing up the multiplication results. | 10-20-2011 |
20110282925 | DIRECTIONAL OPTIMIZATION VIA EBW - An optimization system and method includes determining a best gradient as a sparse direction in a function having a plurality of parameters. The sparse direction includes a direction that maximizes change of the function. This maximum change of the function is determined by performing an optimization process that gives maximum growth subject to a sparsity regularized constraint. An extended Baum Welch (EBW) method can be used to identify the sparse direction. A best step size is determined along the sparse direction by finding magnitudes of entries of direction that maximizes the function restricted to the sparse direction. A solution is recursively refined for the function optimization using a processor and storage media. | 11-17-2011 |
20120005248 | METHOD AND APPARATUS FOR PROCESSING AND RECONSTRUCTING DATA - Certain aspects of the present disclosure relate to a method for quantizing signals and reconstructing signals, and/or encoding or decoding data for storage or transmission. Points of a signal may be determined as local extrema or points where an absolute rise of the signal is greater than a threshold. The tread and value of the points may be quantized, and certain of the quantizations may be discarded before the quantizations are transmitted. After being received, the signal may be reconstructed from the quantizations using an iterative process. | 01-05-2012 |
20120036171 | METHOD AND SYSTEM OF CONVERTING TIMING REPORTS INTO TIMING WAVEFORMS - A method and system of converting an ASCII timing report to a timing waveform to evaluate the behavior of an electrical signal in an ASIC is described. In the method, a timing report is read into memory, and selected timing points are extracted therefrom. A timing waveform is generated from the extracted timing points for display and review by a designer to evaluate whether a given external port or internal pin of the ASIC meets required timing specifications. To create a combined timing waveform, max and min timing waveforms are generated from selected timing points extracted from max and min timing reports. The x-y coordinates of the min timing waveform are shifted by an adjustment factor so as to align with x-y coordinates the max timing waveform, then a combined timing waveform is generated from the x-y coordinates of both the max and min timing waveforms. | 02-09-2012 |
20120041994 | PRECISION MEASUREMENT OF WAVEFORMS - A machine-implemented method for computerized digital signal processing including obtaining a digital signal from data storage or from conversion of an analog signal, and determining, from the digital signal, one or more measuring matrices. Each measuring matrix has a plurality of cells, and each cell has an amplitude corresponding to the signal energy in a frequency bin for a time slice. Cells in each measuring matrix having maximum amplitudes along a time slice and/or frequency bin are identified as maximum cells. Maxima that coincide in time and frequency are identified and a correlated maxima matrix, called a “Precision Measuring Matrix” is constructed showing the coinciding maxima and the adjacent marked maxima are linked into partial chains. | 02-16-2012 |
20120078987 | Vector floating point argument reduction - A processing apparatus is provided with processing circuitry | 03-29-2012 |
20130041929 | ARITHMETIC CIRCUIT AND ARITHMETIC APPARATUS - Provided are an arithmetic circuit and an arithmetic apparatus capable of performing comparison involving conditional branch of three or more values at high speed. The arithmetic circuit includes a plurality of computing units, a plurality of selection circuits and a decision unit. The plurality of computing units perform arithmetic computations on input data and output flag information generated based on a result of the computations. The plurality of selection circuits select any one of the data input to the plurality of computing units. The decision unit receives the flag information from the plurality of computing units and controls select operation of each of the plurality of selection circuits. | 02-14-2013 |
20130080490 | Fast Minimum and Maximum Searching Instruction - An apparatus, system and method of determining an extremum are disclosed. A reference location identifier and a reference extremum are coupled. An input extremum of an input data set is determined and a corresponding location identifier of the input extremum is also determined. The input extremum is compared with the reference extremum to determine an output extremum and output location identifier, based on the comparison. | 03-28-2013 |
20130191425 | Method for Recovering Low-Rank Matrices and Subspaces from Data in High-Dimensional Matrices - A method recovers an uncorrupted low-rank matrix, noise in corrupted data and a subspace from the data in a form of a high-dimensional matrix. An objective function minimizes the noise to solve for the low-rank matrix and the subspace without estimating the rank of the low-rank matrix. The method uses group sparsity and the subspace is orthogonal. Random subsampling of the data can recover subspace bases and their coefficients from a much smaller matrix to improve performance. Convergence efficiency can also be improved by applying an augmented Lagrange multiplier, and an alternating stepwise coordinate descent. The Lagrange function is solved by an alternating direction method. | 07-25-2013 |
20130339411 | Storage of Arbitrary Points in N-Space and Retrieval of Subset Thereof Based on Criteria Including Maximum Distance to an Arbitrary Reference Point - Systems and methods pertaining to nearness calculations of points in n-space. Among the embodiments is associating points of interest with point records in a data store, and efficient retrieval of subsets of those point records which meet arbitrary criteria. Criteria can limit retrieval to neighbors of a reference point (i.e., point records associated with points of interest whose home cells that share at least one interface with another designated home cell. Computationally expensive, at-retrieval range calculations are avoided by performing complimentary calculations at-storage and saving them with related records. The invention is appropriate for use with data storage mechanisms which limit inequality or range operations, or for which such operations result in inefficiencies. When used to model neighboring points on a planetary surface in 3-space, the invention does not suffer from polar distortion (where spherical coordinate systems have difficulty). | 12-19-2013 |
20140059095 | SYSTEM AND METHOD FOR MEAN ESTIMATION FOR A TORSO-HEAVY TAIL DISTRIBUTION - In various example embodiments, systems and methods for estimating the mean of a dataset having a fat tail. Data sets may be partitioned into components, a “torso” component and a “tail” component. For the “tail” component of the data set a more efficient estimator can be obtained (versus the traditionally calculated mean) by using the tail data to estimate parameters for a specific distribution and then deriving the mean from the estimated parameters. The estimated mean from the torso and the estimated mean from the tail may then be combined to obtain the estimated mean for the full data. This can be applied to gross merchandise bought (GMB) by various samples of visitors and apply the experience that was provided to the sample with the highest GMB to all visitors to increase gross revenue. | 02-27-2014 |
20140136582 | METHOD AND APPARATUS FOR DIGITAL AUTOMATIC GAIN CONTROL - A method for scaling a plurality of data values includes storing a first subset of data values of the plurality of data values into a first vector register, determining a maximum data value of the first subset of data values, and storing the greater of the maximum data value and a value stored in a scalar register to the scalar register. Each data value of the subset of data values is stored in a different element of the first vector register. The method further includes determining an adjustment factor based on the value stored in the scalar register and adjusting each data value of the plurality of data values by the adjustment factor. | 05-15-2014 |
20140207837 | CALCULATING DEVICE, CALCULATING SYSTEM, AND COMPUTER PRODUCT - A calculating device selects an action and a corresponding state; acquires an evaluation value by evaluating the combination of the selected action and the selected state; identifies for each selected action, a lowest evaluation value among acquired evaluation values; determines the lowest evaluation value among evaluation values of all the states selected for each action as a minimax candidate, and determines, as a minimax, an evaluation value that is highest among the lowest evaluation values corresponding to the actions; each time an evaluation value is acquired for a combination of a state and an action after the minimax candidate is determined, compares the acquired evaluation value and the minimax candidate, and terminates selection of a state corresponding to the action when the evaluation value is lower than the minimax candidate and selects an unselected action from the action set; and outputs an action corresponding to the determined minimax. | 07-24-2014 |
20140344320 | METHOD FOR EVALUATING THE SOLUTION TO A MULTICRITERIA OPTIMIZATION PROBLEM - Solving a multidimensional multicriteria optimization problem is difficult because the correlations and dependencies between solutions, target functions, and variation variables can be detected only with difficulty. In order to facilitate this, it is proposed that a model space ( | 11-20-2014 |
20140351302 | Precision Measurement of Waveforms - A machine-implemented method for computerized digital signal processing including obtaining a digital signal from data storage or from conversion of an analog signal, and determining, from the digital signal, one or more measuring matrices. Each measuring matrix has a plurality of cells, and each cell has an amplitude corresponding to the signal energy in a frequency bin for a time slice. Cells in each measuring matrix having maximum amplitudes along a time slice and/or frequency bin are identified as maximum cells. Maxima that coincide in time and frequency are identified and a correlated maxima matrix, called a “Precision Measuring Matrix” is constructed showing the coinciding maxima and the adjacent marked maxima are linked into partial chains. | 11-27-2014 |
20140365544 | MULTI-WAY NUMBER PARTITIONING USING WEAKEST LINK OPTIMALITY - Multi-way partitioning is dramatically improved based on “weakest-link” optimality. The set of numbers to be partitioned is subjected to pairwise decomposition with a first partition having a candidate subset (P | 12-11-2014 |
20140365545 | MULTI-WAY NUMBER PARTITIONING USING WEAKEST LINK OPTIMALITY - Multi-way partitioning is dramatically improved based on “weakest-link” optimality. The set of numbers to be partitioned is subjected to pairwise decomposition with a first partition having a candidate subset (P | 12-11-2014 |
20150331833 | PRICE-AND-BRANCH ALGORITHM FOR MIXED INTEGER LINEAR PROGRAMMING - A method includes forming a working mixed integer linear program (MILP) from a given MILP at least by choosing a subset of variables from the MILP, wherein the working MILP includes the chosen subset of variables but no other variables from the given MILP. The working MILP is solved to determine a solution. Using the solution, a special linear program is formed and solved to determine a price of each constraint relative to the solution. Using the prices, variables that are not in the working MILP are evaluated to determine any variables that can contribute to an improved solution. The variables evaluated as contributing to an improved solution are added to the working MILP. The working MILP with the added variables is solved. Apparatus and program products are also disclosed. | 11-19-2015 |
20150333732 | COMPENSATION FILTER FOR CASCADED-INTEGRATOR-COMB DECIMATOR - The present invention is directed to systems and methods which provide an improved compensation filter, as may be used with respect to a decimator, optimally designed using a convex optimization approach. Compensation filters of embodiments of the invention may, for example, be used with respect to a CIC decimator. In accordance with embodiments of the invention, compensation filters are designed with minimum order to approximate target frequency response in the target frequency bands. Additionally or alternatively, compensation filters of embodiments are optimally designed for passband drop and stopband attenuation improvement, such as to satisfy the specified peak ripple in the passband and/or to satisfy the specified peak errors over a set of target sub-bands in the stopband. | 11-19-2015 |
20160019027 | VECTOR SCALING INSTRUCTIONS FOR USE IN AN ARITHMETIC LOGIC UNIT - At least one processor may receive components of a vector, wherein each of the components of the vector comprises at least an exponent. The at least one processor may further determine a maximum exponent out of respective exponents of the components of the vector, and may determine a scaling value based at least in part on the maximum exponent. An arithmetic logic unit of the at least one processor may scale the vector, by subtracting the scaling value from each of the respective exponents of the components of the vector. | 01-21-2016 |
20160085723 | METHOD OF FINDING A MINIMUM AND MINIMUM FINDER UTILIZING THE SAME - A method of finding a minimum and a minimum finder utilizing the same are provided. The method, adopted by the minimum finder, determining a minimum and a probabilistic second minimum from a plurality of inputs, includes: providing a plurality of Minimum-Value Generators (MVG) to form a binary tree, wherein each MVG receives two of the plurality of inputs, compares the values of the two inputs to output a comparison result; and receiving, by a minimum-and-second-minimum generator, the comparison results of two of the plurality of MVGs to generate the minimum and the probabilistic second minimum; wherein the minimum-and-second-minimum generator is not connected to a MVG in a top layer of the binary tree. | 03-24-2016 |
20160140084 | EFFICIENT SPARSE MATRIX-VECTOR MULTIPLICATION ON PARALLEL PROCESSORS - A method of multiplication of a sparse matrix and a vector to obtain a new vector and a system for implementing the method are claimed. Embodiments of the method are intended to optimize the performance of sparse matrix-vector multiplication in highly parallel processors, such as GPUs. The sparse matrix is stored in compressed sparse row (CSR) format. | 05-19-2016 |
20180024967 | SIMPLIFYING CLAUSES FOR MAX-SAT | 01-25-2018 |