| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438759000 | Combined with the removal of material by nonchemical means | 54 |
| 20080200037 | Method of thinning a wafer - A method of thinning wafer is disclosed. A wafer has an active surface and a back surface is provided. A plurality of protruding components may be disposed on the active surface. The wafer is placed in a mold and a polymeric material is formed in the mold to cover at least the active surface of the wafer. The polymeric material is cured and the mold is removed. The back surface of the wafer is ground to thin the wafer. The polymeric material is removed to expose the active surface of the wafer and the protruding components disposed on the active surface. The polymeric material is allowed to cover the active surface of the wafer and the protruding components through the mold; accordingly, the stress produced during the grinding can be distributed uniformly on the wafer, and the wafer warpage, breakage, or collapse, or the protruding component peeling can be avoided. | 08-21-2008 |
| 20080214016 | PROCESS FOR REACTIVE ION ETCHING A LAYER OF DIAMOND LIKE CARBON - Provided is a process for manufacturing a diamond like carbon layer. The process for manufacturing the diamond like carbon layer includes, without limitation, forming a layer of diamond like carbon over a substrate, and reactive ion etching the layer of diamond like carbon. | 09-04-2008 |
| 20080242106 | CHEMICAL MECHANICAL POLISHING METHOD AND APPARATUS FOR REDUCING MATERIAL RE-DEPOSITION DUE TO pH TRANSITIONS - A CMP apparatus and process reduces material re-deposition due to pH transitions. The CMP process reduces the re-deposition of material by performing a water rinse between CMP stages. A CMP apparatus, which performs CMP process, may reduce re-deposition by including a water rinse between two CMP stages that utilize different pH slurries. | 10-02-2008 |
| 20080280454 | Wafer recycling method using laser films stripping - A wafer recycling method using laser films stripping is proposed, in which the high energy density of laser is used to instantaneously vaporize and remove multilayer films of different materials on wafers. The process is simple, and it is not necessary to sore wafers in advance, and the selection of chemicals or mechanical polishing materials needs not to be taken into account. Not only can the environmental protection problem be avoided the process cost be lowered, the problem of damage and residual stress to silicon substrates caused by conventional mechanical polishing can also be mitigated. | 11-13-2008 |
| 20080299779 | SYSTEMS AND METHODS FOR CONTROLLING THE EFFECTIVE DIELECTRIC CONSTANT OF MATERIALS USED IN A SEMICONDUCTOR DEVICE - Systems and methods for controlling the effective dielectric constant of materials used in a semiconductor device are shown and described. In one embodiment, a method comprises providing a semiconductor substrate with a plurality of pillars formed thereon, depositing a first layer of dielectric material over a plurality of pillars, removing a portion of the first layer deposited over the plurality of pillars, and depositing a second layer of dielectric material over the plurality of pillars, where the second layer leaves a plurality of voids between the plurality of pillars. | 12-04-2008 |
| 20090004878 | Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device - It is an object of the present invention is to provide a method of manufacturing an SOI substrate provided with a single-crystal semiconductor layer which can be practically used even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like, is used, and further, to manufacture a semiconductor device with high reliability by using such an SOI substrate. A semiconductor layer which is separated from a semiconductor substrate and bonded to a supporting substrate having an insulating surface is irradiated with electromagnetic waves, and the surface of the semiconductor layer is subjected to polishing treatment. At least part of a region of the semiconductor layer is melted by irradiation with electromagnetic waves, and a crystal defect in the semiconductor layer can be reduced. Further, the surface of the semiconductor layer can be polished and planarized by polishing treatment. | 01-01-2009 |
| 20090023298 | INVERSE SELF-ALIGNED SPACER LITHOGRAPHY - Ultrafine dimensions, smaller than conventional lithographic capabilities, are formed employing an efficient inverse spacer technique comprising selectively removing spacers. Embodiments include forming a first mask pattern over a target layer, forming a spacer layer on the upper and side surfaces of the first mask pattern leaving intermediate spaces, depositing a material in the intermediate spacers leaving the spacer layer exposed, selectively removing the spacer layer to form a second mask pattern having openings exposing the target layer, and etching the target layer through the second mask pattern. | 01-22-2009 |
| 20090075487 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Disclosed is a method of manufacturing a semiconductor device, which includes forming an insulating film above a semiconductor substrate having a recess and stopper film formed above the semiconductor substrate excluding the recess, thereby filling the recess with the insulating film, performing a first polishing by polishing the insulating film by means of a chemical mechanical polishing method using a first polishing liquid containing cerium oxide and first anionic surfactant, thereby obtaining a flattened surface, and performing a second polishing by polishing the flattened insulating film using a second polishing liquid containing cerium oxide and a second anionic surfactant having a smaller molecular weight than that of the first anionic surfactant under a polishing condition which differs from that of the first polishing, thereby exposing the stopper film. | 03-19-2009 |
| 20090104785 | PATTERNING METHOD FOR LIGHT-EMITTING DEVICES - A method of patterning a substrate by mechanically locating a first masking film over the substrate; removing one or more first opening portions in first locations in the first masking film to form one or more first masking portions in the first masking film. First materials are deposited over the substrate in the first locations to form first patterned areas before mechanically locating a second masking film over the substrate and first masking portions. One or more second opening portions are removed from second locations, different from the first locations, in both the second masking film and the first masking portions to form one or more second masking portions. Second materials are deposited over the substrate in the second locations to form second patterned areas. | 04-23-2009 |
| 20090311874 | METHOD OF TREATING SURFACE OF SEMICONDUCTOR SUBSTRATE - A method of treating the surface of a semiconductor substrate has cleaning the semiconductor substrate having a pattern formed thereon by using a chemical solution, removing the chemical solution by using pure water, forming a water repellent protective film on the surface of the semiconductor substrate, rinsing the semiconductor substrate by using pure water, and drying the semiconductor substrate. | 12-17-2009 |
| 20100035438 | Method for manufacturing semiconductor device, and polishing apparatus - An interlayer insulating film is formed on a semiconductor substrate having a semiconductor element formed thereon. At this time, there are protrusions higher than surroundings thereof and non-protruding portions lower than the protrusions on the surface of the interlayer insulating film. First, a first polishing process is carried out on the surface of the interlayer insulating film with use of a first abrasive having non-Prestonian properties produced by mixing abrasive materials including abrasive grains, a polymer additive and water at a predetermined first mixture ratio. Then, after the first abrasive process shifts to an automatically stopping state, a second polishing process is carried out on the surface of the interlayer insulating film with use of a second abrasive having the concentration of polymer additive lower than that of the first abrasive and produced by mixing the abrasive materials at a second mixture ratio different from the first mixture ratio. | 02-11-2010 |
| 20100093183 | UNIT FOR SUPPLYING CHEMICAL LIQUID AND APPARATUS AND METHOD FOR TREATING SUBSTRATE USING THE SAME - Provided are a unit for supplying chemical liquid, and apparatus and method for treating a substrate using the unit. A pre-wet, photoresist, and edge bead removal nozzles are mounted on a single nozzle body. Therefore, the equipment installing space can be saved as compared with a case where the nozzles are installed on respective nozzle arms, thereby making better use of a space for installing equipments. | 04-15-2010 |
| 20100120260 | Multi-Step Process for Forming High-Aspect-Ratio Holes for MEMS Devices - A method of forming an integrated circuit structure includes forming an opening in a substrate, with the opening extending from a top surface of the substrate into the substrate. The opening is filled with a filling material until a top surface of the filling material is substantially level with the top surface of the substrate. A device is formed over the top surface of the substrate, wherein the device includes a storage opening adjoining the filling material. A backside of the substrate is grinded until the filling material is exposed. The filling material is removed from the channel until the storage opening of the device is exposed. | 05-13-2010 |
| 20100167552 | METHODS FOR PARTICLE REMOVAL DURING INTEGRATED CIRCUIT DEVICE FABRICATION - A method of manufacturing an IC device includes providing a workpiece having least one dielectric layer disposed on a surface of the workpiece. The method also includes processing the dielectric layer to form a plurality of apertures in the dielectric layer, where the processing includes at least one micromask-prone process. The method further includes subsequent to the processing step, cryogenically treating the workpiece. In the method, the treating step removes particles deposited on or in the plurality of apertures during the processing step and maintains the plurality of apertures, where the particles are generated from micromask features resulting from the micromask-prone process. | 07-01-2010 |
| 20100311250 | THIN SUBSTRATE FABRICATION USING STRESS-INDUCED SUBSTRATE SPALLING - A method for manufacturing a thin film direct bandgap semiconductor active solar cell device comprises providing a source substrate having a surface and disposing on the surface a stress layer having a stress layer surface area in contact with and bonded to the surface of the source substrate. Operatively associating a handle foil with the stress layer and applying force to the handle foil separates the stress layer from the source substrate, and leaves a portion of the source substrate on the stress layer surface substantially corresponding to the area in contact with the surface of the source substrate. The portion is less thick than the source layer. The stress layer thickness is below that which results in spontaneous spalling of the source substrate. The source substrate may comprise an inorganic single crystal or polycrystalline material such as Si, Ge, GaAs, SiC, sapphire, or GaN. In one embodiment the stress layer comprises a flexible material. | 12-09-2010 |
| 20110070745 | POLISHING METHOD, POLISHING APPARATUS, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A polishing method includes performing conditioning process of injecting a conditioning agent onto a surface of a non-foam polishing pad arranged on a polishing table at a predetermined pressure, and polishing a surface of a polishing target while supplying a polishing slurry containing oxide particles and a surfactant onto the polishing pad, wherein an average of a residual cerium amount is equal to or smaller than 0.35 at % when a plurality of measurement regions, each 200 μm□ in area including the surface of the polishing pad, in a cross section of the polishing pad are measured after the conditioning process. | 03-24-2011 |
| 20110201209 | Method and System for Wafer-Level Planarization of a Die-to-Wafer System - Methods and systems for planarization of a die-to-wafer integration. A planarization coating may be applied to the die-to-wafer assembly, and a planarization plate may be used in the planarization process. The planarization plate may include perforations configured to allow a portion of the planarization coating to extrude through the planarization plate. | 08-18-2011 |
| 20110256730 | FINISHING METHOD FOR MANUFACTURING SUBSTRATES IN THE FIELD OF ELECTRONICS - The invention relates to a method for finishing the surface of semiconducting substrate that has a set of layers and a useful semiconducting layer on at least one of the faces of the substrate, wherein the useful layer has a rough free surface. The method smoothes out the rough free surface of the useful layer by creating a protective layer covering the surface of the useful layer with a thickness 1 to 3 times larger than the peak-to-valley distance of the surface of the useful layer, at least one polishing-oxidation sequence that includes the successive steps of polishing the surface of the protective layer, with the polishing being adjusted so as not to attack the useful layer, and performing a thermal oxidation with supply of oxygen gas of the substrate in order to transform a portion of the useful layer into an oxide layer and reduce the roughness of the surface of the useful layer. | 10-20-2011 |
| 20110275224 | METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE - A material substrate is prepared which has a first surface and a second surface opposite to each other in a thickness direction and is made of silicon carbide. The material substrate is partially carbonized to divide the material substrate into a carbonized portion made of a material obtained by carbonizing silicon carbide, and a silicon carbide portion made of silicon carbide. This step of partially carbonizing the material substrate is performed to partially carbonize the second surface. In order to adjust a shape of the material substrate when viewed in a planar view, a portion of the material substrate is removed. This step of removing the portion of the material substrate includes the step of processing the carbonized portion. Accordingly, a silicon carbide substrate having a desired planar shape can be obtained readily. | 11-10-2011 |
| 20110318938 | TEMPORARY BONDING ADHESIVE FOR A SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - To provide a temporary bonding adhesive for a semiconductor wafer that reduces damage to a semiconductor wafer, makes it readily detachable, and can shorten the time required for thermal decomposition, and a manufacturing method for a semiconductor device using this.
| 12-29-2011 |
| 20120244719 | IMPRINT METHOD, IMPRINTING EQUIPMENT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - In an imprint method according to one embodiment, a template on which a template pattern is formed is pushed against resist on a substrate to be transferred while the resist is cured in this state. The template is subsequently separated from the cured resist. The template is then degassed from the template pattern surface side between after the template is separated from the cured resist and till the template is pushed against resist at the next shot. | 09-27-2012 |
| 20120282782 | Thin Substrate Fabrication Using Stress-Induced Spalling - Manufacturing a thin film direct bandgap semiconductor active solar cell device comprises providing a source substrate having a surface and disposing on the surface a stress layer having a stress layer surface area in contact with and bonded to the surface of the source substrate. Operatively associating a handle foil with the stress layer and applying force to the handle foil separates the stress layer from the source substrate, and leaves a portion of the source substrate on the stress layer surface substantially corresponding to the area in contact with the surface of the source substrate. The portion is less thick than the source layer. The stress layer thickness is below that which results in spontaneous spalling of the source substrate. The source substrate may comprise an inorganic single crystal or polycrystalline material such as Si, Ge, GaAs, SiC, sapphire, or GaN. The stress layer may comprise a flexible material. | 11-08-2012 |
| 20120289060 | WAFER PROCESSING METHOD - In a wafer processing method, the back side of a wafer having a plurality of devices on the front side thereof is ground, thereby reducing the thickness of the wafer to a predetermined thickness. The back side of the wafer is polished after performing the back grinding step, thereby removing a grinding strain, and a silicon nitride film is formed on the back side of the wafer. The thickness of the silicon nitride film to be formed in the silicon nitride film forming step is set to 6 to 100 nm. Thus, the silicon nitride film having a thickness of 6 to 100 nm is formed on the polished back side of the wafer from which a grinding strain has been removed. Accordingly, each device constituting the wafer can ensure a sufficient die strength and a sufficient gettering effect. | 11-15-2012 |
| 20130012031 | HAFNIUM TANTALUM OXIDE DIELECTRICS - A dielectric layer containing a hafnium tantalum oxide film and a method of fabricating such a dielectric layer produce a dielectric layer for use in a variety of electronic devices. Embodiments include structures for capacitors, transistors, memory devices, and electronic systems with dielectric layers containing a hafnium tantalum oxide film structured as one or more monolayers. | 01-10-2013 |
| 20130017688 | Reduction Of Pore Fill Material DewettingAANM Dubois; Geraud Jean-MichelAACI San JoseAAST CAAACO USAAGP Dubois; Geraud Jean-Michel San Jose CA USAANM Frot; Theo J.AACI Los GatosAAST CAAACO USAAGP Frot; Theo J. Los Gatos CA USAANM Magbitang; Teddie P.AACI San JoseAAST CAAACO USAAGP Magbitang; Teddie P. San Jose CA USAANM Volksen; WilliAACI San JoseAAST CAAACO USAAGP Volksen; Willi San Jose CA US - In one exemplary embodiment, a method includes: providing a structure having a first layer overlying a substrate, where the first layer includes a dielectric material having a plurality of pores; applying a filling material to a surface of the first layer, where the filling material includes a polymer and at least one additive, where the at least one additive includes at least one of a surfactant, a high molecular weight polymer and a solvent; and after applying the filling material, heating the structure to enable the filling material to at least partially fill the plurality of pores uniformly across an area of the first layer, where heating the structure results in residual filling material being uniformly left on the surface of the first layer. | 01-17-2013 |
| 20130072026 | Formation of a Masking Layer on a Dielectric Region to Facilitate Formation of a Capping Layer on Electrically Conductive Regions Separated by the Dielectric Region - A masking layer is formed on a dielectric region of an electronic device so that, during formation of a capping layer on electrically conductive regions that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; capping layer material formed over the dielectric region can be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, such as silane-based SAMs, can be used to form the masking layer. The capping layer can be formed of an electrically conductive material a semiconductor material, or an electrically insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition. | 03-21-2013 |
| 20130109194 | POLISHING LIQUID COMPOSITION | 05-02-2013 |
| 20130130511 | Coarse Grid Design Methods and Structures - A layer of a mask material is deposited on a substrate. A beam of energy is scanned across the mask material in a rasterized linear pattern and in accordance with a scan pitch that is based on a pitch of conductive structure segments to be formed on the substrate. The beam of energy is defined to transform the mask material upon which the beam of energy is incident into a removable state. During scanning the beam of energy across the mask material, the beam of energy is turned on at locations where a conductive structure is to be formed on the substrate, and the beam of energy is turned off at locations where a conductive structure is not to be formed on the substrate. | 05-23-2013 |
| 20130143412 | METHODS FOR PREPARING THIN SAMPLES FOR TEM IMAGING - A method and apparatus for preparing thin TEM samples in a manner that reduces or prevents bending and curtaining is realized. Embodiments of the present invention deposit material onto the face of a TEM sample during the process of preparing the sample. In some embodiments, the material can be deposited on a sample face that has already been thinned before the opposite face is thinned, which can serve to reinforce the structural integrity of the sample and refill areas that have been over-thinned due to a curtaining phenomena. In other embodiments, material can also be deposited onto the face being milled, which can serve to reduce or eliminate curtaining on the sample face. | 06-06-2013 |
| 20130143413 | WAFER PROCESSING METHOD - The back side of a wafer having a plurality of devices formed on the front side thereof is ground to thereby reduce the thickness of the wafer. A resin layer is formed on the front side of the wafer and is cured. The resin layer is planarized while the back side of the wafer is held on a chuck table and the resin layer formed on the front side of the wafer is exposed. The resin layer is bonded to a hard plate through a bonding member, and the back side of the wafer is ground by using a grinding unit of a grinding apparatus to thereby reduce the thickness of the wafer to a predetermined thickness while the hard plate bonded to the wafer is held on a chuck table of the grinding apparatus. | 06-06-2013 |
| 20130189850 | RESIST UNDERLAYER COATING FORMING COMPOSITION FOR FORMING PHOTO-CROSSLINKING CURED RESIST UNDERLAYER COATING - An underlayer coating is used as an underlayer of photoresists in lithography process of the manufacture of semiconductor devices and has a high dry etching rate in comparison to the photoresists, does not intermix with the photoresists, and is capable of flattening the surface of a semiconductor substrate having holes of a high aspect ratio; and an underlayer coating forming composition can form the underlayer coating. The underlayer coating forming composition for forming by light irradiation an underlayer coating used as an underlayer of a photoresist in a lithography process of the manufacture of semiconductor devices, includes a polymerizable substance and a photopolymerization initiator. | 07-25-2013 |
| 20130203265 | CARRIER BONDING AND DETACHING PROCESSES FOR A SEMICONDUCTOR WAFER - The present invention provides a temporary carrier bonding and detaching process. A first surface of a semiconductor wafer is mounted on a first carrier by a first adhesive, and a first isolation coating is disposed between the first adhesive and the first carrier. Then, a second carrier is mounted on the second surface of the semiconductor wafer. The first carrier is detached. The method of the present invention utilizes the second carrier to support and protect the semiconductor wafer, after which the first carrier is detached. Therefore, the semiconductor wafer will not be damaged or broken, thereby improving the yield rate of the semiconductor process. Furthermore, the simplicity of the detaching method for the first carrier allows for improvement in efficiency of the semiconductor process. | 08-08-2013 |
| 20130210239 | PRE-CUT WAFER APPLIED UNDERFILL FILM - A method for preparing a semiconductor with preapplied underfill comprises providing a semiconductor wafer with a plurality of metallic bumps on its top side and, optionally, through-silica-vias vertically through the silicon wafer; laminating a back grinding tape to the top of the wafer covering the metallic bumps and through silicon vias; thinning the back side of the wafer; mounting a dicing tape to the back side of the thinned wafer and mounting the silicon wafer and dicing tape to a dicing frame; removing the back grinding tape; providing an underfill material precut into the shape of the wafer; aligning the underfill on with the wafer and laminating the underfill to the wafer. | 08-15-2013 |
| 20130316542 | SPALLING UTILIZING STRESSOR LAYER PORTIONS - A method for spalling local areas of a base substrate utilizing at least one stressor layer portion which is located on a portion, but not all, of an uppermost surface of a base substrate. The method includes providing a base substrate having a uniform thickness and a planar uppermost surface spanning across an entirety of the base substrate. At least one stressor layer portion having a shape is formed on at least a portion, but not all, of the uppermost surface of the base substrate. Spalling is performed which removes a material layer portion from the base substrate and provides a remaining base substrate portion. The material layer portion has the shape of the at least one stressor layer portion, while the remaining base substrate portion has at least one opening located therein which correlates to the shape of the at least one stressor layer. | 11-28-2013 |
| 20130330931 | METHOD OF MAKING A SEMICONDUCTOR DEVICE - In one embodiment, a method for forming an electronic device includes providing a substrate having a plurality of electronic devices formed therein, forming a protective layer over a major surface of the substrate containing the plurality of electronic devices, forming a mold layer over the protective layer, thinning a major surface of the substrate opposite to the major surface containing the plurality of electronic devices, and removing the adhesive layer and the mold layer. In another embodiment, a zone coating layer can be included between the protective layer and the mold layer. | 12-12-2013 |
| 20140038424 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A polyimide film is effectively formed on a complicated surface. The polyimide film is formed by reacting, on the surface, diamine monomer and tetracarboxylic acid dianhydride monomer both of which are dissolved within carbon dioxide in a supercritical states, together with a polyamic acid resulting from a reaction between the diamine monomer and the tetracarboxylic acid dianhydride reached to the surface. | 02-06-2014 |
| 20140038425 | METHODS OF ELIMINATING PATTERN COLLAPSE ON PHOTORESIST PATTERNS - A stabilizing solution for treating photoresist patterns and methods of preventing profile abnormalities, toppling and resist footing are disclosed. The stabilizing solution comprises a non-volatile component, such as non-volatile particles or polymers, which is applied after the photoresist material has been developed. By treating the photoresist with the solution containing a non-volatile component after developing but before drying, the non-volatile component fills the space between adjacent resist patterns and remains on the substrate during drying. The non-volatile component provides structural and mechanical support for the resist to prevent deformation or collapse by liquid surface tension forces. | 02-06-2014 |
| 20140057449 | COATING METHOD OF AN ALIGNMENT FILM - Provided is a coating method of an alignment film, including: providing a board, having a substrate, the substrate forming an alignment liquid coating area thereon; forming a barrier structure around the alignment liquid coating area; coating an alignment liquid in the alignment liquid coating area, wherein the barrier structure blocks the alignment liquid to diffuse outside the alignment liquid coating area; and curing the alignment liquid to form an alignment film. The present invention may assure that the formed alignment film can not affect other areas adjacent to the alignment liquid coating area. | 02-27-2014 |
| 20140057450 | Wafer Bonding System and Method for Bonding and Debonding Thereof - A method of treating the surface of a semiconductor wafer through the formation of a bonding system is provided in order to enhance the handling of the wafer during subsequent processing operations. The method generally comprises the steps of applying a release layer and an adhesive to different wafers; bonding the wafers together to form a bonded wafer system; performing at least one wafer processing operation (e.g., wafer grinding, etc.) to form a thin processed wafer; debonding the wafers; and then cleaning the surface of the processed wafer with an organic solvent that is capable of dissolving the release layer or any residue thereof. The adhesive includes a vinyl-functionalized polysiloxane oligomeric resin, a Si—H functional polysiloxane oligomeric resin, a catalyst, and optionally an inhibitor, while the release layer is comprised of either a silsesquioxane-based resin or a thermoplastic resin. | 02-27-2014 |
| 20140242807 | METHOD FOR FACILITATING CRACK INITIATION DURING CONTROLLED SUBSTRATE SPALLING - A method is provided in which a substrate including various materials of different fracture toughness (K | 08-28-2014 |
| 20140273508 | Wafer Back Side Processing Structure and Apparatus - Disclosed herein is a method of processing a device, comprising providing a substrate having a buffer layer disposed on a back side and forming an outer protection layer over the back side of the buffer layer, forming a thermal layer on the back side of the outer protection layer and heating the substrate through the thermal layer and the back side of the outer protective layer. A back side protection layer may be formed on the back side of the buffer layer. The thermal layer has a thermal emissivity coefficient of about 0.7 or greater and a thickness greater than a roughness of the back side of the outer protection layer. The back side protection layer is an oxide with a thickness between about 20 angstroms and about 50 angstroms. The outer protection layer is a nitride with a thickness between about 50 angstroms and about 300 angstroms. | 09-18-2014 |
| 20150031215 | APPARATUS, HYBRID LAMINATED BODY, METHOD AND MATERIALS FOR TEMPORARY SUBSTRATE SUPPORT - A hybrid laminated body is provided that includes a light-transmitting support, a latent release layer disposed upon the light-transmitting support, a joining layer disposed upon the latent release layer, and a polyamide thermoplastic priming layer disposed upon the joining layer. The hybrid laminated body can further include a substrate to be processed such as, for example, a silicon wafer to be ground. Also provided is a method for manufacturing the provided laminated body. | 01-29-2015 |
| 20150104953 | HIGH UV CURING EFFICIENCY FOR LOW-K DIELECTRICS - One embodiment is a method for semiconductor processing. In this method, a precursor film is provided over a semiconductor substrate, where the precursor film is made of a structural former and porogen. Prior to cross-linking, the porogen is removed by exposure to UV radiation having one or more wavelengths in the range of 150 nm to 300 nm, while a temperature of 300° C. to 500° C. is applied to the semiconductor substrate. Meanwhile, a Argon:Helium flow rate of 80>Ar>10 slm, 80>He>10 slm is set for the ambient substrate environment where the ratio of Ar:He ranges from 0:1 to 1:0 by volume or molality. | 04-16-2015 |
| 20150140830 | METHOD FOR IMPROVING QUALITY OF SPALLED MATERIAL LAYERS - Methods for removing a material layer from a base substrate utilizing spalling in which mode III stress, i.e., the stress that is perpendicular to the fracture front created in the base substrate, during spalling is reduced. The substantial reduction of the mode III stress during spalling results in a spalling process in which the spalled material has less surface roughness at one of its' edges as compared to prior art spalling processes in which the mode III stress is present and competes with spalling. | 05-21-2015 |
| 20150140831 | CRACK CONTROL FOR SUBSTRATE SEPARATION - A method for separating a layer for transfer includes forming a crack guiding layer on a substrate and forming a device layer on the crack-guiding layer. The crack guiding layer is weakened by exposing the crack-guiding layer to a gas which reduces adherence at interfaces adjacent to the crack guiding layer. A stress inducing layer is formed on the device layer to assist in initiating a crack through the crack guiding layer and/or the interfaces. The device layer is removed from the substrate by propagating the crack. | 05-21-2015 |
| 20150325443 | SPALLING WITH LASER-DEFINED SPALL EDGE REGIONS - Laser ablation can be used to form a trench within at least a blanket layer of a stressor layer that is atop a base substrate. A non-ablated portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can also be used to form a trench within a blanket material stack including at least a plating seed layer. A stressor layer is formed on the non-ablated portions of the material stack and one portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can be further used to form a trench that extends through a blanket stressor layer and into the base substrate itself. The trench has an edge that defines the edge of the material layer region to be spalled. | 11-12-2015 |
| 20150353793 | TEMPORARY ADHESIVE MATERIAL FOR WAFER PROCESSING, WAFER PROCESSING LAMINATE, AND METHOD FOR MANUFACTURING THIN WAFER USING SAME - The invention is adhesive material for a wafer processing used for temporarily bonding a supporting substrate to wafer having a front surface includes circuit formed thereon and a back surface to be processed, including first temporary adhesive layer composed of a layer of a silicone-modified styrene base thermoplastic elastomer, and second temporary adhesive layer composed of a thermosetting polymer layer on first temporary adhesive layer, wherein layer is capable of releasably adhering to front surface of wafer, and layer is capable of releasably adhering to the supporting substrate. Thereby, it provides a temporary adhesive material for wafer processing, wafer processing lamination, and method for manufacturing thin wafer using same, which facilitates temporary adhesion between supporting substrate and wafer having a circuit, is highly compatible with steps of forming TSV and forming wiring on back surface of wafer, allows easy delamination, and is capable of increasing productivity of thin wafers. | 12-10-2015 |
| 20150364321 | Alkyl-Alkoxysilacyclic Compounds and Methods for Depositing Films Using Same - A method and composition for producing a porous low k dielectric film via chemical vapor deposition is provided. In one aspect, the method comprises the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber gaseous reagents including at least one structure-forming precursor comprising an alkyl-alkoxysilacyclic compound, and a porogen; applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a preliminary film on the substrate, wherein the preliminary film contains the porogen, and the preliminary film is deposited; and removing from the preliminary film at least a portion of the porogen contained therein and provide the film with pores and a dielectric constant of 2.7 or less. In certain embodiments, the structure-forming precursor further comprises a hardening additive. | 12-17-2015 |
| 20150380291 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A glass substrate is bonded to a front surface of a wafer on which a front surface element structure is formed, with an adhesive layer interposed therebetween. An adhesive layer is formed on the wafer to extend from the front surface of the wafer to a chamfered portion and a side surface of the wafer. The adhesive layer is formed on a first surface of the glass substrate and is not formed on a chamfered portion and a side surface of the glass substrate. After the rear surface of the wafer is ground, a rear surface element structure is formed on the ground rear surface. A laser beam is radiated to the glass substrate and the glass substrate is peeled from the adhesive layer. The adhesive layer is removed and the wafer is cut by dicing. In this way, a chip having a thin semiconductor device formed thereon is completed. | 12-31-2015 |
| 20150380292 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes: bonding at least a part of the rear surface of a semiconductor wafer, and a supporting substrate in use of using a silane coupling agent; forming a functional structure on a front surface of the semiconductor wafer; placing a condensation point of laser light transmitted through the semiconductor wafer on a bonding interface between the semiconductor wafer and the supporting substrate, and irradiating the bonding interface with the laser light, thereby forming a fracture layer on at least a part of an outer circumferential section of the bonding interface; separating the bonding interface; and carrying out rear surface processing on the rear surface of the semiconductor wafer. | 12-31-2015 |
| 20160005608 | Femtosecond Laser-Induced Formation Of Submicrometer Spikes On A Semiconductor Substrate - The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface. | 01-07-2016 |
| 20160133459 | METHODS FOR CONTROLLING FIN RECESS LOADING - A method of processing a substrate includes depositing an oxide material on a substrate having a first region, a second region and a plurality of features, wherein the first region has a high feature density and the second region has a low feature density; and controlling a ratio of an etch rate of the oxide material in the first region to an etch rate of the oxide material in the second region by forming an ammonium hexafluorosilicate ((NH | 05-12-2016 |
| 20160163553 | METHOD FOR IMPROVING QUALITY OF SPALLED MATERIAL LAYERS - Methods for removing a material layer from a base substrate utilizing spalling in which mode III stress, i.e., the stress that is perpendicular to the fracture front created in the base substrate, during spalling is reduced. The substantial reduction of the mode III stress during spalling results in a spalling process in which the spalled material has less surface roughness at one of its' edges as compared to prior art spalling processes in which the mode III stress is present and competes with spalling. | 06-09-2016 |
| 20160163560 | SUBSTRATE PROCESSING METHOD, STORAGE MEDIUM AND SUBSTRATE PROCESSING SYSTEM - There is provided a method of processing a substrate using a block copolymer composed of a first polymer containing an oxygen atom and a second polymer containing no oxygen atom, the method including: coating the block copolymer onto the substrate on which a predetermined pattern is formed; phase-separating the block copolymer into the first polymer and the second polymer; and heating the substrate in a low oxygen atmosphere to selectively remove the first polymer from the phase-separated block copolymer. | 06-09-2016 |
