| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438705000 | Altering etchability of substrate region by compositional or crystalline modification | 26 |
| 20080254635 | Method for Accelerated Etching of Silicon - A method for the plasma-free etching of silicon using the etching gas ClF | 10-16-2008 |
| 20080286975 | PLATINUM NANODET ETCH PROCESS - A method for selectively removing nano-crystals on an insulating layer. The method includes providing an insulating layer with nano-crystals thereon; exposing the nano-crystals to a high density plasma comprising a source of free radical chlorine, ionic chlorine, or both to modify the nano-crystals; and removing the modified nano-crystals with a wet etchant. | 11-20-2008 |
| 20090047791 | SEMICONDUCTOR ETCHING METHODS - A method of etching semiconductor structures is disclosed. The method may include etching an SRAM portion of a semiconductor device, the method comprising: providing a silicon substrate layer, a nitride layer thereover, an optical dispersive layer over the nitride layer, and a silicon anti-reflective coating layer thereover; etching the silicon anti-reflective coating layer using an image layer; removing the image layer; etching the optical dispersive layer while removing the silicon anti-reflective coating layer; etching the optical dispersive layer and the nitride layer simultaneously; and etching the optical dispersive layer, the nitride layer, and the silicon substrate simultaneously. | 02-19-2009 |
| 20090111274 | Methods of Manufacturing a Semiconductor Device and Apparatus and Etch Chamber for the Manufacturing of Semiconductor Devices - Methods of manufacturing a semiconductor device, apparatus and etch chamber for the manufacturing of semiconductor devices are provided. Embodiments are related to the rotating of a semiconductor substrate round an axis perpendicular to its surface during etching or reactive deposition processes, and irradiating a semiconductor substrate non-uniformly during etching or reactive deposition processes. | 04-30-2009 |
| 20090163031 | Method for Manufacturing Semiconductor Device - A method for manufacturing a semiconductor device includes forming a hard mask pattern and a spacer at both sides of the hard mask pattern. The method also includes forming a spacer pattern, so that the spacer remains in one direction to form a spacer pattern, forming a photoresist pattern having a pad type overlapping a side of the spacer pattern, and etching an underlying layer, with the photoresist pattern and the spacer pattern as a mask, to form an isolated pattern. The method improves resolution and process margins to obtain a highly-integrated transistor. | 06-25-2009 |
| 20090170331 | METHOD OF FORMING A BOTTLE-SHAPED TRENCH BY ION IMPLANTATION - Disclosed is a method of forming a bottle shaped trench in a substrate which includes forming at least one trench having an upper portion and a lower portion into a semiconductor substrate, the at least one trench having vertical sidewalls that extend to a common bottom wall; implanting ions into the semiconductor substrate abutting the upper portion of the at least one trench to form an amorphous region in the semiconductor substrate abutting the upper portion of the at least one trench; and etching the lower portion of the at least one trench selective to the amorphous region to provide an elongated bottom portion which extends laterally beyond the upper portion. | 07-02-2009 |
| 20090181544 | METHOD FOR PREVENTING BACKSIDE DEFECTS IN DIELECTRIC LAYERS FORMED ON SEMICONDUCTOR SUBSTRATES - A method of forming a TEOS oxide layer over an nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer formed on a substrate. The method includes forming the nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer on a top surface and a top side beveled edge proximate to the top surface of a substrate; removing or preventing formation of a carbon-rich layer on a bottom side bevel edge region proximate to a bottom surface of the substrate or converting the carbon-rich layer to nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide; and forming the TEOS oxide layer on the top surface, the top side beveled edge and the bottom side bevel edge region of the substrate. | 07-16-2009 |
| 20090233448 | LITHOGRAPHY RESOLUTION IMPROVING METHOD - A method of improving lithography resolution on a semiconductor, including the steps of providing a substrate on which a protecting layer, a first etching layer and a photoresist layer are sequentially formed; patterning the photoresist layer to form an opening so as to partially reveal the first etching layer; implanting a first ion into the revealed first etching layer to form a first doped area; and implanting a second ion into the revealed first etching layer to form a second doped area, wherein the first doped area is independent from the second doped area is provided. | 09-17-2009 |
| 20110034031 | Manufacturing method of semiconductor device including etching step - A manufacturing method of a semiconductor device includes: irradiating a laser beam on a single crystal silicon substrate, and scanning the laser beam on the substrate so that a portion of the substrate is poly crystallized, wherein at least a part of a poly crystallized portion of the substrate is exposed on a surface of the substrate; and etching the poly crystallized portion of the substrate with an etchant. In this case, a process time is improved. | 02-10-2011 |
| 20110070739 | DOUBLE PATTERNING PROCESS FOR INTEGRATED CIRCUIT DEVICE MANUFACTURING - A method of forming an integrated circuit (IC) device feature includes forming an initially substantially planar hardmask layer over a semiconductor device layer to be patterned; forming a first photoresist layer over the hardmask layer; patterning a first set of semiconductor device features in the first photoresist layer; registering the first set of semiconductor device features in the hardmask layer in a manner that maintains the hardmask layer substantially planar; removing the first photoresist layer; forming a second photoresist layer over the substantially planar hardmask layer; patterning a second set of semiconductor device features in the second photoresist layer; registering the second set of semiconductor device features in the hardmask layer in a manner that maintains the hardmask layer substantially planar; removing the second photoresist layer; and creating topography within the hardmask layer by removing portions thereof corresponding to both the first and second sets of semiconductor device features. | 03-24-2011 |
| 20120070995 | METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A method for fabricating a metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a first transistor region and a second transistor region; forming a first metal-oxide semiconductor (MOS) transistor on the first transistor region and a second MOS transistor on the second transistor region, in which the first MOS transistor includes a first dummy gate and the second MOS transistor comprises a second dummy gate; forming a patterned hard mask on the second MOS transistor, in which the hard mask includes at least one metal atom; and using the patterned hard mask to remove the first dummy gate of the first MOS transistor. | 03-22-2012 |
| 20120135606 | LASER PROCESSING METHOD - A laser processing method of converging laser light into an object to be processed made of silicon so as to form a modified region and etching the object along the modified region so as to form the object with a through hole comprises an etch resist film producing step of producing an etch resist film resistant to etching on an outer surface of the object; a laser light converging step of converging the laser light at the object after the etch resist film producing step so as to form the modified region along a part corresponding to the through hole in the object and converging the laser light at the etch resist film so as to form a defect region along a part corresponding to the through hole in the etch resist film; and an etching step of etching the object after the laser light converging step so as to advance the etching selectively along the modified region and form the through hole. | 05-31-2012 |
| 20120135607 | SUBSTRATE PROCESSING METHOD - A substrate processing method for forming a space extending along a predetermined line in a silicon substrate includes a first step of converging a laser light which is an elliptically-polarized light having an ellipticity other than 1 at the substrate so as to form a plurality of modified spots within the substrate along the line and produce a modified region including the modified spots, and a second step of anisotropically etching the substrate so as to advance an etching selectively along the modified region and form the space in the substrate. In the first step, the light is converged at the substrate such that a moving direction of the light with respect to the substrate and a direction of polarization of the light form an angle of 45° or greater therebetween, and the modified spots are made align in one row along the line. | 05-31-2012 |
| 20120135608 | SUBSTRATE PROCESSING METHOD - A substrate processing method for forming a space extending along a predetermined line in a silicon substrate includes a first step of converging a laser light which is an elliptically-polarized light having an ellipticity other than 1 at the substrate so as to form a plurality of modified spots within the substrate along the line and construct a modified region including the modified spots, and a second step of anisotropically etching the substrate so as to advance an etching selectively along the modified region and form the space in the substrate. In the first step, the light is converged at the substrate such that a moving direction of the light with respect to the substrate and a direction of polarization of the light form an angle of less than 45° therebetween, and the modified spots are made align in a plurality of rows along the line. | 05-31-2012 |
| 20120258600 | METHOD AND SYSTEM FOR POST-ETCH TREATMENT OF PATTERNED SUBSTRATE FEATURES - A method of patterning a substrate, comprises providing a set of patterned features on the substrate, exposing the set of patterned features to a dose of ions incident on the substrate over multiple angles, and selectively etching exposed portions of the patterned features. | 10-11-2012 |
| 20120264307 | ETCHING TRENCHES IN A SUBSTRATE - Etch stabilizing ions ( | 10-18-2012 |
| 20150056814 | METHODS FOR FORMING FEATURES IN A MATERIAL LAYER UTILIZING A COMBINATION OF A MAIN ETCHING AND A CYCLICAL ETCHING PROCESS - Methods for etching a material layer disposed on the substrate using a combination of a main etching step and a cyclical etching process are provided. The method includes performing a main etching process in a processing chamber to an oxide layer, forming a feature with a first predetermined depth in the oxide layer, performing a treatment process on the substrate by supplying a treatment gas mixture into the processing chamber to treat the etched feature in the oxide layer, performing a chemical etching process on the substrate by supplying a chemical etching gas mixture into the processing chamber, wherein the chemical etching gas includes at least an ammonium gas and a nitrogen trifluoride, wherein the chemical etching process further etches the feature to a second predetermined depth, and performing a transition process on the etched substrate by supplying a transition gas mixture into the processing chamber. | 02-26-2015 |
| 20150104948 | FACILITATING ETCH PROCESSING OF A THIN FILM VIA PARTIAL IMPLANTATION THEREOF - Methods of facilitating fabrication of circuit structures are provided which include, for instance: providing a structure with a film layer; modifying an etch property of the film layer by implanting at least one species of element or molecule into the upper portion of the film layer, the etch property of the film layer remaining unmodified beneath the upper portion; and subjecting the structure and film layer with the modified etch property to an etching process, the modified etch property of the film layer facilitating the etching process. Modifying the etch property of the upper portion of the film layer may include making the upper portion of the film layer preferentially susceptible or preferentially resistant to the etching process depending on the circuit fabrication approach being facilitated. | 04-16-2015 |
| 20150294867 | SURFACE TREATMENT METHOD FOR SINGLE CRYSTAL SiC SUBSTRATE, AND SINGLE CRYSTAL SiC SUBSTRATE - The present application aims to provide a surface treatment method that is able to accurately control the rate of etching a single crystal SiC substrate and thereby enables correct understanding of the amount of etching. In the surface treatment method, the single crystal SiC substrate is etched by a heat treatment performed under Si vapor pressure. At a time of the etching, inert gas pressure in an atmosphere around the single crystal SiC substrate is adjusted to control the rate of etching. Accordingly, correct understanding of the amount of etching is obtained. | 10-15-2015 |
| 20150340603 | METHOD TO ETCH NON-VOLATILE METAL MATERIALS - A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds. | 11-26-2015 |
| 20150348793 | PLASMONIC NANO-LITHOGRAPHY BASED ON ATTENUATED TOTAL REFLECTION - Techniques related to semiconductor fabrication are generally described herein. An example fabrication method may include coupling, by a lithographic equipment, a surface of a planar waveguide structure with a first surface of a photolithographic mask. Some example methods may also include directing, by the lithographic equipment, a lithography light beam into the planar waveguide structure, causing a surface plasmon being emitted from the surface of the planar waveguide structure when the lithography light beam is reflected by internal surfaces of the planar waveguide structure, effectuating an attenuated total reflection. Some example methods may further include directing, by the lithographic equipment, an evanescent wave caused by the surface plasmon through the photolithographic mask, wherein the evanescent wave has a sub-diffraction characteristic and is used as a photolithographic light source. | 12-03-2015 |
| 20160035581 | MICROELECTRONIC METHOD FOR ETCHING A LAYER - A microelectronic method for etching a layer to be etched, including: modifying the layer to be etched from a surface of the layer to be etched and over a depth corresponding to at least a portion of thickness of the layer to be etched to form a film, with the modifying including implanting light ions into the layer to be etched; and removing the film includes a selective etching of the film relative to at least one layer underlying the film. | 02-04-2016 |
| 20160042971 | Method for Directed Self-Assembly and Pattern Curing - Techniques disclosed herein include methods for DSA patterning and curing of DSA patterns. Techniques include curing phase-separated block copolymers using vacuum ultraviolet (VUV) light exposure at wavelengths from about 100 nanometers to 170 nanometers. VUV light can be generated using a plasma process system and from energizing various VUV-generating process gasses. A VUV curing step is executed (fully or partially) prior to executing an etch process to etch away one of the block copolymers. Such VUV exposure can selectively harden one block copolymer while weakening another block copolymer. This hardening and weakening increases etch selectivity enabling more effective etching and results in better patterns. | 02-11-2016 |
| 20160118268 | SELECTIVE ETCH FOR METAL-CONTAINING MATERIALS - Methods of selectively etching metal-containing materials from the surface of a substrate are described. The etch selectively removes metal-containing materials relative to silicon-containing films such as silicon, polysilicon, silicon oxide, silicon germanium and/or silicon nitride. The methods include exposing metal-containing materials to halogen containing species in a substrate processing region. A remote plasma is used to excite the halogen-containing precursor and a local plasma may be used in embodiments. Metal-containing materials on the substrate may be pretreated using moisture or another OH-containing precursor before exposing the resulting surface to remote plasma excited halogen effluents in embodiments. | 04-28-2016 |
| 20160155645 | ETCH PROCESS WITH PRE-ETCH TRANSIENT CONDITIONING | 06-02-2016 |
| 20160181112 | ANISOTROPIC GAP ETCH | 06-23-2016 |
