Class / Patent application number | Description | Number of patent applications / Date published |
438590000 | Compound semiconductor | 11 |
20090221139 | Method of producing semiconductor device - A method of producing a semiconductor device includes the steps of: forming an oxide film on a silicon carbide substrate; forming a gate electrode layer on the oxide film; patterning the gate electrode layer to form a gate electrode; and processing thermally the gate electrode layer or the gate electrode under an oxidation environment. Further, the gate electrode layer or the gate electrode is thermally processed under the oxidation environment at a temperature between 750° C. and 900° C. | 09-03-2009 |
20110256704 | METHOD FOR MANUFACTURING A METAL GATE ELECTRODE/HIGH K DIELECTRIC GATE STACK - A method of manufacturing a metal gate/high K dielectric gate stack includes the steps of: forming an interfacial layer of SiON or SiO | 10-20-2011 |
20120108049 | CRYSTALLINE SEMICONDUCTOR THIN FILM, METHOD OF FABRICATING THE SAME, SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME - There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained. | 05-03-2012 |
20130102141 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a MOSFET includes the steps of preparing a substrate ( | 04-25-2013 |
20140127893 | METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is disclosed. The method includes forming a gate stack over a substrate, forming spacers adjoining opposite sidewalls of the gate stack, forming a sacrificial layer adjoining the spacers, removing a portion of the sacrificial layer, removing a portion of the spacers to form a recess cavity below the left spacers. Then, a strain feature is formed in the recess cavity. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance. | 05-08-2014 |
20140242788 | METHOD OF FORMING A HIGH QUALITY INTERFACIAL LAYER FOR A SEMICONDUCTOR DEVICE BY PERFORMING A LOW TEMPERATURE ALD PROCESS - One illustrative method disclosed herein includes performing an atomic layer deposition (ALD) process at a temperature of less than 400° C. to deposit a layer of silicon dioxide on a germanium-containing region of semiconductor material and forming a gate structure of a transistor device above the layer of silicon dioxide. | 08-28-2014 |
20150132937 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - There is provided a method of manufacturing a semiconductor device including: preparing a semiconductor substrate having an active region; forming a dielectric layer for gate insulation on the active region; forming a curing layer with a material containing germanium (Ge) on the dielectric layer; heat-treating the curing layer; and removing the curing layer. The germanium-containing material may be silicon germanium (SiGe) or germanium (Ge). | 05-14-2015 |
20160064210 | P-FET WITH GRADED SILICON-GERMANIUM CHANNEL - A method of forming a semiconductor structure includes etching a semiconductor region of a substrate to form a thinned semiconductor region, and forming a silicon-germanium layer on the thinned semiconductor region, the silicon-germanium layer having a graded concentration profile of germanium atoms. | 03-03-2016 |
20160093494 | MANUFACTURING METHOD OF SILICON CARBIDE SEMICONDUCTOR DEVICE - In producing a MOS silicon carbide semiconductor device, after a first heat treatment (oxynitride) is performed in an oxidation atmosphere including nitrous oxide or nitric oxide, a second heat treatment including hydrogen is performed, whereby in the front surface of a SiC epitaxial substrate, a gate insulating film is formed. A gate electrode is formed and after an interlayer insulating film is formed, a third heat treatment is performed to bake the interlayer insulating film. After contact metal formation, a fourth heat treatment is performed to form a reactive layer of contact metal and the silicon carbide semiconductor. The third and fourth heat treatments are performed in an inert gas atmosphere of nitrogen, helium, argon, etc., and a manufacturing method of a silicon carbide semiconductor device is provided achieving a normally OFF characteristic and lowered interface state density. | 03-31-2016 |
20160126145 | LOW THRESHOLD VOLTAGE CMOS DEVICE - A replacement metal gate process in which a high-k dielectric is applied. The high-k dielectric may be doped with lanthanum in an NMOS region or aluminum in a PMOS region. A dummy gate structure may be formed over the high-k dielectric and etched to form an opening over the NMOS region and an opening over the PMOS region. Thereafter, first work function metals are deposited in the NMOS opening and second work function metals are applied in the PMOS openings. A suitable gate electrode material may then fill the remainder of the NMOS and PMOS openings. | 05-05-2016 |
20160181160 | METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE | 06-23-2016 |