Class / Patent application number | Description | Number of patent applications / Date published |
438565000 | From vapor phase | 13 |
20090011582 | Method for Depositing a Vapour Deposition Material - Method for depositing a vapour deposition material on a base material, in particular for doping a semiconductor material, in which a vapour deposition batch, in which the vapour deposition material is enclosed in an air-tight manner by a shell, is introduced into a vapour deposition chamber and the shell is opened in the vapour deposition chamber, so that the vapour deposition material in the vapour deposition chamber then evaporates and is deposited on the base material, wherein the shell is opened by at least partially melting by heating a meltable shell material which at least partially forms the shell at a melting temperature which is lower than an evaporation temperature of the vapour deposition material. | 01-08-2009 |
20090233428 | Methods for preparing a semiconductor wafer with high thermal conductivity - This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer. | 09-17-2009 |
20110003465 | Methods of forming a multi-doped junction with silicon-containing particles - A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front substrate surface. The method further includes depositing an ink on the front substrate surface in a ink pattern, the ink comprising a set of silicon-containing particles and a set of solvents. The method also includes heating the substrate in a baking ambient to a first temperature and for a first time period in order to create a densified film ink pattern. The method further includes exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl | 01-06-2011 |
20110003466 | METHODS OF FORMING A MULTI-DOPED JUNCTION WITH POROUS SILICON - A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron atoms, the substrate comprising a front crystalline substrate surface; and forming a mask on the front crystalline substrate surface, the mask comprising exposed mask areas and non-exposed mask areas. The method also includes exposing the mask to an etchant, wherein porous silicon is formed on the front crystalline substrate surface defined by the exposed mask areas; and removing the mask. The method further includes exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl | 01-06-2011 |
20110124187 | VAPOR PHASE DEPOSITION PROCESSES FOR DOPING SILICON - A process of doping a silicon layer with dopant atoms generally includes reacting a vapor of a dopant precursor with oxide and/or hydroxide reactive sites present on the silicon layer to form a self assembled monolayer of dopant precursor; hydrolyzing the self assembled monolayer of the dopant precursor with water vapor to form pendant hydroxyl groups on the dopant precursor; capping the self assembled monolayer with an oxide layer; and annealing the silicon layer at a temperature effective to diffuse dopant atoms from the dopant precursor into the silicon layer. Additional monolayers can be formed in a similar manner, thereby providing controlled layer-by-layer vapor phase deposition of the dopant precursor compounds for controlled doping of silicon. | 05-26-2011 |
20110159674 | Method of Manufacturing Nonvolatile Memory Devices - A method of manufacturing nonvolatile memory devices comprises forming a plurality of floating gates spaced from each other over a semiconductor substrate, forming a dielectric layer on a surface of the floating gates, forming a capping layer on a surface of the dielectric layer, adding impurities to the capping layer, and forming a control gate over the capping layer containing the impurities. | 06-30-2011 |
20110294284 | METHOD FOR DEPOSITING ULTRA FINE GRAIN POLYSILICON THIN FILM - According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, a nitrogen-based gas and a phosphorous-based gas. The mixture ratio of the nitrogen-based gas to the silicon-based gas among the source gas may be 0.03 or lower (but, excluding zero). Nitrogen in the thin film may be 11.3 atomic percent or lower (but, excluding zero). | 12-01-2011 |
20110318912 | Methods for preparing a semiconductor wafer with high thermal conductivity - This invention generally relates to an epitaxial silicon semiconductor wafer with increased thermal conductivity to transfer heat away from a device layer, while also having resistance to common failure mechanisms, such as latch-up failures and radiation event failures. The semiconductor wafer comprises a lightly-doped device layer, a highly-doped protective layer, and a lightly-doped substrate. The invention is also directed to a process for forming such an epitaxial silicon wafer. | 12-29-2011 |
20120083105 | METHOD FOR BORON DOPING SILICON WAFERS - A process for P-type boron doping of silicon wafers placed on a support in the chamber of a furnace of whose one end includes a wall in which element for introducing reactive gases and a carrier gas carrying a boron precursor in gaseous form are located, whereby the process includes the following stages: a) reacting in the chamber, the reactive gases with boron trichloride BCl | 04-05-2012 |
20130260546 | HEAT TREATMENT APPARATUS AND HEAT TREATMENT METHOD FOR HEATING SUBSTRATE BY IRRADIATING SUBSTRATE WITH FLASH OF LIGHT - After the completion of the transport of a semiconductor wafer into a chamber, the flow rate of nitrogen gas supplied into the chamber is decreased. In this state, a preheating treatment and flash irradiation are performed. The flow rate of nitrogen gas supplied into the chamber is increased when the temperature of the front surface of the semiconductor wafer is decreased to become equal to the temperature of the back surface thereof after reaching its maximum temperature by the irradiation of the substrate with a flash of light. Thereafter, the supply flow rate of nitrogen gas is maintained at a constant value until the semiconductor wafer is transported out of the chamber. This achieves the reduction in particles deposited on the semiconductor wafer while suppressing adverse effects resulting from the nonuniform in-plane temperature distribution of the semiconductor wafer. | 10-03-2013 |
20130288470 | IMPURITY DIFFUSION METHOD, SUBSTRATE PROCESSING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The impurity diffusion method includes: transferring an object on which the thin film is formed into a processing chamber (operation | 10-31-2013 |
20140030879 | METHOD OF VAPOR-DIFFUSING IMPURITIES - A method of vapor-diffusing impurities into a diffusion region of a target substrate to be processed using a dummy substrate is provided. The method includes loading the target substrate and the dummy substrate in a substrate loading jig, accommodating the substrate loading jig loaded with the target substrate and the dummy substrate in a processing chamber of a processing apparatus, and vapor-diffusing impurities into the diffusion region of the target substrate in the processing chamber having the accommodated substrate loading jig. The vapor-diffused impurities are boron, an outer surface of the dummy substrate includes a material having properties not allowing boron adsorption. | 01-30-2014 |
438569000 | Into compound semiconductor region | 1 |
20110263111 | GROUP III-NITRIDE N-TYPE DOPING - Group III-nitride N-type doping techniques are described. | 10-27-2011 |