| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438508000 | Doping of semiconductor | 16 |
| 20080227275 | METHOD AND DEVICE WITH DURABLE CONTACT ON SILICON CARBIDE - A Schottky barrier silicon carbide device has a Re Schottky metal contact. The Re contact | 09-18-2008 |
| 20080233722 | METHOD OF FORMING SELECTIVE AREA COMPOUND SEMICONDUCTOR EPITAXIAL LAYER - A method of forming a selective area semiconductor compound epitaxy layer is provided. The method includes the step of using two silicon-containing precursors as gas source for implementing a process of manufacturing the selective area semiconductor compound epitaxy layer, so as to form a semiconductor compound epitaxy layer on an exposed monocrystalline silicon region of a substrate. | 09-25-2008 |
| 20090117720 | STRAINED SEMICONDUCTOR-ON-INSULATOR BY Si:C COMBINED WITH POROUS PROCESS - A method of fabricating a strained semiconductor-on-insulator (SSOI) substrate is provided. The method includes first providing a structure that includes a substrate, a doped and relaxed semiconductor layer on the substrate, and a strained semiconductor layer on the doped and relaxed semiconductor layer. In the invention, the doped and relaxed semiconductor layer having a lower lattice parameter than the substrate. Next, at least the doped and relaxed semiconductor layer is converted into a buried porous layer and the structure including the buried porous layer is annealed to provide a strained semiconductor-on-insulator substrate. During the annealing, the buried porous layer is converted into a buried oxide layer. | 05-07-2009 |
| 20090253252 | SUBSTRATES FOR SILICON SOLAR CELLS AND METHODS OF PRODUCING THE SAME - Aspects of the invention include methods for depositing silicon on a substrate. In certain embodiments, the methods include exposing a substrate containing silicon to a halogenated silane in a manner sufficient to deposit the silicon on the substrate. In certain embodiments, the method includes providing a substrate, one or more sources of gas, and a reaction vessel that is in fluid communication with the substrate and the one or more sources of gas. In certain embodiments, the substrate is a low or metallurgical grade silicon which may be subjected to a purification process. In certain embodiments, the reaction vessel is a particle bed reaction vessel that includes a moving bed, such as a fluidized bed which contains silicon and the gas includes a halide. | 10-08-2009 |
| 20090305488 | METHOD OF PRODUCING AN EPITAXIAL LAYER ON SEMICONDUCTOR SUBSTRATE AND DEVICE PRODUCED WITH SUCH A METHOD - The invention relates to the manufacture of an epitaxial layer, with the following steps: providing a semiconductor substrate; providing a Si—Ge layer on the semiconductor substrate, having a first depth; —providing the semiconductor substrate with a doped layer with an n-type dopant material and having a second depth substantially greater than said first depth; performing an oxidation step to form a silicon dioxide layer such that Ge atoms and n-type atoms are pushed into the semiconductor substrate by the silicon dioxide layer at the silicon dioxide/silicon interface, wherein the n-type atoms are pushed deeper into the semiconductor substrate than the Ge atoms, resulting in a top layer with a reduced concentration of n-type atoms; removing the silicon dioxide layer; growing an epitaxial layer of silicon on the semiconductor substrate with a reduced outdiffusion or autodoping. | 12-10-2009 |
| 20100279495 | METHOD OF FORMING p-TYPE GALLIUM NITRIDE BASED SEMICONDUCTOR, METHOD OF FORMING NITRIDE SEMICONDUCTOR DEVICE, AND METHOD OF FORMING EPITAXIAL WAFER - A method of forming a p-type gallium nitride based semiconductor without activation annealing is provided, and the method can provide a gallium nitride based semiconductor doped with a p-type dopant. A GaN semiconductor region | 11-04-2010 |
| 20110034010 | PROCESS FOR MANUFACTURING A MULTI-DRAIN ELECTRONIC POWER DEVICE INTEGRATED IN SEMICONDUCTOR SUBSTRATE AND CORRESPONDING DEVICE - A process manufactures a multi-drain power electronic device on a semiconductor substrate of a first conductivity type and includes: forming a first semiconductor layer of the first conductivity type on the substrate, forming a second semiconductor layer of a second conductivity type on the first semiconductor layer, forming, in the second semiconductor layer, a first plurality of implanted regions of the first conductivity type using a first implant dose, forming, above the second semiconductor layer, a superficial semiconductor layer of the first conductivity type, forming in the surface semiconductor layer body regions of the second conductivity type, thermally diffusing the implanted regions to form a plurality of electrically continuous implanted column regions along the second semiconductor layer, the plurality of implanted column regions delimiting a plurality of column regions of the second conductivity type aligned with the body regions. | 02-10-2011 |
| 20110081771 | MULTICHAMBER SPLIT PROCESSES FOR LED MANUFACTURING - Embodiments described herein generally relate to methods for forming Group III-V materials by metal-organic chemical vapor deposition (MOCVD) processes and/or hydride vapor phase epitaxial (HVPE) processes. In one embodiment, deposition of a group III | 04-07-2011 |
| 20110171816 | SYNTHESIS OF GERMANIUM SULFIDE AND RELATED COMPOUNDS FOR SOLID ELECTROLYTIC MEMORY ELEMENTS AND OTHER APPLICATIONS - A method for making high purity GeS and related compounds such as Germanium Silicon Sulfide (GeSiS); Copper Sulfide (CuS); Silicon Sulfide (SiS); Zinc Sulfide (ZnS) and Iron Sulfide (FeS) at low temperatures and pressures in a Chemical Vapor Deposition (CVD) process for solid electrolyte memory elements and other applications. Disclosed is a method of generating a proper chemical and energy environment for the formation of GeS and related compounds on a specific surface. The produced films have utility in memory and other devices. The technology offers cost savings and the advantage of low temperature film creation through the use of plasma assisted deposition—increasing its compatibility for use not only on silicon (or ceramic or glass) non metal substrates as well as polymer or thin metal foil substrates which would be damaged by higher temperature processes. | 07-14-2011 |
| 20110217829 | SEMICONDUCTOR DEVICES WITH NON-PUNCH-THROUGH SEMICONDUCTOR CHANNELS HAVING ENHANCED CONDUCTION AND METHODS OF MAKING - Semiconductor devices are described wherein current flow in the device is confined between the rectifying junctions (e.g., p-n junctions or metal-semiconductor junctions). The device provides non-punch-through behavior and enhanced current conduction capability. The devices can be power semiconductor devices as such as Junction Field-Effect Transistors (VJFETs), Static Induction Transistors (SITs), Junction Field Effect Thyristors, or JFET current limiters. The devices can be made in wide bandgap semiconductors such as silicon carbide (SiC). According to some embodiments, the device can be a normally-off SiC vertical junction field effect transistor. Methods of making the devices and circuits comprising the devices are also described. | 09-08-2011 |
| 20110281424 | Relaxed InGaN/AlGaN Templates - A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures on the nucleation layer. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention. | 11-17-2011 |
| 20130052810 | ENGINEERING OF POROUS COATINGS FORMED BY ION-ASSISTED DIRECT DEPOSITION - In one embodiment, a method of producing a porous semiconductor film on a workpiece includes generating semiconductor precursor ions that comprise one or more of: germanium precursor ions and silicon precursor ions in a plasma of a plasma chamber, in which the semiconductor precursor ions are operative to form a porous film on the workpiece. The method further includes directing the semiconductor precursor ions to the workpiece over a range of angles. | 02-28-2013 |
| 20130267082 | CHALCOGENIDE-CONTAINING PRECURSORS, METHODS OF MAKING, AND METHODS OF USING THE SAME FOR THIN FILM DEPOSITION - Disclosed are chalcogenide-containing precursors for use in the manufacture of semiconductor, photovoltaic, LCD-TFT1 or fiat panel type devices. Also disclosed a methods of synthesizing the chalcogenide-containing precursors and vapor deposition methods, preferably thermal ALD, using the chaicogenide-containing precursors to form chaicogenide-containing films. | 10-10-2013 |
| 20140141603 | VERTICAL-CONDUCTION INTEGRATED ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THEREOF - An embodiment of a vertical-conduction integrated electronic device formed in a body of semiconductor material which includes: a substrate made of a first semiconductor material and with a first type of conductivity, the first semiconductor material having a first bandgap; an epitaxial region made of the first semiconductor material and with the first type of conductivity, which overlies the substrate and defines a first surface; and a first epitaxial layer made of a second semiconductor material, which overlies the first surface and is in direct contact with the epitaxial region, the second semiconductor material having a second bandgap narrower than the first bandgap. The body moreover includes a deep region of a second type of conductivity, extending underneath the first surface and within the epitaxial region. | 05-22-2014 |
| 20140213046 | Fabrication of III-Nitride Layers - A method that includes implantation of dopants while a III-nitride body is being grown on a substrate, and an apparatus for the practice of the method. | 07-31-2014 |
| 20150087140 | FILM FORMING METHOD, FILM FORMING DEVICE, AND FILM FORMING SYSTEM - A film forming method according to an embodiment includes: (a) a step of supplying a first precursor gas of a semiconductor material into a processing vessel in which a processing target substrate is disposed, the first precursor gas being adsorbed onto the processing target substrate during the step; (b) a step of supplying a second precursor gas of a dopant material into the processing vessel, the second precursor gas being adsorbed onto the processing target substrate during the step; and (c) a step of generating the plasma of a reaction gas in the processing vessel, a plasma treatment being performed during the step so as to modify a layer adsorbed onto the processing target substrate. | 03-26-2015 |
