| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438493000 | Plural fluid growth steps with intervening diverse operation | 51 |
| 20080233721 | METHOD FOR FORMING AlGaN CRYSTAL LAYER - There is provided a method for preparing an AlGaN crystal layer having an excellent surface flatness. A buffer layer effective in stress relaxation is formed on a template substrate having a surface layer that is flat at a substantially atomic level and to which in-plane compressive stress is applied, and an AlGaN layer is formed on the buffer layer, so that an AlGaN layer can be formed that is flat at a substantially atomic level. Particularly when the surface layer of the template substrate includes a first AlN layer, a second AlN layer may be formed thereon at a temperature of 600° C. or lower, while a mixed gas of TMA and TMG is supplied in a TMG/TMA mixing ratio of 3/17 or more to 6/17 or less, so that a buffer layer effective in stress relaxation the can be formed in a preferred manner. | 09-25-2008 |
| 20090061604 | GERMANIUM SUBSTRATE-TYPE MATERIALS AND APPROACH THEREFOR - Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices. | 03-05-2009 |
| 20100009524 | METHOD FOR IMPROVING SEMICONDUCTOR SURFACES - A semiconductor fabrication method. The method includes providing a semiconductor substrate, wherein the semiconductor substrate includes a semiconductor material. Next, a top portion of the semiconductor substrate is removed. Next, a first semiconductor layer is epitaxially grown on the semiconductor substrate, wherein a first atom percent of the semiconductor material in the first semiconductor layer is equal to a certain atom percent of the semiconductor material in the semiconductor substrate. | 01-14-2010 |
| 20100022075 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - An active region in a semiconductor device is made up of a parallel p-n layer including a first p-semiconductor layer and a first n-semiconductor with the widths and total amounts of impurities being equal to each other to provide a structure in which charges are balanced. A section parallel to stripes in the parallel p-n layer in an inactive region is made up of a second parallel p-n layer including a second p-semiconductor layer, with its width larger than that of the first p-semiconductor layer, and a second n-semiconductor layer with its width smaller than that of the first n-semiconductor layer. The total amount of impurities in the second p-semiconductor layer is made larger than that in the second n-semiconductor layer to provide a structure in which charges are made unbalanced. | 01-28-2010 |
| 20100159678 | GERMANIUM SUBSTRATE-TYPE MATERIALS AND APPROACH THEREFOR - Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices. | 06-24-2010 |
| 20100178756 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A nitride semiconductor device includes: a substrate having a principal surface; a first nitride semiconductor layer formed on the principal surface of the substrate and includes one or more convex portions whose side surfaces are vertical to the principal surface; and a second nitride semiconductor layer selectively grown on the side surfaces of the one or more convex portions of the first nitride semiconductor layer. | 07-15-2010 |
| 20100184278 | METHOD FOR EPITAXIAL GROWTH - There is provided a method for epitaxial growth, wherein a quantum dot is formed on an epitaxial layer using a quantum-dot forming material with an excellent lattice matching property, and the formed quantum dot is positioned on a defect in the epitaxial layer, thereby minimizing transfer of the defect into an epitaxial layer formed through a subsequent process. The method includes preparing a first epitaxial layer having a defect formed therein; coating an anti-surfactant on the first epitaxial layer; supplying a quantum-dot forming material lattice-matched with respect to the first epitaxial layer, thereby forming a quantum dot obtained by allowing the anti-surfactant to react with the quantum-dot forming material on the first epitaxial layer; allowing the quantum dot to be moved onto a step of the first epitaxial layer due to a difference of surface energies between the quantum dot and the first epitaxial layer; and growing a second epitaxial layer on the first epitaxial layer. | 07-22-2010 |
| 20100184279 | Method of Making an Epitaxial Structure Having Low Defect Density - A method of making an epitaxial structure includes: (a) forming laterally a first epitaxial layer on a base layer, the first epitaxial layer having an epitaxial surface; (b) etching the first epitaxial layer using a wet etching agent so that the epitaxial surface has a plurality of first recesses; (c) depositing on the first epitaxial layer a defect-termination layer; and (d) removing the defect-termination layer by a chemical mechanical polishing process, thereby forming a plurality of defect-termination blocks that respectively and fill the first recesses, wherein the defect-termination blocks have polished surfaces that are substantially flush with the epitaxial surface. | 07-22-2010 |
| 20100190322 | COMPOUND SEMICONDUCTOR SUBSTRATE - A substrate for epitaxial growth, which is capable of improving a surface state of an epitaxial layer at microroughness level. In a substrate for epitaxial growth, when haze is defined as a value calculated by dividing intensity of scattered light obtained when light is incident from a predetermined light source onto a surface of a substrate, by intensity of the incident light from the light source, the haze is not more than 2 ppm all over an effectively used area of the substrate and an off-angle with respect to a plane direction is 0.05 to 0.10°. | 07-29-2010 |
| 20100210094 | METHOD FOR USING APPARATUS CONFIGURED TO FORM GERMANIUM-CONTAINING FILM - A method for using an apparatus configured to form a germanium-containing film includes performing a first film formation process for forming a first product film containing germanium by CVD on a product target object placed inside a reaction container, a first cleaning process for etching the film formation by-product, a second cleaning process for removing residual germanium from inside the reaction container, and a second film formation process for forming a second product film containing no germanium by CVD on a product target object placed inside the reaction container, in this order. The second cleaning process is performed by exhausting gas from inside the reaction container with no product target object placed therein, supplying a second cleaning gas containing an oxidizing gas and hydrogen gas into the reaction container, and heating an interior of the reaction container thereby activating the second cleaning gas. | 08-19-2010 |
| 20100291761 | Method For Producing A Wafer Comprising A Silicon Single Crystal Substrate Having A Front And A Back Side And A Layer of SiGe Deposited On The Front Side - A method for producing a wafer with a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side, the method using steps in the following order:
| 11-18-2010 |
| 20100330786 | Method For Producing An Epitaxially Coated Semiconductor Wafer - Epitaxially coated semiconductor wafers are produced by minimally the following steps in the order specified: (a) depositing an epitaxial layer on one side of a semiconductor wafer; (b) first polishing the epitaxially coated side of the semiconductor wafer with a polishing pad with fixed abrasive while supplying a polishing solution which is free of solids; (c) CMP polishing of the epitaxially coated side of the semiconductor wafer with a soft polishing pad which contains no fixed abrasive, while supplying a polishing agent suspension; (d) depositing another epitaxial layer on the previously epitaxially coated and polished side of the semiconductor wafer. | 12-30-2010 |
| 20110070721 | EPITAXIAL GROWTH OF COMPOUND NITRIDE SEMICONDUCTOR STRUCTURES - Apparatus and methods are described for fabricating a compound nitride semiconductor structure. Group-III and nitrogen precursors are flowed into a first processing chamber to deposit a first layer over a substrate with a thermal chemical-vapor-deposition process. The substrate is transferred from the first processing chamber to a second processing chamber. Group-III and nitrogen precursors are flowed into the second processing chamber to deposit a second layer over the first layer with a thermal chemical-vapor-deposition process. The first and second group-III precursors have different group-III elements. | 03-24-2011 |
| 20110223749 | METHOD OF FORMING NITRIDE SEMICONDUCTOR EPITAXIAL LAYER AND METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE - The present method of forming a nitride semiconductor epitaxial layer includes the steps of growing at least one layer of nitride semiconductor epitaxial layer on a nitride semiconductor substrate having a dislocation density lower than or equal to 1×10 | 09-15-2011 |
| 20110306190 | Method for producing n-type Group III nitride semicondutor - The present invention provides a method for producing an n-type Group III nitride semiconductor product having a high Si concentration and exhibiting favorable crystallinity. In the production method, specifically, an AlN buffer layer is formed on a sapphire substrate by MOCVD, and then a first layer (thickness: 2 μm) is formed from undoped GaN on the buffer layer by MOCVD at 1,140° C. Subsequently, a second layer (thickness: 200 nm) is formed from SiO | 12-15-2011 |
| 20120003825 | METHOD OF FORMING STRAINED EPITAXIAL CARBON-DOPED SILICON FILMS - A method for forming strained epitaxial carbon-doped silicon (Si) films, for example as raised source and drain regions for electronic devices. The method includes providing a structure having an epitaxial Si surface and a patterned film, non-selectively depositing a carbon-doped Si film onto the structure, the carbon-doped Si film containing an epitaxial carbon-doped Si film deposited onto the epitaxial Si surface and a non-epitaxial carbon-doped Si film deposited onto the patterned film, and non-selectively depositing a Si film on the carbon-doped Si film, the Si film containing an epitaxial Si film deposited onto the epitaxial carbon-doped Si film and a non-epitaxial Si film deposited onto the non-epitaxial carbon-doped Si film. The method further includes dry etching away the non-epitaxial Si film, the non-epitaxial carbon-doped Si film, and less than the entire epitaxial Si film to form a strained epitaxial carbon-doped Si film on the epitaxial Si surface. | 01-05-2012 |
| 20120034767 | Method of Making a Multicomponent Film - Described herein is a method and liquid-based precursor composition for depositing a multicomponent film. In one embodiment, the method and compositions described herein are used to deposit Germanium Tellurium (GeTe), Antimony Tellurium (SbTe), Antimony Germanium (SbGe), Germanium Antimony Tellurium (GST), Indium Antimony Tellurium (IST), Silver Indium Antimony Tellurium (AIST), Cadmium Telluride (CdTe), Cadmium Selenide (CdSe), Zinc Telluride (ZnTe), Zinc Selenide (ZnSe), Copper indium gallium selenide (CIGS) films or other tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. | 02-09-2012 |
| 20120309178 | METHOD OF MANUFACTURING FREE-STANDING SUBSTRATE - A method of manufacturing a free-standing substrate includes the steps of growing a first thin film on a heterogeneous substrate, forming an ion implantation layer in the first thin film by implanting ions into the first thin film, dividing the first thin film into an upper thin film and a lower thin film with respect to the ion implantation layer, and growing a second thin film on the upper thin film. The free-standing substrate is manufactured without warping or cracking. No additional processes, such as a laser separation process, for separating the free-standing substrate from the heterogeneous substrate are required. | 12-06-2012 |
| 20130095642 | JUNCTION LEAKAGE REDUCTION THROUGH IMPLANTATION - Provided is a method of fabricating a semiconductor device. The method includes forming a first III-V family layer over a substrate. The first III-V family layer includes a surface having a first surface morphology. The method includes performing an ion implantation process to the first III-V family layer through the surface. The ion implantation process changes the first surface morphology into a second surface morphology. After the ion implantation process is performed, the method includes forming a second III-V family layer over the first III-V family layer. The second III-V family layer has a material composition different from that of the first III-V family layer. | 04-18-2013 |
| 20130130481 | METHOD AND APPARATUS FOR ATOMIC HYDROGEN SURFACE TREATMENT DURING GaN EPITAXY - Methods and apparatus for generating and delivering atomic hydrogen to the growth front during the deposition of a III-V film are provided. The apparatus adapts HWCVD technology to a system wherein the Group III precursor and the Group V precursor are delivered to the surface in isolated processing environments within the system. Multiple HWCVD units may be incorporated so that the atomic hydrogen parameters may be varied in a combinatorial manner for the development of III-V films. | 05-23-2013 |
| 20130288464 | METHOD FOR MAKING EPTAXIAL STRUCTURE - A method for making an epitaxial structure includes following steps. A substrate having an epitaxial growth surface is provided. A first epitaxial layer is epitaxially grown on the epitaxial growth surface. A graphene layer is applied on the first epitaxial layer. A second epitaxial layer is epitaxially grown on the first epitaxial layer. | 10-31-2013 |
| 20160005657 | SEMICONDUCTOR STRUCTURE WITH INCREASED SPACE AND VOLUME BETWEEN SHAPED EPITAXIAL STRUCTURES - A semiconductor structure includes a bulk silicon substrate and one or more silicon fins coupled to the bulk silicon substrate. Stress-inducing material(s), such as silicon, are epitaxially grown on the fins into naturally diamond-shaped structures using a controlled selective epitaxial growth. The diamond shaped structures are subjected to annealing at about 750° C. to about 850° C. to increase an area of (100) surface orientation by reshaping the shaped structures from the annealing. Additional epitaxial material is grown on the increased (100) area. Multiple cycles of increasing the area of (100) surface orientation (e.g., by the annealing) and growing additional epitaxial material on the increased area are performed to decrease the width of the shaped structures, increasing the space between them to prevent them from merging, while also increasing their volume. | 01-07-2016 |
| 438494000 | Differential etching | 17 |
| 20080242061 | PRECURSOR GAS MIXTURE FOR DEPOSITING AN EPITAXIAL CARBON-DOPED SILICON FILM - A precursor gas mixture for depositing an epitaxial carbon-doped silicon film is described. The precursor gas mixture is comprised of a volume of a silicon precursor gas, a volume of acetylene gas and a volume of a carrier gas. A method of forming a semiconductor structure having an epitaxial carbon-doped silicon film is also described. In the method, a substrate having a high polarity dielectric region and a low polarity crystalline region is provided. A precursor gas is flowed to provide a silyl surface above the high polarity dielectric region and a carbon-doped silicon layer above the low polarity crystalline region. The silyl surface is then removed from above the high polarity dielectric region. The flowing and removing steps are repeated to provide a carbon-doped silicon film of a desired thickness above the low polarity crystalline region. | 10-02-2008 |
| 20080242062 | FABRICATION OF DIVERSE STRUCTURES ON A COMMON SUBSTRATE THROUGH THE USE OF NON-SELECTIVE AREA GROWTH TECHNIQUES - Diverse semiconductor structures are fabricated on a single substrate or wafer by using a non-selective area growth technique involving deposition of material over the entire substrate. The fabricated structures are obtained by selective removal of portions of the deposited material layers. Single level and multi-level structures are possible. | 10-02-2008 |
| 20080254600 | METHODS FOR FORMING INTERCONNECT STRUCTURES - A method for forming a semiconductor structure includes forming a sacrificial layer over a substrate. A first dielectric layer is formed over the sacrificial layer. A plurality of conductive structures are formed within the sacrificial layer and the first dielectric layer. The sacrificial layer is treated through the first dielectric layer, at least partially removing the sacrificial layer and forming at least one air gap between two of the conductive structures. A surface of the first dielectric layer is treated, forming a second dielectric layer over the first dielectric layer, after the formation of the air gap. A third dielectric layer is formed over the second dielectric layer. At least one opening is formed within the third dielectric layer such that the second dielectric layer substantially protects the first dielectric layer from damage by the step of forming the opening. | 10-16-2008 |
| 20090011578 | METHODS TO FABRICATE MOSFET DEVICES USING A SELECTIVE DEPOSITION PROCESS - In one embodiment, a method for forming a silicon-based material on a substrate having dielectric materials and source/drain regions thereon within a process chamber is provided which includes exposing the substrate to a first process gas comprising silane, methylsilane, a first etchant, and hydrogen gas to deposit a first silicon-containing layer thereon. The first silicon-containing layer may be selectively deposited on the source/drain regions of the substrate while the first silicon-containing layer may be etched away on the surface of the dielectric materials of the substrate. Subsequently, the process further provides exposing the substrate to a second process gas comprising dichlorosilane and a second etchant to deposit a second silicon-containing layer selectively over the surface of the first silicon-containing layer on the substrate. | 01-08-2009 |
| 20090087966 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor film is formed on a GaAs substrate (semiconductor substrate). An SiO | 04-02-2009 |
| 20100035419 | PATTERN INDEPENDENT Si:C SELECTIVE EPITAXY - Trenches are formed in a silicon substrate by etching exposed portions of the silicon substrate. After covering areas on which deposition of Si:C containing material is to be prevented, selective epitaxy is performed in a single wafer chamber at a temperature from about 550° C. to about 600° C. employing a limited carrier gas flow, i.e., at a flow rate less than 12 standard liters per minute to deposit Si:C containing regions at a pattern-independent uniform deposition rate. The inventive selective epitaxy process for Si:C deposition provides a relatively high net deposition rate a high quality Si:C crystal in which the carbon atoms are incorporated into substitutional sites as verified by X-ray diffraction. | 02-11-2010 |
| 20100221902 | USE OF CL2 AND/OR HCL DURING SILICON EPITAXIAL FILM FORMATION - In a first aspect, a method of forming an epitaxial film on a substrate is provided. The method includes (a) providing a substrate; (b) exposing the substrate to a silicon source and a carbon source so as to form a carbon-containing silicon epitaxial film; (c) encapsulating the carbon-containing silicon epitaxial film with an encapsulating film; and (d) exposing the substrate to Cl2 so as to etch the encapsulating film. Numerous other aspects are provided. | 09-02-2010 |
| 20100248460 | Method of forming information storage pattern - A method of forming an information storage pattern, includes placing a semiconductor substrate in a process chamber, injecting first, second and third process gases into the process chamber during a first process to form a lower layer on the substrate based on a first injection time and/or a first pause time, injecting the second process gas into the process chamber during a second process, wherein the second process gas is injected into the process chamber during a first elimination time, injecting a fourth process gas together with the second and third process gases into the process chamber during a third process in accordance with a second injection time and/or a second pause time to form an upper layer on the lower layer, and injecting the second process gas into the process chamber during a fourth process, wherein the second process gas is injected into the process chamber during a second elimination. | 09-30-2010 |
| 20120295427 | HIGH THROUGHPUT CYCLICAL EPITAXIAL DEPOSITION AND ETCH PROCESS - Methods of selective formation leave high quality epitaxial material using a repeated deposition and selective etch process. During the deposition process, an inert carrier gas is provided with a silicon-containing source without hydrogen carrier gas. After depositing silicon-containing material, an inert carrier gas is provided with an etchant to selectively etch deposited material without hydrogen. The deposition and etch processes can be repeated until a desired thickness of silicon-containing material is achieved. Using the processes described within, it is possible to maintain temperature and pressure conditions, as well as inert carrier gas flow rates, to provide for increased throughput. The inert flow can be constant, or etch rates can be increased by reducing inert flow for the etch phases of the cycles. | 11-22-2012 |
| 20130122694 | Semiconductor substrate, semiconductor device, and manufacturing methods thereof - Exemplary embodiments of the present invention provide a method of fabricating a semiconductor substrate, the method including growing a first compound semiconductor layer on a first surface of a substrate, etching the first compound semiconductor layer using HF, KOH, or NaOH to roughen a first surface of the first compound semiconductor layer, forming cavities in the first compound semiconductor layer, separating the first compound semiconductor layer from the first surface of the substrate, flattening the first surface of the substrate after separating the first compound semiconductor layer, and growing a second compound semiconductor layer on the flattened first surface of the substrate. | 05-16-2013 |
| 20130178050 | METHOD FOR MANUFACTURING GALLIUM NITRIDE WAFER - A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer. | 07-11-2013 |
| 20130323915 | METHOD AND APPARATUS FOR FORMING SILICON FILM - A method of forming a silicon film includes a first film forming process, an etching process, a doping process, and a second film forming process. In the first film forming process, a silicon film doped with impurities containing boron is formed so as to embed a groove provided on an object to be processed. In the etching process, the silicon film formed in the first film forming process is etched. In the doping process, the silicon film etched in the etching process is doped with impurities containing boron. In the second film forming process, a silicon film doped with impurities containing boron is formed so as to embed the silicon film that is doped in the doping process. | 12-05-2013 |
| 20140024204 | Method for Selective Growth of Highly Doped Group IV - Sn Semiconductor Materials - Disclosed are methods for selective deposition of doped Group IV-Sn materials. In some embodiments, the method includes providing a patterned substrate comprising at least a first region and a second region, where the first region includes an exposed first semiconductor material and the second region includes an exposed insulator material, and performing at least two cycles of a grow-etch cyclic process. Each cycle includes depositing a doped Group IV-Tin (Sn) layer, where depositing the doped Group IV-Sn layer includes providing a Group IV precursor, a Sn precursor, and a dopant precursor, and using an etch gas to etch back the deposited doped Group IV-Sn layer. | 01-23-2014 |
| 20140179087 | NANOELECTRONIC STRUCTURE AND METHOD OF PRODUCING SUCH - The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact. | 06-26-2014 |
| 20140295652 | GAN VERTICAL SUPERJUNCTION DEVICE STRUCTURES AND FABRICATION METHODS - A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer. | 10-02-2014 |
| 20140342535 | METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - A semiconductor substrate preventing a void from being generated in an epitaxial film buried in a trench. An N-type first epitaxial film and first trenches are formed on an N | 11-20-2014 |
| 20160005835 | METHOD OF FABRICATING A MERGED P-N JUNCTION AND SCHOTTKY DIODE WITH REGROWN GALLIUM NITRIDE LAYER - A method for fabricating a merged p-i-n Schottky (MPS) diode in gallium nitride (GaN) based materials includes providing an n-type GaN-based substrate having a first surface and a second surface. The method also includes forming an n-type GaN-based epitaxial layer coupled to the first surface of the n-type GaN-based substrate, and forming a p-type GaN-based epitaxial layer coupled to the n-type GaN-based epitaxial layer. The method further includes removing portions of the p-type GaN-based epitaxial layer to form a plurality of dopant sources, and regrowing a GaN-based epitaxial layer including n-type material in regions overlying portions of the n-type GaN-based epitaxial layer, and p-type material in regions overlying the plurality of dopant sources. The method also includes forming a first metallic structure electrically coupled to the regrown GaN-based epitaxial layer. | 01-07-2016 |
| 438495000 | Doping of semiconductor | 8 |
| 20090130828 | Method for Forming Voltage Sustaining Layer with Opposite-Doped Islands for Semiconductor Power Devices - A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n (or p)-layer containing a plurality of floating p (or n)-islands. The effect of the floating islands is to absorb a large part of the electric flux when the layer is fully depleted under high reverse bias voltage so as the peak field is not increased when the doping concentration of voltage sustaining layer is increased. Therefore, the thickness and the specific on-resistance of the voltage sustaining layer for a given breakdown voltage can be much lower than those of a conventional voltage sustaining layer with the same breakdown voltage. By using the voltage sustaining layer of this invention, various high voltage devices can be made with better relation between specific on-resistance and breakdown voltage. | 05-21-2009 |
| 20090258478 | METHOD FOR PROVIDING A NANOSCALE, HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) ON INSULATOR - Various embodiments include forming a silicon-germanium layer over a substrate of a device; forming a layer in the silicon-germanium layer, the layer including at least one of boron and carbon; and forming a silicon layer over the silicon-germanium layer. Additional embodiments are described. | 10-15-2009 |
| 20110306191 | METHOD OF MANUFACTURING SUPER-JUNCTION SEMICONDUCTOR DEVICE - A method of manufacturing a super-junction semiconductor device facilitates increasing the epitaxial growth rate without increasing the manufacturing steps greatly. In substitution for the formation of alignment mark in the surfaces of the second and subsequent non-doped epitaxial layers, patterning for forming a new alignment mark is conducted simultaneously with the resist pattering for selective ion-implantation into the second and subsequent non-doped epitaxial layers in order to form the new alignment mark at a position different from the position, at which the initial alignment mark is formed, and to form the new alignment mark in every one or more repeated epitaxial layer growth cycles. | 12-15-2011 |
| 20120040521 | VOLTAGE SUSTAINING LAYER WIHT OPPOSITE-DOPED ISLAND FOR SEMINCONDUCTOR POWER DEVICES - A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n (or p)-layer containing a plurality of floating p (or n)-islands. The effect of the floating islands is to absorb a large part of the electric flux when the layer is fully depleted under high reverse bias voltage so as the peak field is not increased when the doping concentration of voltage sustaining layer is increased. Therefore, the thickness and the specific on-resistance of the voltage sustaining layer for a given breakdown voltage can be much lower than those of a conventional voltage sustaining layer with the same breakdown voltage. By using the voltage sustaining layer of this invention, various high voltage devices can be made with better relation between specific on-resistance and breakdown voltage. | 02-16-2012 |
| 20130337640 | METHOD FOR FABRICATING A POROUS SEMICONDUCTOR BODY REGION - A method for fabricating a porous semiconductor body region, including producing at least one trench in a semiconductor body, starting from a surface of the semiconductor body, producing at least one porous semiconductor body region in the semiconductor body starting from the at least one trench at least along a portion of the side walls of the trench, and filling the trench with a semiconductor material of the semiconductor body. | 12-19-2013 |
| 20150340231 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A vertical super junction MOSFET and a lateral MOSFET are integrated on the same semiconductor substrate. The lateral MOSFET is electrically isolated from the vertical super junction MOSFET by an n-buried isolating layer and an n-diffused isolating layer. The lateral MOSFET is formed of a p-well region formed in an n | 11-26-2015 |
| 20160133461 | METHOD TO GROW A SEMI-CONDUCTING SIC LAYER - A method to grow a semi insulating SiC layer. The method may include growing the semi insulating SiC layer on a substrate, and creating deep defects in the grown semi insulating SiC layer, whereby a semi insulating property is created in the grown semi insulating SiC layer. Alternatively, the method may include growing a semi insulating SiC layer, creating deep defects in the grown semi insulating SiC layer, whereby the semi insulating property is created in the grown semi insulating SiC layer, and using source material during the growth such that the semi insulating SiC layer is made isotope enriched. | 05-12-2016 |
| 20170236714 | Method for Removing Crystal Originated Particles from a Crystalline Silicon Body Using an Etch Process | 08-17-2017 |
| 438496000 | Coating of semiconductive substrate with nonsemiconductive material | 4 |
| 20090011579 | Quantum Dot Array And Production Method Therefor, And Dot Array Element And Production Method Therefor - The present invention is a method of manufacturing a quantum dot array having a plurality of columnar parts including a quantum dot on a substrate, the method comprising the steps of obliquely vapor-depositing a material constituting a first barrier layer to become an energy barrier against the quantum dot onto a surface of the substrate, so as to form a plurality of first barrier layers; obliquely vapor-depositing a material constituting the quantum dot with respect to the surface of the substrate, so as to form the quantum dots on the first barrier layers; and obliquely vapor-depositing a material constituting a second barrier layer to become an energy barrier against the quantum dot with respect to the surface of the substrate, so as to form the second barrier layers on the quantum dots. | 01-08-2009 |
| 20140213045 | NITRIDE ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen. | 07-31-2014 |
| 20150371848 | METHOD FOR THE FABRICATION AND TRANSFER OF GRAPHENE - Provided herein are processes for transferring high quality large-area graphene layers (e.g., single-layer graphene) to a flexible substrate based on preferential adhesion of certain thin metallic films to graphene followed by lamination of the metallized graphene layers to a flexible target substrate in a process that is compatible with roll-to-roll manufacturing, providing an environmentally benign and scalable process of transferring graphene to flexible substrates. | 12-24-2015 |
| 20160181094 | Focused Radiation Beam Induced Thin Film Deposition | 06-23-2016 |
