Entries |
Document | Title | Date |
20080206960 | REWORKABLE CHIP STACK - A method for removing a thinned silicon structure from a substrate, the method includes selecting the silicon structure with soldered connections for removal; applying a silicon structure removal device to the silicon structure and the substrate, wherein the silicon structure removal device comprises a pre-determined temperature setpoint for actuation within a range from about eighty percent of a melting point of the soldered connections to about the melting point; heating the silicon structure removal device and the soldered connections of the silicon structure to within the range to actuate the silicon structure removal device; and removing the thinned silicon structure. Also disclosed is a structure including a plurality of layers, at least one layer including a thinned silicon structure and solder coupling the layer to another layer of the plurality; wherein the solder for each layer has a predetermined melting point. | 08-28-2008 |
20080206961 | Semiconductor device and semiconductor substrate - In order to provide a semiconductor device having a field effect transistor with a low power consumption and a high speed by use of the combination of Si and an element such as Ge, C or the like of the same group as Si, a strain is applied by a strain applying semiconductor layer 2 to a channel forming layer I having a channel of the field effect transistor formed therein so that the mobility of carriers in the channel is made larger than the mobility of carriers in that material of the channel forming layer which is unstrained. | 08-28-2008 |
20080213974 | Method of manufacturing bonded wafer - The present invention provides a method of manufacturing a bonded wafer. The method comprises an oxidation step in which an oxide film is formed on at least one surface of a base wafer, a bonding step in which the base wafer on which the oxide film has been formed is bonded to a top wafer to form a bonded wafer, and a thinning step in which the top wafer included in the bonded wafer is thinned. The oxidation step comprises heating the base wafer to a heating temperature ranging from 800 to 1300° C. at a rate of temperature increase ranging from 1 to 300° C./second in an oxidizing atmosphere, and the bonding step is carried out so as to position the oxide film formed in the oxidation step at an interface of the top wafer and the base wafer. | 09-04-2008 |
20080220589 | METHOD FOR EVALUATION OF BONDED WAFER - A bonded wafer formed by directly bonding a wafer for active layer and a wafer for support substrate without an insulating film and thinning the wafer for active layer is evaluated by a method comprising steps of removing native oxide from a surface of an active layer in the bonded wafer, subjecting the bonded wafer to an etching with an etching liquid having an etching rate to a material constituting the wafer faster than that to an oxide of the material to remove at least a whole of the active layer, and detecting island-shaped oxides exposed by the etching, in which the etching is carried out so as to satisfy a relation of T≦X≦T+500 nm wherein T is a thickness of the active layer (nm) and X is an etching depth (nm) to detect the number and size of the island-shaped oxides. | 09-11-2008 |
20080227271 | Method of manufacturing bonded wafer - The present invention provides a method of manufacturing a bonded wafer. The method includes ozone washing two silicon wafers to form an oxide film equal to or less than 2.2 nm in thickness on each surface of the two silicon wafers, and bonding the two silicon wafers through the oxide films formed to obtain a bonded wafer. | 09-18-2008 |
20080242052 | Method of forming ultra thin chips of power devices - A method for making thin semiconductor devices is disclosed. Starting from wafer with pre-fabricated front-side devices, the method includes:
| 10-02-2008 |
20080248630 | METHOD OF MANUFACTURING BONDED WAFER - The present invention provides a method of manufacturing a bonded wafer. The method includes forming an oxygen ion implantation layer in an active layer wafer having a substrate resistivity of 1 to 100 mΩcm by implanting oxygen ions in the active layer wafer, bonding a base wafer and the active layer wafer directly or through an insulating layer to form a bonded wafer, heat treating the bonded wafer to strengthen the bond and convert the oxygen ion implantation layer into a stop layer, grinding, polishing, and/or etching, from the active layer wafer surface side, the bonded wafer in which the bond has been strengthened to expose the stop layer on a surface of the bonded wafer, removing the stop layer, and subjecting the bonded wafer from which the stop layer has been removed to a heat treatment under a reducing atmosphere to diffuse an electrically conductive component comprised in the active layer wafer. | 10-09-2008 |
20080248631 | WAFER AND METHOD OF PRODUCING A SUBSTRATE BY TRANSFER OF A LAYER THAT INCLUDES FOREIGN SPECIES - A method of producing a substrate that has a transfer crystalline layer transferred from a donor wafer onto a support. The transfer layer can include one or more foreign species to modify its properties. In the preferred embodiment an atomic species is implanted into a zone of the donor wafer that is substantially free of foreign species to form an embrittlement or weakened zone below a bonding face thereof, with the weakened zone and the bonding face delimiting a transfer layer to be transferred. The donor wafer is preferably then bonded at the level of its bonding face to a support. Stresses are then preferably applied to produce a cleavage in the region of the weakened zone to obtain a substrate that includes the support and the transfer layer. Foreign species are preferably diffused into the thickness of the transfer layer prior to implantation or after cleavage to modify the properties of the transfer layer, preferably its electrical or optical properties. The preferred embodiment produces substrates with a thin InP layer rendered semi-insulating by iron diffusion. | 10-09-2008 |
20080254596 | Method for Transferring Wafers - The invention concerns a method for preparing a thin layer ( | 10-16-2008 |
20080254597 | Method for manufacturing SOI substrate - A method for manufacturing an SOI substrate superior in film thickness uniformity and resistivity uniformity in a substrate surface of a silicon layer having a film thickness reduced by an etch-back method is provided. After B ions is implanted into a front surface of a single-crystal Si substrate | 10-16-2008 |
20080261381 | Method for manufacturing bonded substrate - When manufacturing a bonded substrate using an insulator substrate as a handle wafer, there is provided a method for manufacturing a bonded substrate which can be readily removed after carried and after mounted by roughening a back surface of the bonded substrate (corresponding to a back surface of the insulator substrate) and additionally whose front surface can be easily identified like a process of a silicon semiconductor wafer in case of the bonded substrate using a transparent insulator substrate as a handle wafer. | 10-23-2008 |
20090004825 | METHOD OF MANUFACTURING SEMICONDUCTOR SUBSTRATE - A method of manufacturing a semiconductor substrate having a DSB structure that enables simplification of a manufacturing process by optimizing a total thickness of oxides on surfaces of two wafers before being bonded together is provided. The method comprises a process of preparing a first semiconductor wafer and a second semiconductor wafer, a process of bonding the first semiconductor wafer and second semiconductor wafer when a total of thickness of an oxide on the surface of the first semiconductor wafer and that of an oxide on the surface of the second semiconductor wafer is 0.4 nm or more and 1.0 nm or less, and a process of providing heat treatment to a semiconductor substrate after the process of the bonding and before a process of thinning one of the wafers. | 01-01-2009 |
20090004826 | Method of manufacturing a semiconductor device - In a method of manufacturing a semiconductor device, a first substrate and a second substrate, which include a plurality of memory cells and selection transistors, respectively, are provided. A first insulating interlayer and a second insulating interlayer are formed on the first substrate and the second substrate, respectively, to cover the memory cells and the selection transistors. A lower surface of the second substrate is partially removed to reduce a thickness of the second substrate. The lower surface of the second substrate is attached to the first insulating interlayer. Plugs are formed through the second insulating interlayer, the second substrate and the first insulating interlayer to electrically connect the selection transistors in the first substrate and the second substrate to the plugs. Thus, impurity ions in the first substrate will not diffuse during a thermal treatment process. | 01-01-2009 |
20090023272 | METHOD OF PRODUCING BONDED WAFER - There is provided a method of producing a bonded wafer by bonding two silicon wafers for active layer and support layer to each other and then thinning the wafer for active layer, in which nitrogen ions are implanted from the surface of the wafer for active layer to form a nitride layer in the interior of the wafer for active layer before the bonding. | 01-22-2009 |
20090042363 | Method for manufacturing bonded wafer and outer-peripheral grinding machine of bonded wafer - The present invention provides a method for manufacturing a bonded wafer, which includes at least the steps of bonding a bond wafer and a base wafer, grinding an outer peripheral portion of the bonded bond wafer, etching off an unbonded portion of the ground bond wafer, and then reducing a thickness of the bond wafer, wherein, in the step of grinding the outer peripheral portion, the bonded bond wafer is ground so as to form a groove along the outer peripheral portion of the bond wafer to form an outer edge portion outside the groove; and in the subsequent step of etching, the outer edge portion is removed together with the groove portion of the bond wafer to form a terrace portion where the base wafer is exposed at the outer peripheral portion of the bonded wafer. Thus, it is possible to provide a method for manufacturing a bonded wafer, which can reduce the number of dimples formed in a terrace portion of a base wafer upon removing an outer peripheral portion of a bonded bond wafer. | 02-12-2009 |
20090042364 | Method For Manufacturing Soi Wafer and Soi Wafer - The present invention provides a method for manufacturing an SOI wafer in which a thickness of an SOI layer is increased by growing an epitaxial layer on the SOI layer of the SOI wafer having an oxide film and the SOI layer formed on a base wafer, wherein the epitaxial growth is performed in such a manner that a reflectivity of a surface of the SOI wafer on which the epitaxial layer is grown in a wavelength region of a heating light at the start of the epitaxial growth falls within the range of 30% to 80%. As a result, in the method for manufacturing the SOI wafer in which a thickness of the SOI layer is increased by growing the epitaxial layer on the SOI layer of the SOI wafer having the oxide film and the SOI layer formed on the base wafer, a method for manufacturing a high-quality SOI wafer with less slip dislocation and others is provided. | 02-12-2009 |
20090042365 | THREE-DIMENSIONAL FACE-TO-FACE INTEGRATION ASSEMBLY - A via for connecting metallization layers of chips bonded in a face-to-face configuration is provided, as well as methods of fabricating the via. The via may function as an interconnection of metallization layers in three-dimensional, stacked, integrated circuits, and may enable high density, low-resistance interconnection formation. | 02-12-2009 |
20090104752 | Method for Producing Soi Wafer - The present invention relates to a method for producing an SOI wafer, having at least a step of a bonding heat treatment for increasing bonding strength by heat-treating a bonded wafer obtained by bonding a base wafer and a bond wafer, in which argon is ion-implanted from a surface of either the base wafer or the bond wafer at a dosage of 1×10 | 04-23-2009 |
20090111245 | Method for manufacturing bonded wafer - The present invention provides a method for manufacturing a bonded wafer comprising steps of forming an oxide film on at least a surface of a base wafer or a surface of a bond wafer; bringing the base wafer and the bond wafer into close contact via the oxide film; subjecting these wafers to a heat treatment under an oxidizing atmosphere to bond the wafers together; grinding and removing the outer periphery of the bond wafer so that the outer periphery has a predetermined thickness; subsequently removing an unbonded portion of the outer periphery of the bond wafer by etching; and then thinning the bond wafer so that the bond wafer has a desired thickness, wherein the etching is conducted by using a mixed acid at 30° C. or less at least comprising hydrofluoric acid, nitric acid, and acetic acid. Thus there is provided a method for manufacturing a bonded wafer by which unbonded portions of the outer periphery of the bond wafer are removed with a high selectivity ratio (R | 04-30-2009 |
20090117708 | METHOD FOR MANUFACTURING SOI SUBSTRATE - A method for manufacturing an SOI substrate includes steps of forming a first oxide film on a surface of a first silicon substrate; implanting hydrogen ions into the surface of the first silicon substrate on which the first oxide film is formed to form an ion implant region inside the first silicon substrate; removing the entire or the portion of first oxide film; forming a laminate by bonding the second silicon substrate to a hydrogen ion-implanted surface of the first silicon substrate with the first oxide film, or second oxide film formed on a surface of the second silicon substrate, or the first oxide film and second oxide film, interposed therebetween; and subjecting the laminate to a heat treatment at a predetermined temperature to separate the first silicon substrate along the ion implant region, thereby obtaining an SOI substrate including a thin SOI layer formed on the second silicon substrate with the oxide film interposed therebetween. The method can reduce a degree of contamination from heavy metals inside the SOI substrate. | 05-07-2009 |
20090130822 | PROCESS FOR COLLECTIVE MANUFACTURING OF SMALL VOLUME HIGH PRECISION MEMBRANES AND CAVITIES - The invention relates to a process for collective manufacturing of cavities and/or membranes ( | 05-21-2009 |
20090186464 | Method for producing bonded wafer - In the method for producing a bonded wafer by bonding a wafer for active layer to a wafer for support layer and then thinning the wafer for active layer, when oxygen ions are implanted into the wafer for active layer, the implantation step is divided into two stages conducted under specified conditions. | 07-23-2009 |
20090233418 | Methods of Processing Semiconductor Wafers Having Silicon Carbide Power Devices Thereon - Methods of forming a silicon carbide semiconductor device are disclosed. The methods include forming a semiconductor device at a first surface of a silicon carbide substrate having a first thickness, and mounting a carrier substrate to the first surface of the silicon carbide substrate. The carrier substrate provides mechanical support to the silicon carbide substrate. The methods further include thinning the silicon carbide substrate to a thickness less the first thickness, forming a metal layer on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate, and locally annealing the metal layer to form an ohmic contact on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate. The silicon carbide substrate is singulated to provide a singulated semiconductor device. | 09-17-2009 |
20090258475 | Method for producing bonded wafer - Even if an oxygen ion implanted layer in a wafer for active layer is not a completely continuous SiO | 10-15-2009 |
20100003804 | Electronic Device and Method for Manufacturing Same - A method to provide an improved production yield of electronic devices. A thin film device | 01-07-2010 |
20100062584 | METHOD FOR PRODUCING WAFER FOR BACKSIDE ILLUMINATION TYPE SOLID IMAGING DEVICE - A wafer for backside illumination type solid imaging device having a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor at its front surface side and a light receiving surface at its back surface side is produced by a method comprising a step of forming a BOX oxide layer on at least one of a wafer for support substrate and a wafer for active layer, a step of bonding the wafer for support substrate and the wafer for active layer and a step of thinning the wafer for active layer, which further comprises a step of forming a plurality of concave portions on a bonding face of the BOX oxide layer to the other wafer and filling a polysilicon plug into each of the concave portions to form a composite layer before the step of bonding the wafer for support substrate and the wafer for active layer. | 03-11-2010 |
20100087047 | METHOD FOR MANUFACTURING SOI SUBSTRATE - To increase adhesion between a single crystal semiconductor layer and a base substrate and to reduce bonding defects therebetween. To perform radical treatment on a surface of a semiconductor substrate to form a first insulating film on the semiconductor substrate; irradiate the semiconductor substrate with accelerated ions through the first insulating film to form an embrittlement region in the semiconductor substrate; form a second insulating film on the first insulating film; perform heat treatment after bonding a surface of the second insulating film and a surface of the base substrate to perform separation along the embrittlement region so that a semiconductor layer is formed over the base substrate with the first and second insulating films interposed therebetween; etch the semiconductor layer; and irradiate the semiconductor layer on which the etching is performed with a laser beam. | 04-08-2010 |
20100144118 | Method for Stacking Semiconductor Dies - A system and method for stacking semiconductor dies is disclosed. A preferred embodiment comprises forming through-silicon vias through the wafer, protecting a rim edge of the wafer, and then removing the unprotected portions so that the rim edge has a greater thickness than the thinned wafer. This thickness helps the fragile wafer survive further transport and process steps. The rim edge is then preferably removed during singulation of the individual dies from the wafer. | 06-10-2010 |
20100144119 | METHOD OF PRODUCING BONDED WAFER - In the production of a bonded wafer, a wafer for active layer after a heat treatment for bonding reinforcement followed by bonding is thinned to a given thickness by a surface polishing or an etching and then a wafer for support layer is subjected to both a minor-surface beveling and a terrace processing simultaneously. | 06-10-2010 |
20100178750 | METHOD FOR PRODUCING BONDED WAFER - A bonded wafer is produced by removing a part or all of native oxide films formed on each surface of both a wafer for active layer and a wafer for support substrate to be bonded; forming a uniform oxide film with a thickness of less than 5 nm on at least one surface of these wafers by a given oxide film forming method; bonding the wafer for active layer to the wafer for support substrate through the uniform oxide film; thinning the wafer for active layer; and subjecting the bonded wafer to a given heat treatment in a non-oxidizing atmosphere to substantially remove the uniform oxide film existing in the bonding interface. | 07-15-2010 |
20100210091 | METHOD FOR PRODUCING A SEMICONDUCTOR - A method for producing a semiconductor includes providing a p-doped semiconductor body having a first side and a second side; implanting protons into the semiconductor body via the first side to a target depth of the semiconductor body; bonding the first side of the semiconductor body to a carrier substrate; forming an n-doped zone in the semiconductor body by heating the semiconductor body such that a pn junction arises in the semiconductor body; and removing the second side of the semiconductor body at least as far as a space charge zone spanned at the pn junction. | 08-19-2010 |
20100248446 | METHOD AND APPARATUS OF HOLDING A DEVICE - Provided is an apparatus and a method of holding a device. The apparatus includes a wafer chuck having first and second holes that extend therethrough, and a pressure control structure that can independently and selectively vary a fluid pressure in each of the first and second holes between pressures above and below an ambient pressure. The method includes providing a wafer chuck having first and second holes that extend therethrough, and independently and selectively varying a fluid pressure in each of the first and second holes between pressures above and below an ambient pressure. | 09-30-2010 |
20100248447 | METHOD FOR PRODUCING A BONDED WAFER - In a method for producing a bonded wafer by bonding a wafer for active layer and a wafer for support layer and thinning the wafer for active layer according to the invention, oxygen ions are implanted into the wafer for active layer at a state of holding a temperature of the wafer for active layer below 200° C. under a dose of 5×10 | 09-30-2010 |
20100267217 | Backside Process for a Substrate - A method of forming a semiconductor device is presented. A conductor is embedded within a substrate, wherein the substrate contains a non-conducting material. The backside of the substrate is ground to a thickness wherein at least | 10-21-2010 |
20100285655 | METHOD OF PRODUCING BONDED WAFER - In the production of a bonded wafer by bonding a silicon wafer for active layer with an internal oxide film to a silicon wafer for support layer directly or indirectly with an insulating layer to form a silicon wafer composite and removing an upperlayer-side silicon portion and the internal oxide film of the silicon wafer composite to leave only an active layer with a given thickness, the active layer forming step is conducted only by polishing under given conditions. | 11-11-2010 |
20100291756 | METHOD FOR THE PRODUCTION OF A SEMICONDUCTOR STRUCTURE - Semiconductor structures are produced by providing a 3C—SiC semiconductor layer containing a monocrystalline 3C—SiC layer by implantation of carbon in silicon on a first silicon substrate and applying an epitaxial layer of nitride compound semiconductor suitable for the generation of optoelectronic components onto the 3C—SiC semiconductor layer structure, wherein the epitaxial layer of nitride semiconductor is transferred onto a second substrate by bonding the nitride layer onto the second substrate surface and mechanically or chemically removing silicon and layers containing SiC, the second substrate being a metal with a reflectivity ≧80% or being substantially transparent. | 11-18-2010 |
20100297829 | Method of Temporarily Attaching a Rigid Carrier to a Substrate - Method for temporarily attaching a substrates to a rigid carrier is described which includes forming a sacrificial layer of a thermally-decomposable polymer, e.g., poly(alkylene carbonate), and bonding the flexible substrate to the rigid carrier with the sacrificial layer positioned therebetween. Electronic components and/or circuits may then be fabricated or other semiconductor processing steps employed (e.g., backgrinding) on the attached substrate. Once fabrication is completed, the substrate may be detached from the rigid carrier by heating the assembly to decompose the sacrificial layer. | 11-25-2010 |
20110003462 | METHOD FOR MANUFACTURING SOI WAFER - Provided is a method for manufacturing an SOI wafer, which is capable of: efficiently removing an ion-implanted defect layer existing in an ion implanted layer in the vicinity of a peeled surface peeled by an ion implantation peeling method; ensuring the in-plane uniformity of a substrate; and also achieving cost reduction and higher throughput. The method for manufacturing an SOI wafer includes at least the steps of: bonding a silicon wafer with or without an oxide film onto a handle wafer to prepare a bonded substrate, wherein the silicon wafer has an ion implanted layer formed by implanting hydrogen ions and/or rare gas ions into the silicon wafer; peeling the silicon wafer along the ion implanted layer, thereby transferring the silicon wafer onto the handle wafer to produce a post-peeling SOI wafer; immersing the post-peeling SOI wafer in an aqueous ammonia-hydrogen peroxide solution; and performing a heat treatment at a temperature of 900° C. or higher on the immersed post-peeling SOI wafer, and/or polishing a silicon film layer of the immersed post-peeling SOI wafer, through CMP polishing by 10 to 50 nm. | 01-06-2011 |
20110021002 | Process for Making Contact with and Housing Integrated Circuits - A process for producing electrical contact connections for a component integrated in a substrate material is provided, the substrate material having a first surface region, and at least one terminal contact being arranged at least partially in the first surface region for each component, which is distinguished in particular by application of a covering to the first surface region and production of at least one contact passage which, in the substrate material, runs transversely with respect to the first surface region, in which process, in order to form at least one contact location in a second surface region which is to be provided, at least one electrical contact connection from the contact location to at least one of the terminal contacts is produced via the respective contact passages. | 01-27-2011 |
20110065258 | METHOD OF PRODUCING BONDED SUBSTRATE - A bonded wafer is thinned from an active layer wafer side, and a thinning stop layer is exposed. Thereafter, the layer is made porous in an HF solution, and then the layer is polished and removed. Thus, the removal of the layer is easy; productivity of substrates is high; no defect is caused due to heat treatment; and evenness in polish amount within a wafer surface can be maintained. | 03-17-2011 |
20110097874 | PROGRESSIVE TRIMMING METHOD - The invention provides a method of trimming a structure that includes a first wafer bonded to a second wafer, with the first wafer having a chamfered edge. The method includes a first trimming step carried out over a first depth that includes at least the thickness of the first wafer and over a first width determined from the edge of the first wafer. A second trimming step is then carried out over a second depth that includes at least the thickness of the first wafer and over a second width that is less than the first width. | 04-28-2011 |
20110129989 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND DEVICE FOR SAME - Even when a substrate for treatment is joined with a supporting substrate having an outer shape larger than that of the substrate for treatment, with a photothermal conversion layer and an adhesive layer interposed, and the surface of the substrate for treatment on the side opposite this joined surface is treated, the occurrence of a defective external appearance on the treatment surface of the substrate for treatment is prevented. | 06-02-2011 |
20110136321 | METHOD FOR MANUFACTURING LAMINATION TYPE SEMICONDUCTOR INTEGRATED DEVICE - Provided is a method for manufacturing a lamination type semiconductor integrated device that can simultaneously attain grinding force resistance during back side grinding of a semiconductor wafer, heat resistance during anisotropic dry etching and the like, chemical resistance during plating and etching, smooth debonding of a support substrate for processing at the end, and low adherend staining; the method comprises at least a step of back side grinding of a first semiconductor wafer having a device formed on its surface and a step of laminating by electrical bonding the first semiconductor wafer with a second semiconductor wafer having a device formed on its surface, wherein, at the time of back side grinding of the first semiconductor wafer, back of the first semiconductor wafer is ground after surface of formed device on the first semiconductor wafer is bonded to a support substrate for processing by using a pressure-sensitive silicone adhesive. | 06-09-2011 |
20110151644 | PROCESS FOR FABRICATING A HETEROSTRUCTURE WITH MINIMIZED STRESS - A process for fabricating a heterostructure by bonding a first wafer to a second wafer, with the first wafer having a thermal expansion coefficient that is lower than the thermal expansion coefficient of the second wafer, and conducting at least one bond-strengthening annealing step. After the bonding step and before the bond-strengthening annealing step, at least one trimming step is conducted in which the first wafer is at least partially trimmed. | 06-23-2011 |
20110177673 | METHOD FOR PRODUCING A STACK OF SEMI-CONDUCTOR THIN FILMS - A method for producing a stacked structure having an ultra thin buried oxide (UTBOX) layer therein by forming an electrical insulator layer on a donor substrate, introducing elements into the donor substrate through the insulator layer, forming an electrical insulator layer, on a second substrate, and bonding the two substrates together to form the stack, with the two insulator layers limiting the diffusion of water and forming the UTBOX layer between the two substrates at a thickness of less than 50 nm, wherein the donor oxide layer has, during bonding, a thickness at least equal to that of the bonding oxide layer. | 07-21-2011 |
20110183495 | ANNEALING PROCESS FOR ANNEALING A STRUCTURE - The invention relates to a process for annealing a structure that includes at least one wafer, with the annealing process including conducting a first annealing of the structure in an oxidizing atmosphere while holding the structure in contact with a holder in a first position in order to oxidize at least portion of the exposed surface of the structure, shifting the structure on the holder into a second position in which non-oxidized regions of the structure are exposed, and conducting a second annealing of the structure in an oxidizing atmosphere while holding the structure in the second position. The process provides an oxide layer on the structure. | 07-28-2011 |
20110195560 | METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE - The invention provides a method of producing a heterostructure of the silicon-on-sapphire type, comprising bonding an SOI substrate onto a sapphire substrate and thinning the SOI substrate, thinning being carried out by grinding followed by etching of the SOI substrate. In accordance with the method, grinding is carried out using a wheel with a grinding surface that comprises abrasive particles having a mean dimension of more than 6.7 μm; further, after grinding and before etching, the method comprises a step of post-grinding annealing of the heterostructure carried out at a temperature in the range of 150° C. to 170° C. | 08-11-2011 |
20110207294 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device makes it possible to efficiently polish with a polishing tape a peripheral portion of a silicon substrate under polishing conditions particularly suited for a deposited film and for silicon underlying the deposited film. The method includes: pressing a first polishing tape against a peripheral portion of a device substrate having a deposited film on a silicon surface while rotating the device substrate at a first rotational speed, thereby removing the deposited film lying in the peripheral portion of the device substrate and exposing the underlying silicon; and pressing a second polishing tape against the exposed silicon lying in the peripheral portion of the device substrate while rotating the device substrate at a second rotational speed, thereby polishing the silicon to a predetermined depth. | 08-25-2011 |
20110207295 | METHOD OF DETACHING SEMI-CONDUCTOR LAYERS AT LOW TEMPERATURE - A method for producing a structure having an ultra thin buried oxide (UTBOX) layer by assembling a donor substrate with a receiver substrate wherein at least one of the substrates includes an insulating layer having a thickness of less than 50 nm that faces the other substrate, conducting a first heat treatment for reinforcing the assembly between the two substrates at temperature below 400° C., and conducting a second heat treatment at temperature above 900° C., wherein the exposure time between 400° C. and 900° C. between the heat treatments is less than 1 minute and advantageously less than 30 seconds. | 08-25-2011 |
20110223742 | Process of forming ultra thin wafers having an edge support ring - A process of forming ultra thin wafers having an edge support ring is disclosed. The process provides an edge support ring having an angled inner wall compatible with spin etch processes. | 09-15-2011 |
20110230035 | Transfer Method for Thin Film Nanomembrane Structures - A transfer process for silicon nanomembranes (SiNM) may involve treating a recipient substrate with a polymer structural support. After treating the recipient substrate, a substrate containing the intended transferable devices may be brought in direct contact with the aforementioned polymer layer. The two substrates may then go through a Deep Reactive Ion Etch (DRIE) to remove at least a portion of the substrate containing the devices. Oxide may be selectively removed with a buffered oxide wet etch, leaving the transferred SiNM on the recipient substrate with the Underlying polymer layer. | 09-22-2011 |
20110250733 | THINNING METHOD AND SILICON WAFER BASED STRUCTURE - A method for thinning a wafer layer to a predetermined thickness comprises two phases of thinning. A first thinning phase and a second thinning phase, wherein the first thinning phase is a preparatory thinning phase and the second thinning phase is a final thinning phase, so performed that the structure comprising silicon meets as thinned the final thickness as predetermined. Such thinned layer in a wafer for instance, can be used in a sensor to be used in normal sized, micromechanical or even nano-sized devices for the device specific sensing applications in electromechanical devices. | 10-13-2011 |
20110306181 | METHOD OF MANUFACTURING SILICON CARBIDE SUBSTRATE - A method of manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate formed of silicon carbide and a SiC substrate formed of single crystal silicon carbide; fabricating a stacked substrate by stacking the base substrate and the SiC substrate to have their main surfaces in contact with each other; heating the stacked substrate to join the base substrate and the SiC substrate and thereby fabricating a joined substrate; and heating the joined substrate such that a temperature difference is formed between the base substrate and the SiC substrate, and thereby discharging voids formed at the step of fabricating the joined substrate at an interface between the base substrate and the SiC substrate to the outside. | 12-15-2011 |
20120015500 | Method of manufacturing wafer level package - A method for manufacturing a wafer level package including: forming a redistribution line connected to a top surface of a die pad on a wafer with the die pad; additionally preparing a carrier film including a metal post with a concave central portion on one surface; bonding the metal post to a top surface of the redistribution line; molding a space between the metal posts with a molding resin; and removing the carrier film. | 01-19-2012 |
20120028439 | Semiconductor And Solar Wafers And Method For Processing Same - A method for manufacturing a silicon-on-insulator structure including a substrate wafer, an active wafer, and an oxide layer between the substrate wafer and the active wafer. The method includes the steps of heat treating the structure, trapezoid grinding edges of the wafer, and grinding a surface of the wafer. | 02-02-2012 |
20120028440 | METHOD OF FABRICATING A MULTILAYER STRUCTURE WITH CIRCUIT LAYER TRANSFER - A method of producing a composite structure comprises a step of producing a first layer of microcomponents on one face of a first substrate, the first substrate being held flush against a holding surface of a first support during production of the microcomponents, and a step of bonding the face of the first substrate comprising the layer of microcomponents onto a second substrate. During the bonding step, the first substrate is held flush against a second support, the holding surface of which has a flatness that is less than or equal to that of the first support used during production of the first layer of microcomponents. | 02-02-2012 |
20120028441 | Method and System for Bonding 3D Semiconductor Device - A method and system and for fabricating 3D (three-dimensional) SIC (stacked integrated chip) semiconductor devices. The system includes a vacuum chamber, a vacuum-environment treatment chamber, and a bonding chamber, though in some embodiments the same physical enclosure may serve more than one of these functions. A vacuum-environment treatment source in communication with the vacuum-environment treatment chamber provides a selected one or more of a hydrogen (H | 02-02-2012 |
20120058623 | Method for Thinning Wafer - The present invention provides a method of thinning a wafer. First, a wafer is provided. The wafer includes an active surface, a back surface and a side surface. The active surface is disposed opposite to the back surface. The side surface is disposed between the active surface and the back surface and encompasses the peripheral of the wafer. Next, a protective structure is formed on the wafer to at least completely cover the side surface. Last, a thinning process is performed upon the wafer from the back surface. | 03-08-2012 |
20120077331 | MANUFACTURING METHOD OF THIN FILM SEMICONDUCTOR SUBSTRATE - A manufacturing method of a thin film semiconductor substrate includes implanting ions at a specified depth into a semiconductor substrate, forming a bubble layer in the semiconductor substrate by vaporizing the ions through heating, bonding an insulating substrate onto the semiconductor substrate, and cleaving the semiconductor substrate along the bubble layer to form a semiconductor thin film on a side of the insulating substrate. At the forming, the semiconductor substrate is heated at a temperature in a temperature range of approximately 1000° C. to 1200° C. for a duration in a range of approximately 10 μs to 100 ms. The heating of the semiconductor substrate is performed by using, for example, a light beam. | 03-29-2012 |
20120088352 | PROCESS FOR ASSEMBLING SUBSTRATES WITH LOW-TEMPERATURE HEAT TREATMENTS - The invention relates to a process for producing a bond between a first and a second substrate. The process includes preparing surfaces of the substrates to be assembled, and attaching the surfaces to form an assembly of these two surfaces, by direct molecular bonding. The assembly is then heat treated, which includes maintaining the temperature within the range of 50° C. to 100° C. for at least one hour. | 04-12-2012 |
20120156861 | QUASI-HYDROPHOBIC Si-Si WAFER BONDING USING HYDROPHILIC Si SURFACES AND DISSOLUTION OF INTERFACIAL BONDING OXIDE - Methods for removing or reducing the thickness of a material layer remaining at Si-Si interfaces after silicon wafer bonding. The methods include an anneal which is performed at a temperature sufficient to dissolve oxide, yet not melt silicon. | 06-21-2012 |
20120276717 | ORGANOPOLYSILOXANE, TEMPORARY ADHESIVE COMPOSITION CONTAINING ORGANOPOLYSILOXANE, AND METHOD OF PRODUCING THINNED WAFER USING THE SAME - The present invention provides a non-aromatic saturated hydrocarbon group-containing organopolysiloxane containing the following units (I) to (III):
| 11-01-2012 |
20120289025 | METHOD FOR MANUFACTURING BONDED WAFER - A method for manufacturing a bonded wafer including bonding together a bond wafer and a base wafer each having a chamfered portion at an outer circumference and thinning the bond wafer, wherein the thinning of the bond wafer includes: a first step of performing surface grinding on the bond wafer such that a thickness of the bond wafer reaches a first predetermined thickness; a second step of removing an outer circumference portion of the ground bond wafer; and a third step of performing surface grinding on the bond wafer such that the thickness of the bond wafer reaches a second predetermined thickness. | 11-15-2012 |
20120302040 | METHOD OF FABRICATION OF A THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE USING A WAFER SCALE MEMBRANE - Methods of fabrication of three-dimensional integrated devices and three-dimensional integrated devices fabricated therefrom are described. A device side of a donor wafer is coated with a polymer film and exposure of a substrate side to an oxidizing plasma creates a continuous SiO | 11-29-2012 |
20120322229 | METHOD FOR BONDING TWO SUBSTRATES - The invention relates to a method for bonding two substrates by applying an activation treatment to at least one of the substrates, and performing the contacting step of the two substrates under partial vacuum. Due to the combination of the two steps, it is possible to carry out the bonding and obtain high bonding energy with a reduced number of bonding voids. The invention is in particular applicable to a substrate of processed or at least partially processed devices. | 12-20-2012 |
20130029475 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device comprises: forming a protective film so as to cover at least a side edge of a substrate; forming a trench, which is annular in shape when viewed oppositely to a first principal surface of the substrate, on the first principal surface by etching using a photoresist pattern; and forming an insulating film so as to fill the trench, to form an insulating ring. | 01-31-2013 |
20130045584 | METHOD OF ELIMINATING FRAGMENTS OF MATERIAL PRESENT ON THE SURFACE OF A MULTILAYER STRUCTURE - The invention relates to a method of eliminating fragments of material present on the exposed surface of a first wafer bonded to a second wafer, the method including a step consisting of placing the first wafer in a liquid solution and propagating ultrasonic waves in the solution. The invention also relates to a process for manufacturing a multilayer structure comprising the following successive steps: bonding of a first wafer to a second wafer so as to form a multilayer structure; annealing of the structure; and thinning of the first wafer, including at least one step of chemically etching the first wafer. The process further includes, after the chemical etching step, the elimination of fragments of material present on the exposed surface of the thinned first wafer. | 02-21-2013 |
20130078785 | METHOD FOR TRIMMING A STRUCTURE OBTAINED BY THE ASSEMBLY OF TWO PLATES - A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer. | 03-28-2013 |
20130095638 | Method of Fabricating Integrated Circuits - A method of fabricating integrated circuits is provided in which sacrificial material is provided on a first surface of a substrate to define structural elements, integrated circuit material is provided on the sacrificial material to provide integrated circuit structures as defined by the structural elements, the sacrificial material is removed from the first surface of the substrate to provide partially fabricated integrated circuits defined by the integrated circuit structures, a carrier handle is attached to the partially fabricated integrated circuits, and the substrate is thinned from a second surface of the substrate opposite the first surface to provide the fabricated integrated circuits. | 04-18-2013 |
20130115754 | MICRO MACHINING METHOD FOR A SUBSTRATE ON AN UNDERLAY - A micro machining method includes utilizing a polymer as an intermediate adhesion layer, and bonding a underlay with a substrate by pressure bonding, thinning the substrate and deep-etching it to form through holes, backfilling the through holes and deep-etching the substrate again to form a plating hole, plating metal in the plating hole to form a support between the underlay and the substrate, and dissolving the through holes, and etching the polymer through the through holes to release structures. Alternatively, after forming the substrate on the underlay, the method can include thinning the substrate and deep-etching it to form a plating hole, plating metal in the plating hole to form a support between the underlay and the substrate, deep-etching the substrate again to form through holes, and etching the polymer through the through holes to release structures. | 05-09-2013 |
20130189828 | METHOD FOR FORMING PAD IN WAFER WITH THREE-DIMENSIONAL STACKING STRUCTURE - A method for forming a pad in a wafer with a three-dimensional stacking structure includes: (a) a first process of bonding a device wafer and a handling wafer; (b) a second process of thinning a back side of an Si substrate which is formed on the device wafer, after the first process; (c) a third process of forming an anti-reflective layer and a PMD (preferential metal deposition) dielectric layer, after the second process; (d) a fourth process of forming vias on back sides of super contacts which are formed on the Si substrate, after the third process; and (e) a fifth process of forming a pad, after the fourth process. | 07-25-2013 |
20130217207 | METHOD FOR DIRECTLY ADHERING TWO PLATES TOGETHER, INCLUDING A STEP OF FORMING A TEMPORARY PROTECTIVE NITROGEN LAYER - To avoid problems of hydrolysis of the silicon oxide formed by PECVD at the surface of at least one wafer, it is proposed to cover, in the vacuum deposition chamber used to deposit the silicon oxide, said oxide with a temporary protective layer containing nitrogen. The protective layer thus protects the silicon oxide against the outer environment and especially against humidity when the wafer provided with the silicon oxide is stored outside of the vacuum deposition chamber. Afterwards, the protective layer is removed, for example, by chemical-mechanical. polishing, just before the two wafers are placed into contact. The protective layer may be formed by a PECVD silicon nitride deposition, by plasma nitriding or nitrogen doping of a superficial portion of the silicon oxide. | 08-22-2013 |
20130237032 | Method of Manufacturing Silicon-On-Insulator Wafers - A method is provided for preparing multilayer semiconductor structures, such as silicon-on-insulator wafers, having reduced warp and bow. Reduced warp multilayer semiconductor structures are prepared by forming a dielectric structure on the exterior surfaces of a bonded pair of a semiconductor device substrate and a semiconductor handle substrate having an intervening dielectric layer therein. Forming a dielectric layer on the exterior surfaces of the bonded pair offsets stresses that may occur within the bulk of the semiconductor handle substrate due to thermal mismatch between the semiconductor material and the intervening dielectric layer as the structure cools from process temperatures to room temperatures. | 09-12-2013 |
20130237033 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device makes it possible to efficiently polish with a polishing tape a peripheral portion of a silicon substrate under polishing conditions particularly suited for a deposited film and for silicon underlying the deposited film. The method includes pressing a first polishing tape against a peripheral portion of a device substrate having a deposited film on a silicon surface while rotating the device substrate at a first rotational speed, thereby removing the deposited film lying in the peripheral portion of the device substrate and exposing the underlying silicon. A second polishing tape is pressed against the exposed silicon lying in the peripheral portion of the device substrate while rotating the device substrate at a second rotational speed, thereby polishing the silicon to a predetermined depth. | 09-12-2013 |
20130273715 | SILICON-ON-INSULATOR SUBSTRATE WITH BUILT-IN SUBSTRATE JUNCTION - A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI substrate includes forming an oxide layer on a silicon first substrate; ion-implanting hydrogen through the oxide layer into the first substrate, to form a fracture zone in the substrate; forming a doped dielectric bonding layer on a silicon second substrate; bonding a top surface of the bonding layer to a top surface of the oxide layer; thinning the first substrate by thermal cleaving of the first substrate along the fracture zone to form a silicon layer on the oxide layer to formed a bonded substrate; and heating the bonded substrate to drive dopant from the bonding layer into the second substrate to form a doped layer in the second substrate adjacent to the bonding layer. | 10-17-2013 |
20130280886 | WAFER PROCESSING LAMINATE, WAFER PROCESSING MEMBER, TEMPORARY BONDING ARRANGEMENT, AND THIN WAFER MANUFACTURING METHOD - A wafer processing laminate is provided comprising a support ( | 10-24-2013 |
20130288453 | METHOD OF MANUFACTURING LAMINATED WAFER BY HIGH TEMPERATURE LAMINATING METHOD - A method of manufacturing a laminated wafer is provided by forming a silicon film layer on a surface of an insulating substrate comprising the steps in the following order of: applying a surface activation treatment to both a surface of a silicon wafer or a silicon wafer to which an oxide film is layered and a surface of the insulating substrate followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer at a temperature of 200° C. to 350° C., and thinning the silicon wafer by a combination of grinding, etching and polishing to form a silicon film layer. | 10-31-2013 |
20130344680 | Trap Rich Layer Formation Techniques for Semiconductor Devices - A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer. | 12-26-2013 |
20140030871 | Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices - An integrated circuit chip is formed with a circuit layer, a trap rich layer and through-semiconductor-vias. The trap rich layer is formed above the circuit layer. The through-semiconductor-vias are also formed above the circuit layer. In some embodiments, the circuit layer is included in a wafer, and the trap rich layer and through-semiconductor-vias are included in another wafer. The two wafers are bonded together after formation of the trap rich layer and through-semiconductor-vias. Additionally, in some embodiments, yet another wafer may also be bonded to the wafer that includes the trap rich layer and through-semiconductor-vias. Furthermore, in some embodiments, another circuit layer may be formed in the wafer that includes the trap rich layer and through-semiconductor-vias. | 01-30-2014 |
20140051231 | METHOD FOR PERMANENTLY BONDING WAFERS - This invention relates to a method for bonding of a first contact surface of a first substrate to a second contact surface of a second substrate, the second substrate having at least one reaction layer, with the following steps, especially the following sequence:
| 02-20-2014 |
20140120695 | METHOD FOR MANUFACTURING BONDED SUBSTRATE HAVING AN INSULATOR LAYER IN PART OF BONDED SUBSTRATE - A method for manufacturing a bonded substrate that has an insulator layer in part of the bonded substrate includes: partially forming a porous layer or forming a porous layer whose thickness partially varies on a bonding surface of the base substrate; performing a heat treatment to the base substrate having the porous layer formed thereon to change the porous layer into the insulator layer, and thereby forming the insulator layer whose thickness partially varies on the bonding surface of the base substrate; removing the insulator layer whose thickness varies by an amount corresponding to a thickness of a small-thickness portion by etching; bonding the bonding surface of the base substrate on which an unetched remaining insulator layer is exposed to a bond substrate; and reducing a thickness of the bonded bond substrate and thereby forming a thin film layer. | 05-01-2014 |
20140127881 | SUPPORT DISK FIXING APPARATUS, MANUFACTURING METHOD FOR A SEMICONDUCTOR DEVICE USING THIS APPARATUS, AND SEMICONDUCTOR MANUFACTURING APPARATUS - A support disk fixing apparatus which includes an upper surface to which a wafer is bonded, a lower surface, a cylindrical side surface between the upper surface and the lower surface, and a chamfered portion between the upper surface and the side surface, includes a base upon which the support disk is placed; and a fixture that is provided on the base, and that has a first surface that abuts against the side surface of the support disk and covers the side surface of the support disk, and a second surface that abuts against the chamfered portion of the support disk and covers the chamfered portion of the support disk. | 05-08-2014 |
20140147989 | TEMPORARY ADHESIVES INCLUDING A FILLER MATERIAL AND RELATED METHODS - Temporary adhesives include a thermoplastic polymer comprising from about 30% by weight to about 80% by weight of the temporary adhesive, a solvent comprising from about 20% by weight to about 70% by weight of the temporary adhesive, and a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive. Methods of processing a semiconductor device wafer include bonding the semiconductor device wafer to a surface of a carrier substrate using a temporary adhesive including a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive, thinning the semiconductor device wafer, and, while the temporary adhesive remains on the surface of the carrier substrate proximate a peripheral edge thereof, subjecting the thinned semiconductor device wafer to one or more back side processing operations. Methods of forming a thinned semiconductor wafer include using such a temporary adhesive. | 05-29-2014 |
20140213039 | METHODS OF PROCESSING SUBSTRATES - Methods processing substrates are provided. The method may include providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting glue layer and thermosetting release layers provided on opposing sides of the thermosetting glue layer. | 07-31-2014 |
20140242779 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND MANUFACTURING APPARATUS - According to one embodiment, a semiconductor device manufacturing method includes: bonding a first wafer and a second wafer to each other, to form a stack; rubbing a film attached with a fill material in a thin-film shape into a gap located between a bevel of the first wafer and a bevel of the second wafer, to fill the gap with the fill material; and thinning the first wafer. | 08-28-2014 |
20140287567 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - According to one embodiment, a first adhesive layer is formed on one major surface of a first substrate. The first substrate and a second substrate are adhered using a second adhesive layer that has thermosetting properties and covers the first adhesive layer, wherein a bonding strength between the second substrate is greater than a bonding strength between the second substrate and the first adhesive layer. The other major surface of the first substrate is polished, and the first substrate is thinned. A physical force is then applied to peripheral parts of the second adhesive layer, and a circular notched part is formed along the outer perimeter of the second adhesive layer to separate the first substrate and the second substrate at the interface between the first adhesive layer and the second adhesive layer. | 09-25-2014 |
20140308801 | Anything on Glass - Bonding of one or more semiconductor layers to a glass substrate is facilitated by depositing spin-on-glass (SOG) on the top of the semiconductor layers. The SOG is then bonded to the glass substrate, and after that, the original substrate of the semiconductor layers is removed. The resulting structure has the semiconductor layers disposed on the glass substrate with a layer of SOG sandwiched between. Bonding is always between glass and glass, and is independent of the composition of the target layers. Thus, it can provide “anything on glass”. For example, X-on-insulator (XOI), where X can be silicon, germanium, GaAs, GaN, SiC, graphene, etc. The spin-on-glass also helps with the surface roughness requirement. | 10-16-2014 |
20140342530 | TEMPORARY ADHESIVE MATERIAL FOR WAFER, FILM FOR TEMPORARY ADHESION USING SAME, WAFER PROCESSING LAMINATE, AND METHOD FOR PRODUCING THIN WAFER USING SAME - A temporary adhesive material for a wafer includes a first temporary adhesive layer of a silicone-containing polymer layer containing a photo base generator and a second temporary adhesive layer of a silicone-containing polymer layer which is laminated on the first temporary adhesive layer, does not contain the photo base generator, and is different from the polymer layer. Thereby, there can be formed a temporary adhesive layer having high thickness uniformity, even on a wafer having a step. Because of the thickness uniformity, a thin wafer having a uniform thickness of 50 μm or less can be easily obtained. When a thin wafer is produced and then delaminated from a support, the wafer can be delaminated from the support by exposure at a low exposure dose without stress. Therefore, a brittle thin wafer can be easily handled without causing damage, and a thin wafer can be easily produced. | 11-20-2014 |
20150072505 | METHOD AND APPARATUS OF HOLDING A DEVICE - Provided is an apparatus and a method of holding a device. The apparatus includes a wafer chuck having first and second holes that extend therethrough, and a pressure control structure that can independently and selectively vary a fluid pressure in each of the first and second holes between pressures above and below an ambient pressure. The method includes providing a wafer chuck having first and second holes that extend therethrough, and independently and selectively varying a fluid pressure in each of the first and second holes between pressures above and below an ambient pressure. | 03-12-2015 |
20150093880 | WAFER PROCESSING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE BY USING THE SAME - A wafer processing method, by which a device wafer may be aligned and bonded to a carrier wafer to perform a back grinding process for the device wafer and may be separated from the carrier wafer after performing the back grinding process, and a method of manufacturing a semiconductor device by using the wafer processing method are provided. The wafer processing method includes: disposing a first magnetic material on a front side of a wafer and disposing a second magnetic material on a carrier wafer, wherein a surface of the first magnetic material and a surface of the second magnetic material, which face each other, have opposite polarities; aligning and bonding the wafer to the carrier wafer by magnetic attraction between the first magnetic material and the second magnetic material; grinding a back side of the wafer to make the wafer thin; and separating the wafer from the carrier wafer. | 04-02-2015 |
20150104927 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for fabricating a semiconductor device is provided. The method includes: providing a first wafer having a first active surface and a first rear surface opposite to the first active surface, the first wafer comprising a first circuit formed therein; providing a second wafer having a second active surface and a second rear surface opposite to the second active surface, the second wafer comprising a second circuit formed therein; bonding the first active surface of the first wafer with the second active surface of the second wafer so as to electrically connecting the first circuit and the second circuit; thinning the second wafer from the second rear surface; and forming at least a conductive through via in the second wafer, wherein the conductive through via is electrically connected to the first circuit through the second circuit. | 04-16-2015 |
20150132923 | PROCESS FOR FABRICATING A HETEROSTRUCTURE LIMITING THE FORMATION OF DEFECTS - The invention relates to a process for fabricating a heterostructure comprising at least one thin layer and a carrier substrate made of a semiconductor, the process comprising: bonding a first substrate made of a single-crystal first material, the first substrate comprising a superficial layer made of a polycrystalline second material, to a second substrate so that a bonding interface is created between the polycrystalline layer and the second substrate; removing from the free surface of one of the substrates, called the donor substrate, a thickness thereof so that only a thin layer is preserved; generating a layer of amorphous semiconductor material between the first substrate and the bonding interface by amorphization of the layer of polycrystalline material; and crystallizing the layer of amorphous semiconductor material, the newly crystallized layer having the same orientation as the adjacent first substrate. | 05-14-2015 |
20160190001 | GROUP III NITRIDE COMPOSITE SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR DEVICE - A group III nitride composite substrate includes a group III nitride film and a support substrate formed from a material different in chemical composition from the group III nitride film. The group III nitride film has a thickness of 10 μm or more. A sheet resistance of a-group III-nitride-film-side main surface of the group III nitride composite substrate is 200 Ω/sq or less. A method for manufacturing a group III nitride composite substrate includes the steps of bonding the group III nitride film and the support substrate to each other; and reducing the thickness of at least one of the group III nitride film and the support substrate bonded to each other. Accordingly, a group III nitride composite substrate of a low sheet resistance that is obtained with a high yield as well as a method for manufacturing the same are provided. | 06-30-2016 |
20160379865 | METHOD FOR PREPARING SEMICONDUCTOR SUBSTRATE WITH SMOOTH EDGES - A method is provided for preparing a semiconductor substrate with smooth edges. The method includes: providing a first substrate and a second substrate; forming an insulating layer on a surface of the first substrate and/or the second substrate; bonding the first substrate and the second substrate by using the insulating layer as an intermediate layer; conducting a chamfering process on the bonded first substrate and insulating layer; and conducting edge polishing on the first substrate and insulating layer subjected to the chamfering process. | 12-29-2016 |
20220135913 | CLEANING AGENT COMPOSITION AND CLEANING METHOD - A cleaning agent composition for use in removal of a polysiloxane adhesive remaining on a substrate containing a tetrahydrocarbylammonium fluoride and an organic solvent, wherein the organic solvent contains a lactam compound represented by formula (1) and a ring-structure-having ether compound including at least one species selected from among a cyclic ether compound, a cycloalkyl (chain alkyl) ether compound, a cycloalkyl (branched alkyl) ether compound, and a di(cycloalkyl) ether compound. | 05-05-2022 |