Class / Patent application number | Description | Number of patent applications / Date published |
427980600 | With pretreatment of substrate | 20 |
20090162537 | POST-DEPOSITION CLEANING METHODS AND FORMULATIONS FOR SUBSTRATES WITH CAP LAYERS - One embodiment of the present invention is a method of fabricating an integrated circuit. The method includes providing a substrate having a metal and dielectric damascene metallization layer and depositing substantially on the metal a cap. After deposition of the cap, the substrate is cleaned with a solution comprising an amine to provide a pH for the cleaning solution of 7 to about 13. Another embodiment of the presented invention is a method of cleaning substrates. Still another embodiment of the present invention is a formulation for a cleaning solution. | 06-25-2009 |
20090196980 | ELECTRICAL DEVICE WITH TEETH JOINING LAYERS AND METHOD FOR MAKING THE SAME - A multilayer electrical device, such as a printed circuit board, having a tooth structure including a metal layer set in a dielectric. The device includes a base; a conductive layer adjacent to the base; a dielectric material adjacent to conductive layer; a tooth structure including a metal layer set in the dielectric material to join the dielectric material to the metal layer; and wherein the metal layer forms a portion of circuitry in a circuit board having multiple layers of circuitry. | 08-06-2009 |
20090246359 | PROCESSES AND SOLUTIONS FOR SUBSTRATE CLEANING AND ELECTROLESS DEPOSITION - This invention pertains to fabrication of devices. One embodiment is a method of substrate cleaning and electroless deposition of a cap layer for an integrated circuit. The method is performed on a substrate having a surface comprising a metal and dielectric damascene metallization layer. The method comprises exposing the surface of the substrate to a cleaning solution sufficient to clean the surface of the substrate and exposing the surface of the substrate to an electroless deposition solution sufficient to deposit the cap layer. Other embodiments of the present invention include solutions to clean the substrate and solutions to accomplish electroless deposition. | 10-01-2009 |
20100009070 | METHOD FOR FORMING SOLDER LAYER ON PRINTED-WIRING BOARD AND SLURRY DISCHARGE DEVICE - A method for forming a solder layer on the surface of a conductive circuit on a printed-wiring board includes discharging slurry containing solder powder onto the surface and heating the substrate. The slurry is discharged by dint of the pressure in a tank for the slurry. In a discharging device to be used in the method, the tank for storing the slurry is provided with a discharge pipe ( | 01-14-2010 |
20140079876 | STRUCTURE MANUFACTURING METHOD - A structure ( | 03-20-2014 |
20140154406 | WET ACTIVATION OF RUTHENIUM CONTAINING LINER/BARRIER - Methods and systems are provided for preparing a ruthenium containing liner/barrier for metal deposition, and are useful in the manufacture of integrated circuits. In accordance with one embodiment, a borohydride solution having a pH greater than 12 is mixed with DI water at the place of application to form a pretreatment solution. The pretreatment solution is applied to reduce a ruthenium-containing surface of a substrate. Following reduction of the ruthenium containing surface, copper deposition may be initiated. | 06-05-2014 |
20140295065 | RESIN PROTRUSION FORMING METHOD AND WIRING BOARD MANUFACTURING METHOD - A resin protrusion forming method includes: forming on a substrate a thermal curing resin layer that is in an uncured state; forming a protrusion by pressing a forming mold against the thermal curing resin layer; forming a retaining member that retains a side face of the protrusion; and heating the substrate on which the protrusion and the retaining member have been formed. | 10-02-2014 |
20150072070 | PRETREATMENT AGENT FOR ELECTROLESS PLATING, AND PRETREATMENT AND PRODUCTION OF PRINTED WIRING BOARD USING SAME - A pretreatment agent for electroless plating is provided, which includes: a fluorine compound; a surfactant; and at least one solvent selected from ethylene-based glycol butyl ethers of formula: C | 03-12-2015 |
20180023197 | PRETREATMENT AGENT FOR ELECTROLESS PLATING, AND PRETREATMENT AND PRODUCTION OF PRINTED WIRING BOARD USING SAME | 01-25-2018 |
427980800 | Etching or roughening | 6 |
20080241361 | Printed circuit board manufacturing method - A printed circuit board manufacturing method is disclosed. The printed circuit manufacturing method, which includes forming an adhesive layer on a carrier, adhesiveness of the adhesive layer being changed according to heat; forming a circuit pattern on a surface of the adhesive layer; compressing the carrier into the insulation layer to allow the circuit pattern to face the insulation layer; and separating the carrier from the insulation layer by supplying heat to allow the adhesive to reach a predetermined temperature, can reduce a cost of a transferring process and improve the reliability of products by minimizing the affect on a metal pattern, by using a material having the adhesiveness changed according to the temperature as an adhesive layer. | 10-02-2008 |
20090092749 | MANUFACTURE METHOD OF BUILDUP CIRCUIT BOARD - A manufacturing method of a buildup circuit board includes forming a wiring layer on an organic polymer insulating layer by copper electroplating and building up other organic polymer insulating layer on the wiring layer, wherein in a final step of the copper electroplating, a surface of the wiring layer is roughened by copper electroplating and the organic polymer insulating layer is formed directly on the roughened surface of the wiring layer. According to the invention, a specific etching step that is essential for enhancing adhesion between the organic polymer insulating layer and the wiring layer can be omitted and no expensive etching apparatus is necessary, thus being good in economy. In addition, if various types of copper sulfate plating baths containing different types of additives used for via fill plating are used as they are, irregularities on the surface can be made in various forms and roughnesses. Thus, it is unnecessary to select a specific type of etching solution depending on film characteristics ascribed to types of additives. Moreover, it is easy to form surface irregularities in conformity with the type of material and physical properties of the organic polymer insulating layer being built up. | 04-09-2009 |
20100221414 | METHOD FOR MANUFACTURING PRINTED WIRING BOARD - A method for manufacturing a printed wiring board includes preparing insulative board having first and second surfaces, forming metal film on the first surface, plating resist on the metal film and plated-metal film on the metal film exposed by the plating resist, covering portion of the plated-metal film with etching resist, etching to reduce thickness of the plated-metal film exposed by the etching resist, removing the etching and plating resists, by removing the metal film exposed after removing the plating resist, forming wiring comprising pad for electronic component having gold bump and conductive circuit which is thinner than the pad, forming solder-resist layer on the first surface and the wiring, and forming opening in the solder-resist layer to expose the pad and portion of the conductive circuit contiguous to the pad and metal coating on the pad and portion of the conductive circuit, which are exposed through the opening. | 09-02-2010 |
20110135811 | SOLUTION FOR INHIBITING PALLADIUM ACTIVITY INCLUDING HALOGENIC ACID AND METHOD FOR PREVENTING DEFECT OF PLATING USING THEREOF - Disclosed is a solution for inhibiting palladium activity including an aqueous halogenic acid solution as a pre-treatment solution which may be used before an electroless plating of a printed circuit board to prevent bad plating and a method for preventing bad plating by using the same. More particularly, disclosed is a solution for inhibiting palladium activity including 0.1 to 10 mol of an aqueous halogenic acid solution as a pre-treatment solution which may be used before an ENIG plating or ENEPIG plating of a printed circuit board to prevent bad plating. | 06-09-2011 |
20140141156 | METHOD OF FORMING ELECTRIC WIRING USING INKJET PRINTING - Disclosed is a method of forming an electric wiring using inkjet printing. The method includes forming a main trench and first and second guide trenches on a substrate. The first and second guide trenches are disposed at opposite sides of the main trench. The method includes ejecting ink into the main trench, the ink including a conductive material. The method also includes heating the substrate to sinter the ink such that the electric wiring is formed an upper portion of the main trench, and contract the ink such that a tunnel is formed in a lower portion of the main trench. | 05-22-2014 |
20150064346 | PROCESS FOR METALLIZING NONCONDUCTIVE PLASTIC SURFACES - The present invention relates to a process for metallizing nonconductive plastics using an etching solution free of hexavalent chromium. The etching solution is based on an acidic permanganate solution. After the treatment of the plastics with the etching solution, the plastics are metallized by means of known processes. | 03-05-2015 |
427980900 | Heating | 1 |
20080292784 | Method for Metallizing Liquid Crystal and Polymer - A method for making printed circuits and printed circuit boards which utilizes a process for forming a thin metal layer, such as a copper layer, on underlying substrates such as a liquid crystalline polymer material. Forming such a thin metal layer on the surface of the substrate enables fine line imaging for forming printed circuits and printed circuit boards. The process includes providing a metallized substrate, removing the metal from the substrate, vacuum baking the substrate, dipping the substrate in permanganate solution, rinsing the substrate with water, neutralizing the substrate, subjecting the substrate to an electroless copper procedure and plating the substrate with copper. | 11-27-2008 |
427990100 | Activating or catalyst pretreatment | 4 |
20110212260 | Methods Of Forming Electrically Conductive Structures - Some embodiments include methods of forming conductive material within high aspect ratio openings and low aspect ratio openings. Initially, the high aspect ratio openings may be filled with a first conductive material while the low aspect ratio openings are only partially filled with the first conductive material. Additional material may then be selectively plated over the first conductive material within the low aspect ratio openings relative to the first conductive material within the high aspect ratio openings. In some embodiments, the additional material may be activation material that only partially fills the low aspect ratio opening, and another conductive material may be subsequently plated onto the activation material to fill the low aspect ratio openings. | 09-01-2011 |
20120171363 | CATALYST APPLICATION SOLUTION, ELECTROLESS PLATING METHOD USING SAME, AND DIRECT PLATING METHOD - Disclosed is a catalyst application solution for plating an insulating portion of an object to be plated that comprises the insulating portion. The catalyst application solution is characterized by containing a water-soluble palladium compound, a reducer, a dispersant, catechol, a copper antioxidant and a buffering agent, and by having a pH of not less than 4. When the catalyst application solution is compared with a Pd—Sn colloidal solution, the catalyst application solution has the following advantages: since the catalyst application solution is a colloidal solution of Pd only that does not contain Sn, a pre-dip process and an Sn removal process are unnecessary and thus the catalyst application process can be simplified; since the catalyst application solution has a pH of not less than 4, haloing does not occur; and since the catalyst application solution is in a reducing atmosphere due to the reducer contained therein, a copper surface is not oxidized and no copper dissolution occurs, thereby causing no palladium displacement reaction. | 07-05-2012 |
20120321781 | PRE-TREATMENT PROCESS FOR ELECTROLESS NICKEL PLATING - The present invention discloses a process for electroless plating of nickel onto copper features of a printed circuit board which suppresses extraneous nickel plating. The process comprises the steps i) activation of the copper features with palladium ions; ii) removal of excessive palladium ions or precipitates formed thereof with a pre-treatment composition comprising at least two different types of acids wherein one type is an organic amino carboxylic acid and iii) electroless plating of nickel. | 12-20-2012 |
20150342063 | COPOLYMERS OF DIGLYCIDYL ETHER TERMINATED POLYSILOXANE COMPOUNDS AND NON-AROMATIC POLYAMINES - Copolymers of diglycidyl ether terminated polysiloxane compounds and non-aromatic polyamines are used in the preparation of dielectric materials for electroless metal plating. The copolymers may be used in the manufacture of printed circuit boards such as in cleaning and conditioning through-holes prior to electroless metallization. | 11-26-2015 |