Class / Patent application number | Description | Number of patent applications / Date published |
427970100 | Multilayer | 63 |
20080199597 | Method For Producing A Three-Dimensional Circuit - The invention relates to a method for producing a three-dimensional circuit having at least two superimposed, flexibly formed substrate layers comprising conductor paths and/or circuit elements composed of electrical functional materials. The method has a combination of the following method steps:
| 08-21-2008 |
20100136223 | METHODS AND COMPOSITIONS FOR DIELECTRIC MATERIALS - The present invention comprises methods and compositions of dielectric materials. The dielectric materials of the present invention comprise materials having a dielectric constant of more than 1.0 and less than 1.9 and/or a dissipation factor of less than 0.0009. Other characteristics include the ability to withstand a wide range of temperatures, from both high temperatures of approximately +260° C. to low temperatures of approximately −200° C., operate in wide range of atmospheric conditions and pressures (e.g., a high atmosphere, low vacuum condition such as that found in the outer-space as well as conditions similar to those found at sea level or below sea level). The dielectric materials of the present invention may be used in the manufacture of composite structures that can be used alone or in combination with other materials, and can be used in electronic components or devices such as RF interconnects. | 06-03-2010 |
20100323100 | CONTROLLING THICKNESS UNIFORMITY AND INTERFACES IN STACKS - A method of creating a stack having multiple layers of deposited film onto a substrate is discussed. The method includes depositing a first layer of a first material onto the substrate and depositing a second layer onto the first layer. Depositing the second layer includes depositing a first amount of the second material onto the first layer at a first deposition temperature selected to set the normalized diffusion activation energy of the second material. | 12-23-2010 |
20120308717 | NICKEL-GOLD PLATEABLE THICK FILM SILVER PASTE, AND PLATING PROCESS FOR LOW TEMPERATURE CO FIRED CERAMIC DEVICES AND LTCC DEVICES MADE THEREFROM - Described are LTCC devices, with external silver containing electrical contacts, that are sequentially plated with a nickel containing metal and a gold containing metal. | 12-06-2012 |
20130108779 | Methods of Filling Voids in Copper Structures | 05-02-2013 |
20130243940 | DIFFUSION BARRIER COATED SUBSTRATES AND METHODS OF MAKING THE SAME - Devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The devices include a metal substrate, a diffusion barrier layer on the metal substrate, one or more insulator layers on the diffusion barrier layer, and an antenna and/or inductor on the one or more insulator layer(s). The method includes forming a diffusion barrier layer on the metal substrate, forming one or more insulator layers on the diffusion barrier layer; and forming an antenna and/or inductor on an uppermost one of the insulator layer(s). The antenna and/or inductor is electrically connected to at least one of the diffusion barrier layer and/or the metal substrate. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into device layers formed thereon. | 09-19-2013 |
20140030425 | ADHESION PROMOTION IN PRINTED CIRCUIT BOARDS - Compositions and methods for enhancing adhesion between a copper conducting layer and a dielectric material during manufacture of a printed circuit board. Conditioning compositions contain a functional organic compound and preferably a transition metal ion. The functional organic compound, e.g., a purine derivative, is capable of forming a self-assembled monolayer. Adhesion promoting compositions contain an acid, preferably an inorganic acid, and an oxidant. The latter compositions may also contain a corrosion inhibitor and/or a transition metal ion selected from among Zn, Ni, Co, Cu, Ag, Au, Pd or another Pt group metal. The corrosion inhibitor may comprise a nitrogen-containing aromatic heterocyclic compound. | 01-30-2014 |
427970200 | Coating hole wall | 10 |
20080286446 | Seed-Assisted MOCVD Growth of Threshold Switching and Phase-Change Materials - A method for forming electrically stimulable materials, including programmable resistance and electrical switching materials, in high aspect ratio features. The method includes forming a seed layer in the recessed portion of a feature and using the seed layer to direct the vapor phase deposition of an electrically stimulable material. The seed layer may provide nucleation sites that lead to preferential deposition of the electrically stimulable material on the seed layer relative to the sidewalls of the feature. The seed layer may promote the formation of a finely crystalline morphology of the electrically stimulable material to facilitate deposition in the recessed portions of a feature and inhibit blocking of the top of the feature by large crystals. | 11-20-2008 |
20080311285 | CONTACT HOLE FORMING METHOD, CONDUCTING POST FORMING METHOD, WIRING PATTERN FORMING METHOD, MULTILAYERED WIRING SUBSTRATE PRODUCING METHOD, ELECTRO-OPTICAL DEVICE PRODUCING METHOD, AND ELECTRONIC APPARATUS PRODUCING METHOD - A method for forming a contact hole includes forming a lyophobic area by applying a liquid droplet of a lyophobic material on a region for forming a contact hole on a wiring, the lyophobic material being lyophobic to a liquid that contains an insulating layer forming material; and forming an insulating layer by applying a droplet of the liquid containing the insulating layer forming material so as to cover the wiring except for the lyophobic area, wherein the contact hole formed penetrates through the insulating layer to be connected to the wiring covered by the insulating layer. | 12-18-2008 |
20100075026 | Metallization on a surface and in through-holes of a substrate and a catalyst used therein - A copolymer deposited with particles of catalytic metal is disclosed in the present invention, which is formed from an ethylenically unsaturated monomer and a hydrophilic monomer, and the catalytic metal is Au, Ag, Pd, Pt or Ru. The copolymer is hydrophilic when the temperature is lower than a specific temperature, and will become hydrophobic when the temperature is greater than the specific temperature. The present invention also discloses a method for forming a metal layer on a substrate via electroless plating, which includes contacting the substrate with an ink composition, drying the ink composition on the substrate, and contacting the dried ink composition with an electroless plating solution, wherein the ink composition contains the copolymer of the present invention in an aqueous phase. The present invention further discloses a method for forming metal conductors in through holes of a substrate. | 03-25-2010 |
20120082779 | MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board including a first interlayer resin insulation layer, a first conductive circuit formed on the first interlayer resin insulation layer, a second interlayer resin insulation layer formed on the first interlayer resin insulation layer and the first conductive circuit and having an opening portion exposing a portion of the first conductive circuit, a second conductive circuit formed on the second interlayer resin insulation layer, a via conductor formed in the opening portion of the second interlayer resin insulation layer and connecting the first conductive circuit and the second conductive circuit, and a coating layer having a metal layer and a coating film and formed between the first conductive circuit and the second interlayer resin insulation layer. The metal layer is formed on the surface of the first conductive circuit and the coating film is formed on the metal layer. | 04-05-2012 |
20130149437 | METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD - Disclosed herein is a method for manufacturing a printed circuit board. | 06-13-2013 |
20130243941 | METHOD OF MANUFACTURING CORELESS SUBSTRATE HAVING FILLED VIA PAD - A method of manufacturing a coreless substrate having filled via pads, including: forming a first insulating layer on one side of a carrier forming a build-up layer including a build-up insulating layer and a build-up circuit layer having a build-up via on the first insulating layer, and forming a second insulating layer on the build-up layer; removing the carrier, and forming via-holes in the first and second insulating layers; and conducting a filled plating process in the via-holes of the first and second insulating layers thus forming first and second filled via pads therein. | 09-19-2013 |
20130266724 | METHOD OF MANUFACTURING TOUCH SCREEN PANEL - Provided is a method of manufacturing a touch screen panel. The method of manufacturing the touch screen panel includes preparing a substrate including a cell region and an interconnection region formed around the cell region, forming bridge electrodes arranged at a predetermined distance on the cell region of the substrate, forming an insulation layer on the substrate including the bridge electrodes, patterning the insulation layer to form contact holes exposing both ends of the bridge electrodes, and forming X-axis electrode extending in a first direction between the contact holes spaced apart from and facing each other and Y-axis electrode cells filling the contact holes and formed in a second direction perpendicular to the first direction. The bridge electrodes, the X-axis electrodes, and the Y-axis electrode cells are formed as hybrid electrodes, respectively. | 10-10-2013 |
20140322435 | THREE-DIMENSIONAL MULTILAYER SOLENOID TRANSFORMER - This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another. | 10-30-2014 |
20150044359 | METHOD OF MANUFACTURING A THIN SUPPORT PACKAGE STRUCTURE - A method of manufacturing a thin support package structure includes the steps of: preparing a support plate formed with a plurality of grooves adjacent to an outer rim thereof, forming a releasing material layer on the support plate; forming a first circuit layer on the releasing material layer so as to form a thin circuit board; forming a dielectric layer on the releasing material layer; forming a plurality of openings in the dielectric layer; forming a second circuit layer on the dielectric layer; forming connection plugs by filling the openings; forming a solder mask on the dielectric layer; forming a plurality of notches on the lower surface of the support plate to communicate with the grooves, respectively; and removing the central part of the support plate between the notches and the central part of the releasing material on the support plate. | 02-12-2015 |
20150118391 | THERMAL MANAGEMENT CIRCUIT MATERIALS, METHOD OF MANUFACTURE THEREOF, AND ARTICLES FORMED THEREFROM - A thermal management circuit material comprises a thermally conductive metallic core substrate, metal oxide dielectric layers on both sides of the metallic core substrate, electrically conductive metal layers on the metal oxide metal oxide dielectric layers, and at least one through-hole via filled with an electrically conductive metal-containing core element connecting at least a portion of each of the electrically conductive metal layers, wherein the containing walls of the through-hole via are covered by a metal oxide dielectric layer connecting at least a portion of the metal oxide dielectric layers on opposite sides of the metallic core substrate. Also disclosed are methods of making such circuit materials, comprising forming metal oxide dielectric layers by oxidative conversion of a surface portion of the metallic core substrate. Articles having a heat-generating electronic device such as an HBLED mounted in the circuit material are also disclosed. | 04-30-2015 |
427970300 | Nonuniform or patterned coating | 42 |
20080280032 | PROCESS OF EMBEDDED CIRCUIT STRUCTURE - A process of an embedded circuit structure is provided. A complex metal layer, a prepreg, a supporting board, another prepreg and another complex metal layer are laminated together, wherein each of the complex metal layers has an inner metal layer and an outer metal layer stacked on the inner metal layer, the roughness of the outer surfaces of the inner metal layers is less than the roughness of the second outer surfaces of the outer metal layers, and the outer surfaces of the outer metal layers after laminating are exposed outwards. Each of two patterned photoresist layers is respectively formed on the outer surfaces of the outer metal layers. A metal material is created on portions of the outer surfaces of the outer metal layers not covered by the patterned photoresist layers to form two patterned circuit layers. The patterned photoresist layers are then removed to form a laminating structure. | 11-13-2008 |
20090022884 | SYSTEM AND METHOD FOR MICRO-ELECTROMECHANICAL OPERATION OF AN INTERFEROMETRIC MODULATOR - An interferometric modulator is formed by a stationary layer and a mirror facing the stationary layer. The mirror is movable between the undriven and driven positions. Landing pads, bumps or spring clips are formed on at least one of the stationary layer and the mirror. The landing pads, bumps or spring clips can prevent the stationary layer and the mirror from contacting each other when the mirror is in the driven position. The spring clips exert force on the mirror toward the undriven position when the mirror is in the driven position and in contact with the spring clips. | 01-22-2009 |
20090035455 | Adhesive bleed prevention method and product produced from same - A method of preventing adhesive bleed onto the metal (e.g., gold) surfaces of a plurality of electrical conductors (e.g., wire-bond pads) positioned on a dielectric substrate when positioning an electronic component onto the dielectric substrate and electrically coupling (e.g., wire-bonding) the component to the metal surfaces. The method includes contacting the metal surfaces with a chemical composition which comprises a minor amount of a surface active agent (e.g., a thiol) and the remainder substantially being a non-reactive solvent (e.g., methanol). A circuitized substrate produced using this method is also provided. | 02-05-2009 |
20090074955 | METHODS FOR PATTERNING ELECTRONIC ELEMENTS AND FABRICATING MOLDS - A method for patterning a surface includes providing a first layer of mechanically deformable material having a first surface. A second layer of mechanically deformable material is placed on the first surface. At least a portion of the second layer is controllably displaced to form at least one patterned void through the second layer. | 03-19-2009 |
20090142478 | Wired circuit board and producing method thereof - A wired circuit board and a producing method thereof are provided which can precisely form an insulating layer and reduce transmission loss with a simple layer structure and also features excellent long-term reliability by preventing the occurrence of an ion migration phenomenon between a ground layer and a positioning mark layer, and the insulating layer to improve the adhesion therebetween and the conductivity of a conductor. A metal supporting board is prepared and a first metal thin film is formed on the metal supporting board. A resist is formed in a pattern and a ground layer and a positioning mark layer are formed on the first metal thin film exposed from the resist at the same time. A second metal thin film is formed over the ground layer and the positioning mark layer, then the resist is removed. An insulating base layer is formed on the first metal thin film including the upper surface of the second metal thin film, thereafter, a conductive pattern is formed on the insulating base layer. | 06-04-2009 |
20090196979 | INKJET PRINTING PROCESS FOR CIRCUIT BOARD - An inkjet printing process for a circuit board includes the following procedures. Firstly, a substrate and a conductive layer disposed on the substrate are provided. Afterward, a roughening treatment is performed on the conductive layer so that the roughness of the conductive layer is between 0.1 μm and 5 μm. Then, a patterned mask layer is printed on the conductive layer for covering an area of the conductive layer prepared for forming a circuit pattern. | 08-06-2009 |
20090246357 | METHOD OF FORMING CIRCUITS ON CIRCUIT BOARD - A method of forming a circuit on a circuit board includes the steps of: forming a first circuit pattern made of a nano-scale metal oxide material on a surface of an insulating substrate; reducing the nano-scale metal oxide material into a nano-scale deoxidized metal material, thus obtaining a second circuit pattern; and forming an electrically conductive metal layer on the second circuit pattern. | 10-01-2009 |
20100021627 | PRINTED WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A manufacturing method of a printed wiring board, including forming a plurality of electrodes on a conductive layer formed on a substrate by a plating method, forming an insulation layer on the electrodes and the conductive layer, removing the substrate from the conductive layer, patterning the conductive layer except for a resistor forming region reserved for forming a resistor, thereby forming an external connection conductive pattern, and forming a resistor in the resistor forming region such that the resistor is separated by a space from the external connection conductive pattern. | 01-28-2010 |
20100178419 | STRUCTURE COMPRISING A GETTER LAYER AND AN ADJUSTING SUBLAYER AND FABRICATION PROCESS - The structure comprises at least a device, for example a microelectronic chip, and at least a getter arranged in a cavity under a controlled atmosphere delineated by a substrate and a sealing cover. The getter comprises at least one preferably metallic getter layer, and an adjustment sub-layer made from pure metal, situated between the getter layer and the substrate, on which it is formed. The adjustment sub-layer is designed to modulate the activation temperature of the getter layer. The getter layer comprises two elementary getter layers. | 07-15-2010 |
20100239749 | Electronic circuit board manufacturing method - An electronic circuit board is formed by a pattern forming step for forming a conductive pattern of an electronic circuit board by applying a metal colloid solution on a base material by an inkjet method and a coagulant application step for applying a coagulant solution at least on the conductive pattern by a deposition method. | 09-23-2010 |
20100266752 | METHOD FOR FORMING CIRCUIT BOARD STRUCTURE OF COMPOSITE MATERIAL - A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed. | 10-21-2010 |
20110256308 | ALGORITHMIC PROCESSING TO CREATE FEATURES - Sub-lithographi lamella and pillar structures defined by larger lines or lamellae are described. A static random access memory (SRAM) cell structure is created in a three-dimensional format as a vertical stack of wired transistors. These transistors are fabricated from crystalline silicon, and supplemental wiring structure features are fabricated to comprise a circuit along the walls of a vertical pillar. The three-dimensional cell integrated circuit can be created by a single mask step. Various structural features and methods of fabrication are described in detail. Peripheral interface, a two pillar version and other supplemental techniques and structural variations are also described. | 10-20-2011 |
20120045570 | Plating solution for forming tin alloy and method of forming tin alloy film using the same - There are provided a plating solution for forming a tin alloy, and a method of forming a tin alloy film by using the same. The plating solution for forming a tin alloy, the plating solution includes a tin salt and one or more metal salts each comprising indium or zinc, and at least one reducing agent selected from the group consisting of boron hydride compounds, the reducing agent providing electrons to metal ions of the metal salts and tin ions of the tin salt to form a tin alloy film on an object to be plate. | 02-23-2012 |
20120064231 | METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD INCLUDING FLAME RETARDANT INSULATION LAYER - The present invention relates to a method for manufacturing a printed circuit board including a flame retardant insulation layer. The printed circuit board of the present invention exhibits excellent thermal stability and excellent mechanical strength, is suitable for imprinting lithography process, provides improved reliability by reducing coefficient of thermal expansion, and has excellent adhesion between circuit patterns and an insulation layer. | 03-15-2012 |
20120263868 | Interconnect Structure to Reduce Stress Induced Voiding Effect - An interconnect structure that may reduce or eliminate stress induced voids is provided. In an embodiment, a via is formed below a conductive line to provide an electrical connection to an underlying conductive region. The conductive line includes a widened region above the via. The widened region serves to reduce or eliminate stress induced voids between the via and the underlying conductive region. In another embodiment, one or more redundant lines are formed extending from a conductive region, such as a contact pad, such that the redundant line does not electrically couple the conductive region to an underlying conductive region. In a preferred embodiment, the redundant lines extend from a conductive region on a side adjacent to a side having a conductive line coupled to a via. | 10-18-2012 |
20140017397 | METHOD OF MANUFACTURING A PRINTED CIRCUIT BOARD - A method of manufacturing a printed circuit board includes arranging a core layer in which a bending prevention portion of at least two layers that are metal layers having different thermal expansion coefficients is disposed between a plurality of insulating members; forming a circuit pattern so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and forming an insulating layer including an opening portion that exposes the circuit pattern on the core layer. | 01-16-2014 |
20140170304 | BOARD PRINTING APPARATUS AND BOARD PRINTING METHOD - A board printing apparatus includes a board working table, a first printing table, a second printing table, and a control portion controlling printing operations. The control portion is configured to perform second printing on a board held by the board working table by a large component mask of the second printing table after a first printing performed on the board held by the board working table by a small component mask of the first printing table. | 06-19-2014 |
20140178571 | RESIN SUBSTRATE HAVING METAL FILM PATTERN FORMED THEREON - The purpose of the present invention is to provide a method for using a metal ion solution of low concentration to efficiently form a metal film pattern of excellent accuracy and reliable adhesion on a resin substrate. A resin substrate having a metal film pattern formed thereon is produced by a method that includes the following steps (a) to (e): (a) a step for pattern-printing of a latent image agent ( | 06-26-2014 |
20140186521 | NICKEL-GOLD PLATEABLE THICK FILM SILVER PASTE, AND PLATING PROCESS FOR LOW TEMPERATURE CO FIRED CERAMIC DEVICES AND LTCC DEVICES MADE THEREFROM - Described are LTCC devices, with external silver containing electrical contacts, that are sequentially plated with a nickel containing metal and a gold containing metal. | 07-03-2014 |
20140248422 | METHOD OF FABRICATING A CONDUCTIVE PATTERN WITH HIGH OPTICAL TRANSMISSION AND LOW VISIBILITY - A method of fabricating a conductive pattern includes disposing an image of the conductive pattern on a substrate. The image includes material capable of being electroless plated. The image is electroless plated with a first metal forming a first plated image. The first plated image is electroless plated with a second metal forming a second plated image. The second metal passivates the first metal. The second plated image is bathed in an immersion bath comprising a darkening material. | 09-04-2014 |
20140322436 | MAKING MULTI-LAYER MICRO-WIRE STRUCTURE - A method of making a multi-layer micro-wire structure includes providing a substrate having a surface and forming a plurality of micro-channels in the surface. A first material composition is located in a first layer only in each micro-channel and not on the surface. A second material composition different from the first material composition is located in a second layer different from the first layer only in each micro-channel and not on the surface. The first material composition in the first layer and the second material composition in the second layer form an electrically conductive multi-layer micro-wire in each micro-channel. | 10-30-2014 |
20140370185 | METHOD FOR FORMING A CONDUCTIVE PATTERN - A method for forming a conductive pattern on a substrate ( | 12-18-2014 |
20150093498 | METHOD AND APPARATUS FOR AUTOMATICALLY ADJUSTING DISPENSING UNITS OF A DISPENSER - A dispensing apparatus includes a frame having a gantry configured to provide movement in the X axis and Y axis directions, and first and second dispensing units coupled to the gantry and configured to dispense material onto a substrate. The second dispensing unit is coupled to the gantry by an automatic adjustment mechanism. The dispensing apparatus further includes a controller configured to control the operation of the gantry, the first dispenser, the second dispenser, and the automatic adjustment mechanism. The automatic adjustment mechanism is configured to move the second dispenser in the X axis and Y axis directions to manipulate a spacing between the first dispensing unit and the second dispensing. Methods of dispensing material on the substrate are further disclosed. | 04-02-2015 |
20160120040 | Fabrication of Intra-Structure Conductive Traces and Interconnects for Three-Dimensional Manufactured Structures - A method for forming a three-dimensional object with at least one conductive trace comprises providing an intermediate structure that is generated (e.g., additively or subtractively generated) from a first material in accordance with a model design of the three-dimensional object. The intermediate structure may have at least one predefined location for the at least one conductive trace. The model design includes the at least one predefined location. Next, the at least one conductive trace may be generated adjacent to the at least one predefined location of the intermediate structure. The at least one conductive trace may be formed of a second material that has an electrical and/or thermal conductivity that is greater than the first material. | 04-28-2016 |
427970400 | With posttreatment of coating or coating material | 18 |
20080241359 | Method of making circuitized substrate with selected conductors having solder thereon - A method of making a circuitized substrate in which conductors are formed in such a manner that selected ones of the conductors include solder while others do not and are thus adapted for receiving a different form of connection (e.g., wire-bond) than the solder covered conductors. In one embodiment, the solder may be applied in molten form by immersing the substrate within a bath of the solder while in another the solder may be deposited using a screening procedure. | 10-02-2008 |
20090304911 | METHOD OF FORMING CIRCUITS ON CIRCUIT BOARD - A method of forming a circuit on a circuit board includes the following steps. Firstly, a surface of an insulating substrate is hydrophilically treated. Secondly, a first circuit layer having a number of electrical traces is formed on the hydrophilically treated surface, the first circuit layer is comprised of a soluble palladium salt. Thirdly, the soluble palladium salt of the first circuit layer is reduced into metallic palladium, thereby obtaining a second circuit layer comprised of metallic palladium. Lastly, an electrically conductive layer is formed on the second circuit layer. | 12-10-2009 |
20100129532 | METHOD FOR FORMING ELECTRICAL TRACES ON SUBSTRATE - A method for forming electrical traces on a substrate includes the steps of: providing a substrate; printing an ink pattern using an ink on the substrate, the ink including a aqueous medium containing silver ions and a heat sensitive reducing agent; heating the ink pattern to reduce silver ions into silver particles thereby forming an semi-finished traces; and forming a metal overcoat on the semi-finished traces by electroless plating thereby obtaining patterned electrical traces. | 05-27-2010 |
20100221412 | METHOD FOR MANUFACTURING A SUBSTRATE - In a method for manufacturing a substrate, copper is applied to one surface of the substrate to form a plurality of circuit traces, defining one or more copper clearance areas therebetween. Dry film is coated on one portion of the circuit traces and the one or more copper clearance areas, and another portion of the plurality of copper traces remains uncoated. The dry film on the substrate is flattened to form a dry film layer. The other portion of the plurality of circuit traces is plated to form a plating layer. A surface of the plating layer is substantially coplanar with a surface of the dry film layer. | 09-02-2010 |
20110318480 | Method of manufacturing substrate using a carrier - A method of manufacturing a substrate using a carrier, that includes preparing a carrier having a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; patterning the metal layers to form base circuit layers; forming buildup layers on the base circuit layers; executing a routing process to separate the insulating layers from the releasing layer; and forming solder resist layers on the buildup layers and forming openings in the solder resist layers and the insulating layers to expose pads. | 12-29-2011 |
20120177814 | METHOD FOR IMPROVING COATING - A system and a method, the method includes determining or receiving a multiple iteration printing scheme indicative of multiple printing iterations of a coating material to be applied on an electrical circuit that comprises at least one three dimensional structure to be coated by the coating material; wherein the multiple iteration printing scheme is responsive to a shape and size of the at least one three dimensional structure; and performing multiple printing iterations of the coating material, according to the multiple iteration printing scheme; wherein at least one printing iteration is followed by at least partially curing the coating material printed during the at least one printing iteration. | 07-12-2012 |
20120231154 | CERAMIC DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a ceramic device is provided. A green sheet is adhered on an adhesive film. A photoresist film is then formed on the green sheet. A photolithographic process is carried out to form circuit trenches in the photoresist film. The circuit trenches are filled with metal paste, thereby forming a circuit pattern. The photoresist film is then removed. | 09-13-2012 |
20120231155 | METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD WITH METAL BUMP - A method of manufacturing a printed circuit board, including: applying a dry film on a carrier and then patterning the dry film to form holes for forming metal bumps; forming an upper circuit layer including metal bumps charged in the holes and connection pads on the dry film; forming an insulation layer on the dry film; forming a build-up layer including a lower circuit layer on the insulation layer; removing the carrier; and removing the dry film. | 09-13-2012 |
20120308718 | FABRICATING METHOD FOR MULTILAYER PRINTED CIRCUIT BOARD - A method of fabricating a multilayer printed circuit board includes forming a first circuit-forming pattern and a via-forming pattern on a first carrier, and forming a first insulation layer; repeatedly forming inner circuit patterns and inner insulation layers over the first insulation layer by forming circuit-forming patterns and imprinting, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the first circuit-forming pattern and the second circuit-forming pattern respectively into the first insulation layer and a second insulation layer; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the via-forming indentations with a conductive material. | 12-06-2012 |
20130287935 | METHOD OF FABRICATING OF CIRCUIT BOARD - A method of fabricating a circuit board is provided. An elastic bump material layer is formed on a substrate and then is patterned to form a plurality of first elastic bumps and a plurality of second elastic bumps, arranged in at least an array. A conductive layer is formed and then is patterned to form a patterned circuit layer to cover first plurality of elastic bumps and a portion of the substrate. An entirety of the plurality of second elastic bumps and another portion of the substrate are not covered by the patterned circuit layer. A protection layer is formed to cover a portion of the patterned circuit layer, a second number of the plurality of second elastic bumps entirely, a third number of the plurality of second elastic bumps partially and the another portion of the substrate, and expose the first number of the plurality of second elastic bumps. | 10-31-2013 |
20140057045 | METHOD OF CHANGING THE OPTICAL PROPERTIES OF HIGH RESOLUTION CONDUCTING PATTERNS - The disclosure disclosed herein is a method for altering the optical properties of high resolution printed conducting patterns by initiating a chemical reaction to a passivating layer on the patterns with optical properties differing from the untreated material. The electrical properties are maintained after this reacted, passivating, layer is formed. | 02-27-2014 |
20140248423 | METHOD OF ROLL TO ROLL PRINTING OF FINE LINES AND FEATURES WITH AN INVERSE PATTERNING PROCESS - A method of inverse image flexographic printing includes transferring an insulating ink to a plurality of inverse printing patterns disposed on a flexo master. The insulating ink is transferred from the plurality of inverse printing patterns to a substrate. The insulating ink disposed on the substrate is cured. A catalytic ink is deposited on a plurality of exposed portions of the substrate. The catalytic ink deposited on the substrate is electroless plated. | 09-04-2014 |
20150010695 | Transparent conductive electrodes comprising merged metal nanowires, their structure design, and method of making such structures - A method for making a nanowire-based electrode having homogenous optical property and heterogeneous electrical property is disclosed. The method comprises coating a first solution comprising a first material on to the substrate to form a layer of nanowire network; evaporating to remove the solvent in the metal nanowire film; printing a second solution comprising a chemical reagent on top of the formed metal nanowire network layer; and oxidizing the first material into a second material by the chemical reagent, wherein the first material and second material has a refractive index difference less than 0.05 and second material is less conductive than the first material. | 01-08-2015 |
20160113124 | METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD (PCB) - A method for forming a printed circuit board (PCB) includes: depositing, a first time, a photo imageable solder resist (PSR) ink over a top surface and a bottom surface of the PCB including a conductive pattern; drying, a first time, the PCB on which the PSR ink has been deposited for the first time; depositing, a second time, the PSR ink over the top surface and the bottom surface of the PCB; and drying, a second time, the PCB on which the PSR ink has been deposited for the second time. | 04-21-2016 |
20190150292 | CIRCUIT FORMING METHOD | 05-16-2019 |
427970500 | Polymer deposited | 3 |
20090087547 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer. | 04-02-2009 |
20120141665 | METHOD OF AND APPARATUS FOR FORMING A METAL PATTERN - Provided are methods of and apparatuses for forming a metal pattern. In the method, an initiator and a metal pattern are sequentially combined on a previously-formed bonding agent pattern improving adhesion and/or junction properties between the substrate and the metal. The bonding agent pattern may be formed using a reverse offset printing method. The metal pattern may be formed using an electroless electrochemical plating method. The metal pattern can be formed with improved uniformity in thickness and planar area. | 06-07-2012 |
20130164440 | PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a printed wiring board includes forming a removable layer on a support substrate, forming an interlayer resin insulation layer on the removable layer, forming a penetrating hole in the interlayer resin insulation layer, forming a first conductive layer on the interlayer resin insulation layer and on a side wall of the penetrating hole, forming a conductive circuit on the interlayer resin insulation layer, forming a via conductor in the penetrating hole, removing the support substrate from the interlayer resin insulation layer by using the removable layer, forming a protruding portion of the via conductor protruding from a surface of the interlayer resin insulation layer, and forming a surface-treatment coating on a surface of the protruding portion of the via conductor. | 06-27-2013 |
427970600 | With posttreatment of coating or coating material | 4 |
20090169727 | COPPER FILM FORMING METHOD AND MANUFACTURING METHOD OF MULTI-LAYER WIRING SUBSTRATE - A copper film forming method including the steps of spraying a copper formate solution including a copper foramate and a solvent which is evaporated at a certain temperature on a surface of the substrate, and spraying a reducing agent solution including a reducing agent for reducing a copper oxide or undecomposed copper formate on the surface of the substrate to the surface of the substrate. The spraying steps are performed while heating the substrate to the certain temperature and the substrate is placed in an inert gas which is inert at the certain temperature. | 07-02-2009 |
20090181164 | Oxidation-Free Copper Metallization Process Using In-situ Baking - A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing an oxide-removal process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer | 07-16-2009 |
20110274829 | METHOD FOR PRODUCING A FLEXIBLE CIRCUIT CONFIGURATION - For a method for producing a flexible circuit configuration in the form of a layer sequence of at least one insulating layer and at least one conductive layer, typically multiple insulating layers (N | 11-10-2011 |
20110281024 | METHOD FOR PREVENTING OR REDUCING SILVER MIGRATION IN THE CROSSOVER AREAS OF A MEMBRANE TOUCH SWITCH - Disclosed is the use of carbon layers as barriers to prevent silver migration in circuitry crossovers, either over a bottom circuitry layer and/or beneath subsequent circuit layers. | 11-17-2011 |