| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 365173000 | Multiple magnetic storage layers | 56 |
| 20080205130 | MRAM FREE LAYER SYNTHETIC ANTIFERROMAGNET STRUCTURE AND METHODS - A magnetic tunnel junction (MTJ) structure for use with toggle MRAM devices and the like includes a tunnel barrier layer and a synthetic antiferromagnet (SAF) structure formed on the tunnel barrier layer, wherein the SAF includes a plurality (e.g., three or more) ferromagnetic layers antiferromagnetically or ferromagnetically coupled by a plurality of respective coupling layers. The bottom ferromagnetic layer adjacent the tunnel barrier layer has a high spin polarization and a high intrinsic anisotropy field (H | 08-28-2008 |
| 20080205131 | Magnetic random access memory with selective toggle memory cells - A toggle MTJ is disclosed that has a SAF free layer with two or more magnetic sub-layers having equal magnetic moments but different anisotropies which is achieved by selecting Ni | 08-28-2008 |
| 20080212365 | Scalable Magnetic Random Access Memory Device - A magnetic memory cell is provided. The magnetic memory cell includes at least one fixed magnetic layer and a plurality of free magnetic layers, separated from the at least one fixed magnetic layer by at least one barrier layer. The free magnetic layers include a first free magnetic layer adjacent to the barrier layer, a second free magnetic layer separated from the first free magnetic layer by at least one spacer layer, and a third free magnetic layer separated from the second free magnetic layer by at least one anti-parallel coupling layer. A magnetic moment of the first free magnetic layer is greater than both a magnetic moment of the second free magnetic layer and a magnetic moment of the third free magnetic layer. The magnetic memory cell may be used in conjunction with a magnetic random access memory device. | 09-04-2008 |
| 20080225583 | Spin transfer MRAM device with novel magnetic free layer - We describe a CPP MTJ MRAM element that utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The device includes a tunneling barrier layer of MgO and a non-magnetic CPP layer of Cu or Cr and utilizes a novel free layer comprising a thin layer of Ta or Hf sandwiched by layers of CoFeB. The device is characterized by values of DR/R between approximately 95% and 105%. | 09-18-2008 |
| 20080225584 | Magnetic storage element responsive to spin polarized current - The present invention relates to a memory cell including a first reference layer having a first magnetization with a first magnetization direction and a second reference layer having a second magnetization with a second magnetization direction substantially perpendicular to the first magnetization direction. A storage layer is disposed between the first reference layer and second reference layer and has a third magnetization direction about 45° from the first magnetization direction and about 135° from the second magnetization direction when the memory cell is in a first data state, and a fourth magnetization direction opposite the third magnetization direction when the memory cell is in a second data state. | 09-18-2008 |
| 20080225585 | Low Cost Multi-State Magnetic Memory - An embodiment of the present invention includes a multi-state current-switching magnetic memory element having a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer. | 09-18-2008 |
| 20080225586 | Low Magnetization Materials for High Performance Magnetic Memory Devices - Techniques for attaining high performance magnetic memory devices are provided. In one aspect, a magnetic memory device comprising one or more free magnetic layers is provided. The one or more free magnetic layers comprise a low magnetization material adapted to have a saturation magnetization of less than or equal to about 600 electromagnetic units per cubic centimeter. The device may be configured such that a ratio of mean switching field associated with an array of non-interacting magnetic memory devices and a standard deviation of the switching field is greater than or equal to about 20. The magnetic memory device may comprise a magnetic random access memory (MRAM) device. A method of producing a magnetic memory device is also provided. | 09-18-2008 |
| 20080291720 | SPIN TORQUE TRANSFER MRAM DEVICE - The present disclosure provides a magnetic memory element. The memory element includes a magnetic tunnel junction (MTJ) element and an electrode. The electrode includes a pinning layer, a pinned layer, and a non-magnetic conductive layer. In one embodiment, the MTJ element includes a first surface having a first surface area, and the electrode includes a second surface. In the embodiment, the second surface of the electrode is coupled to the first surface of the MTJ element such that an interface area is formed and the interface area is less than the first surface area. | 11-27-2008 |
| 20080291721 | METHOD AND SYSTEM FOR PROVIDING A SPIN TRANSFER DEVICE WITH IMPROVED SWITCHING CHARACTERISTICS - A method and system for providing a magnetic element is described. The magnetic element includes a first pinned layer, a first spacer layer, a free layer, a second spacer layer, and a second pinned layer. The first and second pinned layers have first and magnetizations oriented in first and second directions, respectively. The first and second spacer layers are nonferromagnetic. The first and second spacer layers are between the free layer and the first and second pinned layers, respectively. The magnetic element is configured either to allow the free layer to be switched to each of multiple states when both a unidirectional write current is passed through the magnetic element and the magnetic element is subjected to a magnetic field corresponding to the each states or to allow the free layer to be switched to each of the plurality of states utilizing a write current and an additional magnetic field that is applied from at least one of the first pinned layer and the second pinned layer substantially only if the write current is also applied. | 11-27-2008 |
| 20080310219 | METHOD AND SYSTEM FOR PROVIDING A MAGNETIC ELEMENT AND MAGNETIC MEMORY BEING UNIDIRECTIONAL WRITING ENABLED - A method and system for providing a magnetic element and memory utilizing the magnetic element are described. The magnetic element includes a reference layer, a nonferromagnetic spacer layer, and a free layer. The reference layer has a resettable magnetization that is set in a selected direction by a magnetic field generated externally to the reference layer. The reference layer is also magnetically thermally unstable at an operating temperature range and has K | 12-18-2008 |
| 20090046502 | Metal Magnetic Memory Cell - A magnetic memory cell is provided. The memory cell includes a metal device, a first word line, and a second word line. The metal device includes a first magnetic layer having a first dipole; a second magnetic layer having a second dipole; and an conductive layer located between the first and second magnetic layers. The first word line is positioned near the first magnetic layer to change the direction of the first dipole. The second word line is positioned near the second magnetic layer to change the direction of the second dipole. A method of reading/writing a bit in the magnetic memory cell is also provided. | 02-19-2009 |
| 20090067233 | Magnetic random access memory and method of reading data from the same - A magnetic random access memory (MRAM) includes a memory cell having a first transistor and a first magnetic tunneling junction (MTJ) layer, and a reference cell operable as a basis when reading data stored in the memory cell, the reference cell including second and third MTJ layers arranged in parallel to each other, and a second transistor connected in series to each of the second and third MTJ layers, the second transistor having a driving capability corresponding to twice a driving capability of the first transistor of the memory cell. | 03-12-2009 |
| 20090073757 | DOUBLE DENSITY MRAM WITH PLANAR PROCESSING - The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures. | 03-19-2009 |
| 20090147567 | MAGNETIC MEMORY CELL STRUCTURE WITH THERMAL ASSISTANT AND MAGNETIC DYNAMIC RANDOM ACCESS MEMORY - A magnetic memory cell structure with thermal assistant includes a magnetic pinned layer, a barrier layer, a magnetic free layer, a perpendicular magnetic layer, and a heating layer sequentially stacked. The magnetic free layer has a longitudinal magnetization. The perpendicular magnetic layer has a perpendicular magnetization at a first temperature and is perpendicularly coupling to the longitudinal magnetization of the magnetic free layer. The perpendicular magnetic layer is in a paramagnetic state at a second temperature. The present invention further includes magnetic dynamic random access memory. | 06-11-2009 |
| 20090154231 | Magnetic Random Access Memory and Operating Method of the Same - A magnetic random access memory of a spin transfer process, includes a plurality of magnetic memory cells | 06-18-2009 |
| 20090201722 | METHOD INCLUDING MAGNETIC DOMAIN PATTERNING USING PLASMA ION IMPLANTATION FOR MRAM FABRICATION - A method for defining magnetic domains in a magnetic thin film on a substrate, includes: coating the magnetic thin film with a resist; patterning the resist, wherein areas of the magnetic thin film are substantially uncovered; and exposing the magnetic thin film to a plasma, wherein plasma ions penetrate the substantially uncovered areas of the magnetic thin film, rendering the substantially uncovered areas non-magnetic. A tool for this process comprises: a vacuum chamber held at earth potential; a gas inlet valve configured to leak controlled amounts of gas into the chamber; a disk mounting device configured to (1) fit within the chamber, (2) hold a multiplicity of disks, spacing the multiplicity of disks wherein both sides of each of the multiplicity of disks is exposed and (3) make electrical contact to the multiplicity of disks; and a radio frequency signal generator electrically coupled to the disk mounting device and the chamber, whereby a plasma can be ignited in the chamber and the disks are exposed to plasma ions uniformly on both sides. This process may be used to fabricate memory devices, including magnetoresistive random access memory devices. | 08-13-2009 |
| 20090244965 | MULTI-LAYER MAGNETIC RANDOM ACCESS MEMORY USING SPIN-TORQUE MAGNETIC TUNNEL JUNCTIONS AND METHOD FOR WRITE STATE OF THE MULTI-LAYER MAGNETIC RANDOM ACCESS MEMORY - A stacked magnetic tunnel junction (MTJ) structure of a multi-layer magnetic random access memory (MRAM) which includes a plurality of stacked MTJ devices serially connected to each other and an access transistor shared between the stacked MTJ devices. The stacked MTJ structure further includes a write word line through which a write current flows. The write current generates a hard axis magnetic field used to selectively write an MTJ device of the stacked MTJ devices. | 10-01-2009 |
| 20090273972 | MAGNETIC LOGIC ELEMENT WITH TOROIDAL MULTIPLE MAGNETIC FILMS AND A METHOD OF LOGIC TREATMENT USING THE SAME - A magnetic logic element with toroidal magnetic multilayers ( | 11-05-2009 |
| 20090316476 | SHARED LINE MAGNETIC RANDOM ACCESS MEMORY CELLS - A memory unit with one field line; at least two thermally-assisted switching magnetic tunnel junction-based magnetic random access memory cells, each cell comprising a magnetic tunnel junction having an insulating layer disposed between a magnetic storage layer and a magnetic reference layer; wherein a selection transistor is connected to the magnetic tunnel junction; the one field line is used for passing a field current for switching a magnetization of the storage layer of the magnetic tunnel junctions of the cells. A magnetic memory device can be formed by assembling an array of the memory units, wherein at least two adjacent magnetic tunnel junctions of the cells can be addressed simultaneously by the field line. The memory unit and magnetic memory device have a reduced surface area. Magnetic memory devices with an increased density of memory units can be fabricated resulting in lower die fabrication cost and lower power consumption. | 12-24-2009 |
| 20100103730 | MAGNETIC MEMORY CELL - The present invention relates to a magnetic memory cell, which controls the magnetization direction of the free magnetic layer of a Magnetic Tunnel Junction (MTJ) device using a spin torque transfer, and enables the implementation of a magnetic logic circuit, in which memory and logic circuit functions are integrated. The magnetic memory cell includes an MTJ device ( | 04-29-2010 |
| 20100214835 | Magnetic shielding in magnetic multilayer structures - Techniques and device designs associated with devices having magnetically shielded magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves that are configured to operate based on spin-transfer torque switching. | 08-26-2010 |
| 20100284217 | MAGNETIC MEMORY ELEMENT, DRIVING METHOD FOR THE SAME, AND NONVOLATILE STORAGE DEVICE - A magnetic memory element ( | 11-11-2010 |
| 20110002163 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first magnetic random access memory including a first memory cell and a second magnetic random access memory including a second memory cell operating at higher speed than the first memory cell and is provided on the same chip together with the first magnetic random access memory. The first memory cell is a current-induced domain wall motion type MRAM and stores data based on a domain wall position of a magnetization free layer. A layer that a write current flows is different from a layer that a read current flows. The second memory cell is a current-induced magnetic field writing type MRAM and stores data based on a magnetic field induced by a write current. | 01-06-2011 |
| 20110013448 | MAGNETIC ELEMENT WITH A FAST SPIN TRANSFER TORQUE WRITING PROCEDURE - A magnetic tunnel junction, comprising a reference layer having a fixed magnetization direction, a first storage layer having a magnetization direction that is adjustable relative to the magnetization direction of the reference layer by passing a write current through said magnetic tunnel junction, and an insulating layer disposed between said reference layer and first storage layer; characterized in that the magnetic tunnel junction further comprises a polarizing device to polarize the spins of the write current oriented perpendicular with the magnetization direction of the reference layer; and wherein said first storage layer has a damping constant above 0.02. A magnetic memory device formed by assembling an array of the magnetic tunnel junction can be fabricated resulting in lower power consumption. | 01-20-2011 |
| 20110058412 | MAGNETIC STACK HAVING ASSIST LAYER - A magnetic tunnel junction having a ferromagnetic free layer and a ferromagnetic pinned reference layer, each having an out-of-plane magnetic anisotropy and an out-of-plane magnetization orientation, the ferromagnetic free layer switchable by spin torque. The magnetic tunnel junction includes a ferromagnetic assist layer proximate the free layer, the assist layer having a low magnetic anisotropy less than 700 Oe and positioned to apply a magnetic field on the free layer. | 03-10-2011 |
| 20110080783 | SEMICONDUCTOR MAGNETIC MEMORY INTEGRATING A MAGNETIC TUNNELING JUNCTION ABOVE A FLOATING-GATE MEMORY CELL - A semiconductor magnetic memory device has a magnetic tunneling junction formed over a memory cell. The memory cell has a control gate surrounded by a floating gate. The floating gate is coupled to the magnetic tunneling junction through a pinning layer that maintains the magnetic orientation of the lower magnetic layer of the junction. A current through a selected word line, coupled to the control gate, generates a first magnetic field. A current through a cell select line generates a second magnetic field that is orthogonal to the first magnetic field. This changes the magnetic orientation of the upper magnetic layer of the junction to lower its resistance, thus allowing a write/erase voltage on a program/erase line to program/erase the floating gate. | 04-07-2011 |
| 20110110151 | MAGNETIC MEMORY WITH A THERMALLY ASSISTED SPIN TRANSFER TORQUE WRITING PROCEDURE USING A LOW WRITING CURRENT - A magnetic random access memory (MRAM) cell with a thermally assisted switching (TAS) writing procedure, comprising a magnetic tunnel junction formed from a ferromagnetic storage layer having a first magnetization adjustable at a high temperature threshold, a ferromagnetic reference layer having a fixed second magnetization, and an insulating layer, said insulating layer being disposed between the ferromagnetic storage and reference layers; a select transistor being electrically connected to said magnetic tunnel junction and controllable via a word line; a current line, electrically connected to said magnetic tunnel junction, passing at least a write current; characterized in that the magnetocrystalline anisotropy of the ferromagnetic storage layer is substantially orthogonal with the magnetocrystalline anisotropy of the ferromagnetic reference layer. The STT-based TAS-MRAM cell achieves simultaneously thermal stability and requires low write current density. | 05-12-2011 |
| 20110149649 | Magnetic memory devices and methods of operating the same - A magnetic memory device includes: a free layer for storing information; and a reference layer disposed on a first surface of the free layer. The reference layer includes at least two magnetic domains and a magnetic domain wall between the at least two magnetic domains. The reference layer extends past both ends of the free layer. The magnetic memory device further includes a switching element connected to a second surface of the free layer. Another magnetic memory device includes: a first reference layer having a first magnetic domain wall; a second reference layer having a second magnetic domain wall; and a memory structure between the first and second reference layers. The memory structure includes: a first free layer adjacent to the first reference layer; a second free layer adjacent to the second reference layer; and a switching element between the first and second free layers. | 06-23-2011 |
| 20110310663 | METHOD FOR DRIVING STORAGE ELEMENT AND STORAGE DEVICE - Disclosed herein is a method for driving a storage element that has a plurality of magnetic layers and performs recording by utilizing spin torque magnetization reversal, the method including applying a pulse voltage having reverse polarity of polarity of a recording pulse voltage in application of the recording pulse voltage to the storage element. | 12-22-2011 |
| 20120008383 | MAGNETIC DEVICE WITH OPTIMIZED HEAT CONFINEMENT - The present disclosure concerns a magnetic element to be written using a thermally-assisted switching write operation comprising a magnetic tunnel junction formed from a tunnel barrier being disposed between first and second magnetic layers, said second magnetic layer having a second magnetization which direction can be adjusted during a write operation when the magnetic tunnel junction is heated at a high threshold temperature; an upper current line connected at the upper end of the magnetic tunnel junction; and a strap portion extending laterally and connected to the bottom end of the magnetic tunnel junction; the magnetic device further comprising a bottom thermal insulating layer extending substantially parallel to the strap portion and arranged such that the strap portion is between the magnetic tunnel junction and the bottom thermal insulating layer. The magnetic element allows for reducing heat losses during the write operation and has reduced power consumption. | 01-12-2012 |
| 20120044756 | MEMORY DEVICES USING A PLURALITY OF DIODES AS PROGRAM SELECTORS WITH AT LEAST ONE BEING A POLYSILICON DIODE - Embodiments of programmable memory cells using a plurality of diodes as program selectors are disclosed for those memory cells that can be programmed based on direction of current flow. These memory cells are MRAM, RRAM, CBRAM, or other memory cells that have a programmable resistive element coupled to the P-terminal of a first diode and to the N-terminal of a second diode. At least one of the diodes can be a polysilicon diode fabricated using standard CMOS processes. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon substrate as a program selector. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon as a program selector. By applying a high voltage to a resistive element and switching the N-terminal of the first diode to a low voltage while disabling the second diode, a current flowing through the memory cell can change the resistance into one state. Similarly, by applying a low voltage to a resistive element and switching the P-terminal of the second diode to a high voltage while disabling the first diode, a current flowing through the memory cell can change the resistance into another state. On the polysilicon diode, the spacing and doping level of a gap between the P- and N-implants can be controlled for different breakdown voltages and leakage currents. A Silicide Block Layer (SBL) can be used to block silicide formation on the top of polysilicon to prevent shorting. | 02-23-2012 |
| 20120044757 | MEMORY USING A PLURALITY OF DIODES AS PROGRAM SELECTORS WITH AT LEAST ONE BEING A POLYSILICON DIODE - Embodiments of programmable memory cells using a plurality of diodes as program selectors are disclosed for those memory cells that can be programmed based on direction of current flow. These memory cells are MRAM, RRAM, CBRAM, or other memory cells that have a programmable resistive element coupled to the P-terminal of a first diode and to the N-terminal of a second diode. At least one of the diodes can be a polysilicon diode fabricated using standard CMOS processes with P+ and N+ implants in two ends. The polysilicon diode can be constructed by P+/N+ implants on a polysilicon substrate as a program selector. The memory cells can be used to construct a two-dimensional memory array with the N-terminals of the first diodes and the P-terminals of the second diodes in a row connected as wordline(s) and the resistive elements in a column connected as a bitline. | 02-23-2012 |
| 20120044758 | CIRCUIT AND SYSTEM OF USING AT LEAST ONE JUNCTION DIODE AS PROGRAM SELECTOR FOR MEMORIES - At least one junction diode fabricated in standard CMOS logic processes can be used as program selectors for memory cells that can be programmed based on direction of current flow. These cells are MRAM, RRAM, CBRAM, or other memory cells that have a programmable resistive element coupled to a P terminal of a first diode and to an N terminal of a second diode. The diodes can be constructed by P+ and N+ active regions on an N well as the P and N terminals of the diodes. The memory cells can be used to construct a two-dimensional memory array with the N terminals of the first diodes and the P terminals of the second diodes in a row connected as wordline(s) and the resistive elements in a column connected as a bitline. By applying a high voltage to a selected bitline and a low voltage to a selected wordline to turn on the first diode while disabling the second diode, a selected cell can be programmed into one state. Similarly, by applying a low voltage to a selected bitline and a high voltage to a selected wordline to turn on the second diode while disabling the first diode, a selected cell can be programmed into another state. The data in the resistive memory cell can also be read by turning on a selected wordline to couple a selected bitline to a sense amplifier. The wordlines may have high-resistivity local wordlines coupled to low-resistivity global wordlines through conductive contact(s) or via(s). | 02-23-2012 |
| 20120063220 | MEMORY ELEMENT AND MEMORY DEVICE - There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and in regard to the insulating layer and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film. | 03-15-2012 |
| 20120063221 | MEMORY ELEMENT AND MEMORY DEVICE - There is disclosed a memory element including a layered structure including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer; and an insulating layer provided between the memory layer. An electron that is spin-polarized is injected in a lamination direction of a layered structure, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, in regard to the insulating layer that comes into contact with the memory layer, and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film, and the memory layer includes at least one of non-magnetic metal and oxide in addition to a Co—Fe—B magnetic layer. | 03-15-2012 |
| 20120063222 | MEMORY ELEMENT AND MEMORY DEVICE - There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face and a magnetization direction thereof varies corresponding to information; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed with respect to the memory layer, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, and a Ta film is formed in such a manner that comes into contact with a face, which is opposite to the insulating layer side, of the magnetization-fixed layer. | 03-15-2012 |
| 20120075927 | Magnetic Element Having Perpendicular Anisotropy With Enhanced Efficiency - Techniques and magnetic devices associated with a magnetic element that includes a fixed layer having a fixed layer magnetization and perpendicular anisotropy, a nonmagnetic spacer layer, and a free layer having a changeable free layer magnetization and perpendicular anisotropy. | 03-29-2012 |
| 20120087186 | MULTI-BIT MEMORY WITH SELECTABLE MAGNETIC LAYER - An apparatus and associated method for a multi-bit memory capable of being selected with a magnetic layer. Various embodiments of the present invention are generally directed to a first selection layer with a low coercivity that is disposed between first and second storage layers that each have a high coercivity. In response to magnetic saturation of the first selection layer, programming of a logical state to the second storage layer is allowed. | 04-12-2012 |
| 20120106245 | THERMALLY ASSISTED MAGNETIC RANDOM ACCESS MEMORY ELEMENT WITH IMPROVED ENDURANCE - The present disclosure concerns a magnetic memory element suitable for a thermally-assisted switching write operation, comprising a current line in electrical communication with one end of a magnetic tunnel junction, the magnetic tunnel junction comprising: a first ferromagnetic layer having a fixed magnetization; a second ferromagnetic layer having a magnetization that can be freely aligned at a predetermined high temperature threshold; and a tunnel barrier provided between the first and second ferromagnetic layer; the current line being adapted to pass a heating current through the magnetic tunnel junction during the write operation; wherein said magnetic tunnel junction further comprises at least one heating element being adapted to generate heat when the heating current is passed through the magnetic tunnel junction; and a thermal barrier in series with said at least one heating element, said thermal barrier being adapted to confine the heat generated by said at least one heating element within the magnetic tunnel junction. | 05-03-2012 |
| 20120170362 | METHOD AND SYSTEM FOR PROVIDING DUAL MAGNETIC TUNNELING JUNCTIONS USABLE IN SPIN TRANSFER TORQUE MAGNETIC MEMORIES - A method and system for providing a magnetic junction usable in a magnetic memory are described. The magnetic junction includes first and second pinned layers, first and second nonmagnetic spacer layers, and a free layer. The first pinned layer has a first pinned layer magnetic moment and is nonmagnetic layer-free. The first nonmagnetic spacer layer resides between the first pinned and free layers. The free layer resides between the first and second nonmagnetic spacer layers. The second pinned layer has a second pinned layer magnetic moment and is nonmagnetic layer-free. The second nonmagnetic spacer layer resides between the free and second pinned layers. The first and second pinned layer magnetic moments are antiferromagnetically coupled and self-pinned. The magnetic junction is configured to allow the free layer to be switched between stable magnetic states when a write current is passed through the magnetic junction. | 07-05-2012 |
| 20120224418 | MULTI-BIT MEMORY WITH SELECTABLE MAGNETIC LAYER - An apparatus and associated method for a multi-bit memory capable of being selected with a magnetic layer. Various embodiments of the present invention are generally directed to a first selection layer with a low coercivity that is disposed between first and second storage layers that each have a high coercivity. In response to magnetic saturation of the first selection layer, programming of a logical state to the second storage layer is allowed. | 09-06-2012 |
| 20120236633 | MAGNETIC RECORDING ELEMENT AND NONVOLATILE MEMORY DEVICE - According to one embodiment, a magnetic recording element includes a stacked body. The stacked body includes a first and a second stacked unit. The first stacked unit includes first and second ferromagnetic layers and a first nonmagnetic layer. The first nonmagnetic layer is provided between the first and second ferromagnetic layers. The second stacked unit is stacked with the first stacked unit and includes third and fourth ferromagnetic layers and a second nonmagnetic layer. The fourth ferromagnetic layer is stacked with the third ferromagnetic layer. The second nonmagnetic layer is provided between the third and fourth ferromagnetic layers. An outer edge of the fourth ferromagnetic layer includes a portion outside an outer edge of the first stacked unit in a plane. A magnetization direction of the second ferromagnetic layer is determined by causing a spin-polarized electron and a rotating magnetic field to act on the second ferromagnetic layer. | 09-20-2012 |
| 20120243308 | MAGNETIC ELEMENT AND NONVOLATILE MEMORY DEVICE - According to one embodiment, a magnetic element includes first and second conductive layers, an intermediate interconnection, and first and second stacked units. The intermediate interconnection is provided between the conductive layers. The first stacked unit is provided between the first conductive layer and the interconnection, and includes first and second ferromagnetic layer and a first nonmagnetic layer provided between the first and second ferromagnetic layers. The second stacked unit is provided between the second conductive layer and the interconnection, and includes third and fourth ferromagnetic layers and a second nonmagnetic layer provided between the third and fourth ferromagnetic layers. A magnetization direction of the second ferromagnetic layer is determined by causing a spin-polarized electron and a magnetic field to act on the second ferromagnetic layer. | 09-27-2012 |
| 20120250406 | MAGNETIC MEMORY DEVICE AND METHOD OF MAGNETIC DOMAIN WALL MOTION - A magnetic memory device comprises a first electrode, a second electrode, a laminated structure comprising plural first magnetic layers being provided between the first electrode and the second electrode, a second magnetic layer comprising different composition elements from that of the first magnetic layer and being provided between plural first magnetic layers, a piezoelectric body provided on a opposite side to a side where the first electrode is provided in the laminated structure, and a third electrode applying voltage to the piezoelectric body and provided on a different position from a position where the first electrode is provided in the piezoelectric body. | 10-04-2012 |
| 20120268986 | MAGNETIC MEMORY ELEMENT AND NON-VOLATILE STORAGE DEVICE - The present invention provides a magnetic memory element that has a spin valve structure formed using a free layer, a non-magnetic layer, and a pinned layer. The free layer has a three-layer structure having a first magnetic layer, an intermediate layer, and a second magnetic layer arranged in this order viewed from the non-magnetic layer. The first magnetic layer is made of a ferromagnetic material. The intermediate layer is made of a non-magnetic material. The second magnetic layer is made of an N-type ferromagnetic material having a magnetic compensation point in the temperature range where a memory storage operation can be available. The magnetization direction of the first magnetic layer and the magnetization direction of the second magnetic layer are parallel to each other at the temperature lower than the magnetic compensation point T | 10-25-2012 |
| 20120294079 | MEMORY ELEMENT AND MEMORY DEVICE - A memory element including a memory layer to hold the information by the magnetization state of a magnetic substance, a magnetization pinned layer having magnetization serving as a reference of the information stored in the memory layer, an intermediate layer formed from a nonmagnetic substance disposed between the memory layer and the magnetization pinned layer, a magnetic coupling layer disposed adjoining the magnetization pinned layer and opposing to the intermediate layer, and a high coercive force layer disposed adjoining the magnetic coupling layer, wherein the information is stored by reversing magnetization of the memory layer, making use of spin torque magnetization reversal generated along with a current passing in the lamination direction of the layered structure including the memory layer, the intermediate layer, and the magnetization pinned layer, and the magnetic coupling layer has a two-layer laminate structure. | 11-22-2012 |
| 20130028015 | MAGNETIC MEMORY CELL STRUCTURE WITH IMPROVED READ MARGIN - A semiconductor device includes a memory cell. The memory cell includes: a magnetic recording layer formed of ferromagnetic material; first and second magnetization fixed layers coupled to the magnetic recording layer; first and second reference layers opposed to the magnetic recording layer; and first and second tunnel barrier films inserted between the magnetic recording layer and the first and second reference layers, respectively. The first magnetization fixed layer has a magnetization fixed in a first direction, and the second magnetization fixed layer has a magnetization fixed in a second direction opposite to the first direction. The first and second reference layers and the first and second tunnel barrier films are positioned between the first and second magnetization fixed layers. The first reference layer has a magnetization fixed in a third direction which is selected from the first and second directions, and the second reference layer has a magnetization fixed in a fourth direction opposite to the third direction. | 01-31-2013 |
| 20130058161 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device includes: a first signal line; a second signal line; a transistor; a first memory region; and a second memory region. The transistor controls a conduction of each of a current flowing between the first and the second signal lines and an opposite current. The first memory region has a first magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and the magnetization direction becomes antiparallel when a current in another direction. The second memory region has a second magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and becomes antiparallel when a current flows in another first direction. | 03-07-2013 |
| 20130058162 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device includes: a first signal line; a second signal line; a transistor; a memory region; and a conductive region. The transistor controls a conduction of each of a current in a first direction flowing between the first line and the second line and a current in a second direction opposite to the first direction. The memory region has a first magnetic tunnel junction element which is connected between the first line and one end of the transistor, a magnetization direction of which becomes parallel when a current not less than a first parallel threshold value flows in the first direction, and the magnetization direction of which becomes antiparallel when a current not less than a first antiparallel threshold value flows in the second direction. The conductive region is connected between the second line and the other end of the transistor. | 03-07-2013 |
| 20130064011 | STT-MRAM CELL STRUCTURE INCORPORATING PIEZOELECTRIC STRESS MATERIAL - A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell. | 03-14-2013 |
| 20130070522 | NONVOLATILE MEMORY DEVICE - According to one embodiment, a nonvolatile memory device includes a magnetic memory element and a control unit. The magnetic memory element includes a stacked body including first and second stacked units. The first stacked unit includes a first ferromagnetic layer having a magnetization fixed, a second ferromagnetic layer having a magnetization variable and a first nonmagnetic layer provided between the first and second ferromagnetic layers. The second includes a third ferromagnetic layer having a magnetization rorated by a passed current to produce oscillation, a fourth ferromagnetic layer having a magnetization fixed and a second nonmagnetic layer provided between the third and fourth ferromagnetic layers stacked with each other. A frequency of the oscillation changes in accordance with the direction of the magnetization of the second ferromagnetic layer. The control unit includes a reading unit reading out the magnetization of the second ferromagnetic layer. | 03-21-2013 |
| 20130070523 | MAGNETIC MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE - According to one embodiment, a magnetic memory element includes a stacked body including first and second stacked units. The first stacked unit includes first and second ferromagnetic layers and a first nonmagnetic layer. A magnetization of the first ferromagnetic layer is fixed in a direction perpendicular to the first ferromagnetic layer. A magnetization of the second ferromagnetic layer is variable. The first nonmagnetic layer is provided between the first and second ferromagnetic layers. The second stacked unit stacked with the first stacked unit includes third and fourth ferromagnetic layers and a second nonmagnetic layer. A magnetization of the third ferromagnetic layer is variable. The fourth ferromagnetic layer is stacked with the third ferromagnetic layer. A magnetization of the fourth ferromagnetic layer is fixed in a direction perpendicular to the fourth ferromagnetic layer. The second nonmagnetic layer is provided between the third and fourth ferromagnetic layers. | 03-21-2013 |
| 20130077396 | MAGNETIC MEMORY ELEMENT AND MAGNETIC MEMORY APPARATUS - A magnetic memory element includes a first magnetic layer, a second magnetic layer, a first intermediate layer, a first magnetic wire, a first input unit, and a first detection unit. The first magnetic layer has magnetization fixed. The second magnetic layer has magnetization which is variable. The first intermediate layer is between the first magnetic layer and the second magnetic layer. The first magnetic wire extends in a first direction perpendicular to a direction connecting from the first magnetic layer to the second magnetic layer and is adjacent to the second magnetic layer. In addition, write-in is performed by propagating a first spin wave through the first magnetic wire and by passing a first current from the first magnetic layer toward the second magnetic layer. Read-out is performed by passing a second current from the first magnetic layer toward the second magnetic layer. | 03-28-2013 |
| 20130100733 | MEMORY DEVICE AND ELECTRONIC APPARATUS - A memory device includes: a memory including a first magnetic layer having no retaining force and a second magnetic layer having a retaining force, the first magnetic layer and the second magnetic layer being stacked; a first magnet to magnetize the first magnetic layer in a first direction; and a second magnet to apply a magnetic field to a region through which the memory passes when the memory is removed and to magnetize the second magnetic layer in a second direction. | 04-25-2013 |
| 20130235656 | MAGNETIC TUNNEL JUNCTION DEVICE AND FABRICATION - An apparatus includes a structure that includes a bottom cap layer surrounding a metal pad. The apparatus also includes a magnetic tunnel junction (MTJ) device that includes a bottom electrode coupled to the structure. The MTJ device includes magnetic tunnel junction layers, a top electrode, and a logic cap layer. The MTJ device is offset with respect to the metal pad. | 09-12-2013 |
| 20150023096 | COUNTERBALANCED-SWITCH MRAM - A magnetic memory cell is provided. The cell comprises first and second free layers; and an intermediate layer separating the first and second free layers, wherein the first and second free layers are magnetostatically coupled. | 01-22-2015 |
