| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 365105000 | Diodes | 10 |
| 20080247213 | Memory Device for Protecting Memory Cells during Programming - Improved circuitry and methods for programming memory cells of a memory device are disclosed. The improved circuitry and methods operate to protect the memory cells from potentially damaging electrical energy that can be imposed during programming of the memory cells. Additionally, the improved circuitry and methods operate to detect when programming of the memory cells has been achieved. The improved circuitry and methods are particularly useful for programming non-volatile memory cells. In one embodiment, the memory device pertains to a semiconductor memory product, such as a semiconductor memory chip or a portable memory card. | 10-09-2008 |
| 20090109726 | NON-LINEAR CONDUCTOR MEMORY - A high-speed, low-power memory device comprises an array of non-linear conductors wherein the storage, address decoding, and output detection are all accomplished with diodes or other non-linear conductors. In various embodiments, the row and column resistors are switchable between a high resistance when connected to a row or column that is non-selected, and a low resistance when connected to the selected row and column. | 04-30-2009 |
| 20090237976 | N-ary Three-Dimensional Mask-Programmable Read-Only Memory - N-ary three-dimensional mask-programmable read-only memory (N-3DMPROM) stores multi-bit-per-cell. Its memory cells can have N states (N>2) and data are stored as N-ary codes. N-3DMPROM has a larger storage density than the prior-art binary 3D-MPROM. One advantage of N-3DROM over other N-ary memory (e.g. multi-level-cell flash) is that its array efficiency can be kept high. N-3DMPROM could be geometry-defined, junction-defined, or a combination thereof. | 09-24-2009 |
| 20090296448 | DIODE AS VOLTAGE DOWN CONVERTER FOR OTP HIGH PROGRAMMING VOLTAGE APPLICATIONS - A voltage down converter for programming a one-time-programmable (OTP) memory comprising is disclosed, the voltage down converter comprises a bonding pad for coupling to a programming power supply, and at least one forward biased diode coupled between the bonding pad and the OTP memory, wherein a programming voltage received by the OTP memory is lowered from the programming power supply by the voltage drop across the forward biased diode. | 12-03-2009 |
| 20090316467 | Memory Device Constructions, Memory Cell Forming Methods, and Semiconductor Construction Forming Methods - Memory device constructions include a first column line extending parallel to a second column line, the first column line being above the second column line; a row line above the second column line and extending perpendicular to the first column line and the second column line; memory material disposed to be selectively and reversibly configured in one of two or more different resistive states; a first diode configured to conduct a first current between the first column line and the row line via the memory material; and a second diode configured to conduct a second current between the second column line and the row line via the memory material. In some embodiments, the first diode is a Schottky diode having a semiconductor anode and a metal cathode and the second diode is a Schottky diode having a metal anode and a semiconductor cathode. | 12-24-2009 |
| 20090316468 | LARGE ARRAY OF UPWARD POINTING P-I-N DIODES HAVING LARGE AND UNIFORM CURRENT - A first memory level includes a first plurality of memory cells that includes every memory cell in the first memory level. Each memory cell includes a vertically oriented p-i-n diode in the form of a pillar that includes a bottom heavily doped p-type region, a middle intrinsic or lightly doped region, and a top heavily doped n-type region. The first plurality of memory cells includes programmed cells and unprogrammed cells, wherein programmed cells comprise at least half of the first plurality of memory cells. Current flowing through the p-i-n diodes of at least 99 percent of the programmed cells when a voltage between about 1.5 volts and about 3.0 volts is applied between the bottom heavily doped p-type region and the top heavily doped n-type region is at least 1.5 microamps. | 12-24-2009 |
| 20100097837 | MEMORY BASED COMPUTATION SYSTEMS AND METHODS OF USING THE SAME - A high performance memory based computation system comprises an array of memory cells. Each memory cell stores a logic data corresponding to a chosen combination of inputs based on a specific logic function. For improved performance, the memory cell array can be divided into sub-blocks; and the sub-blocks can be serially disposed or juxtaposed. The performance of the memory based computation system can further be improved by removing the repeated memory cell rows, column, and/or sub-arrays. | 04-22-2010 |
| 20100110752 | Method of making a diode read/write memory cell in a programmed state - A method of making a nonvolatile memory device includes fabricating a diode in a low resistivity, programmed state without an electrical programming step. The memory device includes at least one memory cell. The memory cell is constituted by the diode and electrically conductive electrodes contacting the diode. | 05-06-2010 |
| 20130051113 | PROGRAMMABLE NON-VOLATILE MEMORY - A programmable non-volatile memory including a memory cell includes a transistor acting as an anti-fuse and two diodes for access. The memory cell that can store two bits and includes a transistor acting as an anti-fuse and two diodes for access, wherein the cell transistor includes: the source electrode formed by a metal; the first diode as the source region contact structure; the drain electrode formed by a metal; and the second diode as the drain region contact structure wherein the cell transistor, the oxide layer between the source area and the gate is the first anti-fuse the first storage; the oxide layer between the drain area and the gate is the second anti-fuse the second storage; the two diodes are connected in series to access the two anti-fuses. | 02-28-2013 |
| 20150078062 | PROGRAMMABLE DIODE ARRAY FOR HIGH DENSITY OTP APPLICATION - A device for one-time-programmable (OTP) memory may include a capacitor formed by a conductive layer, an oxide layer, and a semiconductor well, and a diode that is formed after programing the device. The device may be programmable by applying a voltage between the conductive layer and the semiconductor well. The applied voltage may be capable of rupturing the oxide layer at one or more points. The conductive layer, the oxide layer, and the semiconductor well may be native CMOS process formations. | 03-19-2015 |
