| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 341159000 | Parallel type | 45 |
| 20080211705 | Electronic Network Circuit with Dissymmetrical Differential Pairs - The invention relates to integrated circuits comprising a set of identical differential pairs of two transistors each (T | 09-04-2008 |
| 20080266162 | Amplifier array circuits and flash analog to digital converters - An amplifier array circuit is provided. An amplifier array includes a main amplifier array comprising a plurality of first amplifiers and a plurality of reference voltages, wherein the first amplifier is coupled to an input signal and the reference voltage corresponding to the first amplifier. A first reversed reference voltage amplifier array is located on one side of the main amplifier array and has a plurality of second amplifiers coupled to the input signal and the reference voltages, respectively. A second reversed reference voltage amplifier array is located on the other side of the main amplifier array and has a plurality of third amplifiers coupled to the input signal and the reference voltages respectively. The averaging network is coupled to a first output terminal and a second output terminal of the first, second and third amplifiers. | 10-30-2008 |
| 20080291073 | PARALLEL-TYPE A/D CONVERTER - According to one embodiment, a parallel-type A/D converter includes a reference voltage generating circuit which generates a plurality of reference voltages, a plurality of preamplifier circuits which amplify a potential difference between each of the reference voltages and an analog input voltage, a plurality of comparator circuits which compare sizes of the reference voltages and the analog input voltage for which a potential difference is amplified by each of the preamplifier circuits, an encoder circuit which converts a comparison result by the plurality of comparator circuits into a binary code, and a control circuit which controls gains of the plurality of preamplifier circuits and direct current offset voltages of the plurality of comparator circuits. | 11-27-2008 |
| 20080309541 | Flash Analog-to-Digital Converter - A flash analog-to-digital converter comprises a resistive string powered by a reference voltage source for providing a set of equidistant reference voltages and a set of comparators for comparing the analog input signal with the reference voltages. A set of switches are arranged and controlled to perform an algorithm for mitigating the influence of mismatches between the components. The switches are arranged between the reference voltage source and the resistive string so that switches in the reference inputs to the comparators are avoided. The resistive string is preferably circular. The converter can handle differential signals. | 12-18-2008 |
| 20090073020 | Parallel type analog-to-digital conversion circuit, sampling circuit and comparison amplification circuit - A parallel type analog-to-digital conversion circuit, including a reference signal generating portion and a comparison amplification portion, the comparison amplification portion including a plurality of amplifiers, input resetting switches, first sampling capacitors, second sampling capacitors, first sampling switches, and second sampling switches. | 03-19-2009 |
| 20090146859 | FLASH CONVERTER DIFFERENTIAL REFERENCE LADDER ADJUSTMENT WITH STABLE COMMON MODE VOLTAGE - An adjustment circuit for use with a resistive reference ladder that establishes nominal reference steps and a common mode voltage for a plurality of comparators, such as used in a flash converter. An “H” arrangement of current sources injects current at a first node, V | 06-11-2009 |
| 20090153386 | FLASH CONVERTER DIFFERENTIAL REFERENCE LADDER AUTO-ZERO CIRCUIT - A differential reference ladder with an auto zero circuit that can be used as part of a flash analog to digital converter. The auto zero operation is performed relative to a common mode voltage of the ladder. The resistive ladder is disconnected from the rest of the circuit during auto zero mode. As a result, the auto zero adjustment is more accurate, since the offsets are stored under the same common mode connection as when the circuit is in a compare mode. This permits auto zeroing to proceed quickly unencumbered by the parasitic capacitance of the ladder or other components. | 06-18-2009 |
| 20090153387 | ANALOG/DIGITAL CONVERTER AND INFORMATION RECORDING AND REPRODUCING APPARATUS - The present invention provides an A/D converter includes: a plurality of comparators for comparing a plurality of respective standard voltages with an analog input value for a magnitude thereof, the comparators being arranged depending on magnitudes of the standard voltages; a logic boundary detector for detecting a logic boundary point where output signals from the comparators change from one level to another level; and a plurality of majority circuits for being supplied with the output signals from the comparators and determining output signals based on a majority vote on the output signals from the comparators, the majority circuits having logic threshold values adjusted for respective input terminals thereof which are supplied with the output signals from the comparators. | 06-18-2009 |
| 20090207065 | ANALOG TO DIGITAL CONVERTER USING SUCCESSIVE APPROXIMATION - Disclosed is a flash analog to digital converter (ADC) capable of reducing area requirements and using successive approximation. The ADC includes a reference voltage generating unit receiving an external voltage and outputting M reference voltages. A reference voltage selecting unit outputs N reference voltages less than the number of the voltages outputted by the reference voltage generating unit according to a supplied control signal. A digital signal output unit compares the N reference voltages outputted by the reference voltage selecting unit with an external analog input signal and outputs the comparison result as an N-bit digital signal. | 08-20-2009 |
| 20090237286 | FLASH ADC - An analog to digital converter (ADC) includes a resistance ladder including N resistances arranged in series. Connection nodes are arranged between adjacent ones of the N resistances and at each end of the resistance ladder. An input signal is received at a selected connection node of the connection nodes. N is an integer greater than one. A plurality of delay elements receive signals from corresponding ones of the connection nodes and apply predetermined delays to the signals to produce delayed signals. The predetermined delays are based on an electrical distance between the corresponding ones of the connection nodes and the selected connection node, respectively. A plurality of comparators include corresponding first input terminals that receive the delayed signals from respective ones of the plurality of delay elements. | 09-24-2009 |
| 20090267821 | Analog-to-Digital Converter - An ADC circuit includes multiple comparators and a controller coupled to the comparators. Each of the comparators is operative to generate an output indicative of a difference between a first signal representative of an input signal applied to the ADC circuit and a corresponding reference signal. The controller is operative to perform at least one of: (i) activating a subset of the comparators during a given sample period being; and (ii) controlling levels of the corresponding reference signals of the comparators as a function of a level of the input signal. A number of active comparators during the given sample period is no greater than one less than a number of regions into which the input signal is quantized. | 10-29-2009 |
| 20090273502 | Fast, efficient reference networks for providing low-impedance reference signals to signal converter systems - Reference network embodiments are provided for use in pipelined signal converter systems. The network embodiments are fast and power efficient and they generate low-impedance reference signals through the use of a complimentary common-drain output stage, an output current valve inserted between transistors of the output stage, and a controller. The controller is configured to provide gate voltages to the output current valve to thereby establish a substantially-constant output current. The controller is further configured to provide gate voltages to the output stage to establish top and bottom reference voltages about the output current valve that are spaced from a common-mode voltage. This reference structure maintains a constant output current as the span between the top and bottom reference voltages is selectively altered. In different embodiments, transistors of the output current valve are arranged in a drain-to-source-coupled configuration and in a source-coupled configuration. | 11-05-2009 |
| 20090309777 | ANALOG SIGNAL PROCESSING DEVICE - An analog signal processing device including a voltage selector selecting a given comparison reference voltage from plural comparison reference voltages, an arithmetic unit arithmetically processing the given comparison reference voltage and an analog input signal, a comparator which has at least one or more judgment points for the plural comparison reference voltages and to which an output of the arithmetic unit is inputted, and a coupling controller controlling connections between the arithmetic unit and the comparator, wherein the arithmetic unit comprises correctable first signal processors, and the number of the first signal processors is more than is necessary for the plural comparison reference voltages by M or larger, and when a set of N of first signal processors are in a correction operation, the coupling controller connects first signal processors which are not in the correction operation in the arithmetic unit to the comparator. | 12-17-2009 |
| 20100007542 | PIPELINED TYPE A/D CONVERTER - The present invention aims to provide a pipeline type A/D converter capable of realizing low power consumption while preventing a reduction in feedback factor of an amplifier. One embodiment of the present invention is of a pipeline type A/D converter which converts an analog signal to a digital signal, including a plurality of stages coupled in tandem and an error correction circuit which generates the digital signal, based on sub digital signals respectively outputted from the stages. When a sub digital signal of N bits is outputted at at least one of the stages in the pipeline type A/D converter according to the one embodiment of the present invention, the stage gain of a transfer function becomes 2 | 01-14-2010 |
| 20100060501 | RAIL TO RAIL FLASH - An analogue to digital converter comprising: a first set comprising nodes defined by circuitry such that each node is at a respective voltage, the voltages on the nodes being in an orderly progression between the voltage of a first current source and the voltage of a first input node; a second set comprising nodes defined by circuitry such that each node is at a respective voltage, the voltages on the nodes being in an orderly progression between the voltage of a second current source and the voltage of a second input node; a plurality of comparators, each comparator being arranged to compare the voltage on a node in the first set with the voltage on a respective node in the second set; and a pair of switching devices arranged between the first current source and the first set of nodes, the first switching device of the pair connected so as to supply the current from the first current source to all said nodes in the first set, and the second switching device of the pair connected so as to supply the current from the first current source to a subset of said nodes in the first set which are closest in voltage to the voltage of the first input node; wherein control voltages of the first and second switching devices of the pair are set such that: (a) when the potential difference between the voltage at the first current source and the voltage at the first input node is greater than a predetermined potential difference the first switching device is in a first state and the current from the first current source flows through the first switching device; and (b) when the potential difference between the voltage at the first current source and the voltage at the first input node is less than the predetermined potential difference the first switching device is in a second state and the current from the first current source flows through the second switching device. | 03-11-2010 |
| 20100060502 | A/D CONVERTER - There is provided an A/D converter capable of changing specification and function of the A/D converter with the use of a programmable circuit by combining comparators with the programmable circuit. The A/D converter comprises a parallel-connected comparison circuit including a plurality of comparators, an analog signal being inputted to one of input terminals of the respective comparators while respective predetermined reference voltages being inputted to the other of the input terminals of the respective comparators, and a digital processing circuit for receiving output signals from the parallel-connected comparison circuit, and executing predetermined digital processing as set on the basis of a program. | 03-11-2010 |
| 20100085232 | PARALLEL ANALOG-DIGITAL CONVERTER WITH DUAL STATIC LADDER - The invention relates to fast, high resolution, analog digital converters, and more particularly those which possess at least one conversion stage of “flash” type. The converter according to the invention uses N differential amplifiers with four inputs. The amplifier of rank j receives the input voltage to be converted V | 04-08-2010 |
| 20100097260 | ANALOG-TO-DIGITAL CONVERTER - An analog-to-digital converter includes a first preamplifier receiving a first reference voltage and an input signal, a second preamplifier receiving a second reference voltage and the input signal, a first preamplifier calibrator placed for the first preamplifier and adjusting an input offset of the first preamplifier, a second preamplifier calibrator placed for the second preamplifier and adjusting an input offset of the second preamplifier, an interpolator placed between output terminals of the first and second preamplifiers and generating an interpolation signal having a voltage value between a first output signal from the first preamplifier and a second output signal from the second preamplifier, comparators receiving the first output signal, the second output signal or the interpolation signal and outputting a digital value based on the received signal, and comparator calibrators placed for at least comparators receiving the interpolation signal among the comparators and adjusting input offsets of the corresponding comparators. | 04-22-2010 |
| 20100127911 | ANALOG DIGITAL CONVERTER - In one aspect, provided is an A/D converter including: a plurality of capacitor networks each including a first switch group; a capacitor group; a second switch group; and a plurality of reference voltage selectors; a sampling unit grounded at one end thereof; a plurality of A/D converters; and converting means; and a plurality of switch networks each of which connects a corresponding one of the plurality of the capacitor networks to any one of the sampling unit and the plurality of A/D converters in one-to-one correspondence, and in which converter the switch networks change the connections between the plurality of capacitor networks, the sampling unit and the plurality of A/D converters, at each predetermined time intervals, so that a pipeline operation is performed. | 05-27-2010 |
| 20100134337 | ANALOG-DIGITAL CONVERSION CELL AND ANALOG-DIGITAL CONVERTER - There is provided an analog-digital conversion cell being an analog-digital conversion cell that performs an N-bit analog-digital conversion (where N is a natural number) and including: a comparison circuit ( | 06-03-2010 |
| 20100176983 | ANALOG-TO-DIGITAL CONVERTER CIRCUIT - An analog-to-digital converter circuit includes: a capacitor array including a plurality of first capacitors, each having a first terminal connecting to a common node and having a capacitance represented by the nth power of 2 (2 | 07-15-2010 |
| 20100182185 | ANALOG-TO-DIGITAL CONVERSION CIRCUIT - An analog-to-digital conversion circuit includes a plurality of comparators and an averaging circuit. The averaging circuit is configured so that a length of a metal routing connected between output terminals of two comparators arranged on a leftmost side from among the plurality of comparators or a length of a metal routing connected between output terminals of two comparators arranged on a rightmost side from among the plurality of comparators is less than a length of a metal routing connected between output terminals of two comparators to which reference voltages having levels that are closest in magnitude are input. | 07-22-2010 |
| 20100194618 | ANALOG-TO-DIGITAL CONVERTER, OPTICAL DISK REPRODUCTION DEVICE, AND RECEIVER DEVICE - A plurality of comparators (CMP | 08-05-2010 |
| 20100194619 | ADC WITH LOW-POWER SAMPLING - An apparatus for analog-to-digital conversion using successive approximation is provided, which is adapted to be supplied with a single ended supply voltage. The device includes: a first analog-to-digital conversion stage including a first set of capacitors coupled with a side at a common node and adapted to sample an input voltage and to be coupled to either a first reference voltage level or a second reference voltage level, at least one capacitor of the first set of capacitors being adapted to be left floating, a control stage being adapted to connect the at least one floating capacitor to the first reference voltage level or the second reference voltage level in response to an analog-to-digital conversion decision made by a second analog-to-digital conversion stage. The first analog-to-digital conversion stage is operable to couple the common node to a supply voltage level, in particular ground, during analog-to-digital conversion. | 08-05-2010 |
| 20100194620 | ANALOG/DIGITAL CONVERTER - An A/D converter includes a plurality of comparators that performs sampling of a plurality of reference voltages and analog input signals during a sampling time, and compares each of the plurality of reference voltages with each of the plurality of analog signals during a comparison time. The A/D converter detects bubbles in thermometer codes obtained from output signals of the plurality of comparators and adjusts a ratio of the sampling time and the comparison time of the plurality of comparators so as to reduce the bubbles. | 08-05-2010 |
| 20100265115 | AD converter - Disclosed herein is an AD converter, including, a reference voltage generator, a plurality of amplifiers, a plurality of averaging resistance elements, and a plurality of first averaging auxiliary circuits each including a first amplifier and a first resistance element. | 10-21-2010 |
| 20100271249 | INTERPOLATING A/D CONVERTER - Provided is an interpolating A/D converter including a reference voltage generation circuit, an analog signal input circuit, a preamplifier group including a plurality of preamplifiers, and an interpolation circuit including a plurality of resistors. Reference voltages from the reference voltage generation circuit and an analog signal from the analog signal input circuit are input to the preamplifier group. The interpolation circuit outputs an interpolation signal by interpolating output signals of the preamplifier group. The preamplifiers amplify a differential voltage when a differential voltage between the analog signal and the reference voltages is smaller than a specified value, and the current flow of which is stopped when it is larger than the specified value. The plurality of resistors are connected in series between the adjacent amplifiers. | 10-28-2010 |
| 20100328129 | PIPELINE ANALOG-TO-DIGITAL CONVERTER WITH PROGRAMMABLE GAIN FUNCTION - A pipeline analog-to-digital converter (ADC) comprises a plurality of pipeline stages is disclosed. The first pipeline stage has programmable gain function. The first pipeline stage includes a sub-analog-to-digital converter (sub-ADC) and a multiplying digital-to-analog converter (MDAC) implemented by switched capacitor (SC) circuits. Different capacitances in the sub-ADC and MDAC are provided so as to provide different gains by controlling switches in the SC circuits. | 12-30-2010 |
| 20110012771 | FLASH ANALOG-TO-DIGITAL CONVERTER - An analog-to-digital converter comprises a signal input ( | 01-20-2011 |
| 20110115662 | High Speed Low Voltage Flash - An analog-to-digital converter comprising: first and second sets of ordered nodes, each first node having a corresponding second node; for each first node, a respective first resistor and current source pair, the resistor of each pair being connected to a first converter input and the current source of each pair being coupled to the respective first node; for each second node, a respective second resistor and current source pair, the resistor of each pair being connected to a second converter input and the current source of each pair being coupled to the respective second node; and a plurality of first comparators, each first comparator having its first input connected to a first node and its second input connected to the corresponding second node; wherein each of the first resistor and current source pairs are configured so as to provide an orderly progression of voltages at the first nodes and each of the second resistor and current source pairs are configured so as to provide an orderly progression of voltages at the second nodes. | 05-19-2011 |
| 20110248876 | ANALOG-TO-DIGITAL CONVERTER - A parallel successive-approximation analog-to-digital converter (PSA-ADC, | 10-13-2011 |
| 20110285569 | A/D Converter with Compressed Full-Scale Range - An embodiment of an analog-to-digital converter system is described wherein an analog voltage signal Vin(t) is provided by an input amplifier. The analog signal Vin(t) has a predetermined full-scale range that is less wide than a reference voltage (Vref) range used by a downstream ADC to derive a first digital (numerical) representation D | 11-24-2011 |
| 20120044103 | PARALLEL INTERPOLATION A/D CONVERTER AND DIGITAL EQUALIZER - A parallel interpolation A/D converter includes a reference voltage generation circuit configured to generate (m+1) different reference voltages VR | 02-23-2012 |
| 20120112946 | RESOLUTION ENHANCING ANALOG-TO-DIGITAL CONVERSION - A resolution-enhancing analog-to-digital signal conversion circuit is provided. The circuit includes a plurality of analog-to-digital converters arranged in parallel. Each analog-to-digital converter of the plurality of analog-to-digital converters is configured to output a digital signal that identifies an analog signal input to that analog-to-digital converter. The circuit further includes an input regulation module configured to clip the analog signal input to any of the plurality of analog-to-digital converters to within the voltage range corresponding to that analog-to-digital converter if such an analog signal otherwise is outside of the voltage range. The circuit further includes a controller configured to receive the digital signal output from each analog-to-digital converter and output an encoded signal based on one or more such digital signal that is received from an unclipped analog-to-digital converter having a highest analog-to-digital conversion resolution. | 05-10-2012 |
| 20120133539 | Comparator Circuit - An analog-to-digital converter includes a comparator configured to receive a first input signal and a second input signal, in which at least one of the input signals is received between two transistors, each of the transistors being in common-gate configuration. | 05-31-2012 |
| 20120206287 | Analog-to-Digital Converter - An analog-to-digital converter includes an input terminal, a first comparator, a first output terminal, a second comparator, and a second output terminal. The first comparator generates a first logical signal and a control signal by comparing an input signal received by the input terminal with a first reference signal. A first transistor generates a first current based on the input signal. First and second switches are switched so as to be short-circuited/open-circuited in an opposite manner to each other based on the control signal. A second transistor supplies a second current based on a second reference signal to a terminal when the first switch is ON. A third transistor supplies a third current based on a third reference signal to the terminal when the second switch is ON. An output unit generates a second logical signal by comparing the first current with one of the second and the third currents. | 08-16-2012 |
| 20130076551 | ANALOG-TO-DIGITAL CONVERTER - According to an embodiment, an analog-to-digital converter includes a voltage generating unit to generate comparative voltages; and comparators. Each comparator compares any one of the comparative voltages with an analog input voltage and output a digital signal. Each comparator includes a differential pair circuit to detect a potential difference between two inputs. The differential pair circuit includes first and second circuit portions. The first circuit portion includes a first transistor having a gate to which one input is supplied; and a resistor connected in series with the first transistor. The second circuit portion includes a second transistor having a gate to which the other input is supplied and forms a differential pair with the first transistor; and a variable resistor connected in series with the second transistor. The variable resistor includes variable resistive elements each having a resistance value variably set according to a control signal. | 03-28-2013 |
| 20130201048 | SIGNAL INTERPOLATION DEVICE AND PARALLEL A/D CONVERTING DEVICE - There is provided a signal interpolation device, including: a first amplifier to generate a first signal representing a difference between an input signal and a first reference voltage; a second amplifier to generate a second signal representing a difference between the input signal and a second reference voltage; a first output amplifier to amplify the first signal to generate a first output signal; a second output amplifier to amplify the second signal to generate a second output signal; a third output amplifier to amplify a sum of a first interpolation signal and the first signal to generate a third output signal, the first interpolation signal representing a voltage generated by dividing a difference between the first reference voltage and the second reference voltage by “2̂n”; and a fourth output amplifier to amplify a difference between the second signal and the first interpolation signal to generate a fourth output signal. | 08-08-2013 |
| 20140118175 | SUCCESSIVE APPROXIMATION A/D CONVERTER - The successive approximation A/D converter includes: switch groups | 05-01-2014 |
| 20140132437 | COMPARATOR AND A/D CONVERTER - A comparator includes: a differential amplifier of which operational state is switched in response to a clock-signal, and which outputs a first intermediate-output corresponding to a first input-signal and a second intermediate-output corresponding to a second input-signal; a differential latch circuit of which operational state is switched in response to the clock-signal, and a state of which is changed depending on the first intermediate-output and the second intermediate-output; a first adjuster configured to adjust a threshold of the differential latch circuit with respect to a change of a state of the first intermediate-output and a change of a state of the second intermediate-output; and a second adjuster configured to adjust a threshold variation of the differential latch circuit with respect to a change of a state of the first intermediate-output and a change of a state of the second intermediate-output. | 05-15-2014 |
| 20160006447 | ESTIMATION OF IMPERFECTIONS OF A TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTER - A method of operating a time-interleaved analog-to-digital converter for conversion of an analog input signal to a digital output signal having a sample rate R comprises, for each of at least some activations of an array of constituent analog-to-digital converters, defining first and second sets of the constituent analog-to-digital converters, feeding the analog input of each analog-to-digital converter of the first set with a reference value for imperfection measurements and clocking each analog-to-digital converter of the first set with one of the timing signals, feeding the analog input of each of analog-to-digital converter of the second set with the analog input signal for generation of an intermediate constituent digital output signal at the digital output and clocking each analog-to-digital converter of the second set with one of the timing signals, wherein no timing signal is used to clock two or more of analog-to-digital converters of the second set. | 01-07-2016 |
| 20160118992 | COMPARATOR CIRCUITS WITH LOCAL RAMP BUFFERING FOR A COLUMN-PARALLEL SINGLE-SLOPE ADC - A comparator circuit suitable for use in a column-parallel single-slope analog-to-digital converter comprises a comparator, an input voltage sampling switch, a sampling capacitor arranged to store a voltage which varies with an input voltage when the sampling switch is closed, and a local ramp buffer arranged to buffer a global voltage ramp applied at an input. The comparator circuit is arranged such that its output toggles when the buffered global voltage ramp exceeds the stored voltage. Both DC- and AC-coupled comparator embodiments are disclosed. | 04-28-2016 |
| 341160000 | Including priority encoder | 3 |
| 20090153388 | TIME INTERPOLATION FLASH ADC HAVING AUTOMATIC FEEDBACK CALIBRATION - An input signal is compared to 2 | 06-18-2009 |
| 20090303096 | SYSTEMS AND METHODS FOR ANALOG TO DIGITAL CONVERSION - Various embodiments of the present invention provide systems and methods for analog to digital conversion. For example, an analog to digital converter is disclosed that includes an analog input that is provided to a comparator bank. The comparator bank receives a reference indicator, and is operable to provide a current output based at least in part on a comparison of the analog input with a reference threshold corresponding to the reference indicator. The analog to digital converter further includes a range selection filter that is operable to receive the current output and to generate the reference indicator based at least in part on a prior output of the comparator bank. | 12-10-2009 |
| 20110215959 | COMPARATOR AND ANALOG/DIGITAL CONVERTER - To provide a comparator and an A/D converter having the comparator. The comparator includes a differential amplifier circuit section and a differential latch circuit section. A first input voltage signal, a second input voltage signal and a clock signal are inputted to the differential amplifier circuit section. The differential amplifier circuit section operates base on the clock signal to output a first output voltage signal and a second output voltage signal which respectively correspond to the value the input voltage signal and the value of the reference voltage signal and are amplified. The differential latch circuit section operates based on the first and second output voltage signals to keep and output a comparison result between the first input voltage signal and the second input voltage signal. | 09-08-2011 |
