Entries |
Document | Title | Date |
20080204299 | ADC WITH LOGARITHMIC RESPONSE AND METHODS FOR CONTROLLING RF POWER LEVELS - Embodiments of an analog-to-digital converter (ADC) and methods for controlling RF power levels are generally described herein. Other embodiments may be described and claimed. In some embodiments, the ADC includes an internal-reference digital-to-analog converter (DAC) having a resistive structure with linearly-spaced contact nodes. The linearly-spaced contact nodes may provide corresponding reference voltages that vary exponentially with respect to the linearly-spaced contact nodes allowing the ADC to achieve a logarithmic response. | 08-28-2008 |
20080204300 | AD CONVERTER CIRCUIT AND MICROCONTROLLER - A successive approximation type AD converter circuit for comparing an analog input signal with an output analog signal of a DA converter with a comparator to input a digital signal output in accordance with a comparison result to the DA converter to determine a digital signal obtained if the output analog signal of the DA converter is equal to the analog input signal, as an AD-converted output signal, includes: an AD converter for AD-converting the analog input circuit in accordance with a sampling period for sampling the analog input signal and a comparison period for comparing the sampled analog input signal with the output analog signal of the DA converter with the comparator; and setting means for independently setting a cycle time of a first clock signal for determining the sampling period and a cycle time of a second clock signal for determining the comparison period. | 08-28-2008 |
20080224914 | Integrated Circuit for Analog-to-Digital Conversion - An integrated circuit for analog-to-digital conversion for performing digital conversion of the amount of current of an input current and outputting a digital signal, comprises: a resistor connection terminal to be connected to a resistor; a conversion section configured to convert the amount of current of the input current or the amount of current of a reference current flowing through the resistor into a digital signal to be output; and a compensation section configured to compensate the digital signal corresponding to the input current based on the digital signal corresponding to the reference current. | 09-18-2008 |
20080252508 | DATA READOUT SYSTEM HAVING NON-UNIFORM ADC RESOLUTION AND METHOD THEREOF - A data readout system with non-uniform resolution has a pick up head for reading data stored in an optical disc and generating an analog signal, a reference voltage unit for producing a plurality of reference voltage levels, wherein voltage differences between two adjacent reference voltage levels are not all the same, a plurality of comparators for comparing the reference voltage levels with the analog signal and generating comparison results, and an encoder for encoding the comparison results into a digital signal. | 10-16-2008 |
20080266161 | ANALOG-TO-DIGITAL CONVERTER, RECEIVER ARRANGEMENT, FILTER ARRANGEMENT AND SIGNAL PROCESSING METHOD - A filter arrangement comprises a switching element coupled to a filter input, wherein the switching element is controllable by a reference clock signal. The filter arrangement further comprises an input storage element, an output storage element, and a first and a second auxiliary storage element. The first and the second auxiliary storage element can each be connected in parallel to the input storage element or to the output storage element depending on a switching signal. The output storage element is coupled to a filter output. The filter arrangement can be used as a loop filter in an analog-to-digital converter, wherein the output signal of the filter arrangement is quantized to provide an output word. Respective feedback signals can be generated from the output word and be provided to the storage elements. | 10-30-2008 |
20080272951 | SELF-ADAPTING TRACKING ANALOGUE-TO-DIGITAL CONVERTER AND RF TRANSMITTER - A self-adapting analogue-to-digital converter includes a forward path with a voltage divider coupled to a digital integrator. In a feedback path, a scaler is connected to a digital-to-analogue converter. A control unit provides control signals for the voltage divider and the scaler in response to the output word of the digital integrator. | 11-06-2008 |
20080284635 | TRANSDUCER DEVICE - A transducer device for converting an analog DC voltage signal into a digital signal is provided, with an oscillator device for outputting a first oscillator signal and a second oscillator signal, whereby the oscillator device is formed to generate the first oscillator signal and the second oscillator signal phase-locked to one another and with the substantially same frequency from a reference signal, with an analog frequency converter connected to the oscillator device for transforming the analog DC voltage signal by the first oscillator signal in a first spectral range with a first center frequency to obtain a transformed signal, with an analog-to-digital converter for converting the transformed signal into a transformed digital signal; and with a digital frequency converter connected to the oscillator device for transforming the transformed digital signal by means of the second oscillator signal in a second spectral range with a second center frequency to obtain the digital signal. | 11-20-2008 |
20080291072 | ANALOG-DIGITAL CONVERTER AND IMAGE SENSOR - An analog-digital converter performs AD conversion of an upper m bits by sequential comparison, and performs AD conversion of a lower n bits by integration. This increases accuracy, reduces power consumption during operation, reduces variation between analog signals and digital signals, and reduces the required layout area by decreasing the number of capacitor elements needed. Also, the AD conversion of the n bits by integration is performed by ramp voltage quantized with a margin of k bits of the lower n bits. As such, preferable AD conversion characteristics can be obtained when offset or the like is produced in a DA conversion circuit for generating ramp voltage. | 11-27-2008 |
20080316080 | Successive approximation type A/D converter - A successive approximation type A/D converter includes a main capacitance array connected with a common connection node; a correction capacitance array; a voltage comparator configured to detect a voltage of the common connection node; and a successive approximation register in which a value is set based on an output of the voltage comparator. A first control circuit changes voltages applied to capacitance elements of the main capacitance array and the correction capacitance array based on a value set in the successive approximation register. A second control circuit responds to a control signal to connect the main capacitance array to an input voltage signal or a first predetermined voltage, and the correction capacitance array to the common connection node or a second predetermined voltage. | 12-25-2008 |
20090002214 | Filter With Forward Coupling - This disclosure relates to techniques and architecture for summing, sampling, and converting signals associated with a capacitive feedforward filter using a quantizer. | 01-01-2009 |
20090027251 | SAR ANALOG-TO-DIGITAL CONVERTER WITH LARGE INPUT RANGE - A method for analog-to-digital conversion is provided using successive approximation and a plurality of capacitors comprising a first set of capacitors and a second set of capacitors, a first side of each of the plurality of capacitors being coupled to a common node. The method comprises sampling an input voltage on the first set of capacitors, after the step of sampling leaving a side of at least one capacitor of the first set of capacitors floating, coupling a capacitor of the first set of capacitors, which is not floating, with a capacitor of the second set of capacitors so as to redistribute the charge on the coupled capacitors, comparing the voltage on the common node with a comparator reference voltage level to receive a comparison result to be used for a bit decision, and switching the floating side of the floating capacitor of the first set of capacitors to either a first reference voltage or a second reference voltage in accordance with the bit decision. | 01-29-2009 |
20090045995 | COMPARATOR AND ANALOG-TO-DIGITAL CONVERTER USING THE SAME - A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal. | 02-19-2009 |
20090066555 | A/D Converter Comprising a Voltage Comparator Device - The present invention discloses an analogue-to-digital converter comprising at least two voltage comparator devices. Each of the voltage comparator devices comprises a differential structure of transistors and is arranged for being fed with a same input signal and for generating an own internal voltage reference by means of an imbalance in the differential structure, said two internal voltage references being different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of the input signal. | 03-12-2009 |
20090073019 | A/D Convertion controlling device and image forming apparatus - A reference voltage generating unit generates a plurality of analog reference voltages, and an A/D converting unit converts the analog reference voltages thus generated and an analog input voltage input from an external device to digital reference values. A CPU generates, based on the analog reference voltages and the digital reference values converted from the analog reference voltages, an equation for correcting the analog input voltage to be converted to a digital value falling in a range of the digital reference values. With the equation generated, the CPU calculates the analog input voltage for the digital value obtained by conversion. | 03-19-2009 |
20090096655 | ANALOG TO DIGITAL CONVERTER WHICH USES TUNNELING MAGNETO-RESISTIVE DEVICES - An A/D converter is provided. The A/D converter determines a digital output value according to the resistance of the TMR device, resistance of which changes according to the magnetic field generated by at least one electrode into which current flows according to an analog input signal. Accordingly, an A/D converter to implement high resolution and high speed with low power consumption can be provided. | 04-16-2009 |
20090102693 | Serial-parallel type analog-to-digital converter and analog-to-digital conversion method - A serial-parallel type analog-to-digital converter includes a reference voltage generator, a higher bit comparing portion and a lower bit comparing portion, and a reference voltage selecting portion, wherein the lower bit comparing portion includes the plurality of comparison stages. | 04-23-2009 |
20090273501 | SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER WITH IMPROVED IMMUNITY TO TIME VARYING NOISE - An SAR ADC provides increased immunity to noise introduced by time varying noise components provided on reference potentials (V | 11-05-2009 |
20090322579 | APPARATUS AND METHOD FOR A/D CONVERSION - An A/D conversion apparatus includes an A/D conversion circuit and a reference voltage generating circuit which includes a first switch circuit configured to switch between a state in which the inputs of an operational amplifier are swapped and a state in which these inputs are not swapped, and a second switch circuit configured to switch between a state in which the output voltage of the operational amplifier is output as having a normal phase and a state in which the output voltage is output as having a reversed phase. The A/D conversion circuit obtains a first digital value by setting the first and second switch circuits to a first state, and obtains a second digital value by setting the first and second switch circuits to a second state different from the first state, followed by producing a result of A/D conversion computed from the first and second digital values. | 12-31-2009 |
20100007540 | BINARY CONTROLLER AND POWER SUPPLY WITH A BINARY CONTROLLER - A controller is described, which is particularly suited for a power supply with switching elements (S | 01-14-2010 |
20100007541 | A/D CONVERTER - The conventional A/D converter has a drawback that the conversion precision is degraded when the operation periods of the constituents of the A/D converter are shortened due to the duty ratio of an external input clock because the operation periods of the constituents of the A/D converter depend on the pulse width of the external input clock. However, a highly-precise A/D conversion operation independent of the duty ratio of the external input clock can be realized by providing a circuit for detecting the operation periods of the constituents of the A/D converter, and adjusting the duty ratio of the operation clock according to the detected operation periods of the constituents of the A/D converter. | 01-14-2010 |
20100013692 | A/D CONVERTER - An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock. | 01-21-2010 |
20100045504 | VOLTAGE ERROR CORRECTION SYSTEM - A voltage error correction system includes a voltage converter, a first and a second analog to digital converters, a subtracter, an adder, and a digital voltage generator. The voltage converter adjusts an input voltage proportionally, adds the adjusted input voltage to a reference voltage to obtain a positive voltage, and outputs the positive voltage. The first analog to digital converter converts the positive voltage into a first digital voltage, the second analog to digital converter converts the reference voltage into a second digital voltage, the subtracter subtracts the second digital voltage from the first digital voltage and outputs a difference voltage, and the adder outputs a corrected voltage by adding the difference voltage of the subtracter to a compensation voltage. | 02-25-2010 |
20100066581 | SAMPLE/HOLD CIRCUIT, AND ANALOG-TO-DIGITAL CONVERTER - There is disclosed a sample-and-hold circuit. An operational amplifier includes an inverting input terminal, a non-inverting input terminal, an inverting output terminal, and a non-inverting output terminal. First and second groups of capacitors are operated in first to third modes periodically. Positive and negative input signals are input to charge an electric charge in the first mode, electric charge are held while positive and negative output signals are output from the operational amplifier by connecting between the inverting input terminal and the non-inverting output terminal and by connecting between the non-inverting input terminal and the inverting output terminal in the second mode, and electric charge are discharged in the third mode. Second group of capacitors shifts to the third mode when first group of capacitors is in the first or second mode, and shift to the first or second mode when first group of capacitors is in the third mode. | 03-18-2010 |
20100066582 | CURRENT MODE DOUBLE-INTEGRATION CONVERSION APPARATUS - A double-integration signal processing apparatus for pulse width amplification and A/D conversion is provided. The current mode double-integration conversion apparatus includes: a current mode double-integration unit which integrates an input current in a predetermined time interval and outputs an integration voltage; a comparison unit which compares the integration voltage output from the current mode double-integration unit with a predetermined comparison voltage V k and outputs an comparison pulse signal; and a gate logic unit which performs a logic operation by using the comparison pulse signal of the comparison unit and an internal signal and outputs an logic operation pulse signal. Accordingly, the current mode double-integration conversion apparatus can be applied to various sensors. | 03-18-2010 |
20100079327 | DATA CONVERSION CIRCUITRY AND METHOD THEREFOR - A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data converter is provided. In one embodiment, a differential data converter with a more stable comparator common mode voltage is provided. In one embodiment, the input range of a digitally calibrated data converter is provided and maintained so that there is no loss in input range due to the calibration. In one embodiment, digital post-processing of an uncalibrated result using a previously stored calibration value is provided. | 04-01-2010 |
20100123612 | ANALOG-TO-DIGITAL CONVERSION CIRCUIT AND DEVICE - An analog-to-digital conversion circuit and device having an input stage arranged to receive an input signal and to provide an output analog signal as a function of the input signal; an analog-to-digital conversion block arranged to receive the output analog signal and to provide a respective output digital signal. The input stage includes a first voltage buffer arranged to provide the output analog signal to the conversion block as the translation of the input signal of an amount equal to a translation voltage; a second voltage buffer arranged to provide a first reference signal to the conversion block that is representative of the translation of a first reference voltage of an amount equal to the translation voltage, so that the conversion block stores the input signal as the difference of the input signal and the first reference voltage regardless of the translation voltage. | 05-20-2010 |
20100127910 | COMPARATOR AND PIPELINED ADC UTLIZING THE SAME - A comparator includes a plurality of switches, a capacitor, an amplifier, and a latch. The switches provide an input signal during a first period and provide a reference signal during a second period. A first switch among the switches is composed of a first transistor. The capacitor receives the input signal during the first period and receives the reference signal during the second period. The amplifier is coupled to the capacitor for receiving a difference voltage between the input signal and the reference signal and amplifies the difference voltage during the second period to generate an amplified result. The determining circuit provides a digital signal according to the amplified result. | 05-27-2010 |
20100182184 | ANALOG-TO-DIGITAL CONVERTER AND ELECTRONIC SYSTEM INCLUDING THE SAME - An analog-to-digital converter includes a first logic unit and a second logic unit. The first logic unit is configured to receive a plurality of thermometer codes and inverse thermometer codes generated based on an analog signal received by the analog-to-digital converter and to generate a plurality of first digital codes that periodically repeat the same pattern based on a transition position of a logic value in each of the thermometer codes and the inverse thermometer codes. The second logic unit is configured to receive the plurality of first digital codes and to generate a plurality of second digital codes based on logic values of a plurality of bits among all bits of each of the first digital codes. | 07-22-2010 |
20100188277 | SUCCESSIVE APPROXIMATION A/D CONVERTER - A successive approximation A/D conversion circuit for simultaneously sampling N channels of analog signals and for A/D converting the sampled analog signals, includes: N capacitive main DACs; a resistive sub DAC; N comparators; and a successive approximation control circuit, wherein the successive approximation control circuit determines high-order bit values of A/D conversion results of the N channels of analog signals by controlling the N capacitive main DACs and the N comparators, and determines low-order bit values of the A/D conversion results of the N channels of analog signals by controlling the resistive sub DAC and the N comparators. | 07-29-2010 |
20100214147 | ANALOG-DIGITAL CONVERTER - An analog-digital converter according to the present invention includes an input polarity switching unit, an integrator that integrates an input signal, an integrator output adjusting circuit that adjusts an output voltage of the integrator, a window comparator, and a controller that controls the input polarity switching unit, the integrator output adjusting circuit, and the window comparator, and generates a digital signal. When the output voltage of the integrator reaches a first reference voltage, the controller resets reference voltage of a high-voltage side comparator to a second reference voltage. Further, when the output voltage of the integrator reaches a third reference voltage, the controller resets reference voltage of a low-voltage side comparator to a fourth reference voltage. According to the analog-digital converter of the present invention, it is possible to prevent device breakdown and occurrence of through current due to fluctuation of the output voltage of the integrator. | 08-26-2010 |
20100321227 | Current Mode Analog-to-Digital Converter - A current-mode analog-to-digital converter includes: a current input node; a current-mode sample and hold circuit configured to output a steady source of electrical current having an analog value proportional to a sampled analog value of an electrical current at the current input node; and at least one current comparator that compares the electrical current output by the current-mode sample and hold circuit to at least one reference current to produce a digital representation of the sampled analog value of the electrical current at the current input node. | 12-23-2010 |
20110128177 | Apparatus and Methods Thereof for Reducing Energy Consumption for PWM Controlled Integrated Circuits in Vehicles - An apparatus, protocol and methods for reducing vehicle energy consumption and for precise electronic event control, by implementing full CPU off-loading, using pulse-width modulation (PWM) with analog feedback diagnosis enabling real-time operation. Accordingly, analog feedback is used for external integrated circuits (IC) controlled by a PWM output, for processes to be analyzed. The apparatus includes a microprocessor that integrates an autonomous PWM module and an analog-to-digital converter (ADC) group manager, each including register modules for enabling analog-to-digital signal conversion comparisons of PWM feedback data, and generating of an interrupt commands when required. | 06-02-2011 |
20110148683 | ANALOG-TO-DIGITAL CONVERTER - There is provided an analog-to-digital converter that comprises an analog signal input for receiving an analog signal; a reference voltage input for receiving a reference voltage signal; and a plurality of comparators, one input of each comparator being connected to the analog signal input, and the other input of each comparator being connected so as to receive a respective portion of the reference voltage signal; wherein at least one of the plurality of comparators can be selectively activated and deactivated in order to determine a mode of operation of the analog-to-digital converter. | 06-23-2011 |
20110169681 | COMPARATOR AND ANALOG-TO-DIGITAL CONVERTER - Increase of power consumption is reduced, and the operational speed is improved. A comparator includes a comparing section which outputs a result of comparison between a first voltage and a second voltage which constitute an input differential signal, a first positive feedback section which operates in synchronism with a first clock signal, amplifies the result from the comparing section, and outputs the amplified result to an output node pair, and a second positive feedback section which operates in synchronism with a second clock signal, and provides positive feedback to the output node pair. | 07-14-2011 |
20110205099 | SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER CIRCUIT - A successive approximation type A/D converter circuit includes a comparator circuit which determines which of an input analog voltage and a comparison voltage is larger, a register which successively takes in and stores a comparison result, and a local DA converter circuit which converts a register value into a voltage to generate the comparison voltage. The comparator circuit includes amplifier stages and a feedback capacitor connected to an input terminal of one of the amplifier stages, takes in an analog voltage during a first period, receives a input voltage depending on a potential difference between the analog and comparison voltages and amplifies the input voltage in the amplifier stage during a second period, and applies positive feedback to an input terminal of a corresponding amplifier stage via the feedback capacitor so as to impart a hysteresis of 1 LSB or less when an output of the comparator circuit changes. | 08-25-2011 |
20110234440 | AMPLIFYING CIRCUIT AND ANALOG-DIGITAL CONVERTING CIRCUIT INCLUDING SAME - An amplifying circuit includes a pair of MOS transistors; an amplifier that amplify a difference between potentials of differential output nodes coupled to drains of the pair of MOS transistors; cancel circuits that cause cancel current to flow to one of the differential output nodes when the amplifier amplifies a voltage between the differential output nodes and that shut off, after the amplifier performs the amplification operation, inflow of the cancel current; and a controller that performs setting so that a potential of first one of the differential input signals is equal to a potential of another one of the differential input signals, that compares, before the inflow of the cancel current, potentials generated at differential output nodes when the difference between potentials of the differential output nodes is amplified, and that sets the cancel current so that the potentials are reversed after the inflow of the cancel current. | 09-29-2011 |
20110285568 | ASYNCHRONOUS DIGITAL SLOPE ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF - The present invention is related to an analog to digital converter circuit. The circuit comprises at least one input node for applying an analog input voltage signal (V | 11-24-2011 |
20110291873 | DIFFERENTIAL AMPLIFIER AND PIPELINE A/D CONVERTER USING THE SAME - In a differential amplifier, input terminals to which a differential input is given are connected to gates of input transistors, respectively. One ends of capacitive devices are connected to sources of the input transistors, respectively. A switching section switches connection between the other ends of the capacitive devices and the input terminals according to a control clock at each phase. | 12-01-2011 |
20110309963 | SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER, METHOD OF CONTROLLING SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER, SOLID-STATE IMAGING DEVICE, AND IMAGING APPARATUS - A successive approximation type A/D converter includes: a reference signal generating section generating a reference signal; a comparator comparing an analog signal input thereto with the reference signal and converting the analog signal into a digital signal; and a control section controlling the reference signal to perform oversampling by executing an A/D conversion process on the analog signal at the comparator plural times such that the analog signal is A/D-converted into a digital value of N bits at the first A/D conversion process and such that the second and subsequent A/D conversion processes are performed starting with a lower bit of the (N−n)-th or lower order with upper n bits of the N-bit digital value obtained at the first A/D conversion process fixed. | 12-22-2011 |
20120026026 | ANALOG-TO-DIGITAL CONVERTER HAVING A SINGLE SET OF COMPARATORS FOR A MULTI-STAGE SAMPLING CIRCUIT AND METHOD THEREFOR - An analog to digital converter includes a first sample circuit that samples an analog input during a first phase of a clock. A second sample circuit samples the analog input during a second phase of the clock. A comparator compares a reference to the output of the first sample circuit during a non-overlapping time between an end of the first phase and beginning of the second phase and compares the reference to the output of the second sample circuit during a non-overlapping time between an end of the second phase and beginning of the first phase. The first sample circuit couples the sample of the analog input taken by the first sample circuit to the input of the comparator during the non-overlapping time between the end of the first phase and the beginning of the second phase and the second sample circuit couples the sample of the analog input taken by the second sample circuit to the input of the comparator during the non-overlapping time between the end of the second phase and the beginning of the first phase. | 02-02-2012 |
20120098691 | QUANTIZING CIRCUITS WITH VARIABLE PARAMETERS - Systems, methods, and devices for obtaining data from a data location. The method may include generating a first value by sensing a data location under a first condition and generating a second value by sensing the data location under a second condition. The method may further include combining the first value with the second value to identify data conveyed by the data location. | 04-26-2012 |
20120154194 | SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER HAVING AUXILIARY PREDICTION CIRCUIT AND METHOD THEREOF - The configurations and adjusting method of a successive approximation analog-to-digital converter (SAR ADC) are provided. The provided SAR ADC includes at least one capacitor with a first and a second terminals, and a plurality of bits, each of which is connected to the at least one capacitor, wherein the first terminal receives an input signal, and the second terminal selectively receives one of a first and a second reference voltages, and a first comparator receiving an adjustable third reference voltage and a first voltage value generated by the input signal, wherein a connection of the second terminal of each the capacitor of the capacitor array is switched when the first voltage value is larger than the third reference voltage. | 06-21-2012 |
20120182170 | Pipelined Recycling ADC with Shared Operational Amplifier Function - A pipelined recycling analog-to-digital converter (ADC), which converts a first analog input signal into a first digital output signal, including a first conversion stage and a second conversion stage is disclosed. The first conversion stage includes a first processing unit and a second processing unit. The first and the second processing units execute a number of conversion operations. For each conversion operation, an analog value and a digital code are generated by the first or the second processing unit. The first and the second processing units share an operational amplifier, and for each conversion operation. The second conversion stage includes a comparing unit which determines a specific analog value among the analog values generated by the first and the second processing units. When the specific analog value is not located within a predetermined range, the comparing unit generates a reset pulse to reset the operational amplifier. | 07-19-2012 |
20120235846 | APPARATUSES AND METHODS FOR REDUCING ERRORS IN ANALOG TO DIGITAL CONVERTERS - Successive approximation Analog-to-digital converters (ADCs) and related methods are disclosed. A successive approximation ADC includes a comparator with a comparator output and inputs coupled to a common model signal and a compare input. Control logic generates one or more control signals responsive to the comparator output. A capacitor array includes first sides of capacitors operably coupled to an array output. The capacitor arrays selectively couples each of second sides of the capacitors to an analog input signal and one or more input reference signals responsive to the one or more control signals. A voltage limiter is operably coupled between the array output and the compare input of the comparator and limits a voltage on the compare input to within a predefined range relative to the array output. The successive approximation ADC may also be configured differentially with a second comparator and a second voltage limiter. | 09-20-2012 |
20120268301 | Calibration Scheme for Resolution Scaling, Power Scaling, Variable Input Swing and Comparator Offset Cancellation for Flash ADCs - In one embodiment, a comparator of a Flash analog-to-digital converter (ADC) is calibrated in the background by switching the comparator to a feedback loop, determining the comparator's current reference level, and adjusting the comparator's reference level to a target reference level by charging a reference capacitor coupled the comparator. | 10-25-2012 |
20120306680 | CURRENT PROVIDING SYSTEM, ADC WITH THE CURRENT PROVIDING SYSTEM, AND CURRENT PROVIDING METHOD - A current providing system, for providing an output current, which comprises: a frequency detecting circuit, for receiving at least one input signal, and for detecting a frequency of the input signal; a frequency-controlled current providing circuit, for providing the output current according to the input signal frequency when the input signal frequency is in a first predetermined range; and a predetermined current providing circuit, for providing the output current with a first predetermined current value, when the input signal frequency is not in the first predetermined range. | 12-06-2012 |
20120319886 | HIGH SPEED RESISTOR-DAC FOR SAR DAC - A singled-ended, successive approximation register analog-to-digital converter convert an analog input voltage to a digital representation comprising m upper order bits and a number of lower order bits. The SAR ADC comprises SAR logic, a resistive network, multiple switches, and first and second LSB capacitors. The switches also comprises two sets of switches coupled to the resistive network, each set of switches is configured to couple a selected tap to each of the first and second LSB capacitors. When determining the lower order bits, the SAR logic is configured to control the sets of switches to change the first and second taps from one cycle in which one of the lower order bits is determined to a next cycle in which the next of the lower order bits is determined so that the voltage of both taps changes by a decreasing amount with each succeeding bit being determined. | 12-20-2012 |
20130002466 | FOLDED REFERENCE VOLTAGE FLASH ADC AND METHOD THEREOF - A folded reference voltage flash analog-to-digital (ADC) converter and a method thereof are provided. The flash ADC of the present invention determines the most significant bit (MSB) of an analog input signal, varies a reference voltage input to a plurality of comparators in accordance with the MSB determination result, and determines the remaining bits. Accordingly, input capacitance can be reduced while maintaining the size and power consumption of the ADC. | 01-03-2013 |
20130076550 | ANALOG-TO-DIGITAL CONVERTER - According to an embodiment, an analog-to-digital converter includes a voltage generating unit, and a plurality of comparators. The voltage generating unit is configured to divide a reference voltage by a plurality of variable resistors to generate a plurality of comparative voltages. Each of the plurality of comparator is configured to compare any one of the plurality of comparative voltages with an analog input voltage and output a digital signal based on a result of a comparison between the comparative voltage and the analog input voltage. Each of the plurality of variable resistors includes a plurality of variable resistive elements that are connected in series, and each of the plurality of variable resistive elements has a resistance value that is variably set according to an external signal. | 03-28-2013 |
20130135132 | ANALOG-TO-DIGITAL CONVERTER - The present invention provides an analog-to-digital converter, which comprises an integration circuit, a threshold signal generating circuit, a main comparison circuit, a sub comparison circuit, a counter, and a decoder. The integration circuit integrates an input signal and produces an integration signal. The threshold signal generating circuit generates a main threshold signal and a plurality of sub threshold signals. The main comparison circuit produces a plurality of main comparison signals according the integration signal and the main threshold signal. The sub comparison circuit produces a plurality of sub comparison signals according to the integration signal and the plurality of sub threshold signals. The counter counts the plurality of main comparison signals and produces a first counting signal. The decoder decodes the plurality of sub comparison signals and produces a second count signal. The first count signal and the second count signal are used for producing a digital signal. | 05-30-2013 |
20130135133 | Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof - The present invention provides an integration and analog to digital conversion circuit sharing common capacitors. The circuit comprises a capacitor array module, an integration circuit, and an analog to digital conversion (ADC) logic. The capacitor array module has a plurality of capacitors. The integration circuit is configured to integrate an analog signal by the capacitor array module. The ADC logic is configured to convert the output of the capacitor array module to a digital signal. | 05-30-2013 |
20130135134 | Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof - The present invention provides an integration and analog to digital conversion circuit sharing common capacitors. The circuit comprises a first capacitor array module, a second capacitor module, an integration circuit, an analog to digital conversion (ADC) logic. The first capacitor array module has a plurality of capacitors. The second capacitor array module has a plurality of capacitors. The integration circuit is configured to integrate an analog signal by said first or said second capacitor array module. The ADC logic is configured to convert the output of said first or said second capacitor array module to a digital signal. The ADC logic performs conversion by said first capacitor array module while said integration circuit performs integration by said second capacitor array module, and said ADC logic performs conversion by said second capacitor array module while said integration circuit performs integration by said first capacitor array module. | 05-30-2013 |
20130154865 | Method and System for Minimizing Variation of Converter Voltage Reference - A system for minimizing variation of a voltage reference includes a voltage reference generator and a power converter. The voltage reference generator is configured to generate a voltage reference from a supply voltage. The power converter, such as a flyback converter, is configured to supply an adjustable supply voltage to the voltage reference generator. The voltage reference generator generates the voltage reference from the adjustable supply voltage. | 06-20-2013 |
20130154866 | Method and System for Monitoring for Variation of Converter Voltage Reference - A method and system include a converter such as an analog-to-digital converter (“ADC”) and a controller. The converter is configured to receive a sensor signal, indicative of a physical measured quantity, and generate an output signal based on the sensor signal and the voltage reference. The converter is further configured to alternately receive a calibration voltage in lieu of the sensor signal and generate the output signal based on the calibration voltage and the voltage reference. The controller is configured to compare the output signal based on the calibration voltage and the voltage reference with an expected value of the output signal based on the calibration voltage and an assumed value of the voltage reference to detect variation of the voltage reference, and to compensate the output signal based on the sensor signal and the voltage reference as a function of the detected variation of the voltage reference. | 06-20-2013 |
20130229295 | AD (ANALOG-TO-DIGITAL) CONVERSION CIRCUIT, MICRO-CONTROLLER, AND METHOD OF ADJUSTING SAMPLING TIME - An AD (analog-to-digital) conversion circuit includes a capacitor array formed of a plurality of capacitors; a sample hold circuit configured to apply an analog input voltage input through an input terminal to the capacitor array so that the analog input voltage is accumulated in the capacitor array until a sampling time set is elapsed; a comparator circuit configured to sequentially retrieve the analog input voltage accumulated in each of the capacitors of the capacitor array, and to compare the analog input voltage with a reference voltage defined in advance to generate a digital signal; and a sampling time adjusting circuit configured to measure a period of time when a voltage on an input side of the sample hold circuit reaches a threshold value defined in advance relative to the reference voltage, and to set a time determined according to the period of time as the sampling time. | 09-05-2013 |
20130234875 | SIGNAL SENSING CIRCUIT - A signal sensing circuit converts a received current input into a voltage output and provides the voltage output to an analog-to-digital converter (ADC) to generate a digital output signal. The voltage output is associated with a circuit having a first reference impedance, and a reference voltage of the ADC is associated with a circuit having a second reference impedance, wherein the circuit having the first reference impedance and the circuit having the second reference impedance are formed by the same material, so that the ratio between the changes in the current input and the changes in the value of the digital output signal is a constant. | 09-12-2013 |
20130265184 | AUDIO DEVICE SWITCHING WITH REDUCED POP AND CLICK - This document discusses, among other things, apparatus and methods including an analog-to-digital controller (ADC) configured to receive an enable signal and to provide an ADC output signal to control logic, wherein the control logic is configured to provide a control voltage to a control input of a switch. In an example, the control voltage includes the ADC output signal when the ADC output signal is below a first threshold or above a second threshold. In certain examples, the control logic is configured to transition the control voltage from the first threshold to the second threshold when the ADC output signal is between the first and second thresholds. | 10-10-2013 |
20130271307 | System and Method for High Input Capacitive Signal Amplifier - In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block. | 10-17-2013 |
20130321190 | ANALOGUE-TO-DIGITAL CONVERTER - An apparatus and method for regulating analogue-to-digital converters. First and second input signals are received at controlled oscillator circuitry which generates respective first and second pulse streams with pulse rates based on the relevant input signal. Difference circuitry determines the difference in number of pulses of the first and second pulse streams and outputs a first digital signal. Circuitry also determines a signal independent value based on the number of pulses of the first and/or second pulse streams. In one embodiment this value is the sum or average of the number of pulses of the first and second pulse streams. This value can be used to calibrate for any variation in transfer characteristic of the oscillator circuitry. In one embodiment this value is compared to a reference value and a regulation signal passed to control circuitry to regulate the operation of the oscillation circuitry. | 12-05-2013 |
20140015702 | MIXED MODE ANALOG TO DIGITAL CONVERTER AND METHOD OF OPERATING THE SAME - An analog to digital converter in accordance with the inventive concept may include a reference voltage generation circuit outputting first and second reference voltages; a decompression part decompressing amplitude of an analog input signal and the first and second reference voltages; a flash ADC converting the decompressed analog input signal into a first digital signal with reference to the decompressed first and second reference voltages; and a successive approximation ADC converting the analog input signal into a second digital signal according to a successive approximation operation with reference to the first digital signal and the first and second reference voltages. | 01-16-2014 |
20140049416 | Analogue to Digital Converter - Measures are provided for performing direct radio-frequency to digital conversion. A radio-frequency input signal is compared with a plurality of reference voltages to generate a plurality of comparison signals, each comparison signal corresponding to one of the plurality of reference voltages. One or more of the plurality of generated comparison signals are first filtered to generate a first filtered signal. One or more of the plurality of generated comparison signals are second filtered to generate a second filtered signal. A digital output signal is generated at least on the basis of the first filtered signal and the second filtered signal. | 02-20-2014 |
20140062751 | ASYNCHRONOUS ANALOG-TO-DIGITAL CONVERTER HAVING RATE CONTROL - An apparatus is provided. A comparison circuit is configured to receive an analog signal. A reference circuit is coupled to the comparison circuit and is configured to provide a plurality of reference signals to the comparison circuit. A conversion circuit is coupled to the comparison circuit and is configured to detect a change in the output of the comparison circuit. A time-to-digital converter (TDC) is coupled to the comparison circuit. A timer is coupled to the comparison circuit. A rate control circuit is coupled to the conversion circuit. An output circuit is coupled to the rate control circuit and the TDC, where the output circuit is configured to output at least one of a synchronous digital representation of the analog signal and an asynchronous digital representation of the analog signal. | 03-06-2014 |
20140085122 | SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER - A successive approximation register analog-to-digital converter is provided which includes first and second capacitor arrays configured to generate first and second level voltages, respectively; a comparator configured to compare the first and second level voltages to output a comparison signal; SAR logic configured to generate a digital signal in response to the comparison signal; and a variable common mode selector configured to compare a first analog input voltage and a common mode voltage and to supply one of the first analog input voltage and the common mode voltage to top plates of the first and second capacitor arrays according to a comparison result. | 03-27-2014 |
20140085123 | APPARATUS, SYSTEM, AND METHOD FOR VOLTAGE SWING AND DUTY CYCLE ADJUSTMENT - Described herein are an apparatus, system, and method for compensating voltage swing and duty cycle of a signal on an input-output (I/O) pad of a processor by adjusting the voltage swing and duty cycle of the signal. The apparatus comprises a driver to transmit a signal on an I/O pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. Described herein is also an analog-to-digital (A2D) converter for measuring and/or calibrating various signal attributes including current, voltage, and time. | 03-27-2014 |
20140097978 | AD CONVERSION CIRCUIT, SEMICONDUCTOR DEVICE, AND AD CONVERSION METHOD - A reference voltage generator generates a reference voltage at the time of sampling a received input signal. A sampling time controller detects a change in the reference voltage. When the reference voltage rises to a determined threshold, the sampling time controller determines that sampling is completed, and generates a sampling clock in which sampling time is controlled on the basis of an external clock. | 04-10-2014 |
20140167998 | A/D CONVERTER, SOLID-STATE IMAGING DEVICE AND CAMERA SYSTEM - An A/D converter includes: plural comparators to which reference voltages as ramp waves different from each other are supplied, which are configured to compare the supplied reference voltages with an analog input signal; and plural latches arranged so as to correspond to the plural comparators, which are configured to count comparison time of the corresponding comparators, to stop counting when an outputs of the comparator is inverted and to store the count value, wherein the plural reference voltages are off set by an arbitrary voltage at the same time point. | 06-19-2014 |
20140232582 | ANALOG-TO-DIGITAL CONVERTER FOR A MULTI-CHANNEL SIGNAL ACQUISITION SYSTEM - An analog-to-digital converter (ADC) for a multi-channel signal acquisition system, a signal acquisition system, a method of generating a digital output code from an analog input signal, and a method of converting a plurality of analog signals to a digital signal are provided. The ADC comprises a sample-and-hold (S/H) circuit operable to receive an analog input signal for each input channel; a digital-to-analog converter (DAC) common to all input channels; a comparator for each input channel configured to receive an output signal from the S/H circuit of the respective input channel, and an output signal from the DAC, for generating a comparison result of the two signals at each conversion cycle of the comparator; and a successive approximation register (SAR) common to all input channels and configured to generate, for each input channel, a digital output code based on the comparison results received from the respective comparator. | 08-21-2014 |
20140266847 | BACKGROUND CALIBRATION OF ADC REFERENCE VOLTAGE DUE TO INPUT SIGNAL DEPENDENCY - Embodiments of the present invention may provide an analog-to-digital converter (ADC) system. The ADC system may include an analog circuit to receive an input signal and a reference voltage, and to convert the input signal into a raw digital output. The analog circuit may include at least one sampling element to sample the input signal during a sampling phase and reused to connect to the reference voltage during a conversion phase, and an ADC output to output the raw digital output. The ADC system may also include a digital processor to receive the raw digital output and for each clock cycle, to digitally correct reference voltage errors in the analog-to-digital conversion. | 09-18-2014 |
20140327562 | METASTABILITY DETECTION AND CORRECTION IN ANALOG TO DIGITAL CONVERTER - A method of operating an analog to digital converter (ADC) comprises comparing an analog input signal to a reference signal, using a comparator, and generating a comparator output according to the comparison, storing the comparator output in at least one memory unit, monitoring the stored comparator output to determine whether a difference between the analog input signal and the reference signal is within a predetermined range, and detecting a metastability error upon determining that the difference between the analog input signal and the reference signal is within a predetermined range. | 11-06-2014 |
20160056830 | ADAPTIVE DELAY BASED ASYNCHRONOUS SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER - An asynchronous SAR ADC converts an analog signal into a series of digital pulses in an efficient, low power manner. In synchronous SAR ADC circuits, a separate and cumbersome clock signal is used to trigger the internal circuitry of the SAR ADC. Instead of triggering the components of the SAR DAC synchronously with a clock signal, the asynchronous solution uses its own internal signals to trigger its components in an asynchronous cyclic manner. Further, in order to increase efficiency and guard against circuit failures due to difficulties arising from transient signals, the asynchronous SAR ADC may also include a delay circuit for introducing a variable delay to the SAR ADC cycle. | 02-25-2016 |
20160065230 | GAIN CALIBRATION OF ADC RESIDUE AMPLIFIERS - A device for gain calibration of an analog-to-digital converter (ADC) residue amplifier includes a digital-to analog converter (DAC) configured to convert a digital signal to an analog signal. The DAC includes a calibration capacitor that can be used in the gain calibration of the ADC residue amplifier. A flash ADC, including a plurality of comparators and an additional comparator, generates the digital signal. The additional comparator provides a threshold voltage approximately in a middle point of a nominal subrange. The nominal subrange comprises a portion of a voltage range corresponding to threshold voltages of two adjacent comparators of the plurality of comparators. | 03-03-2016 |
20160065232 | EXCESS LOOP DELAY COMPENSATION (ELC) FOR AN ANALOG TO DIGITAL CONVERTER (ADC) - In one embodiment, a circuit includes a quantizer configured to convert an analog input signal to a digital signal. The quantizer includes a first feedback path including a first digital to analog converter (DAC) coupled from an output of the quantizer to a summing junction that is coupled to an input of the quantizer. The first feedback path converts the digital signal to a first corresponding analog value for combining with the analog input signal at the summing junction. Also, the quantizer includes a plurality of excess loop delay (ELD) compensation paths coupled to the summing junction configured to compensate for excess loop delay from a second feedback path coupled from the output of the quantizer to input of the quantizer via a loop filter. Second DACs in the second feedback path convert the digital signal to a second corresponding analog value for combining with the analog input signal. | 03-03-2016 |