| Entries |
| Document | Title | Date |
|---|
| 20080197916 | Low-Voltage Noise Preventing Circuit Using Abrupt Metal-Insulator Transition Device - Provided are a low-voltage noise preventing circuit using an abrupt metal-insulator transition (MIT) device which can effectively remove a noise signal with a voltage less than a rated signal voltage. The abrupt MIT device is serially connected to the electrical and/or electronic system to be protected from the noise signal, and is subject to abrupt MIT at a predetermined voltage. Accordingly, low-voltage noise can be effectively removed. | 08-21-2008 |
| 20080197917 | Device For Filtering A Signal And Corresponding Method - A device for filtering a signal delivered as output from a sensor installed in a motor vehicle includes a comparator (A) offering as output a first logic signal (S | 08-21-2008 |
| 20080197918 | ELECTRONIC APPLIANCE, COMMUNICATION CONDITION SETTING DEVICE, COMMUNICATION CONDITION SETTING METHOD AND COMPUTER PROGRAM - An electronic appliance having a communication function conforming to a wide band wireless communication system is disclosed. The electronic appliance includes: an EMI pattern information storage part configured to store EMI (electromagnetic interference) pattern information unique to the electronic appliance itself or EMI pattern information unique to an electronic appliance of the same type; an EMI standard value information acquiring part configured to acquire EMI standard value information valid in a relevant nation or region based on location information of the electronic appliance itself; and a communication condition setting part configured to set a communication condition relating to a wide band wireless communication based on the result of comparison between the acquired EMI standard value information and the EMI pattern information. | 08-21-2008 |
| 20080204126 | COMMON MODE NOISE REDUCTION USING PARASITIC CAPACITANCE CANCELLATION - A negative capacitance is developed by configuring an inductor as two inversely or opposingly coupled windings having different numbers of turns and connecting a capacitance to a center tap between the two windings. The negative capacitance is developed on the side of the inductor having the winding with the greater number of turns. The negative capacitance so developed may advantageously be used to cancel any capacitance or parasitic capacitance desired for reducing power loss, increasing switching speed or reducing or eliminating common mode noise in a swiched circuit such as a switched power converter. | 08-28-2008 |
| 20080204127 | Method for Ultimate Noise Isolation in High-Speed Digital Systems on Packages and Printed Circuit Boards (PCBS) - Improved noise isolation for high-speed digital systems on packages and printed circuit boards is provided by the use of mixed alternating impedance electromagnetic bandgap (AI-EBG) structures and a power island configured to provide ultimate noise isolation. A power island is surrounded by a plurality of mixed AI-EBG structures to provide a power distribution network. In this structure, the gap around the power island provides excellent isolation from DC to the first cavity resonant frequency which is determined by the size of the structure and dielectric material. One AI-EBG structure provides excellent isolation from the first cavity resonant frequency of around 1.5 GHz to 5 GHz. The other AI-EBG structure provides excellent noise isolation from 5 GHz to 10 GHz. Through use of this novel configuration of AI-EBG structures, a combination effect of the hybrid AI-EBG structure provides excellent isolation far in excess of 10 GHz. The AI-EBG structure is a metallic-dielectric EBG structure that comprises two metal layers separated by a thin dielectric material (similar to power/ground planes in packages and PCBs). However, in the AI-EBG structure, only one of the metal layers has a periodic pattern which is preferably a two-dimensional rectangular lattice with each element consisting of a metal patch with four connecting metal branches. | 08-28-2008 |
| 20080224762 | Noise reduction for switched capacitor assemblies - An integrated circuit comprises an assembly of switched capacitors operated under control of a system clock signal. It further comprises a signal driver for generating a binary output signal at an output pad. The system clock signal is suppressed for a certain time period after each transition of the output signal, thereby preventing voltage droop generated by the transition to introduce noise in the signals of the assembly of switched capacitors. | 09-18-2008 |
| 20080231353 | Ultra fast circuitry for digital filtering - The invention includes a novel differentiator cell, a novel resample unit cell, and precision synchronization circuitry to ensure proper timing of the circuits and systems at the anticipated ultra-high speed of operation. The novel differentiator cell includes circuitry for combining a carry input signal, a data bit signal and the output signal of a NOT cell and applying the signals as distinct and separate pulses to the input of a toggle flip-flop (TFF) for producing an asynchronous carry output and a clocked data output. The novel differentiator cells can be interconnected to form a multi-bit differentiator circuit using appropriate delay and synchronization circuitry to compensate for delays in producing the carry output of each cell which is applied to a succeeding cell. The novel resample cell includes a non-destructive reset-set flip-flop (RSN) designed to receive a data bit, at its set input, at a slow clock rate, which data is repeatedly read out of the RSN at a fast clock rate, until the RSN is reset. The novel differentiator and resampler cells can be interconnected, for example, to form the differentiator and up-sampling sections of a digital interpolation filter (DIF). Also, the relative clocking of bit slices (columns) in such a DIF may be achieved by using the fast clock signal to synchronize the slow clock which controls data entry. The circuits of the invention can be advantageously implemented with Josephson Junctions in rapid-single-flux-quantum (RSFQ) logic. | 09-25-2008 |
| 20080238537 | METHODS AND SYSTEMS FOR DRIVER NOISE REDUCTION IN A MEMS GYRO - Systems and methods for reducing driver noise in a MicroElectro-Mechanical Systems (MEMS) gyroscope system are disclosed. An example system includes motor drivers, two proof masses, two substrate electrodes, two motor drive capacitors, and two stationary capacitors. The motor drivers drive the proof masses through the motor driver capacitors. The stationary capacitors output a signal based on the drive signal from the motor drivers. A differential amplifier receives a sense signal from the proof masses and a noise signal from the stationary capacitors, and subtracts the noise signal from the rate sense signal, thereby producing a sense signal with reduced driver noise. | 10-02-2008 |
| 20080272837 | METHOD AND APPARATUS FOR REDUCING INTERFERENCE - A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another. | 11-06-2008 |
| 20080278227 | SQUELCH DETECTION SYSTEM FOR HIGH SPEED DATA LINKS - An apparatus comprising a first comparator circuit, a second comparator circuit, a third comparator circuit, and a difference circuit. The first comparator circuit may be configured to generate a first intermediate current in response to a first input voltage and a second input voltage. The second comparator circuit may be configured to generate a second intermediate current in response to the first input voltage and the second input voltage. The third comparator circuit may be configured to generate an intermediate reference current in response to a first reference voltage and a second reference voltage. The difference circuit may be configured to generate a first compare voltage and a second compare voltage in response to the first intermediate current, the second intermediate current, and the intermediate reference current. The apparatus may indicate a squelch condition when the first compare voltage is greater than the second compare voltage. | 11-13-2008 |
| 20080278228 | CONTROL DEVICE WITH A SWITCHABLE BANDWIDTH - A control device with a switchable bandwidth including: an integrating element with a first capacitance, which is charged and discharged by at least one current; at least one second capacitance, which can be connected in parallel with the first capacitance via a first switch; and at least one voltage follower, via which the voltage present at the first capacitance can be fed to the second capacitance. In this case, the first switch is open if the voltage present at the first capacitance is fed to the second capacitance by means of the voltage follower. The first switch is closed if the second capacitance is connected in parallel with the first capacitance. The invention enables a further capacitance to be supplementarily connected without a disturbance signal arising. | 11-13-2008 |
| 20080309400 | SWITCHES WITH PASSIVE BOOTSTRAP - Switches with passive bootstrap that can achieve good sampling performance are described. In one design, a sampling circuit with passive bootstrap includes first and second filters and a switch. The first filter filters an input signal and provides a filtered input signal. The second filter filters a clock signal and provides a filtered clock signal. The switch receives a control signal formed based on the filtered input signal and the filtered clock signal and either passes or blocks the input signal based on the control signal. The first filter may be a lowpass filter having a first corner frequency that is higher than the bandwidth of the input signal. The second filter may be a highpass filter having a second corner frequency that is lower than the fundamental frequency of the clock signal. The first and second filters may both be implemented with one resistor and one capacitor. | 12-18-2008 |
| 20090002065 | Buffer circuit for reducing differential-mode phase noise and quadrature phase error - According to one exemplary embodiment, a buffer circuit for reducing differential-mode phase noise and quadrature phase error comprises first and second switching branches driven by an in-phase (I) signal, third and fourth switching branches driven by a quadrature-phase (Q) signal, the first and second switching branches and third and fourth switching branches being coupled to a common bias current source to reduce the differential-mode phase noise and quadrature phase error at an output of the buffer circuit. In one embodiment, the switching branches may be loaded by first, second, third, and fourth resonators formed, for example, by L-C circuits tuned to a local oscillator frequency. In one embodiment, the buffer circuit may comprise switching branches formed by FETs, and be used in conjunction with a local oscillator and mixer circuits to down-convert a radio frequency (RF) signal, in a receiving system, for example. | 01-01-2009 |
| 20090021295 | Dual reactive shunt low noise amplifier - A dual reactive shunt feedback low noise amplifier design may include a transconductance amplifier having a capacitor coupled across it and a pair of coupled inductors coupled across it. In one embodiment, the coupled inductors may be laid out as two overlapping coils. | 01-22-2009 |
| 20090039953 | ASYNCHRONOUS ABSORPTION CIRCUIT WITH TRANSFER PERFORMANCE OPTIMIZING FUNCTION - A selector is provided so that any one of a plurality of asynchronous absorption paths can be selected when it is assumed that operating frequencies of preceding and succeeding clock domains vary depending on the application. By an operation of a selector control circuit based on, for example, information about a ratio of preceding and succeeding clock frequencies that is set in a frequency-ratio register, an asynchronous absorption path that is optimal to a frequency-dependent process required for asynchronous absorption, such as pulse expansion or the like, is selected. | 02-12-2009 |
| 20090072895 | SIGNAL PROCESSING WITH INTERFERENCE COMPENSATION - A processor reduces periodic interference signal components in an input signal to obtain a desired signal. The desired signal has a predefined characteristic during an interval of time. First, an interference-representing signal (S | 03-19-2009 |
| 20090096514 | METHOD AND APPARATUS FOR PROVIDING CANCELLATION OF HARMONICS SIGNALS WITH MODULATED SIGNALS FOR MULTI-CHANNELS - A device and method for canceling or attenuating harmonics noise without distorting the incoming signal. An exemplary device includes the use of an estimation loop to generate an artificial signal to eliminate or attenuate the influence of harmonics. The estimation loop includes a mixer adapted to produce a mixed signal by processing or combining the incoming signal and the artificial signal. The estimation loop includes an error detector, a low-pass filter, a parameter estimator, and a numerically controlled oscillator. The parameter estimator produces information relating to the phase, frequency, and amplitude of an incoming harmonics spur and will be used by the numerically controlled oscillator to generate the artificial signal. If the mixed signal contains relatively low levels of harmonics residuals, the mixed signal is produced at the output in lieu of the incoming signal. | 04-16-2009 |
| 20090102545 | SIGNAL PROCESSING METHOD AND SIGNAL PROCESSING APPARATUS - An input signal (Vin) is divided into n (≧3) number of divided signals which are weighted by first weights (ki). The weighted divided signals are processed by n number of signal processing means | 04-23-2009 |
| 20090108925 | LOW POWER ON-CHIP GLOBAL INTERCONNECTS - An apparatus including a first circuit, a second circuit and a third circuit. The first circuit may be configured to (a) receive (i) a plurality of input signals and (ii) a clock signal and (b) present (i) a plurality of low-swing differential signals and (ii) a full-swing differential signal. The second circuit may be configured to (a) receive (i) the plurality of low-swing differential signals, (ii) the full-swing differential signal and (iii) the clock signal and (b) present a plurality of output signals. The third circuit may be configured to communicate the plurality of low-swing differential signals and the full-swing differential signal from the first circuit to the second circuit. The third circuit may be further configured to generate a local clock in response to the full-swing differential signal. | 04-30-2009 |
| 20090121785 | DEVICE AND METHOD FOR REDUCING INPUT NOISE - A device and a method for reducing input noise providing at least a microcontroller. The microcontroller comprises: at least a noise reduction device, at least an analog switch and at least a signal output unit. The noise reduction device connected to the ground or a voltage is turned on to charge or discharge a stray capacitor existing on a turned off analog switch so that the amount of charge stored in the stray capacitor is zero or a specific value. Thereby, the noise in a touch switch is reduced and the cost of layout on the PCB is saved. | 05-14-2009 |
| 20090153238 | METHOD AND SYSTEM FOR REDUCING A DYNAMIC OFFSET DURING THE PROCESSING OF ASYMMETRIC SIGNAL STRINGS - The invention relates to a method and a system for reducing a dynamic offset during the processing of asymmetric signal strings. The aim of the invention is to provide a method and a system for reducing a dynamic offset which allows to reduce any disturbing influence on subsequent process steps. According to the invention, this aim is achieved by a discharge of the capacity in every no-pulse period by a value depending on the value of the amplitude of the voltage of the high-pass structure on the input side. | 06-18-2009 |
| 20090153239 | VARIABLE-IMPEDANCE GATED DECOUPLING CELL - Embodiments of the present invention provide a system that controls noise in a power system that includes a power rail and a ground rail. The system includes a MOS transistor coupled in series with a decoupling capacitor between the power rail and the ground rail and an inductive packaging connection coupled to the power rail in parallel with the MOS transistor and the decoupling capacitor. The combination of MOS transistor, decoupling capacitor, and inductive packaging connection form a resonant circuit. During operation, the system determines if there is noise in a V | 06-18-2009 |
| 20090160543 | NOISE PROTECTOR - A noise protector includes a first noise control block for NORing an input signal and a first trimmed input signal and providing an output; a second noise control block for NANDing the input signal and a second trimmed input signal and providing an output; and an output signal generation block for outputting an output signal removed of noise in response to the outputs of the first noise control block and the second noise control block. | 06-25-2009 |
| 20090179695 | APPARATUS AND METHOD HAVING REDUCED FLICKER NOISE - Different techniques for signal processing having reduced flicker noise are described herein. | 07-16-2009 |
| 20090195303 | Method of Reducing Common Mode Current Noise in Power Conversion Applications - A transformer and filter circuit for reducing common mode noise current in isolated power conversion circuits, comprising a series connection of: a first transformer having an N:1 turns ratio, a common mode current filter, and a second transformer having a 1:M turns ratio. The overall effect being a transformer with N:M turns ratio and with low capacitive coupling from the primary N turns to the secondary M turns thus providing a high impedance to common mode currents crossing the isolation. The series connection of two transformers allows one to be bridged with additional common mode filter components without significant reduction in isolation impedance. | 08-06-2009 |
| 20090231027 | DIGITAL TUNING CIRCUIT OF GM-C FILTER - Provided is a tuning circuit of a G | 09-17-2009 |
| 20090237153 | HIGH ORDER CONTINUOUS TIME FILTER - There is described a continuous time filter of at least a second (or higher) order, comprising one or more first order filter stages of a first type, the or each first order filter stage of the first type comprising a reactive component and an impedance dependent on the difference between the input and output voltages of the filter stage. The filter includes at least one first order filter stage of a second type, the or each second order filter of the second type comprising a reactive component and an impedance dependent on the sum of the input and output voltages of the filter stage. The filter includes a transfer function of the continuous time filter that is obtained comprising complex poles. | 09-24-2009 |
| 20090273392 | METHODS AND APPARATUS FOR REDUCING NON-IDEAL EFFECTS IN CORRELATED DOUBLE SAMPLING COMPENSATED CIRCUITS - Embodiments of the present invention address kT/C noise, sampled high frequency operational amplifier noise, and charge injection errors sampled on switching capacitors and introduced due to internal switching. Correlated double sampling compensates for DC offset and low frequency operational amplifier noise, and the use of fake integration and a capacitor divider eliminate or significantly reduce kT/C noise, sampled high frequency operational amplifier noise, and charge injection errors. | 11-05-2009 |
| 20090278593 | Semiconductor circuit board and semiconductor circuit - The present invention is intended to efficiently implement noise countermeasures for a semiconductor circuit board and for a semiconductor circuit. The present invention is constituted by a control substrate, and a semiconductor circuit connected to the control substrate. The semiconductor circuit includes a substrate, an integrated circuit group, and a noise countermeasure, and is separated from the control substrate. The integrated circuit group includes an integrated circuit as a noise source. The substrate has a stacked multilayer structure, and shifts the frequency of a noise generated by the integrated circuit group to the high frequency side. The noise countermeasure is connected between the integrated circuit group and the control substrate. The noise countermeasure is a filter for attenuating the high frequency of a noise. | 11-12-2009 |
| 20090295470 | FAST TURN ON ACTIVE DCAP CELL - A fast active DCAP cell which has a short turn-on time, achieves a high capacitance density, and which minimizes leakage overhead during its normal operation mode is disclosed. The DCAP cell has a pair of PMOS transistors that have their drains connected to a gate of a PMOS transistor and their sources connected to the VDD rail. The drain and source of the PMOS transistor are connected to the VSS rail. Likewise, the DCAP cell has a pair of NMOS transistors that have their drains connected to a gate of an PMOS transistor and their sources connected to the VSS rail. The drain and source of the PMOS transistor are connected to the VDD rail. None of the gates of the transistors is connected to the VDD or VSS rail. This protects the gate oxide from being damaged by ESD surge currents. | 12-03-2009 |
| 20090295471 | Method for Compensating the Non-Linear Distortions of High-Frequency Signals and Device for Carrying Out Said Method - The present invention refers to a method for compensating the non-linear distortions of high-frequency signals, especially when observing the amplitude modulated signals with narrow band receiver. The invention refers also to a device to carry out the said method. In the invention it is supposed that the ratio between the frequency f | 12-03-2009 |
| 20090302932 | Feeding Arrangement for an Ultrasonic Device - The invention relates to a powerful 3-point inverter that is triggered by a pulse width modulator ( | 12-10-2009 |
| 20100007409 | Method and Related Device for an Adjustable Leading Edge Blanking Device in a Power Supply Device - A method for an adjustable leading edge blanking device in a power supply device includes generating a detection signal according to a leading edge and a trailing edge of a spike signal, generating a blanking signal according to the detection signal, for blanking the spike signal between the leading edge and the trailing edge, and controlling output states of the power supply device according to the blanking signal. | 01-14-2010 |
| 20100019838 | SPIKE NOISE ELIMINATING CIRCUIT, DIGITAL SYSTEM USING THE SAME, AND IIC BUS - There is provided a spike noise eliminating circuit that can eliminate reliably spike noise having a predetermined pulse width or smaller and transmit and output precisely a signal having a pulse width larger than the predetermined width. Spike noise in the input signal is eliminated by: detecting a coincidence in level of the input signal and a first delay signal obtained by delaying the input signal by a maximum pulse width of noise to be eliminated as a delay amount; and sampling the input signal or a second delay signal obtained by delaying the input signal by a certain period of time based on a signal obtained as a result of detecting the coincidence in level. | 01-28-2010 |
| 20100026383 | DIRECT CURRENT (DC) OFFSET CORRECTION USING ANALOG-TO-DIGITAL CONVERSION - Techniques for reducing or eliminating DC (direct current) offset in transmitters are disclosed. An apparatus for DC offset reduction may include a converter, a digital engine, and a plurality of programmable current supplies. The converter is configured to provide digital representations of a plurality of DC currents associated, respectively, with a plurality of differential signal legs. The digital engine is configured to receive the digital representations and to produce instructions for generating compensating currents for the plurality of differential signal legs based on comparisons, respectively, between each of the digital representations and a calibration current. The programmable current supplies correspond, respectively, to the differential signal legs. The current supplies are configured to inject the compensating currents into the differential signal legs, respectively, to reduce DC offset between the differential signal legs, based upon the instructions. The instructions allow one-shot DC offset correction, instead of successive approximation for DC offset correction. | 02-04-2010 |
| 20100073080 | AUTOMATIC GAIN CONTROL CIRCUIT AND METHOD FOR AUTOMATIC GAIN CONTROL - An automatic gain control circuit and method for stably maintaining received power in a mobile Internet system is disclosed. An efficient automatic gain control circuit structure is provided which uses no separate analog circuit elements in a process of detecting the level of a received signal. Therefore, it is possible to reduce a complexity of hardware, the size of the automatic gain control circuit and a manufacturing cost. Further, an automatic gain control (AGC) unit, which is made in a Fluctuating Gunn-Peterson Approximation (FGPA) type, performs an automatic gain control simply by referring to a lookup table based on the level of a received signal. Therefore, the present automatic gain control circuit can not only be more simply designed or modified than a conventional automatic gain control circuit, but also stabilize the level of the received signal simply without periodically checking the level of the received signal for the automatic gain control. | 03-25-2010 |
| 20100097131 | HARDENING OF SELF-TIMED CIRCUITS AGAINST GLITCHES - Multiple techniques are disclosed for hardening a self-clocking circuit against glitches. Glitch filters are placed in some portions of a digital design. In some embodiments the glitch filter is dynamically tunable. In one embodiment the inputs are locked out by the outputs. Methods for evaluating code symbols are presented, as is a circuit for differential signaling. | 04-22-2010 |
| 20100097132 | Systems and Methods for Filtering Signals Corresponding to Sensed Parameters - Systems and methods for filtering analog signals corresponding to sensed parameters are provided. In this regard, a representative method includes: sampling the analog signal to acquire a sequential series of data points; determining a first cumulative change in value with respect to a first of the data points relative to at least two subsequent data points in the series, the subsequent data points including a second of the data points; determining a second cumulative change in value with respect to the second of the data points relative to at least two data points adjacent to the second of the data points in the series, the at least two adjacent data points including an immediately preceding and an immediately succeeding one of the data points relative to the second of the data points; comparing the first cumulative change and the second cumulative change to respective data thresholds; and outputting a filtered analog signal based, at least in part, on results of the comparing. | 04-22-2010 |
| 20100097133 | Signal Processing - An iterative method for generating a series of output signal values from a series of input signal values is described. Iterations of the method comprise the steps of obtaining a current input signal value for the current iteration, comparing the current input signal value with an output signal value determined in a previous iteration, updating a counter value determined in the previous iteration based on the result of the comparison between the current input signal value and the previous output signal value such that the updated counter value replaces the counter value determined in the previous iteration, determining a slew value based on the counter value; and adding the slew value to the previously determined output signal value to generate a new current output signal value. Thus different slew values may be added to the previous output signal to obtain a new output signal. The counter value is updated so that its value reflects recent trends in the input signals. E.g. if the input signal is on an upward trend, the counter value may achieve a relative high value, for example because it is incremented each time an input signal exceeds a previously determined output signal. The magnitude of the slew values may increase as the counter value increases, thereby allowing the output signals to more rapidly track changes in the input signals. | 04-22-2010 |
| 20100102876 | METHOD AND APPARATUS FOR REDUCING INTERFERENCE - A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another. | 04-29-2010 |
| 20100102877 | METHOD AND APPARATUS FOR REDUCING INTERFERENCE - A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another. | 04-29-2010 |
| 20100117722 | SYSTEM AND METHOD FOR ATTENUATION OF ELECTRICAL NOISE - The Present Invention relates to methods and systems particularly useful in electrical products used to monitor and detect very weak signals. These products include, for example, night vision binoculars and remote listening devices. More specifically, the methods and systems of the Present Invention provide a signal conditioning technique that attenuates electrical noise generated within the product while at the same time preserving the integrity of the input signal. This provides a high signal-to-noise ratio within the product electronics and a dramatically clear final image. The Present Invention includes a method and system for chopping or splitting an input signal into two components, tagging each of the split signal components with opposite polarities, and a second reverse chopping step that combines the split and tagged input signal components into a restored input signal. The combining step, in addition to restoring the original input signal, cancels and attenuates internally generated, and untagged, electronic noise, providing image quality and detection in an efficient and economical manner that could not be obtained in the past. | 05-13-2010 |
| 20100127767 | Integrated Circuit Device Including Noise Filter - An integrated circuit (IC) device is provided. The IC device includes a detector configured to detect an abnormal condition of the IC device and to generate a detection result as an attack signal, and a noise filter configured to filter out the attack signal as noise and to generate a filtered attack signal. The noise filter is configured to filter out the attack signal as noise when the attack signal is not maintained at a first logic level for a reference period and to generate the filtered attack signal when the attack signal is maintained at the first logic level for the reference period. | 05-27-2010 |
| 20100134183 | SEMICONDUCTOR DEVICE HAVING ELECTRODE PAD, AND WIRELESS CIRCUIT DEVICE INCLUDING THE SEMICONDUCTOR DEVICE - A semiconductor device includes a layered region ( | 06-03-2010 |
| 20100156523 | ARRANGEMENT STRUCTURE OF ELECTROMAGNETIC BAND-GAP FOR SUPPRESSING NOISE AND IMPROVING SIGNAL INTEGRITY - An electromagnetic-wave suppression structure in a multilayer PCB or package structure is supplied with a power to be used therein by a power distribution network including a power plane and a ground plane. The multilayer PCB and package includes: an electromagnetic-wave suppression structure including an electromagnetic band-gap; and the electromagnetic-wave suppression structure is formed at a specific portion(s) of the power plane and/or the ground plane to suppress noises. | 06-24-2010 |
| 20100182077 | DISCRETE FILTER, SAMPLING MIXER AND WIRELESS DEVICE - A sampling filter of such circuitry as not requiring a high frequency REF signal even if the number of decimation is decreased. In the sampling filter, the rotate capacitor in each switched capacitor circuit including Cr ( | 07-22-2010 |
| 20100207689 | NOISE SUPPRESSION DEVICE, ITS METHOD, AND PROGRAM - A noise suppression device includes: conversion means which converts an input signal into a frequency region signal for each predetermined first frame; frame generation means which generates a second frame which is different from the first frame; representative frequency region signal generation means which generates a representative frequency region signal from the frequency region signal of the first frame contained in the second frame; and noise suppression degree calculation means which obtains a noise suppression degree of the second frame according to the representative frequency region signal. | 08-19-2010 |
| 20100219882 | CIRCUIT ARRANGEMENT WITH INTERFERENCE PROTECTION - A circuit arrangement with an interference protection is disclosed, including a supply line and a ground line, a first circuit and a second circuit. Each of the first and second circuit is connected to the supply line and to the ground line. The circuit arrangement also includes a blocking device coupled to at least the supply line to suppress any interfering signals from being applied to the supply line. | 09-02-2010 |
| 20100237934 | METHOD FOR REDUCING LOW FREQUENCY NOISE OF TRANSISTOR - A method for reducing low frequency noise of a transistor operable at cryogenic temperatures includes a first step in which the transistor is illuminated with a light in a state that the transistor is activated and flowed current by supplying a power at a predetermined temperature, and a second step in which the transistor is operated at the predetermined temperature after the illumination of the light. | 09-23-2010 |
| 20100259318 | SENSOR DEVICE WITH REDUCED PARASITIC-INDUCED ERROR | 10-14-2010 |
| 20100283536 | SYSTEM, APPARATUS, METHOD AND PROGRAM FOR SIGNAL ANALYSIS CONTROL, SIGNAL ANALYSIS AND SIGNAL CONTROL - A signal analysis control system is provided with a signal analyzing section for analyzing signals inputted to a transmission section and generating analysis information, and a signal control section for controlling signals inputted to a receiving section by using the analysis information. | 11-11-2010 |
| 20100321103 | REFERENCE SIGNAL GENERATOR CIRCUIT FOR AN ANALOG-TO-DIGITAL CONVERTER OF A MICROELECTROMECHANICAL ACOUSTIC TRANSDUCER, AND CORRESPONDING METHOD - A reference signal generator circuit for an analog-to-digital converter, the circuit having a signal-generation stage to generate a first reference signal on a first reference terminal, and a filtering circuit arranged between the generator stage and the analog-to-digital converter to determine a filtering of disturbance present on the first reference signal and supply at output on a second reference terminal a second filtered reference signal, the filtering circuit having a switching circuit to connect the first reference terminal to the second reference terminal directly during startup of the reference signal generator circuit and then through the filtering circuit once the startup step is terminated. | 12-23-2010 |
| 20100327963 | Active Snubbers Providing Acceleration, Damping, and Error Correction - An active snubber operates, in part, to compel switching components, such as switch-mode power supplies and converters, to attain desired values rapidly, albeit temporarily, during which time there is sufficient time for a power supply's internal regulation system to sustain these values independently. The invention can dampen ringing, accelerate response time, and correct erroneous responses of the output of the switching converter. In one embodiment, the active snubber, which is operably connected to the output of a switching component that has a switching or ringing frequency, f | 12-30-2010 |
| 20100327964 | Semiconductor device and method of removing semiconductor device noise - A semiconductor device includes: a noise detecting circuit; an input signal delaying circuit; and a mask circuit. The noise detecting circuit detects noise superimposed on an input signal and outputs a mask signal during a predetermined time period. The input signal delaying circuit delays the input signal and outputs a delay signal thereof. The mask circuit outputs an output signal in which the delay signal is masked based on the mask signal. | 12-30-2010 |
| 20110006839 | CIRCUIT PROVIDING COMPENSATED POWER FOR SENSE AMPLIFIER AND DRIVING METHOD THEREOF - The present invention discloses a circuit providing a power for a sense amplifier that stabilizes a power voltage supplied to the sense amplifier by compensating a noise generated in the power voltage when the sense amplifier operates with an selectively generated decoupling noise. The circuit providing a power for a sense amplifier includes a sense amplifying circuit sensing and amplifying data loaded on a bit line with a first power. A power supplying unit provides the first power to the sense amplifying circuit. A decoupling unit generates a decoupling noise with a second power and provides the decoupling noise to the first power voltage. The decoupling noise is maintained for a period including a time point of an operation of the sense amplifying circuit and a predetermined time thereafter. | 01-13-2011 |
| 20110018622 | Simple noise control method - The Simple Noise Control Method is a method used to eliminate all noise from a pulsed signal. By subjecting the pulsed signal to a band pass filter and duration filter based on simple, low cost and widely available timers, counters and logic gates or equivalents, any noise in the pulsed signal which have different frequencies or durations than the signal can be removed with very high certainty. | 01-27-2011 |
| 20110037514 | Method for the Elimination of Ringing of Power Line Interference Filter - The present invention discloses a method for the removal of power line interference (PLI) to the signal parts of which are abrupt. First, to the non-abrupt part of the original input signal, we pass it to the notch filter, and get the output as the system output. Then, to the abrupt part, we subtract previous output from the original input signal; and add a straight line, connecting the starting and end of previous output, to the result of the subtraction to get the input of the notch filter. After processing of the notch filter, we add previous output to current output of the notch filter; and subtract the straight line as before from the sum to get the output of this step. We repeat this processing several times. During the detection of electrocardiogram (ECG), 50/60 Hz power line interference conceals the subtle changes in the original ECG, which affects the diagnosis. When the linear time-invariant (LTI) notch filter is used to the suppression of PLI, it usually causes ringing after the QRS complex, which affects the measurement of the Ventricular Late Potential and so on. The present invention uses the starting and end points of the QRS complex to process the input and output signal of the notch filter, so it is able to suppress PLI as well as to avoid the generation of the ringing. | 02-17-2011 |
| 20110050332 | SIGNAL REPRODUCING DEVICE - The purpose is to detect minute electrical signals embedded in noise with a simple device configuration and easily reduce the area of the device by utilizing a semiconductor device in particular. This signal reproducing device ( | 03-03-2011 |
| 20110057720 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data. | 03-10-2011 |
| 20110057721 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data. | 03-10-2011 |
| 20110057722 | SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data. | 03-10-2011 |
| 20110080211 | Systems and Methods for Noise Reduced Data Detection - Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide noise reduced data processing circuits. Such circuits include a selector circuit, a sample set averaging circuit, and a data detection circuit. The selector circuit provides either a new sample set or an averaged sample set as a sample output based on a select control signal. The sample set averaging circuit receives the new sample set and provides the averaged sample set. The averaged sample set is based upon two or more instances of the new sample set. The data detection circuit receives the sample output, and performs a data detection algorithm on the sample output and provides the select control signal and a data output. | 04-07-2011 |
| 20110095815 | NOISE REDUCTION CIRCUIT AND SEMICONDUCTOR DEVICE PROVIDED WITH NOISE REDUCTION CIRCUIT - A noise reduction circuit includes first and second reset signal generation circuits that generate first and second reset signals that are activated when a data input signal goes to a low level or a high level and are deactivated in synchronization with a clock signal when a high level or a low level is maintained, and first and second counter circuits that count an inverted signal of the clock signal, and are reset by the first or second reset signal. The noise reduction circuit further includes a data output circuit that includes a selector circuit and an output flip-flop circuit that outputs a signal selected by the selector circuit in synchronization with the clock, wherein the selector circuit selects and outputs any of: a signal fixed at a high level or a low level, and an output signal of the output flip-flop circuit, according to logic levels of output signals of the first and second counter circuit. | 04-28-2011 |
| 20110109379 | DIFFERENTIAL TRANSMISSION CIRCUIT - A differential transmission circuit comprises a sending unit that generates a pair of differential signals from an input signal, and sends the differential signals; a receiver that receives the differential signals sent by the sending unit; and a transmission path that transmits the differential signals from the sending unit to the receiver, wherein the sending unit has a selector that selects one of the input signal and a signal obtained by inverting a polarity of the input signal, and generates the differential signals from the signal selected by the selector. | 05-12-2011 |
| 20110140770 | ACOUSTIC CHARACTERISTIC CONTROL APPARATUS - An acoustic characteristic control apparatus supplies music signal, for example, to input terminal connected to a band-pass filter and a peaking filter. In a zero-cross detection circuit, a pulse signal corresponding to a period while a signal is positive is formed. A pulse-width measuring circuit output a signal corresponding to a pulse width. Next, the output of the pulse-width measuring circuit is inputted to one comparator and another comparator. The one comparator discriminates a time when the pulse width is equal to or larger than a first setting value, and the another comparator discriminates a time when the pulse width is equal to or smaller than a second setting value. The comparator is connected to the up terminal and the down terminal of an up/down counter. The output of the up/down counter is connected to the peaking filter through the subtractor, and acoustic characteristics of the peaking filter is controlled according to the count value of the up/down counter. | 06-16-2011 |
| 20110175676 | SIGNAL PROCESSING METHOD, SIGNAL PROCESSING DEVICE, AND SIGNAL PROCESSING PROGRAM - Provided is a signal processing method which reduces a plurality of echoes by receiving a plurality of reception signals and subtracting a pseudo echo generated by a plurality of adaptive filters which input the reception signals from a plurality of echoes generated by the reception signals. At least one of the reception signals is delayed to generate a delayed reception signal. The reception signal and the delayed reception signal are inputted to the adaptive filters to generate a pseudo echo. The frequency of inputting the reception signal and the delayed reception signal to the adaptive filters is controlled in accordance with the sensitivity of a localization change of the reception signals. | 07-21-2011 |
| 20110204967 | False-link protection circuit and method for utilizing same - Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state. | 08-25-2011 |
| 20110227638 | Apparatus For Processing Signals - An apparatus for processing signals, in particular physiological measuring signals, wherein the apparatus is provided with different channels with signal inputs ( | 09-22-2011 |
| 20110309880 | SIGNAL MONITORING SYSTEMS - A signal filter includes a node, a first terminal, a second terminal, and energy storage circuitry coupled to the node and the first and second terminals. The node receives an input signal and a reference signal selectively. The first terminal provides an output signal determined by the input signal and the reference signal. The second terminal receives a feedback signal indicative of the output signal. The energy storage circuitry generates the output signal at the first terminal according to the input signal and the reference signal. The energy storage circuitry also receives the input signal via the node and the feedback signal via the second terminal in alternating fashion. A dominant pole of the signal filter is controlled by the frequency at which the input signal and the feedback signal alternate. | 12-22-2011 |
| 20120013397 | SEMICONDUCTOR DEVICE - A noise removal circuit is provided having a first holding circuit ( | 01-19-2012 |
| 20120038416 | Low-Power, High-Voltage Integrated Circuits - Embodiments relate to an ultra-low-power, high-voltage integrated circuit (IC) that also has high electromagnetic compatibility (EMC). Embodiments address the desire for an ultra-low-power, high-voltage IC that also has high EMC and comprise a high-voltage EMC protection circuit with normal current consumption coupled to an ultra-low-power, low-voltage oscillator that controls a sleep/wake, or duty, cycle of a high-voltage circuit. | 02-16-2012 |
| 20120056667 | METHOD AND APPARATUS FOR PREVENTING CIRCUIT FAILURE - An embedded decoupling capacitor wearout monitor for power transmission line, which can be integrated and fabricated in any standard CMOS or BiCMOS circuits. The embedded noise monitor is employed to detect the degraded capacitor and disable it from further operation, which will extend the operation lifetime of the circuit system and prevent subsequent catastrophic failure as a result of hard-breakdown (or capacitor short). In one aspect, the monitor circuit and method detects early degradation signal before catastrophic decoupling capacitor failure and, further can pin-point a degraded decoupling capacitor and disable it, avoiding impact from decoupling capacitor breakdown failure. The monitor circuit and method provides for decoupling capacitor redundancy and includes an embedded and self-diagnostic circuit for functionality and reliability. | 03-08-2012 |
| 20120086504 | NONLINEAR DISTORTION COMPENSATING RECEIVER AND NONLINEAR DISTORTION COMPENSATION METHOD - Disclosed are a nonlinear distortion compensating receiver and nonlinear distortion compensation method, wherein nonlinear distortion is reduced with a simple circuit configuration. A correction (opposite characteristics) filter ( | 04-12-2012 |
| 20120098591 | ELECTRO-MAGNETIC INTERFERENCE REDUCTION USING OPPOSING FIELD TRANSMITTER - An electronic system that partially or perhaps even fully mitigates the effects of EMI by having a dedicated antenna circuit for carrying an antenna signal that is not used for signal processing in the functional circuit, but is instead used to emit electromagnetic radiation that at least partially offsets EMI emitted by the operation signal of a functional circuit. An antenna signal generation circuit generates the antenna signal and asserts the antenna signal on the antenna circuit. The ante a signal has the characteristic such that when the antenna signal is applied to the antenna circuit, the resultant emitted electromagnetic radiation at least partially offsets electromagnetic interference emitted by the functional circuit. | 04-26-2012 |
| 20120112824 | FILTER CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME - A filter circuit includes a plurality of shifting units configured to each store an initial value, receive at least one input signal, and shift the stored value to a next shifting unit in sequence from among the shifting units in response to at least one input signal, and an initial value setting unit configured to set the initial stored values of the shifting units to different sets of initial stored values in response to different filter setting signals, respectively, wherein the different filter setting signals represent respectively different criteria for filtering the at least one input signal, wherein the initially stored values have a first logic value or a second logic value, wherein the filter circuit is configured to activate an output signal when the first logic value is shifted to a selected shifting unit among the plurality of shifting units. | 05-10-2012 |
| 20120139625 | Device and Circuit with Improved Linearity - A solution for compensating intermodulation distortion of a component is provided. A circuit element includes multiple connected components. At least two of the connected components comprise current-voltage characteristics of opposite signs (e.g., sublinear and superlinear current-voltage characteristics) such that the current-voltage characteristics of the circuit element produces a level of intermodulation distortion for the circuit element lower than a level of intermodulation distortion for each of the connected components. | 06-07-2012 |
| 20120154030 | FILTER CIRCUIT, INTEGRATED CIRCUIT INCLUDING THE SAME, AND SIGNAL FILTERING METHOD - A filter circuit includes a filtering unit configured to filter an input signal and generate an output signal, and a weight generation unit configured to monitor a variation of the output signal and generate weight information based on the monitored variation. | 06-21-2012 |
| 20120154031 | SIGNAL CANCELLATION TO REDUCE PHASE NOISE, PERIOD JITTER, AND OTHER CONTAMINATION IN LOCAL OSCILLATOR, FREQUENCY TIMING, OR OTHER TIMING GENERATORS OR SIGNAL SOURCES - A method includes obtaining an input signal and demodulating phase contamination in the input signal to generate a baseband signal. The method also includes modulating the input signal based on the baseband signal to generate an output signal, where the output signal has less phase contamination than the input signal. The phase contamination could be demodulated using a phase demodulator or a frequency modulation (FM) detector. A portion of the input signal could be down-converted to a lower frequency, and the phase contamination in the down-converted portion of the input signal could be demodulated. Additional phase contamination in the output signal can be demodulated and used to regulate a level of the baseband signal used during modulation of the input signal. The output signal could have less phase noise or period jitter than the input signal. | 06-21-2012 |
| 20120176190 | Polyphase Nonlinear Digital Predistortion - Polyphase nonlinear digital predistorters (pNDPs) mitigate nonlinear distortions generated by time-interleaved digital-to-analog converters (TIDACs). Processors in an example pNDP compute nonlinear and linear compensation terms representative of channel mismatches and other imperfections in the TIDAC based on the digital input to the TIDAC. The pNDP subtracts these compensation terms from a delayed copy of the digital input to yield a predistorted digital input. The TIDAC converts on the predistorted digital input into a fullband analog output that is substantially free of nonlinear distortion. | 07-12-2012 |
| 20120223768 | SEMICONDUCTOR DEVICE AND METHOD FOR FETCHING DATA - In order to reduce occurrence of a fetching error of a digital signal, caused by a power-source noise, there is provided a semiconductor device provided with a switching circuit for executing a switching operation according to a pulse control signal and a digital signal hold circuit for fetching a digital signal. The digital signal hold circuit includes a mask signal generation circuit for generating a mask signal from the pulse control signal, the mask signal being for use in keeping the digital signal from being fetched during a time period of power-source noise occurrence caused by the switching operation, and the digital signal is not fetched during the time period of power-source noise occurrence while the digital signal is fetched during a time period of power-source noise nonoccurrence. | 09-06-2012 |
| 20120223769 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH DATA TRANSMITTING AND RECEIVING CIRCUITS - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data. | 09-06-2012 |
| 20120229201 | FILTER DEVICE - A filter device includes a filter that separates a steady component and a non-steady component included in an input signal, a synthesis unit that synthesizes the separated steady component and the separated non-steady component according to a given ratio, and an evaluation unit that evaluates the magnitude of the amount of the non-steady component in the input signal, wherein the synthesis unit sets the given ratio to a first ratio in an instance in which the evaluation unit determines the amount of the non-steady component to be equal to or less than a predetermined reference, and sets the given ratio to a second ratio, in which the proportion of the non-steady component is less than that of the first ratio, in an instance in which the evaluation unit determines the amount of the non-steady component to be greater than the predetermined reference. | 09-13-2012 |
| 20120268198 | SIGNAL PROCESSING METHOD, INFORMATION PROCESSING APPARATUS, AND STORAGE MEDIUM FOR STORING A SIGNAL PROCESSING PROGRAM - This invention provides a signal processing technique of suppressing various kinds of noise including unknown noise without storing a number of pieces of noise information in advance. To accomplish this, noise information is modified using modification information to obtain modified noise information. The noise in the noisy signal is suppressed using the modified noise information. The modification information is adapted and updated for the result of the step of suppressing. | 10-25-2012 |
| 20120286856 | PROGRAMMABLE NOISE FILTERING FOR BIAS KICKBACK DISTURBANCES - A system and method are disclosed for reducing the kickback disturbance in an electronic circuit. The system is based on the coupling of a programmable noise filter between bias blocks. In one embodiment the programmable noise filter includes capacitors, resisters and switches and forms a C-R-C circuit structure. By selecting the resistance and capacitance values and the status of the switches, the performance of the programmable noise filter is determined. Also disclosed is a system and method to reduce kickback disturbances comprising N+1 bias blocks, N programmable noise filters, and a bias reference generator, wherein N is equal to or greater than one. | 11-15-2012 |
| 20120306568 | REDUCING CROSSTALK BETWEEN MULTIPLE INTERCONNECTS - Embodiments reduce crosstalk between multiple interconnects in a printed circuit board environment. Further, embodiments perform frequency-dependent modal decomposition of characteristics of two or more interconnects spanning one or more integrated circuits on an interconnect substrate. In addition, each interconnect includes one or more cascaded coupled traces, where the cascaded coupled traces have one or more discontinuities in a heterogeneous medium. | 12-06-2012 |
| 20120306569 | CHARGE SHARING TIME DOMAIN FILTER - An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output. | 12-06-2012 |
| 20130002345 | ADAPTIVE FILTER - An adaptive filter includes: a filter configured to perform a filtering process for an input signal with a filter coefficient set therein, and output the processed input signal as an output signal; a calculating unit configured to calculate a value indicative of an error between an amplitude of the output signal and a reference amplitude; an output unit configured to output a first constant as a parameter when the amplitude of the output signal is greater than the predetermined amplitude, the parameter used when updating the filter coefficient, and output a second constant as the parameter when the amplitude of the output signal is smaller than the predetermined amplitude; and an updating unit configured to update the filter coefficient with an update amount corresponding to the parameter and the value indicative of the error, such that the error is reduced. | 01-03-2013 |
| 20130015914 | SIGNAL TRANSMITTING METHODS AND TRANSMITTERS USING THE SAMEAANM Chen; Kuo-HaoAACI Hsinchu CityAACO TWAAGP Chen; Kuo-Hao Hsinchu City TWAANM Lu; Yen-ShuoAACI Kaohsiung CityAACO TWAAGP Lu; Yen-Shuo Kaohsiung City TW - An exemplary embodiment of a transmitter of the invention is provided. The transmitter includes a shaping means and a digital-to-analog converter (DAC). The shaping means digitally shapes a digital signal. The DAC is arranged to convert the shaped digital signal into an analog signal. The shaping means is arranged to decrease energy at an edge of an in-band portion of a frequency spectrum of the digital signal so as to lower a spectral re-growth of the analog signal happened after the DAC. | 01-17-2013 |
| 20130038386 | DIFFERENTIAL TRANSMISSION CIRCUIT - A differential transmission circuit comprises a sending unit that generates a pair of differential signals from an input signal, and sends the differential signals; a receiver that receives the differential signals sent by the sending unit; and a transmission path that transmits the differential signals from the sending unit to the receiver, wherein the sending unit has a selector that selects one of the input signal and a signal obtained by inverting a polarity of the input signal, and generates the differential signals from the signal selected by the selector. | 02-14-2013 |
| 20130049848 | ELECTRONIC COMPONENT AND REFLECTED-WAVE CANCELLING METHOD - An electronic component includes a driver that outputs a signal to a reception apparatus; a storage device storing therein reflection information related to a reflected wave that returns to the driver when the signal is reflected back by the reception apparatus; a reflected wave detector that based on the reflection information, determines a measurement period for measuring the reflected wave and that based on the measurement period, measures an arrival time and a peak amplitude of the reflected wave; and a controller that based on the arrival time and the peak amplitude, extracts reflected-wave cancelling information for inhibiting effects of the reflected wave from the reception apparatus and that sets the extracted reflected-wave cancelling information in the driver. | 02-28-2013 |
| 20130057337 | NOISE CANCELLATION APPARATUS AND METHOD FOR CANCELING NOISE - A noise cancellation apparatus for an electrostatic capacity type touch panel includes a first grounding unit that provide an internal ground and a second grounding unit that provides an external ground. If the noise detected in the touch panel exceeds a reference value, the first grounding unit is connected to the second grounding unit. The second grounding unit is connected to a metallic component of a case of a terminal device housing the electrostatic capacity type touch panel and provides an external ground through a contact with user of the terminal device. | 03-07-2013 |
| 20130063205 | PROTECTION RELAY DEVICE AND PROTECTION RELAY METHOD - A protection relay device includes: an analog-to-digital converter that samples an analog signal inputted from an analog input unit and converts the analog signal into digital data; a variable filter that filters and outputs the digital data, the variable filter having a filter coefficient that is varied by external control; and an adaptive controller that variably controls the filter coefficient of the variable filter so that a difference between the digital data filtered by the variable filter and a target signal decreases. | 03-14-2013 |
| 20130076433 | ADAPTIVE FILTER WITH COEFFICIENT DETERMINATION BASED ON OUTPUT OF REAL TIME CLOCK - An adaptive filter implemented in a communication system transmitter or receiver has a real time clock associated therewith, and one or more coefficients of the adaptive filter are determined based at least in part on an output of the real time clock. For example, the adaptive filter may comprise a coefficient update engine and a memory for storing a plurality of sets of adaptive filter coefficients in association with respective time indicators derived from the output of the real time clock, with the coefficient update engine being configured to determine a particular one of the sets of filter coefficients for use by the adaptive filter based at least in part on one or more of the time indicators. The time indicators may comprise respective time stamps generated based on the output of the real time clock at respective times at which the corresponding sets of coefficients are determined. | 03-28-2013 |
| 20130099854 | NOISE SUPPRESSION CIRCUIT FOR POWER ADAPTER - A noise suppression circuit for a power adapter is disclosed. The noise suppression circuit can reduce or eliminate adapter-induced noise that could interfere with an electronic device powered by the adapter. In one example, the noise suppression circuit can include an active circuit to detect and attenuate or cancel the induced noise. In another example, the noise suppression circuit can include an RLC circuit in parallel with the adapter choke to suppress the induced noise at the operating frequencies of the powered electronic device. In still another example, the noise suppression circuit can include a modified adapter Y capacitor connection so as to bypass the adapter choke, thereby reducing or eliminating the choke's induced noise. | 04-25-2013 |
| 20130120057 | DEVICE FOR ELECTROMAGNETIC NOISE REDUCTION IN A HYBRID AUTOMOTIVE VEHICLE, ASSEMBLY AND ELECTROMAGNETIC NOISE REDUCTION PROCESS IN A HYBRID AUTOMOTIVE VEHICLE - Device for electromagnetic noise reduction in a hybrid automotive vehicle ( | 05-16-2013 |
| 20130120058 | HIGH-PASS COUPLING CIRCUIT - A filter provides high-pass coupling between circuits. The filter includes charge storage elements and switch elements coupling the charge storage elements. A controller is coupled to the switch elements for sequencing configurations of the switch elements in phases for each of a succession of sample periods to perform a time sampled continuous value signal processing of the input signal to form the processed signal. The sequenced configurations include a configuration in which a charge representing a value of the input signal is stored on a multiple of the charge storage elements, a configuration in which charge storage elements are coupled with the switch elements, and a set of one or more configurations that implement a scaling of a charge on one of the charge storage elements to be on one or more of the charge storage elements. | 05-16-2013 |
| 20130147547 | CROSSTALK COMPENSATION FOR HIGH SPEED, REDUCED SWING CIRCUITS - Structures and methods are provided for reducing or eliminating crosstalk in devices. Based on a predetermined compensation schemes, a compensation scheme is selected that minimizes the deviation of the non-aggressed victim signal caused by one or more aggressor signals. Instances of a compensation circuit corresponding to the selected compensation scheme are placed along a victim signal line at locations defined by the compensation scheme. | 06-13-2013 |
| 20130154724 | INTERLEAVED NOISE REDUCTION CIRCUIT AND METHOD - In accordance with an embodiment, a noise reduction circuit includes one or more phase sampling circuits that receive an electromagnetic signal and splits the signal into an illuminated component and an ambient component. The illuminated component is transmitted along an illuminated signal path and converted to a digital signal and the ambient component is transmitted along an ambient signal path and converted to a digital signal. The digitized ambient component is subtracted from the digitized illuminated component to generate a light signal with a reduced noise component. | 06-20-2013 |
| 20130181769 | Data Processing Method and System - For an input signal with a ringing superposed thereon, a ringing-generating filter ( | 07-18-2013 |
| 20130200946 | METHOD AND APPARATUS FOR REMOVAL OF HARMONIC NOISE - An apparatus for removing harmonic noise from a power transmission line transmitting electricity at a primary frequency includes a filter and a controller coupled to the sensor and to an actuator-generator. The filter separates electricity at a harmonic of a primary frequency from the electrical signal transmitted by the power transmission line. The controller is configured to modulate consumption of electricity from the power transmission line. The consumption is controlled by electrical actuation of the actuator-generator, such that the electrical actuation of the actuator-generator causes consumption of electricity from the power transmission line at a harmonic of the primary frequency. The actuator-generator is coupled to an elastically deformable component, such that electrical actuation of the actuator-generator generates tension in the elastically deformable component. | 08-08-2013 |
| 20130241633 | Method and Apparatus for Signal Processing - Signal processing method and apparatus having a first filter storage portion in which first filters are correlatively stored; a second filter storage portion in which second filters are correlatively stored; a first filter selection portion for selecting a first filter based on the power spectrum of the input image; a second filter selection portion for selecting a second filter based on the S/N of the input image; a third filter creation portion for creating a third filter by summing up the first and second filters; and a convolutional processing portion for convolving the input image using the created third filter. | 09-19-2013 |
| 20130257526 | CIRCUIT AND METHOD FOR REMOVING NOISE - Disclosed is a noise removing circuit including: a voltage booster which boosts an input signal; and a regulator which receives an output signal of the voltage booster and reduces the signal's voltage higher than a specific value to the signal's voltage having the specific value and then outputs the signal. | 10-03-2013 |
| 20130307613 | Method and Apparatus of Cancelling Inductor Coupling - This invention compensates for the unintentional magnetic coupling between a first and second inductor of two different closely spaced inductors separated by a conversion circuit. A cancellation circuit formed from transistors senses the magnetic coupling in the first inductor and feeds a current opposite to the induced magnetic coupling captured by the second inductor such that the coupled magnetic coupling can be compensated and allows the first and second inductors to behave independently with regards to the coupled magnetic coupling between the first and second inductors. This allows the distance between the first and second inductors to be minimized which saves silicon area. In addition, the performance is improved since the overall capacitance in both circuits can be decreased. This cancellation technique to reduce the magnetic coupling between two closed placed inductively loaded circuits allows the design of a more compact and faster performing circuit. | 11-21-2013 |
| 20130335137 | ELECTRONIC SYSTEMS, SLAVE ELECTRONIC DEVICES AND SIGNAL TRANSMISSION METHODS - A slave electronic device is provided, including a capture unit, at least one low-speed unit and an embedded control unit. The capture unit is coupled to a host electronic device through a transmission lane to filter out a high-frequency signal part from a control signal outputted by the host electronic device to generate a low-frequency control signal, wherein the control signal has a plurality of periods and the control signal respectively has a low-frequency signal part and the high-frequency signal part during odd periods and even periods of the periods. The low-speed unit is coupled to the capture unit to operate according to the low-frequency control signal. The embedded control unit is coupled to the transmission lane for communicating with the host electronic device using a predetermined communications protocol via the high-frequency signal part. | 12-19-2013 |
| 20130335138 | SIGNAL PROCESSING APPARATUS AND SIGNAL PROCESSING METHOD - Digital signals with higher resolution are generated from dual-phase encode signals indicating phase changes of a position or an angle of a target. A signal processing apparatus for processing dual-phase encode signals indicating changes in position of a target, comprises: a first noise reduction unit configured to remove high frequency noise from each of the dual-phase encode signals before interpolation processing; an interpolating unit configured to apply interpolation processing to the dual-phase encode signals output from the first noise reduction unit to generate dual-phase encode signals with higher resolution; and a second noise reduction unit configured to remove noise from the dual-phase encode signals output from the interpolating unit. | 12-19-2013 |
| 20140043097 | ELECTRONIC DEVICE AND NOISE REDUCING METHOD - An electronic device includes a first electronic component and a second electronic component that is connected to the first electronic component via a signal line in which a signal is transmitted and received. An electronic device includes a plurality of conductive lines that is arranged in parallel with the signal line with the signal line interposed therebetween, between the first electronic component and the second electronic component. An electronic device includes a detecting unit that detects an amount of noise which each of the conductive lines receives from another signal line and a correcting unit that reduces noise which the signal received in the signal line receives from the other signal line using the amount of noise detected by the detecting unit. | 02-13-2014 |
| 20140049316 | SEMICONDUCTOR INTEGRATED CIRCUIT AND CONTROL METHOD FOR THE SAME - A semiconductor integrated circuit includes a user circuit and a power supply noise suppression circuit. The user circuit includes a plurality of circuit modules each containing an operation ratio control circuit. The power supply noise suppression circuit judges an amount of current fluctuation occurring in the user circuit by monitoring an operation ratio of each of the plurality of circuit modules, and controls, via each of the operation ratio control circuits, the operation ratio of a corresponding one of the circuit modules in accordance with a result of the judgment of the amount of current fluctuation. | 02-20-2014 |
| 20140084996 | METHOD AND APPARATUS FOR CONTROLLING OR MANAGING BANDWIDTH OF A FILTER CIRCUIT WITHIN A SYSTEM HAVING TWO INTEGRATED CIRCUITS - A method and apparatus for an adjustable filter system comprises a first integrated circuit generating a reference value that represents a corner frequency of a filter within the first integrated circuit; sending the reference value that represents the corner frequency of the filter across an interface to a second integrated circuit; receiving, across the interface from the second integrated circuit, a filter adjustment value; and changing the corner frequency of the filter using the filter adjustment value to adjust a passband and a stopband of the filter. The apparatus and method also comprises a second integrated circuit detecting a filter adjustment event, wherein the filter adjustment event comprises receipt of the reference value; calculating the filter adjustment value to change a corner frequency of the filter within a first integrated circuit; and sending the filter adjustment value across the interface to the first integrated circuit. | 03-27-2014 |
| 20140097890 | Semiconductor Structure and Method for Reducing Noise Therein - The present invention provides a semiconductor structure, including a substrate, a first TSV, an inductor and a capacitor. The first TSV is disposed in the substrate and has a first signal. The inductor is disposed in the substrate. The capacitor is electrically connected to the inductor to form an LC circuit to bypass the noise from the first signal. The present invention further provides a method of reducing the signal noise in a semiconductor structure. | 04-10-2014 |
| 20140132339 | FILTERING CIRCUIT, PHASE IDENTITY DETERMINATION CIRCUIT AND DELAY LOCKED LOOP - A filtering circuit includes a clock selection unit configured to transfer a first clock or a second clock having a frequency lower than the first clock as an operating clock in response to a frequence signal, and a filter configured to filter an input signal and generate a filtered signal in synchronization with the operating clock. | 05-15-2014 |
| 20140139284 | COMMON MODE NOISE CANCELLATION CIRCUIT FOR UNBALANCED SIGNALS - This invention provides a common mode noise cancellation circuit for the unbalanced signals. The unbalanced signals come from a signal source with a first signal terminal and a second signal terminal having a first grounding potential. The common mode noise cancellation circuit comprises a grounding terminal and a subtractor. The grounding terminal with a second grounding potential is electrically coupled to the second signal terminal of the signal source through an impedance unit. The subtractor comprises a first receiving terminal, a second receiving terminal and a signal output terminal. The first receiving terminal and the second receiving terminal are electrically coupled to the first signal terminal and the second signal terminal respectively for receiving the unbalanced signals. The subtractor subtracts the noise coming from the first receiving terminal and the noise coming from the second receiving terminal to reduce the output noise of the signal output terminal. | 05-22-2014 |
| 20140368265 | Method and Apparatus for Acquiring Noise Reduced High Frequency Signals - A system and method receive the output signal from a capacitance diaphragm gauge (CDG) and generate a noise reduced output signal. An input signal processing circuit receives an input signal from a signal source that drives the CDG. The input signal processing circuit generates a segment of N normalized digital samples of the input signal. An output signal processing circuit receives the output signal from the CDG and generates M segments of N digital samples of the CDG output signal and averages the corresponding samples in the M segments to generate a signal segment of N averaged samples. Each of the N averaged samples is multiplied by a corresponding one of the N normalized samples to generate N products. The N products are averaged to generate an average product, which is multiplied by a constant to generate a system output signal with reduced noise. | 12-18-2014 |
| 20150070088 | Circuits And Methods For Cancelling Nonlinear Distortions In Pulse Width Modulated Sequences - A method of canceling nonlinear distortions in pulse width modulated signals includes receiving an input signal. A first signal that is the modulated input signal is generated. The first signal has quantized levels representing the input signal. A pulse width modulated (PWM) sequence that is representative of the first signal is generated. A second signal that is the PWM sequence mixed with a carrier signal is generated. An error signal is generated in response to the first signal and modeled from the second signal. The error signal is added to the input signal. | 03-12-2015 |
| 20150091639 | SEMICONDUCTOR DEVICE - A semiconductor device includes conducting lines of a first group and a second group arranged in parallel, a plurality of first internal elements respectively coupled to the conducting lines of the first group and the second group and a plurality of first contact pads arranged between and along the conducting lines of the first group and the second groups, wherein at least a part of the plurality of first contact pads are respectively coupled to control terminals of the plurality of first internal elements, and the part of the plurality of first internal elements receive a plurality of first control signals through corresponding control terminals, respectively. | 04-02-2015 |
| 20150091640 | RECONFIGURABLE PASSIVE FILTER - A passive filter for connection between an AC source and a load, in either three-phases or in a single-phase arrangement. The filter includes, for each phase, a trap circuit having an inductor in series with a capacitor, the trap circuit having at least two terminals. A line reactor is connected between the AC source and the load, the line reactor having at least an input terminal, an output terminal and a tap terminal. A switch selectively connects at least one of the trap circuit terminals to a selected one of the line reactor terminals. The switch is capable of selecting which of the trap circuit terminals to connect to which of the line reactor terminals on the basis of a level of voltage distortion being experienced by the AC source, or on the basis of a calculated level of background voltage total harmonic distortion. | 04-02-2015 |
| 20150097616 | DIFFERENTIAL CIRCUIT SYSTEM - A differential circuit system is provided. The differential circuit system includes: a different circuit set including a plurality of differential circuits, a voltage regulator, and a current drainage circuit set. The differential circuits are electrically connected between a first node and a second node, and each differential circuit generates a current flowing from the first node to the second node. A high voltage is provided to the first node and a low voltage is provided to the second node. The first node receives an external voltage. According to the first voltage, the voltage regulator generates the low voltage. The low voltage is provided to the second node. The current drainage circuit set generates a drainage current in between the second node and a ground voltage. A superposed current flowing to the voltage regulator is difference of the summation of currents minus the conducting current. | 04-09-2015 |
| 20150145593 | REDISTRIBUTION STRUCTURES FOR MICROFEATURE WORKPIECES - Microfeature dies with redistribution structures that reduce or eliminate line interference are disclosed. The microfeature dies can include a substrate having a bond site and integrated circuitry electrically connected to the bond site. The microfeature dies can also include and a redistribution structure coupled to the substrate. The redistribution structure can include an external contact site configured to receive an electric coupler, a conductive line that is electrically connected to the external contact site and the bond site, and a conductive shield that at least partially surrounds the conductive line. | 05-28-2015 |
| 20150295566 | METHOD AND APPARATUS FOR CANCELLATION OF SPURIOUS SIGNALS - Systems and methods for generating a spurious signal cancellation signal, the system comprising two direct digital synthesizers (DDS). The first DDS provides phase tracking to correct for rounding errors. The second DDS outputs a frequency that is exactly equal to N/M*CLK, where N and M are values selected to set the output frequency equal to the frequency of a spurious signal to be cancelled, and CLK is a clock frequency used to clock the first and second DDS circuits. | 10-15-2015 |
| 20150326223 | EMULATION OF LED INPUT CHARACTERISTICS IN BICMOS PROCESS - An apparatus comprising an Opto-coupler using LED and photo transistor as a basis for the isolation is provided. An Input of the opto-coupler based isolator is an LED. The opto-coupler uses PMOS MP | 11-12-2015 |
| 20150372663 | Impedance Adjusting Device - The present invention is an impedance adjusting device and includes a power output port, a ground terminal, a capacitor assembly including at least one capacitor, and a power output port. The power input port is electronically connected to a power converting circuit of a switching power supply, and the capacitor is electronically connected between the power input port and the ground terminal. The capacitor is connected in parallel to an output capacitor of the power converting circuit to stabilize an impedance of the switching power supply when an audio signal is played at different frequencies. Therefore the audio signal can be played without distortions. | 12-24-2015 |
| 20150381146 | CHARGE SHARING TIME DOMAIN FILTER - An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output. | 12-31-2015 |
| 20150381156 | SYSTEM FOR DIGITALLY CONTROLLED EDGE INTERPOLATOR LINEARIZATION - This application discusses, among other things, an interpolator architecture for digital-to-time converters (DTCs). In an example, an interpolator can include interpolation cells and retention cells configured provide an interpolated output based on at least two offset clock signals. In certain examples, an example interpolator can provide contention free control of the interpolator output with improved noise immunity. | 12-31-2015 |
| 20160013953 | GALVANIC ISOLATION INTERFACE FOR HIGH-SPEED DATA LINK FOR SPACECRAFT ELECTRONICS, AND METHOD OF USING SAME | 01-14-2016 |
| 20160043721 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH DATA TRANSMITTING AND RECEIVING CIRCUITS - Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data. | 02-11-2016 |
| 20160072489 | FIELD DEVICE - A field device includes a current output circuit, a sensor circuit, and a terminal portion. The current output circuit and the sensor circuit are connected a two-wire loop wiring via the terminal portion in a state that the current output circuit and the sensor circuit are connected in series with each other. A rectifying element is connected to only a sensor circuit side of the terminal portion. | 03-10-2016 |
| 20190149118 | CARRIER AGGREGATION CIRCUIT ALLOWING CARRIER WAVES WITH DIFFERENT FREQUENCIES TO SHARE THE SAME AMPLIFIER | 05-16-2019 |
