| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 327384000 | Switch noise signal | 17 |
| 20100052765 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF LEVELING SWITCHING NOISE THEREOF - A semiconductor integrated circuit includes a switching circuit, a switch, and a switch control circuit. The switch changes over whether a decoupling capacitor is connected to a power source of the switching circuit. The switch control circuit detects a control signal that causes switching of the switching circuit, and turns on the switch for a fixed period of time that straddles switching of the switching circuit, thereby connects the decoupling capacitor to the power source of the switching circuit. The decoupling capacitor is connected to the power source only when the switching circuit switches. As a result, a difference in noise between noise when switching is performed and noise when switching is not performed can be reduced. | 03-04-2010 |
| 20110169547 | RINGING SUPPRESSION CIRCUIT - A ringing suppression circuit for a communication circuit that performs communication through a transmission line includes a high side switch connected between a high potential reference point and a high side line of the transmission line, a low side switch connected between a low potential reference point and a low side line of the transmission line, and a ringing suppression section. The ringing suppression section turns on the high side switch based on a difference between a potential of the high side line and a potential applied to a control terminal of the high side switch. The ringing suppression section turns on the low side switch based on a difference between a potential of the low side line and potential applied to a control terminal of the low side switch. | 07-14-2011 |
| 20110304380 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first power line to supply a first voltage to a plurality of internal circuits; a second power line to supply the first voltage to the plurality of internal circuits; a first switch provided between said first power line and each of the plurality of internal circuits; a second switch provided between said second power line and each of the plurality of internal circuits; and a control circuit to control the first switch of a second internal circuit included in the plurality of the internal circuits based on the amounts of noise and voltage drop at power-on in a first circuit included in the plurality of internal circuits. | 12-15-2011 |
| 20130099849 | RINGING SUPPRESSION CIRCUIT - A ringing suppression circuit for a communication circuit that performs communication through a transmission line includes a high side switch connected between a high potential reference point and a high side line of the transmission line, a low side switch connected between a low potential reference point and a low side line of the transmission line, and a ringing suppression section. The ringing suppression section turns on the high side switch based on a difference between a potential of the high side line and a potential applied to a control terminal of the high side switch. The ringing suppression section turns on the low side switch based on a difference between a potential of the low side line and a potential applied to a control terminal of the low side switch. | 04-25-2013 |
| 20130307607 | SIMULTANEOUS SWITCHING NOISE CANCELLATION BY ADJUSTING REFERENCE VOLTAGE AND SAMPLING CLOCK PHASE - A data signal is transmitted from a first circuit to a second circuit, with noise and/or jitter added to the data signal by supply noise in the power distribution network in the first circuit and/or a second circuit being effectively canceled out by adjustment of the reference voltage and/or the phase of the sampling clock used for sampling of the data signal in a manner that effectively mimics such noise and/or jitter added to the data signal. The second circuit uses a filter that has the impedance profile and/or the jitter profile of such power distribution network. The bus weight and/or the number of switching bits in the data pattern transmitted from the first circuit to the second circuit is applied to the filter to determine the adjustment to be made to the reference voltage or the phase of the sampling clock. | 11-21-2013 |
| 20140009207 | RADIO-FREQUENCY SWITCH HAVING DYNAMIC GATE BIAS RESISTANCE AND BODY CONTACT - Radio-frequency (RF) switch circuits having switchable transistor coupling for improved switching performance. An RF switch system includes at least one field-effect transistor (FET) disposed between first and second nodes, each FET having a gate and body. A switchable resistive coupling circuit is connected to each of the respective gates. A switchable resistive grounding circuit is connected to each of the respective bodies. | 01-09-2014 |
| 20140091851 | ADAPTIVE POWER GATING AND REGULATION - In one embodiment, an apparatus includes a power switch to provide a local power voltage at least one gated circuit based on a control signal. The apparatus also includes a delay sensor to provide a delay substantially equivalent to a processing delay of the at least one gated circuit. The apparatus also includes a phase detector to provide the control signal based at least in part on the delay. | 04-03-2014 |
| 20140184307 | GATE DRIVER HAVING FUNCTION OF PREVENTING SHOOT-THROUGH CURRENT - Disclosed herein is a gate driver having a function of preventing shoot-through current. The gate driver having a function of preventing shoot-through current includes: a first power switch sourcing current according to voltage applied by a voltage source; a second power switch connected with the first power switch in series and sinking current according to voltage applied by the voltage source; and a shoot-through current preventing circuit preventing the occurrence of shoot-through current in first and second power switches at the time of driving of the first and second power switches. According to the present invention, the shoot-through current preventing circuit configured of the plurality of PMOSs and NMOSs can prevent the shoot-through current from occurring in the power transistor of the output terminal at the time of the driving of the gate driver, thereby preventing the unnecessary power consumption and the occurrence of ground noise. | 07-03-2014 |
| 20150015320 | BUS ENCODING SCHEME BASED ON NON-UNIFORM DISTRIBUTION OF POWER DELIVERY NETWORK COMPONENTS AMONG I/O CIRCUITS - A system and method for reducing simultaneous switching output (SSO) noise. In one embodiment, power supply decoupling capacitances are distributed non-uniformly among a plurality of I/O circuits. Transitions between consecutive values on a data bus are either sent by the transmitter as requested at the input of the transmitter, or, in cases for which the noise of the requested transition is high, converted by an encoder to transitions having lower SSO noise. The converted transitions are decoded in a receiver, so that the data at the output of the receiver are the same as the data at the input to the transmitter. | 01-15-2015 |
| 20150035584 | ANTI-RINGING TECHNIQUE FOR SWITCHING POWER STAGE - A driver may provide a transition of a switch between an on state and an off state in two stages. In the first stage, the voltage slew rate of the voltage at an output terminal of the switch may be controlled. In the second stage, the current gradient of the switch may be controlled. The transition between the first stage and the second stage may be made based on the value of the voltage at the output terminal of the switch. | 02-05-2015 |
| 20150358015 | Constant Impedance Switch - A constant impedance switch dynamically manages switch impedance to eliminate or substantially reduce impedance glitches during switching events by stepping variable impedances through sequences of impedance values. As a result, VSWR may be reduced to or near 1:1, allowing programming and circuitry to be simplified. Switch impedance may be maintained for single and multi-throw switches having variable impedances of any order. Each variable impedance may comprise one or more configurable cells, subcells and elements controlled by thermometer, binary, hybrid or other coding technique. | 12-10-2015 |
| 20150358017 | METHOD AND APPARATUS FOR REDUCING POWER BOUNCING OF INTEGRATED CIRCUITS - A circuit is provided having a core circuit for sinking a first current from a first internal power supply node, a power bouncing reduction circuit for receiving power from a second internal power supply node and sourcing a second current to the first internal power supply node in accordance with a change of voltage at the first internal power supply node, and a package for coupling the first internal power supply node and the second internal power supply node to a first external power supply node and a second external power supply node, respectively. A corresponding method is also provided. | 12-10-2015 |
| 20170237424 | RADIO FREQUENCY SWITCHES WITH REDUCED CLOCK NOISE | 08-17-2017 |
| 327385000 | Contact bounce from mechanical switch | 4 |
| 20120019306 | AUDIO JACK RESET - This document provides apparatus and methods for providing low-power operation of an interface circuit during an interval when a port of the interface circuit is in an uncoupled state. | 01-26-2012 |
| 20130106490 | DEBOUNCE SWITCHING ELEMENT INCORPORATING A DEBOUNCE CIRCUIT | 05-02-2013 |
| 20130127517 | DEBOUNCE APPARATUS AND METHOD THEREOF - A debounce apparatus and a method thereof are provided, which includes a debounce module, a register and a timer. The debounce module receives an input signal and eliminates a bounce phenomenon of the input signal within a transient-time of the state-changing of the input signal to produce a debounce signal. The register outputs an output signal according to the value stored in the register. When the input signal changes its state, the timer starts time-counting according to a counting-value of settling-time; when the debounce signal changes its state, the timer recounts time; and when time-counting is ended and when the value corresponding to the debounce signal is different from the register's value, the register's value is updated by the value corresponding to the debounce signal. In this way, the apparatus can eliminate the system misjudgement problem caused by occurred voltage level errors in the stable state. | 05-23-2013 |
| 327386000 | With clock input | 1 |
| 20160087615 | Debounce Circuit with Dynamic Time Base Adjustment for a Digital System - A debounce circuit eliminates noise, glitches, or transient signal variations resulting from mechanical bounce occurring at a change of state of analog signals and provides a dynamic debounce period alteration and time base variation without loss of the current debounce state. The debounce circuit has a physical counter that is configured for being adjusted within a virtual counter such that the noise, glitches, or transient signal variations resulting from mechanical bounce occurring at an initiation of a change of state of an analog input signal from a source device are filtered by delaying a change of output state of the debounce circuit. The debounce circuit includes a strobe generator that produces a strobe signal that is a submultiple of a master clock that is determined by the location of the physical counter within the virtual counter that is used to increment the physical counter within the virtual counter. | 03-24-2016 |
