| Entries |
| Document | Title | Date |
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| 20080265960 | Pulse Stream Generator - A system and method for generating a pulse stream are disclosed. A ramp signal is generated. The ramp signal is compared with a Time of Transition signal to produce a result indicative of the comparison. Responsive to the result of the comparison, the pulse stream signal is output. The result of the comparison instructs the selector whether to maintain the current output pulse stream signal or replace the current output pulse stream signal with a Polarity signal. | 10-30-2008 |
| 20090108894 | PWM Signal Generator - After an output signal S | 04-30-2009 |
| 20090153207 | METHOD OF FORMING A PWM CONTROLLER AND STRUCTURE THEREFOR - In one embodiment, a PWM controller is configured to inhibit forming a drive signal responsively to an overload sense signal having a value that is no greater than a first value for a first time interval and to form a first duration of the first time interval responsively to the overload sense signal. | 06-18-2009 |
| 20090167392 | NARROW PULSE GENERATOR - A pulse generator is provided that includes: a current source, a source follower whose output controls the gate of a FET and a differential stage whose input voltage consists of inverting square waves and its output voltage consists of extremely narrow pulses widths, for example, of 30 to 40 ps and amplitude of 1.5 Volts. | 07-02-2009 |
| 20090189661 | PULSE WIDTH MODULATION CONTROLLER AND THE CONTROLLING METHOD THEREOF - A pulse width modulation controller comprises a disabling unit, a level sensor and an over current protector. These three devices are all coupled to a multi-function node for accomplishing a disable function, input level sensing, and over-current protection, respectively. | 07-30-2009 |
| 20090256606 | DIGITAL SIGNAL INPUT DEVICE AND METHOD OF CONTROLLING THE SAME - A digital signal input device has a first input terminal and a second input terminal, a charging circuit connected between the first input terminal and the second input terminal, and a digital signal detection unit that outputs a digital signal of a logical value corresponding to a level of a charging voltage to an internal circuit. A pulse control unit generates a pulse signal having a fixed period using designated pulse width and pulse period. A switching element is provided between the charging circuit and the first input terminal or the second input terminal, which controls a period of applying a DC voltage to the charging circuit using a pulse width of the pulse signal. | 10-15-2009 |
| 20090295444 | PHASE RECOVERY CIRCUIT - A phase recovery circuit for avoiding noise interfering with the clock signal generated from an oscillator is disclosed. The phase recovery circuit includes a noise detector, a phase detector, and a phase locker. The noise detector detects noise and accordingly generates a noise detecting signal. The phase detector is triggered by the noise detecting signal for detecting the phase of the clock signal and accordingly generating a phase detecting signal. The phase locker locks the phase of the clock signal to a predetermined phase within a predetermined period after the occurrence of the noise detecting signal, and after the predetermined period, the phase locker releases the clock signal. In this way, the phase of the clock signal is not affected by noise. | 12-03-2009 |
| 20090295445 | DOUBLE-EDGE PWM CONTROLLER AND ITS CONTROL METHOD THEREOF - The present invention discloses a double-edge pulse width modulation (PWM) controller based on the output current and output voltage which is modulated in real time by the output current and the output voltage. The controller uses an extra first adder to sum up the compensation signal and a triangular signal (or a saw-tooth signal); a second adder to sum up the output current signal to a bias value; a PWM comparator, with its non-inverting input receiving the output of said first adder, its inverting input receiving the output of said second adder and outputs the PWM signal. | 12-03-2009 |
| 20090302911 | FREQUENCY JITTER GENERATOR AND PWM CONTROLLER - A frequency jitter generator and a frequency jitter PWM controller are provided for overcoming the shortcoming that a conventional PWM controller reduces the electromagnetic interference issue by means of varying the operating frequency of the PWM controller based on an input voltage, while resulting in the uncertainty of the range of frequency jitter and the difficulty circuit design due to the effect of the input voltage and the load. The frequency jitter generator and PWM controller adjust the range of frequency jitter by using a signal within a fixed voltage range. The invention not only gets rid of the effect of the input voltage and the loading, but also simplifies the circuit design by fixing the range of frequency jitter no greater than a predetermined percentage regardless of the operating frequency of the PWM controller. | 12-10-2009 |
| 20090309639 | PROCESSING METHOD AND APPARATUS FOR ENERGY SAVING OF AN ACTIVE INFRARED INDUCTION INSTRUMENT POWERED BY A DRY BATTERY - An active infrared induction instrument powered by a dry battery capable of reducing power consumption through the adjustment of the emitter pulse width. The infrared emitting LED emits infrared signals, which, after being reflected by an object, are received by the infrared photodiode. The infrared signals received by the infrared photodiode then enter an integrated circuit chip through a comparator. The pulse widths of the infrared emission pulse signals are dynamically adjusted after the width of the pulse series is received by the discrimination chip, thus reducing the emission power consumption to save energy. | 12-17-2009 |
| 20100013534 | CONTROLLED POWER CONVERTER - A pulse modulated converter comprising an input stage ( | 01-21-2010 |
| 20100033222 | PULSE CONTROL DEVICE - A pulse control device is maintained with a constant pulse width corresponding to a change of process or temperature. The pulse control device comprises a fuse set for selectively outputting a delay increase signal and a delay decrease signal that have a different state based on a cutting or non-cutting state of a fuse on which information on a change of process is programmed, and a pulse generator provided with a plurality of delay cells with predetermined time delay for selectively increasing or decreasing the number of the plurality of delay cells depending on the delay increase signal and the delay decrease signal to generate an internal clock with a pulse width corresponding to the number of the increased or decreased delay cells. | 02-11-2010 |
| 20100045352 | METHOD AND APPARATUS FOR PULSE WIDTH MODULATION - An apparatus and method of providing a pulse width modulated signal that is responsive to a current are disclosed. A circuit according to aspects of the present invention includes a capacitor to convert a first current to a first voltage on the capacitor during a first time duration and to discharge a second current from the capacitor to change the first voltage to a second voltage during a second time duration. A comparator is also included and is coupled to an output of the capacitor to compare a voltage on the capacitor to a reference voltage during the second time duration to change a pulse width of a periodic output signal in response to an input current. | 02-25-2010 |
| 20100117699 | PWM Controller with Frequency Jitter Functionality and Related Method - A pulse width modulation controller with frequency jitter functionality includes an oscillator and a threshold voltage generator. The oscillator is utilized for generating a switching frequency signal according to an upper threshold voltage and a lower threshold voltage. The threshold voltage generator is coupled to the oscillator, and is utilized for generating the upper threshold voltage and the lower threshold voltage and modulating at least one of the upper threshold voltage and the lower threshold voltage to vary over time for jittering the switching frequency signal. | 05-13-2010 |
| 20100117700 | TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE RIPPLE DUE TO CHARGE PUMP LEAKAGE IN PHASE LOCKED LOOP CIRCUITS - Techniques for adaptively control of a loop filter sampling interval to mitigate the effects of charge pump leakage current in an apparatus including a phase lock loop circuit are provided. In one aspect, the apparatus includes a voltage controlled oscillator (VCO), a phase frequency detector (PFD) providing a phase comparison operation, a loop filter providing a control voltage to lock the VCO to a desired operating frequency, and a charge pump configured to provide an output signal to the loop filter in response to at least one of an UP pulse and a DOWN pulse. The apparatus further includes a sampling switch, coupled between an input of the loop filter, an output of the charge pump, and characterized by a sampling interval. A sampling switch controller is configured to adaptively control the width of the sampling interval in order to mitigate the effects of leakage current from the charge pump by closing the sampling switch in advance of the phase comparison operation and opening the sampling switch when the phase comparison operation is completed. | 05-13-2010 |
| 20100117701 | TECHNIQUES FOR MINIMIZING CONTROL VOLTAGE NOISE DUE TO CHARGE PUMP LEAKAGE IN PHASE LOCKED LOOP CIRCUITS - Techniques for adaptively control of a loop filter sampling interval to mitigate the effects of charge pump output noise in an apparatus including a phase lock loop circuit are provided. In one aspect, the apparatus includes a voltage controlled oscillator (VCO), a phase frequency detector (PFD) providing a phase comparison operation, a loop filter providing a control voltage to lock the VCO to a desired operating frequency, and a charge pump configured to provide an output signal to the loop filter in response to at least one of an UP pulse and a DOWN pulse. The apparatus further includes a sampling switch, coupled between an input of the loop filter, an output of the charge pump, and characterized by a sampling interval. A sampling switch controller is configured to adaptively control the width of the sampling interval in order to mitigate the effects of output noise from the charge pump by closing the sampling switch in advance of the phase comparison operation and opening the sampling switch when the phase comparison operation is completed. | 05-13-2010 |
| 20100156491 | VOLTAGE CONVERTERS AND VOLTAGE GENERATING METHODS - A voltage converter is provided. The voltage converter generates an output voltage signal and comprises a controller, a wave generator, a comparator, and a voltage converting unit. The controller generates a control voltage signal according to the output voltage signal and a first reference voltage. The wave generator generates a saw-wave signal and modifies at least one of an upper limit and a lower limit of a waveform of the saw-wave signal according to the output voltage signal. The comparator generates a pulse width modulation (PWM) signal according to the control voltage signal and the saw-wave signal. The voltage converting unit generates the output voltage signal according to the PWM signal. | 06-24-2010 |
| 20100164579 | LOW COST ULTRA VERSATILE MIXED SIGNAL CONTROLLER CIRCUIT - A low-cost ultra-versatile pulse width modulation (PWM)-timer controller system to control automations, AC-DC, DC-DC and power factor correction converter circuits comprising an under-voltage lock-out circuit, a voltage gap reference circuit, a driver circuit, a PWM logic circuit that allows for fixed or variable frequency having synchronization inputs and outputs, an oscillator circuit that generates a voltage ramp signal, a set signal and a synchronization signal, a voltage ramp buffer circuit that allows for voltage and current mode operations having synchronization inputs and outputs, a current spike filter circuit having synchronization inputs and outputs, an error amplifier circuit, a voltage limiter circuit, a PWM comparator circuit that generates a reset signal having synchronization inputs and outputs, a soft start circuit that controls, simultaneously, the error amplifier sensing input and output terminals having synchronization inputs and outputs, and a master synchronization system synchronizing all circuits that generate, buffer or receive voltage ramp, set and reset signals for the reset signal to switch, safely, to a LOW state before the set signal and the PWM logic circuit to deliver square wave pulses signals having any duty cycle ratio between 1% and 100% to the driver circuit. | 07-01-2010 |
| 20100271097 | Pulse Width Modulation Sequence Maintaining Maximally Flat Voltage During Current Transients - A digital circuit implementing pulse width modulation controls power delivered in what one can model as a second order or higher order system. An exemplary control plant could embody a step-down switch mode power supply providing a precise sequence of voltages or currents to any of a variety of loads such as the core voltage of a semiconductor unique compared to its input/output ring voltage. One of several algorithms produce a specific predetermined sequence of pulses of varying width such that the voltage maintains maximally flat characteristics while the current delivered to the load from the system plant varies within a range bounded only by inductive element continuous conduction at the low power extreme and non-saturation of the inductor core at the high power extreme. The specific pulse width modulation sequence controls a plant such that the voltage maintains maximally flat characteristics in one embodiment without a feed-forward or feedback loop physically embodied in the control system thereby reducing the parts cost or control semiconductor production yield cost while enhancing noise immunity and long term reliability of the control system. Several specific algorithms maintain maximally flat voltage despite extreme load variations therewith control plant element parameters otherwise exacerbating excessive voltage fluctuation during the given current transients. | 10-28-2010 |
| 20100289546 | DIGITAL SIGNAL CONVERTER - A digital signal converter (CNV) converts a digital input signal (PCM) into a pulse width modulated signal (PWM), which is a binary signal that comprises pulses of varying width. The digital signal converter can operate in a signal mode and a transition mode. In the transition mode, the digital converter provides the pulse width modulated signal (PWM) by applying an anti-transient noise shaping function (NSH | 11-18-2010 |
| 20110012658 | Adaptive pulse width control power conversation method and device thereof - An adaptive pulse width control power conversion device includes a pulse width adjustable pulse frequency module (PFM) control circuit, a pulse width modulation (PWM) control circuit, a PWM/PFM switching unit, a switching circuit, and a load status detection circuit. When the power conversion device is to be switched from a PWM mode to a PFM mode, pulse width of a series of PFM control signals is sequentially adjusted from a low value to a high value according to a predetermined pulse width increment until an optimum pulse width is determined and thereafter, an output voltage is supplied to a load in the PFM mode, whereby ripple of output voltage in the PFM mode can be improved and improved stability of output of the power conversion device is realized. | 01-20-2011 |
| 20110080200 | Temperature sensing circuit and method - A low cost, low power and low noise temperature sensor circuit is disclosed. A control circuit asserts a start signal and a stop signal, causes a pulse generating circuit to generate a finite number of pulses, whose pulse frequency varies with temperature. A counter counts the finite number of pulses and outputs the count which can be used to represents the temperature. Further, the pulse generating circuit includes a delay circuit, a pulse width controlling circuit, and a synchronizer with asynchronous clear. | 04-07-2011 |
| 20110080201 | DIGITAL LOGIC CIRCUITS HAVING A PULSE WIDTH TIMING CIRCUIT - A pulse width timing includes a first complementary resistor-capacitor (RC) circuit having an input for receiving an input signal, and a second complementary RC circuit coupled to an output of the first complementary RC circuit, wherein the first and second complementary RC circuits cooperate to produce an output signal based on the input signal, the output signal being delayed and having an adjusted pulse width with respect to the input signal. | 04-07-2011 |
| 20110109362 | CIRCUIT FOR CONTROLLING AN ENABLING TIME OF AN INTERNAL CONTROL SIGNAL ACCORDING TO AN OPERATING FREQUENCY OF A MEMORY DEVICE AND THE METHOD THEREOF - Provided is a circuit for controlling a data bus connecting a bitline sense amplifier to a data sense amplifier in accordance with a variation of an operating frequency of a memory device, being comprised of a pulse width adjusting circuit for varying a pulse width of an input signal in accordance with the operating frequency of the memory device after receiving the input signal, a signal transmission circuit for buffing a signal outputted from the pulse width adjusting circuit, and an output circuit for outputting a first signal to control the data bus in response to a signal outputted from the signal transmission circuit. | 05-12-2011 |
| 20110133801 | PULSE WIDTH DIGITIZING METHOD AND PULSE WIDTH DIGITIZER USING THEREOF - A pulse width (PW) digitizer comprises a current pump, a capacitor, a quantizer, a feedback controller, and a digital filter. The current pump provides a current signal in response to a PW signal. The capacitor obtains a voltage signal in response to the current signal. The quantizer obtains a digital signal in response to the voltage signal. The feedback controller determines a feedback PW signal in response to the digital signal. The feedback PW signal is fed back to the current pump for controlling the current signal converging to a specific value and controlling the digital signal switching between a first code and a second code. The digital filter counts times that the digital signal indicating the first code/the second code and accordingly obtains the PW of the PW signal. | 06-09-2011 |
| 20110169541 | METHOD FOR CONTROLLING A DEVICE BY MEANS OF PULSE DURATION MODULATION AND CONTROL SYSTEM - A method is provided for controlling an actuator that can be switched into an on state and an off state by means of pulse duration modulation, as well as to a control system. The inventive method includes, but is not limited to defining a standard pulse repetition period for the square wave signal for a range of a nominal pulse-duty factor, and increasing the pulse repetition period of the square wave signal referred to the standard pulse repetition period if a nominal pulse-duty factor falls short of a first lower threshold value and/or if a nominal pulse-duty factor exceeds a first upper threshold value. | 07-14-2011 |
| 20110193604 | PULSE CONTROL DEVICE - A pulse control device is maintained with a constant pulse width corresponding to a change of process or temperature. The pulse control device comprises a fuse set for selectively outputting a delay increase signal and a delay decrease signal that have a different state based on a cutting or non-cutting state of a fuse on which information on a change of process is programmed, and a pulse generator provided with a plurality of delay cells with predetermined time delay for selectively increasing or decreasing the number of the plurality of delay cells depending on the delay increase signal and the delay decrease signal to generate an internal clock with a pulse width corresponding to the number of the increased or decreased delay cells. | 08-11-2011 |
| 20110248758 | CLOCK SUPPLY CIRCUIT AND CONTROL METHOD THEREOF - A clock supply circuit includes a clock generating portion configured to generate a clock signal and to change a frequency of the clock signal from a first frequency to a second frequency being higher than the first frequency; and a intermittent clock generating portion configured to receive the clock signal and to mask a clock pulse of the clock signal at a predetermined rate for a predetermined period when the frequency of the clock signal is changed to the second frequency. | 10-13-2011 |
| 20110285440 | FREQUENCY JITTER CONTROLLER FOR POWER CONVERTER - A frequency-jitter-controller for a power-converter is provided, and which includes a first and a second capacitance units, a first and a second charge-discharge control units, a comparing unit and a control unit. Both capacitance units are charged to a crossing-voltage during a charging phase and discharged to a reference voltage and a clamp voltage respectively during a discharging-phase in response to operations of both charge-discharge control units. The comparing unit outputs a pulse signal, compares voltages of both capacitance units during the charging phase, and compares the voltage of the first capacitance unit and the reference voltage during the discharging phase. The control unit generates a frequency jitter control signal according to the pulse signal to adjust a rising rate of the voltage on the second capacitance unit, so as to change a frequency of the pulse signal, and thus reduce EMI generated by switching switch-elements in the power-converter. | 11-24-2011 |
| 20110304370 | PROGRAMMABLE CONTROL CLOCK CIRCUIT INCLUDING SCAN MODE - A programmable clock control circuit includes a base block configured to control operation of the programmable clock control circuit and a chop block configured to control the width of an output clock signal of the programmable clock control circuit. The circuit also includes a pulse width variation block providing a pulse width variation output to the base block, the base block output being variable to provide at least three different output pulse widths. The circuit also includes a launch clock delay block coupled to delay the output of the base block and a scan clock delay block to delay the output pulse and a selector that causes either the scan clock delay block or the launch clock delay block to be active based on a value of a scan gate signal. | 12-15-2011 |
| 20120105121 | Device and Method for Signal Amplification - A signal amplification device for amplifying a signal according to a gain indication signal is disclosed. The signal amplification device includes a pulse width modulator for generating a pulse width modulation signal according to the gain indication signal, a counter for counting a period number of the pulse width modulation signal according to a standard clock signal, and an amplifier for amplifying the signal according to the period number. | 05-03-2012 |
| 20120154004 | PULSE SIGNAL GENERATION CIRCUIT AND METHOD FOR OPERATING THE SAME - A pulse signal generation circuit includes a transfer path configured to receives and transfer a first pulse signal, a pulse adjustment unit configured to adjust a pulse width of the first pulse signal by applying charges to the transfer path in response to a control signal, and a pulse output unit configured to output a second pulse signal of the adjusted pulse width in response to an output of the transfer path. | 06-21-2012 |
| 20120182054 | PROGRAMMABLE RING OSCILLATOR USED AS A TEMPERATURE SENSOR - A method of programming a ring oscillator for use as a temperature sensor comprises selecting an initial number of delay elements for use in a ring oscillator. The method further comprise starting a system clock counter and counting pulses of the ring oscillator until the system clock counter reaches a programmed value. The method also comprises determining whether a number of counted ring oscillator pulses is between lower and upper count thresholds and changing the number of delay elements for the ring oscillator as a result of the number of counted ring oscillator pulses being less than the lower count threshold or greater than the upper count threshold. | 07-19-2012 |
| 20120218017 | Channel Reception Characteristics Through Clock Rate Adjustment - A method, apparatus and system are described for adjusting the frequency of one or more clock signals used by a device. The one or more clock signals are adjusted by a determined amount when a channel quality metric of an RF channel in use by the device indicates a degradation in the reception quality. | 08-30-2012 |
| 20120249202 | Pulse Width Modulation for Switching Amplifier - A device and a method for implementing pulse width modulation for switching amplifiers ( | 10-04-2012 |
| 20120262211 | CLASS D PULSE WIDTH MODULATOR WITH DUAL FEEDBACK - This document discusses, among other things, a modulator including a first integrator configured to receive an input signal and a first feedback signal from an output stage, a second integrator configured to receive an output of the first integrator and a second feedback signal, and a comparator configured to be coupled to a regulated supply voltage, to receive an output of the second integrator and a modulation signal, and to provide a pulse width modulated representation of the input signal. The output stage is configured to be coupled to an unregulated supply voltage, and the second feedback signal can include a representation of an output of the comparator configured to reduce artifacts in the pulse width modulated representation of the input signal induced by changes in an amplitude of the unregulated supply voltage. | 10-18-2012 |
| 20120313682 | Direct drive waveform generator - A high voltage waveform is generated that is similar to a low voltage input waveform. The high voltage waveform is a series of pulses that are applied directly to the device. An error signal controls the frequency, magnitude, and duration of the pulses. A feedback signal derived from the high voltage waveform is compared with the input waveform to produce the error signal. | 12-13-2012 |
| 20130141147 | PULSE WIDTH ADJUSTING CIRCUIT AND METHOD - The pulse width adjusting circuit includes a pulse delaying circuit for inputting an inputted pulse signal a and for outputting a plurality of different delayed pulse signals b | 06-06-2013 |
| 20130147533 | PHASE AVERAGED PULSE WIDTH MODULATOR - A method is provided. A noise shaped signal having a plurality of instants is generated with each instant being associated with at least one of a plurality of output levels. A next phase is selected for each instant, where each next phase is a circularly shifted phase based at least in part on a previous phase for the associated output level for its instant. A plurality of PWM signals is then generated using the phase for each instant, and an amplified signal is generated from the plurality of PWM signals. | 06-13-2013 |
| 20130271195 | Configurable Power Supply Integrated Circuit - A power integrated circuit includes, in part, a multitude of controllers, a multitude of pulse-width generators, a multitude of output stages and a configuration matrix. Each controller is adapted to be responsive to a feedback signal and a reference signal to generate a control signal carrying pulse width information. Each control signal causes a difference between an associated output voltage feedback signal and the reference signal to be less than a predefined value. Each pulse-width generator is associated with and responsive to a different one of the controllers to generate a pulse-width modulated signal in response. The configuration matrix selectively couples the plurality of pulse-width generators to the output stages. | 10-17-2013 |
| 20140203856 | Device for Controlling the On and Off Time of the Metal Oxide Semiconductor Field Effect Transistor (MOSFET), A Device Spark Coating the Surfaces of Metal Workpiece Incorporating the Said Control Device and a Method of Coating Metal Surfaces Using the Said Device - The present invention is a device for coating surfaces of metallic work pieces with an electrically conductive material by employing short duration high current packets of pulses in which the work piece forms the cathode and the consumable coating material forms the anode, which are connected to a generator for generating pulses by charging and discharging a bank of capacitors using a MOSFET. The invention is also a device for controlling the on and off time of a metal oxide semiconductor field effect transistor (MOSFET) | 07-24-2014 |
| 20140240015 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a voltage-control-type clock generation circuit having a plurality of stages of first delay elements and whose oscillation frequency is controlled according to a control voltage applied to the first delay elements; a delay circuit having a plurality of stages of second delay elements connected serially; and a selection circuit selecting one from pulse signals output by the plurality of stages of respective second delay elements. The first delay elements and the second delay elements have a same structure formed on a same semiconductor substrate, and a delay amount of the second delay elements is adjusted according to the control voltage. | 08-28-2014 |
| 20140320187 | BUFFER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A buffer circuit section receives an input clock, and outputs an output clock by wave-shaping the input clock, a measurement circuit section measures a first pulse width at a first potential level of the output clock and a second pulse width at a second potential level of the output clock, and an adjustment circuit section adjusts a ratio between the first pulse width and the second pulse width by varying a drive capability of the buffer circuit section on the basis of the measurement result of the measurement circuit section. | 10-30-2014 |
| 20150145573 | PULSE SIGNAL GENERATION CIRCUIT AND OPERATING METHOD THEREOF - The present invention relates to a pulse signal generation circuit for changing a pulse width of an input pulse signal and outputting an output pulse signal having the changed pulse width. In an aspect, the pulse signal generation circuit may include a control signal generator configured to generate at least one control signal according to a pulse width of a input pulse signal and a pulse signal generator configured to control a pulse width of an input pulse signal in response to a control signal and to generate an output pulse signal with the controlled pulse width. The control signal controls the pulse width of the output pulse signal. | 05-28-2015 |
| 20150333747 | PROGRAMMABLE RING OSCILLATOR USED AS A TEMPERATURE SENSOR - A method of programming a ring oscillator for use as a temperature sensor comprises selecting an initial number of delay elements for use in a ring oscillator. The method further comprise starting a system clock counter and counting pulses of the ring oscillator until the system clock counter reaches a programmed value. The method also comprises determining whether a number of counted ring oscillator pulses is between lower and upper count thresholds and changing the number of delay elements for the ring oscillator as a result of the number of counted ring oscillator pulses being less than the lower count threshold or greater than the upper count threshold. | 11-19-2015 |
| 20160028380 | SIGNAL PROCESSING - A method of processing an amplitude-modulated analogue signal at a carrier frequency F | 01-28-2016 |
| 20160079973 | METHOD AND DEVICE FOR PROCESSING PWM DATA - The present disclosure provides a method and a device for processing PWM data, so as to reduce the size of the PWM data. The method includes: dividing pulse widths in the PWM data into at least one pulse width group; determining a convergence pulse width for each of the at least one pulse width group, herein each of the at least one pulse width group converges around a same pulse width, respectively; replacing each of the at least one pulse width group with the corresponding convergence pulse width; and representing the PWM data by using the convergence pulse widths. Through the technical solution, the size of the PWM data may be reduced, transmission speed of the PWM data may be improved, and the space for storing the PWM data may be decreased. | 03-17-2016 |
| 20160173078 | GATE PULSE MODULATION WAVEFORM-SHAPING CIRCUIT | 06-16-2016 |
