| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 327173000 | Pulse narrowing | 6 |
| 20090051397 | Clock pulse generating circuit - A clock pulse generating circuit includes a pulse generator, a clock regulator, and a pre-driver. The pulse generator is configured to vary pulse widths of a rising clock signal and a falling clock signal. The clock regulator is configured to regulate output signals of the pulse generator to prevent an overlap and a duty drop of the output signals of the pulse generator. The pre-driver is configured to output data driving signals according to output signals of the clock regulator. | 02-26-2009 |
| 20110163788 | METHOD AND DEVICE FOR GENERATING SHORT PULSES - There is described a method and corresponding pulse generating device, for generating an output pulse signal having an output pulse duration. The method comprises: receiving at an input port an input pulse signal comprising an input pulse duration; duplicating the input pulse signal into a first digital pulse signal and a second digital pulse signal each comprising the input pulse duration; delaying at least one of the first and the second digital pulse signals by a time delay to obtain respectively a first and a second delayed digital pulse signal, a time delay difference between the first and the second delayed digital pulse signals being substantially equal to the output pulse duration; logically combining the first and the second delayed digital pulse signals to generate the output pulse signal with the output pulse duration smaller than the input pulse duration; and outputting the output pulse signal at an output port. | 07-07-2011 |
| 20120139598 | PULSE GENERATOR AND METHOD FOR GENERATING PULSE - A pulse generator is provided. The pulse generator includes: a time delayed pulse generation unit including a plurality of delay cells for receiving a first pulse having a first pulse width and outputting pulses delayed by a particular time delay value on the basis of one of a rising edge and a falling edge of the first pulse; an edge combiner configured to receive the plurality of time delayed pulses from the time delayed pulse generation unit and generate second pulses having a second pulse width; and a channel selector configured to regulate the number of outputs of the second pulses generated by the edge combiner. | 06-07-2012 |
| 20130300479 | METHOD AND DEVICE FOR GENERATING SHORT PULSES - There is described a method and corresponding pulse generating device, for generating an output pulse signal having an output pulse duration. The method comprises: receiving at an input port an input pulse signal comprising an input pulse duration; duplicating the input pulse signal into a first digital pulse signal and a second digital pulse signal each comprising the input pulse duration; delaying at least one of the first and the second digital pulse signals by a time delay to obtain respectively a first and a second delayed digital pulse signal, a time delay difference between the first and the second delayed digital pulse signals being substantially equal to the output pulse duration; logically combining the first and the second delayed digital pulse signals to generate the output pulse signal with the output pulse duration smaller than the input pulse duration; and outputting the output pulse signal at an output port. | 11-14-2013 |
| 20160028389 | SIGNAL OUTPUT CIRCUIT, ELECTRONIC DEVICE AND MOVING OBJECT - A signal output circuit includes a signal correction circuit, having a clock signal input thereto, which corrects the clock signal to output the corrected signal, and a waveform shaping circuit that shapes a signal from the signal correction circuit. In the clock signal, pulses having a pulse width τ capable of being represented by a length of a time are periodically arranged with a period T, and the pulse width τ and the period T satisfy a relation of τ/T≠0.5. The signal correction circuit attenuates a signal having a second frequency based on a time width of at least one of the pulse width τ and a pulse width T−τ, rather than a signal having a first frequency based on the period T. | 01-28-2016 |
| 20160065191 | PULSE CONVERTER CIRCUIT - A pulse converter circuit includes a logic circuit to which a first signal is input and from which a second signal is output. The logic circuit includes a p-channel transistor which determines whether a voltage of the second signal is set to a first voltage depending on a voltage of the gate; and an n-channel transistor which determines whether the voltage of the second signal is set to a second voltage, which is higher than the first voltage, depending on a voltage of the gate. The p-channel transistor includes a semiconductor layer containing an element of a group 14. The n-channel transistor includes an oxide semiconductor layer. | 03-03-2016 |
