Entries |
Document | Title | Date |
20080224293 | Method And Apparatus For Fabricating A Plurality Of Semiconductor Devices - A method includes the steps of providing a carrier comprising a plurality of cavities; placing at least one semiconductor element into each of the cavities; filling the plurality of cavities with a packaging material; and removing the carrier. | 09-18-2008 |
20080237823 | Aluminum Based Bonding of Semiconductor Wafers - Aluminum or aluminum alloy on each of a pair of semiconductor wafers is thermocompression bonded. Aluminum-based seal rings or electrical interconnects between layers may be thus formed. On a MEMS device, the aluminum-based seal ring surrounds an area occupied by a movably attached microelectromechanical structure. According to a manufacturing method, wafers have an aluminum or aluminum alloy deposited thereon are etched to form an array of aluminum-based rings. The wafers are placed so as to bring the arrays of aluminum-based rings into alignment. Heat and compression bonds the rings. The wafers are singulated to separate out the individual semiconductor devices each with a bonded aluminum-based ring. | 10-02-2008 |
20080258284 | ULTRA-THIN CHIP PACKAGING - A packaging method involves attaching a first chip to a stable base, forming contact pads at locations on the stable base, applying a medium onto the stable base such that it electrically insulates sides of the first chip, forming electrical paths on the medium, attaching a second chip to the first chip to form an assembly, and removing the stable base. A package has at least two chips electrically connected to each other, at least one contact pad, an electrically conductive path extending from the contact pad to a contact point on at least one of the chips, a planarizing medium, and a coating material on top of the planarizing medium. | 10-23-2008 |
20080283991 | Housed active microstructures with direct contacting to a substrate - A microstructured component with microsensors or other active mircrocomponent is provided. The microstructured component includes a substrate and at least one housing arranged on the substrate with one or more active microstructures situated on it. | 11-20-2008 |
20080308920 | SYSTEM AND METHOD OF FABRICATING MICRO CAVITIES - A system and method for manufacturing micro cavity packaging enclosure at the wafer level using MEMS (MicroElectroMechanical Systems) process, wherein micro cavities are formed from epoxy-bonded single-crystalline silicon wafer as its cap, epoxy and deposited metal or insulator as at least part of its sidewall, on substrate wafers. | 12-18-2008 |
20090001538 | PRINTED WIRING BOARD STRUCTURE, ELECTRONIC COMPONENT MOUNTING METHOD AND ELECTRONIC APPARATUS - According to one embodiment, a printed wiring board structure comprises a printed wiring board having first and second component mounting surfaces at front and back sides thereof, respectively, each for mounting a semiconductor package loading a semiconductor chip loaded on a substrate as a mounting component, a first semiconductor package mounted on the first component mounting surface, and a second semiconductor package mounted on the second component mounting surface, wherein the first and second semiconductor packages have a positional relationship such that the substrates are partially overlapped via the printed wiring board, and the semiconductor chips are not overlapped. | 01-01-2009 |
20090026599 | Memory module capable of lessening shock stress - A memory module capable of lessening shock stresses, primarily comprises a multi-layer printed circuit board (PCB), a plurality of memory packages, and a stress-buffering layer. The memory packages are disposed at least on one of the rectangular surfaces of the PCB. The stress-buffering layer is disposed at least on both short sides of the PCB and extended to the two rectangular surfaces to reduce the impact stresses. Preferably, the stress-buffering layer is further disposed on the other long side of the PCB opposite to the one with disposed gold fingers. | 01-29-2009 |
20090057861 | INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH SIDE-BY-SIDE AND OFFSET STACKING - An integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated circuit device and adjacent to the integrated circuit package system; connecting the integrated circuit package system and the substrate; and forming a package encapsulation as a cover for the first integrated circuit device, the integrated circuit package system, and the second integrated circuit device. | 03-05-2009 |
20090072372 | Planar Array Contact Memory Cards - A Planar Memory Module (PAMM) device comprising a generally planar card comprising a first side and a second side, the first side having a plurality of couplings and the second side having a plurality of connectors, a plurality of memory devices coupled to the card via a first portion of the plurality of couplings, and at least one hub chip coupled to the card via a second portion of the plurality of couplings. Each of the plurality of couplings is connected to an associated one of the plurality of connectors. | 03-19-2009 |
20090108427 | Techniques for Modular Chip Fabrication - Techniques for modular chip fabrication are provided. In one aspect, a modular chip structure is provided. The modular chip structure comprises a substrate; a carrier platform attached to the substrate, the carrier platform comprising a plurality of conductive vias extending through the carrier platform; and a wiring layer on the carrier platform in contact with one or more of the conductive vias, wherein the wiring layer comprises one or more wiring levels and is configured to divide the carrier platform into a plurality of voltage islands; and chips, chip macros or at least one chip in combination with at least one chip macro assembled on the carrier platform. | 04-30-2009 |
20090166833 | SEMICONDUCTOR UNIT WHICH INCLUDES MULTIPLE CHIP PACKAGES INTEGRATED TOGETHER - A semiconductor unit includes an interface plate, a supporting plate integrally formed with the interface plate, two chip packages positioned at opposite sides of the supporting plate, and leading traces running in the interface plate and the supporting plate, connected with the chip packages respectively. | 07-02-2009 |
20090179317 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin. | 07-16-2009 |
20090200651 | Multi-chip package - A multi-chip package structure is provided with a first chip, a substrate adjacent to the first chip, a plurality of contacts connecting the first chip and the substrate, a second chip disposed between the first chip and the substrate and connecting to the first chip, and a underfill film, wherein the underfill film covers the contact to isolate the contact from the second chip, wherein an empty space is defined by the second chip and the substrate so that the second chip does not contact the substrate. | 08-13-2009 |
20090230531 | Semiconductor Package with Penetrable Encapsulant Joining Semiconductor Die and Method Thereof - A semiconductor device is made by mounting a first semiconductor die to a first substrate, forming a first encapsulant over the first semiconductor die, and forming a second encapsulant over the first encapsulant. The second encapsulant is penetrable, thermally conductive material. A second semiconductor die is mounted to the second substrate. A bond wire electrically connects the second semiconductor die to the second substrate. A passive circuit element is mounted to the second substrate. Leading with the second encapsulant, the first substrate is pressed onto the second substrate so that the second encapsulant completely covers the second semiconductor die, bond wire, and passive circuit element. The second encapsulant is then cured. A third encapsulant is formed over the first and second substrates. A shield can be disposed over the second semiconductor die with openings for the second encapsulant to flow through when pressed onto the second substrate. | 09-17-2009 |
20090273067 | MULTI-CHIP DISCRETE DEVICES IN SEMICONDUCTOR PACKAGES - Semiconductor packages that contain multiple dies containing discrete devices and methods for making such devices are described. The semiconductor package contains both a first die containing transistor and second die containing a diode. The interconnect lead of the semiconductor package is connected to the bond pad of the transistor. At the same time, the interconnect lead contains a die attach pad for the diode. The result of this configuration is an integrated functional semiconductor device with a diminished footprint and decreased cost of manufacture. By using more than a single die containing a discrete device in a single semiconductor package, the device can also provide a wider variety of functions. Other embodiments are also described. | 11-05-2009 |
20090302447 | SEMICONDUCTOR ARRANGEMENT HAVING SPECIALLY FASHIONED BOND WIRES AND METHOD FOR FABRICATING SUCH AN ARRANGEMENT - A semiconductor arrangement includes first and second integrated circuits (dies), an electrically conductive intermediate element, and one or more bond conductors. The first and the second integrated circuits are arranged in a package. The first integrated circuit has a first contact pad. The second integrated circuit has a second contact pad. The intermediate element is disposed on the second contact pad. The conductors electrically connect the first and the second integrated circuits. At least one of the bond conductors has a first end electrically connected to the first contact pad, and a second wedge shaped end electrically connected to the intermediate element. The bond conductor is made of a first material and the intermediate element is made of a second material which is softer than the first material. | 12-10-2009 |
20090315165 | Method and system for the modular design and layout of integrated circuits - An integrated circuit (IC) and fabrication method thereof is provided that include the steps of specifying a plurality of required tile modules suitable for a particular end application, each of the modular tiles being configured to perform a predetermined function and constructed to have approximately the same length and width dimensions. The modular tiles are used to form the IC in a standard IC fabrication process. In many implementations, physical layout of the IC does not include the step of routing. Capabilities also include configuring the modular tiles to have programmable performance parameters and configuring the modular tiles to cooperate usefully with one another based on a programmable parameter. | 12-24-2009 |
20090321905 | Multi-Package Ball Grid Array - A multi-package module that includes a multi-layer interconnect structure, a housing structure attached to the multi-layer interconnect structure, and a plurality of integrated circuit packages inserted into slots in the housing structure, and placed into contact with the multi-layer interconnect structure. The integrated circuit packages can be removed from the slots in the housing structure, thereby enabling testing and/or replacement of the integrated circuit packages. | 12-31-2009 |
20090321906 | SEMICONDUCTOR DEVICE WITH PACKAGE TO PACKAGE CONNECTION - A semiconductor package comprises a first package; a second package that is provided on the first package; and a first interconnect that comprises a bump to couple to the first package and a base material layer to cover the bump, wherein the second package is supported on the base material layer that is coupled to the bump. | 12-31-2009 |
20100001389 | PACKAGE STRUCTURE FOR RADIO FREQUENCY MODULE AND MANUFACTURING METHOD THEREOF - A package structure for radio frequency module and a manufacturing method thereof are provided. The package structure includes a multi-layer substrate, a first chip, a second chip, a number of solder bumps, a first molding compound and a second molding compound. The substrate includes a metallic middle layer and has a first and a second surfaces. The first and the second chips respectively disposed on the first and the second surfaces are electrically connected to the substrate. The first molding compound is disposed on the first surface and covers the first chip. The solder bumps disposed on the second surface are respectively electrically connected to the first and the second chips via the substrate. The second molding compound disposed on the second surface covers the second chip and encircles the sidewalls of the solder bumps, and the connection surfaces of solder bumps are exposed outside the second molding compound. | 01-07-2010 |
20100019367 | METHOD OF FORMING A MOLDED ARRAY PACKAGE DEVICE HAVING AN EXPOSED TAB AND STRUCTURE - In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and then molding the array lead frame while leaving portions of the leads exposed to form a molded array structure. The molded array structure is then separated to provide molded flat pack style packages having exposed leads for insertion mount and exposed tab portions. In an alternative embodiment, the separation step produces a no-lead configuration with exposed tab portions. | 01-28-2010 |
20100044845 | CIRCUIT SUBSTRATE, AN ELECTRONIC DEVICE ARRANGEMENT AND A MANUFACTURING PROCESS FOR THE CIRCUIT SUBSTRATE - [Problem to be Solved] There are provided a circuit substrate, an electronic device arrangement and a manufacturing process for the circuit substrate which enable to directly implement the surface mounting and so on of electronic components on the conductive wiring without forming solder resist, and also which enable to enhance high speed transmission characteristics and to enlarge wiring rule for the electrode terminal of the function element to be contained therein, and to implement with excellent workability and reliability when connecting the electronic device. | 02-25-2010 |
20100052129 | MULTI-CHIP PACKAGE AND MANUFACTURING METHOD - Manufacturing method and a multi-chip package, which comprises a conductor pattern ( | 03-04-2010 |
20100052130 | SEMICONDUCTOR PACKAGE AND METHODS FOR MANUFACTURING THE SAME - Provided is a semiconductor package. The semiconductor package includes a bonding wire electrically connecting a first package substrate and a second package substrate to each other and an insulating layer adhering the first package substrate and the second package substrate to each other and covering a portion of the bonding wire. | 03-04-2010 |
20100102425 | ULTRA WIDEBAND SYSTEM-ON-PACKAGE AND METHOD OF MANUFACTURING THE SAME - This research discloses an ultra wideband system-on-package (SoP). The SoP includes a package body; a first integrated circuit mounted on the package body; a first signal transmission unit connected to the first integrated circuit; a signal via connected to the first signal transmission unit and including a slab line and a trough line; and a second signal transmission unit connected to the signal via. The technology of the present research can transmit ultra broadband signals by minimizing discontinuity of signals appearing during vertical transition that occurs in the course of a signal transmission to/from an external circuit, and a fabrication method thereof. | 04-29-2010 |
20100127372 | SEMICONDUCTOR PACKAGES - A semiconductor package comprising a first semiconductor sub-package ( | 05-27-2010 |
20100148334 | INTERGRATED CIRCUIT PACKAGE SUPPORT SYSTEM - A system for supporting integrated circuit packages to prevent mechanical failure of the packages at their connection to a printed circuit board or card involves bracing the packages to the board or card, the packages may also be braced against one another. The structure is particularly well adapted to supporting vertical surface mount packages at a point spaced from the point where they connect to a printed circuit board or card. | 06-17-2010 |
20100224974 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PATTERNED SUBSTRATE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a component side and a system side; depositing a solder resist layer on the component side of the package substrate; patterning groups of access openings and a die mount opening in the solder resist layer; attaching an integrated circuit die in the die mount opening; forming conductive contacts in the access openings; and attaching system interconnects to the system side of the package substrate including controlling a coplanarity of the system interconnects by the solder resist layer. | 09-09-2010 |
20100237481 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDED CONNECTION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: attaching an integrated circuit having a through via over a substrate with the through via coupled to the substrate; attaching a conductive support over the substrate and adjacent to the integrated circuit; forming an encapsulation over the substrate with the conductive support exposed from the encapsulation; and attaching an external interconnect under the substrate. | 09-23-2010 |
20100314734 | Processes and structures for IC fabrication - The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process bonds multiple interconnect wires to bond pads with electrical linkages between the bond pads and then subsequently separates the adjacent bond pads. | 12-16-2010 |
20100314735 | Processes and structures for IC fabrication - The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process coats the component surfaces to facilitate the bonding of the bond pads. In another aspect, the present process coats the bond pads with shelled capsules to facilitate the bonding of the bond pads. | 12-16-2010 |
20110089551 | SEMICONDUCTOR DEVICE WITH DOUBLE-SIDED ELECTRODE STRUCTURE AND ITS MANUFACTURING METHOD - According to the present invention, a recess portion is formed in a package substrate which is formed of a multilayer organic substrate having a multilayer wiring, and an LSI chip is accommodated within the recess portion. Wiring traces are formed on the upper surface of a resin which seals the LSI chip connected to the multilayer wiring. The wiring traces are connected to terminal wiring traces connected to the multilayer wiring on the front face of the package substrate and to front-face bump electrodes for external connection on the upper surface of the resin. On the back face side of the package substrate, back-face bump electrodes for external connection are formed and connected to the multilayer wiring. | 04-21-2011 |
20110095413 | Method and Apparatus for Semiconductor Device Fabrication Using a Reconstituted Wafer - Method and apparatus for semiconductor device fabrication using a reconstituted wafer is described. In one embodiment, diced semiconductor chips are placed within openings on a frame. A reconstituted wafer is formed by filling a mold compound into the openings. The mold compound is formed around the chips. Finished dies are formed within the reconstituted wafer. The finished dies are separated from the frame. | 04-28-2011 |
20110180918 | Arrangement Comprising at Least One Power Semiconductor Module and a Transport Packaging - An arrangement comprising at least one power semiconductor module and a transport packaging, wherein the power semiconductor module has a base element, a housing and connection elements and the transport packaging has a generally planar cover layer, a cover film and at least one trough-like plastic shaped body for each power semiconductor module. The at least one plastic shaped body only partly encloses the respective power semiconductor module and a part of the plastic shaped body does not directly contact the power semiconductor module. Furthermore, a first side of the at least one power semiconductor module becomes situated directly or indirectly on the first main surface of the cover layer, while the cover film covers the further sides of the power semiconductor module directly and/or indirectly, and bears at least partly against the plastic shaped body. | 07-28-2011 |
20130075886 | SEMICONDUCTOR DEVICE - A semiconductor device is provided with: a semiconductor element; and a connecting conductor that electrically connects at least one of an input terminal and an output terminal of the semiconductor element to a connection terminal of an electronic device. In this semiconductor device, the connecting conductor is a block structure. | 03-28-2013 |
20130207253 | Complex Semiconductor Packages and Methods of Fabricating the Same - Disclosed are complex semiconductor packages, each including a large power module package which includes a small semiconductor package, and methods of manufacturing the complex semiconductor packages. An exemplary complex semiconductor package includes a first package including: a first packaging substrate; a plurality of first semiconductor chips disposed on the first packaging substrate; and a first sealing member covering the first semiconductor chips on the first packaging substrate; and at least one second package separated from the first packaging substrate, disposed in the first sealing member, and including second semiconductor chips. | 08-15-2013 |
20130221510 | METHODS FOR BONDING MATERIAL LAYERS TO ONE ANOTHER AND RESULTANT APPARATUS - Methods and apparatus provide for a structure, including: a first glass material layer; and a second material layer bonded to the first glass material layer via bonding material, where the bonding material is formed from one of glass frit material, ceramic frit material, glass ceramic frit material, and metal paste, which has been melted and cured. | 08-29-2013 |
20140042607 | MICROBUMP SEAL - A sealable microelectronic device providing mechanical stress endurance which includes a semiconductor substrate and a method of manufacture. A substantially continuous sealing element is positioned adjacent an outer periphery and between a microelectronic component and the semiconductor substrate, or another microelectronic component. The sealing element seals the microelectronic component to the substrate or another microelectronic component, and provides structural support to the microelectronic device. | 02-13-2014 |
20140103516 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes an interposer and a first semiconductor package comprising a first substrate, and a first semiconductor chip mounted on the first substrate. The device also includes at least two second semiconductor packages electrically connected to a top surface of the interposer, the second semiconductor packages spaced apart from each other in a direction parallel to the top surface of the interposer. Each of the second semiconductor packages comprises a second substrate, a second semiconductor chip mounted on the second substrate and a mold part disposed on the second substrate to protect the second semiconductor chip. | 04-17-2014 |
20140103517 | PACKAGE SUBSTRATE STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A package substrate includes a substrate including a top surface and a bottom surface facing each other, the top surface including a first region where a semiconductor chip is mounted and a second region surrounding the first region, and a dummy post on the second region of the top surface to protrude upward from the top surface. | 04-17-2014 |
20140175631 | SEMICONDUCTOR MODULE HAVING SLIDING CASE AND MANUFACTURING METHOD THEREOF - There is provided a semiconductor module capable of being easily manufactured and a manufacturing method thereof, the semiconductor module including a module substrate on which at least one electronic element is mounted, at least one external connection terminal fastened to the module substrate, and a case formed by coupling a first case and a second case, wherein the first case and the second case accommodate the module substrate at both ends of the module substrate and are coupled to each other. | 06-26-2014 |
20140217569 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device according to the present invention includes a plurality of semiconductor chips, a plate electrode disposed on the plurality of semiconductor chips for connecting the plurality of semiconductor chips, and an electrode disposed on the plate electrode. The electrode has a plurality of intermittent bonding portions to be bonded to the plate electrode and a protruded portion which is protruded erectly from the bonding portions. The protruded portion has an ultrasonic bonding portion which is parallel with the bonding portion and is ultrasonic bonded to an external electrode. | 08-07-2014 |
20150076678 | SEMICONDUCTOR DEVICE - A partition in lattice form forms a plurality of housing sections. A plurality of circuit blocks including a semiconductor block and a terminal base block are electrically connected one to another in a state of being housed in the housing sections to form a power semiconductor circuit. The semiconductor block is formed by covering an IGBT with an insulating material. A collector of the IGBT is connected to an electrode through a metal plate. The electrode is led out from an inner portion of the insulating material to a side surface of the insulating material. A terminal base block includes a power terminal to which an external power wiring for supplying electric power to the IGBT is electrically connected, and a screw hole into which a screw for fixing the power wiring is inserted. | 03-19-2015 |
20150115427 | PACKAGE STRUCTURE AND PACKAGING METHOD THEREOF - A package structure and a packaging method thereof are provided, in which an inductor is integrated into a substrate so as to save a packaging space and thus improve the integration level and packaging effect of the system. The package structure includes a substrate, wherein a first metal enclosing structure and a second metal enclosing structure are provided on the substrate and are connected through a connecting hole in the substrate so as to form a helical | 04-30-2015 |
20160027710 | SEMICONDUCTOR MODULE, SEMICONDUCTOR MODULE PACKAGE AND SEMICONDUCTOR APPARATUS - A semiconductor module comprising a plurality of electrically conductive top plates, an electrically conductive base plate, a plurality of semiconductor chips installed on the base plate, a first power supply connected to the plates, a second power supply connected to the plates and an electrically insulating outer casing component. The semiconductor chips are individually in contact with the top plates. Each semiconductor chip comprises a first electrode electrically coupled with the base plate, and a second electrical pole electrically coupled with the corresponding top plate. The first power supply connecting plate is equipped with protruding parts that are individually in electrical contact with the top plates. The second power supply connecting plate is electrically connected to the base plate. The outer casing component is used to integrate the first power supply connecting plate and the second power supply connecting plate. The outer casing component comprises at least one opening. | 01-28-2016 |
20160064302 | SEMICONDUCTOR MODULE - A semiconductor module uses pin bonding and improves cooling capacity. The semiconductor module includes a semiconductor element; a pin electrically and thermally connected to an upper surface of the semiconductor element; a pin wiring substrate having a first metal film and a second metal film respectively provided on the rear and front surfaces of a pin wiring insulating substrate, the first metal film being bonded to the pin; a first DCB substrate having a third metal film and a fourth metal film respectively provided on the rear and front surfaces of a first ceramic insulating substrate, the third metal film being bonded to a lower surface of the semiconductor element; a first cooler thermally connected to the fourth metal film; and a second cooler that thermally connected to the second metal film. | 03-03-2016 |
20160111346 | Semiconductor Component Having Inner and Outer Semiconductor Component Housings - A semiconductor component includes an inner semiconductor component housing and an outer semiconductor component housing. The inner semiconductor component housing includes a semiconductor chip, a first plastic housing composition and first housing contact surfaces. At least side faces of the semiconductor chip are embedded in the first plastic housing composition and the first housing contact surfaces are free of the first plastic housing composition and include a first arrangement. The outer semiconductor component housing includes a second plastic housing composition and second housing contact surfaces which include a second arrangement. The inner semiconductor component housing is situated within the outer semiconductor component housing and is embedded in the second plastic housing composition. At least one of the first housing contact surfaces is electrically connected with at least one of the second housing contact surfaces. | 04-21-2016 |
20160254255 | POWER SEMICONDUCTOR MODULE AND COMPOSITE MODULE | 09-01-2016 |