| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257257000 | Light responsive or combined with light responsive device | 12 |
| 20080230811 | Semiconductor Structure - The invention relates to a semiconductor structure, especially for use in a semiconductor detector. The semiconductor structure includes a weakly doped semiconductor substrate (HK) of a first or second doping type, a highly doped drain region (D) of a second doping type, located on a first surface of the semiconductor substrate (HK), a highly doped source region (S) of the second doping type, located on the first surface of the semiconductor substrate (HK), a duct (K) extending between the source region (S) and the drain region (D), a doped inner gate region (IG) of the first doping type, which is at least partially located below the duct (K), and a blow-out contact (CL) for removing charge carriers from the inner gate region (IG). According to the invention, the inner gate region (IG) extends in the semiconductor substrate (HK) at least partially up to the blow-out contact (CL) and the blow-out contact (CL) is located on the drain end relative to the source region (S). | 09-25-2008 |
| 20080315265 | Semiconductor Radiation Detector Optimized for Detecting Visible Light - A semiconductor radiation detector comprises a bulk layer of semiconductor material, and on a first surface of the bulk layer in the following order: a modified internal gate layer of semiconductor of second conductivity type, a barrier layer of semiconductor of first conductivity type and pixel dopings of semiconductor of the second conductivity type. The pixel dopings are adapted to be coupled to at least one pixel voltage in order to create pixels corresponding to pixel dopings. The device comprises a first conductivity type first contact. Said pixel voltage is defined as a potential difference between the pixel doping and the first contact. The bulk layer is of the first conductivity type. On a second surface of the bulk layer opposite to the first surface, there is nonconductive back side layer that would transport secondary charges outside the active area of the device or function as the radiation entry window. | 12-25-2008 |
| 20110079824 | ALTERNATE 4-TERMINAL JFET GEOMETRY TO REDUCE GATE TO SOURCE CAPACITANCE - A 4-Terminal JFET includes a substrate having a first conduction type and an upper layer having a second, opposite, conduction type over the substrate. A gate and a source are embedded in the upper layer. A gate pad is electrically connected to the gate. A region, which has a first conduction type, is formed in the upper layer and separates the upper layer into two sections. This region reduces the overall capacitance between the gate pad and the source. Reduced overall gate to source capacitance can result in reduced noise amplification in the JFET. | 04-07-2011 |
| 257258000 | In imaging array | 9 |
| 20090159935 | CMOS Image Sensor and Method for Manufacturing the Same - Disclosed are a CMOS image sensor and a method for manufacturing the same, capable of improving the characteristics of the image sensor by increasing junction capacitance of a floating diffusion area. The CMOS image sensor generally includes a photodiode and a plurality of transistors (e.g., transfer, reset, drive, and select transistors), a first conductive type semiconductor substrate, having an active area including a photodiode area, a floating diffusion area, and a voltage input/output area, a gate electrode of each transistor on the active area, a first conductive type first well area in the semiconductor substrate corresponding to the voltage input/output area, a first conductive type second well area in the semiconductor substrate corresponding to the floating diffusion area, and a second conductive type diffusion area in the semiconductor substrate at opposed sides of each gate electrode. | 06-25-2009 |
| 20100084692 | IMAGE SENSOR WITH LOW CROSSTALK AND HIGH RED SENSITIVITY - A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but substantially not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but substantially not below the first plurality of color pixels. | 04-08-2010 |
| 20130153973 | IMAGE SENSOR PIXELS WITH JUNCTION GATE PHOTODIODES - Image sensor pixels are provided having junction gate photodiodes. A group of pixels may have a shared floating diffusion region and a shared source-follower transistor. The source-follower transistor may be a JFET source-follower with a gate that forms the floating diffusion region. The JFET source-follower may be a vertical or lateral JFET. A reset diode may be forward-biased to reset the floating diffusion region. Each pixel may have a JFET that serves as a charge transfer barrier between the junction gate photodiode and the floating diffusion region. The charge transfer barrier JFET may be a lateral JFET. The image sensor pixels may be formed without any metal-oxide-semiconductor devices. | 06-20-2013 |
| 20130214334 | SOLID-STATE IMAGING DEVICE - There is provided a solid-state imaging device in which a plurality of pixels is two-dimensionally arranged in a pixel region. Each of the pixels is formed in an island-shaped semiconductor. In this island-shaped semiconductor, a signal line N | 08-22-2013 |
| 20130270610 | SEMICONDUCTOR STRUCTURE, METHOD OF OPERATING SAME, AND PRODUCTION METHOD - A semiconductor structure includes a semiconductor layer of a first conductivity type, a photosensitive zone configured such that photogenerated charges may be accumulated in a first potential well, a region of the first conductivity type, formed in the semiconductor layer, for temporarily storing the photogenerated charges in a second potential well, a transfer gate between the region of the second conductivity type and the photosensitive zone for defining a potential barrier between the first and second potential wells during a non-transfer phase, and for eliminating the potential barrier between the first and second potential wells during a transfer phase, and a readout structure for reading out the temporarily stored photogenerated charges, which includes a JFET, the gate of which is formed by the region of the second conductivity type. | 10-17-2013 |
| 20150035014 | PIN DIODE STRUCTURE HAVING SURFACE CHARGE SUPPRESSION - A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes. | 02-05-2015 |
| 20150115332 | CMOS IMAGE SENSOR WITH GLOBAL SHUTTER, ROLLING SHUTTER, AND A VARIABLE CONVERSION GAIN, HAVING PIXELS EMPLOYING SEVERAL BCMD TRANSISTORS COUPLED TO A SINGLE PHOTODIODE AND DUAL GATE BCMD TRANSISTORS FOR CHARGE STORAGE AND SENSING - The invention describes image sensor array pixels with global and rolling shutter capabilities that utilize multiple BCMD transistors for storing and sensing charge for a single photodiode. This configuration improves the Dynamic Range (DR) of the sensor, by allowing sensing different image signals from a single pixel without saturation, a low level signal with long integration time followed by a high level signal with short integration time. Signal processing circuits can process these signals into a single Wide Dynamic Range (WDR) output. Further disclosed are pixels that use multiple-gate BCMD transistors for charge storage and sensing having multiple concentric gates, which allows changing the conversion gain of the BCMD transistors. Variable conversion gain is a useful feature when building WDR sensors since low conversion gain and high well capacity allows detection of high level signals and, at the same time, low level signals with high conversion gain and low noise. | 04-30-2015 |
| 20150372048 | SOLID-STATE IMAGE PICKUP DEVICE - A solid-state image pickup device includes a plurality of pixels each including a photoelectric conversion section that generates an electric charge in accordance with incident light and a junction field-effect transistor that outputs an image signal in accordance with the electric charge generated by the photoelectric conversion section. The solid-state image pickup device includes a first element isolation region using an insulator and a second element isolation region using a pn junction, the first element isolation region and the second element isolation region being arranged in a region in which the plurality of pixels are arranged. | 12-24-2015 |
| 20160099283 | PHOTOSENSOR WITH CHANNEL REGION HAVING CENTER CONTACT - A pixel cell includes a charge accumulation region having a second doping polarity buried completely in a semiconductor substrate having a first doping polarity beneath a first surface. The charge accumulation region accumulates image charge in response to light directed through a second surface. A channel region is disposed in the semiconductor substrate between the first surface and the charge accumulation region. A variable resistance of the channel region is responsive to the image charge accumulated in the charge accumulation region. A center contact coupled to a central portion of the channel region through the first surface to provide a radial current path through the channel region between the central portion of the channel region and a periphery of the channel region around the charge accumulation region to the semiconductor substrate. A readout signal responsive to the image charge in the charge accumulation region is provided at the center contact. | 04-07-2016 |
