Class / Patent application number | Description | Number of patent applications / Date published |
257185000 | Staircase (including graded composition) device | 10 |
20080203425 | Phototransistors, Methods of Making Phototransistors, and Methods of Detecting Light - A phototransistor ( | 08-28-2008 |
20080303058 | SOLID STATE IMAGING DEVICE AND METHOD FOR FABRICATING THE SAME - A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions. | 12-11-2008 |
20080308840 | PHOTO-FIELD EFFECT TRANSISTOR AND INTEGRATED PHOTODETECTOR USING THE SAME - A photo-FET based on a compound semiconductor including a channel layer formed on a substrate constituting a current path between source and drain electrodes, serving as part of a photodiode and a photosensitive region. A back-gate layer that serving as a substrate-side depletion layer formation layer is disposed between the substrate and the channel layer, and applies to the channel layer a back-gate bias by photogenerated carriers upon illumination. A barrier layer is disposed on the front side of the channel layer that causes one of the photogenerated carriers to run through the channel layer and other of the photogenerated carriers to sojourn or be blocked off. A front-side depletion layer formation layer is disposed on the front side of the channel layer brings the front-side depletion layer into contact with the substrate-side depletion layer without illumination to close the current path in the channel layer, bringing the photo-FET to an off-state. | 12-18-2008 |
20090020782 | Avalanche Photodiode With Edge Breakdown Suppression - The invention relates to an avalanche photodiode having enhanced gain uniformity enabled by a tailored diffused p-n junction profile. The tailoring is achieved by a two stage doping process incorporating a solid source diffusion in combination with conventional gas source diffusion. The solid source diffusion material is selected for its solubility to the dopant compared to the solubility of the multiplication layer to dopant. The solid source has a diameter between the first and second diffusion windows. Thus, there are three distinct diffusion regions during the second diffusion. The dopant in the multiplication layer at the edge region, the dopant from the solid source material with a relatively higher dopant concentration (limited by the solubility of the dopant in the solid source material) at the intermediate region, and the central region exposed to an infinite diffusion source from the solid source material as it is continually charged with new dopant from the external gas source. The result is that both the dopant concentration and the diffusion depth decrease gradually from the center to the edge of the device. This tailored diffusion profile enables control of the electric field distribution such that edge breakdown is suppressed. | 01-22-2009 |
20090315073 | Avalanche Photodiode - The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much. | 12-24-2009 |
20100012974 | PIN PHOTODIODE STRUCTURE AND METHOD FOR MAKING THE SAME - A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region. | 01-21-2010 |
20110049566 | Dual Band Photodetector - A dual band photodetector for detecting infrared and ultraviolet optical signals is disclosed. Aspects include homojunction and heterojunction detectors comprised of one or more of GaN, AlGaN, and InGaN. In one aspect ultraviolet/infrared dual-band detector is disclosed that is configured to simultaneously detect UV and IR. | 03-03-2011 |
20140197454 | PHOTO DETECTION DEVICE - TA photo detection device, including a substrate, a band-pass filter layer formed over the substrate, a light absorption layer formed over the band-pass filter layer, a Schottky layer formed on a portion of the light absorption layer, a first electrode layer formed on a portion of the Schottky layer, and a second electrode layer formed on the light absorption layer and spaced apart from the Schottky layer. | 07-17-2014 |
20150028386 | Ge-Si P-I-N Photodiode With Reduced Dark Current And Fabrication Method Thereof - Various embodiments of a germanium-on-silicon (Ge—Si) photodiode are provided along with the fabrication method thereof. In one aspect, a Ge—Si photodiode includes a doped bottom region at the bottom of a germanium layer, formed by thermal diffusion of donors implanted into a silicon layer. The Ge—Si photodiode further includes a doped sidewall region of Ge mesa formed by ion implantation. Thus, the electric field is distributed in the intrinsic region of the Ge—Si photodiode where there is low dislocation density. The doped bottom region and sidewall region of the Ge layer prevent electric field from penetrating into the Ge—Si interface and Ge mesa sidewall region, where a large amount of dislocations are distributed. This design significantly suppresses dark current. | 01-29-2015 |
20160181460 | Avalance Photodiode | 06-23-2016 |