Patent application number | Description | Published |
20080281469 | Method For Controlling the Walk of Humanoid Robot - The invention relates to a method for controlling walking of humanoid bipedal walking robot. More specifically, the invention comprises steps of designing a zero momentum position (ZMP) of a robot for the ground surface (a); calculating trajectories of a center of gravity (COG) of the robot along with the trajectory of the ZMP (b); calculating an angular velocity of driving motors of two feet, which has the robot walk according to the trajectory of the ZMP (c); and controlling walking of the robot by driving the driving motors according to the angular velocity of the driving motors calculated above. The robot walking control method according to the invention has stability against disturbances. | 11-13-2008 |
20090261438 | VISIBLE-RANGE SEMICONDUCTOR NANOWIRE-BASED PHOTOSENSOR AND METHOD FOR MANUFACTURING THE SAME - A semiconductor nanowire-based photosensor includes a substrate, at least a top surface of the substrate being formed of an insulator, two electrodes spaced at a predetermined interval apart from each other on the substrate, metal catalyst layers disposed respectively on the two electrodes, and visible-range semiconductor nanowires grown from the metal catalyst layers on the two electrodes. The semiconductor nanowires grown from one of the metal catalyst layers are in contact with the semiconductor nanowires grown from the other metal catalyst layer, while the semiconductor nanowires grown respectively from the metal catalyst layers on the two electrodes are floated between the two electrodes over the substrate. | 10-22-2009 |
20090317943 | Alignment of Semiconducting Nanowires on Metal Electrodes - The present invention relates to a method for aligning semiconducting nanowires on a metal electrode ( | 12-24-2009 |
20100289893 | APPARATUS FOR MEASUREMENT OF SURFACE PROFILE - The present invention relates to an apparatus for measurement of the surface profile detecting 2D-image of the surface of the object. The apparatus for measurement of the surface profile according to the present invention comprises a first light source illuminating a first one-color light to the surface of the object; a second light source illuminating a second one-color light of which color is different from the first one-color light to the surface of the object; a black-and-white camera capturing the first one-color light and the second one-color light reflected from the surface of the object, which are illuminated from the first light source and the second light source; and a controller controlling the first light source, the second light source and the black-and-white camera to obtain a first black-and-white image data and a second black-and-white image data corresponding to the first one-color light and the second one-color light respectively in the state that the first one-color light and the second one-color light are illuminated to the surface of the object, and generating a synthesized color image of the surface of the object using the first black-and-white image data and the second black-and-white image data. Thus, it is possible to obtain the color 2D-image using the low-priced black-and-white camera, and it is also possible to improve processing speed by means of using the black-and-white camera of which processing speed is faster than that of a color camera. | 11-18-2010 |
20110069518 | RESONANT INVERTER OF RADIO FREQUENCY GENERATOR FOR RADIOFREQUENCY ABLATION - Disclosed herein is the resonant inverter of a radio frequency (RF) generator for radiofrequency ablation (RFA). The resonant inverter of RF generator for RFA amplifies to high power an oscillation frequency output from an oscillator and provides the amplified oscillation frequency to an electrode. The resonant inverter processes the oscillation frequency output from the oscillator as a high-power sine wave having a frequency of 480 kHz and a Root Mean Square (RMS) power of 30 to 200 watts, and transfers the high-power sine wave to the electrode. | 03-24-2011 |
20110071513 | COMMON-MODE NOISE FILTER OF RADIO FREQUENCY GENERATOR FOR RADIOFREQUENCY ABLATION - Disclosed herein is a common-mode noise filter of an RF generator for radiofrequency ablation. The common-mode noise filter of the RF generator for RFA amplifies an oscillation frequency provided by an oscillator to AC output using amplification means, and providing the amplified oscillation frequency to electrodes. The common-mode noise filter is disposed between the amplification means and the electrodes, thus eliminating harmonic components generated by the electrodes depending on conditions of medical treatment when the electrodes are used. Accordingly, the present invention can prevent the distortion of images or waveforms attributable to harmonic components from occurring in a diagnostic imaging device such as a diagnostic ultrasound system used together with the RF generator for RFA as well as in the RF generator's own display unit. | 03-24-2011 |
20110071514 | METHOD AND SYSTEM FOR CONTROLLING RADIO FREQUENCY OUTPUT ACCORDING TO CHANGE IN IMPEDANCE OF BIOLOGICAL CELLS - Disclosed herein is a method and system for controlling radio frequency (RF) output according to the change in impedance of biological cells. In the method of controlling radio frequency (RF) output according to a change in impedance of biological cells, phases of RF voltage and current applied to the electrode are detected and a difference between the phases is obtained. A change in impedance such as a resistance component and a capacitive reactance component (XC) of the biological cells at the time of performing cauterization is obtained. An inductive reactance component (XL) is connected to an RF output terminal so as to cancel the capacitive reactance component (XC) (XC=XL), thus enabling the output impedance to have a resistance component. | 03-24-2011 |
20110135827 | METHOD OF FABRICATING CARBON NANOTUBES UNIFORMLY COATED WITH TITANIUM DIOXIDE - Provided is CNTs on which TiO | 06-09-2011 |
20110165461 | ELECTRODE INCLUDING NANOCOMPOSITE ACTIVE MATERIAL, METHOD OF PREPARING THE SAME, AND ELECTROCHEMICAL DEVICE INCLUDING THE SAME - The present invention provides an electrode and a method of preparing the same. The electrode of the present invention is prepared by forming a nanostructured conductor comprising a metal or metal oxide on a substrate and forming an active material comprising metal oxide nanoparticles on the surface of the nanostructured conductor. The electrode of the present invention can be used in various electrochemical devices such as energy storage devices including secondary batteries, supercapacitors, etc., photocatalyst elements, thermoelectric elements, or composite elements thereof. Moreover, the electrode of the present invention can be applied to a lithium secondary battery, in which intercalation/deintercalation of lithium ions is performed, and especially applied to a negative electrode of the lithium secondary battery. | 07-07-2011 |
20120202675 | LOW TEMPERATURE CO-FIRED CERAMICS WITH LOW DIELECTRIC LOSS FOR MILLIMETER-WAVE APPLICATION - Provided is a dielectric ceramic composition comprising: 40-70 wt % of a borosilicate-based glass frit comprising 50-80 mol % of SiO | 08-09-2012 |
20130242180 | APPARATUS FOR AUTOMATIC OBSERVATION OF CLIMATIC CONDITIONS OF THE SKY - An automatic observation apparatus of sky climate conditions is provided in which an opening and closing device is designed such that a lid moves upward and downward by an elevator so as to open and close the upper portion of an observer and thus, although it snows in winter, the lid moves upward and downward while maintaining a state in which snow is accumulated on the lid, the snow does not collapse due to movement of the lid and does not fall onto a transparent cover of the observer, and thereby obstruction of a visual field of a camera by snow is prevented. | 09-19-2013 |
Patent application number | Description | Published |
20100065898 | Integrated circuit semiconductor device having different gate stacks in cell region and core/peripheral region and method of manufacturing the same - The integrated circuit semiconductor device includes a semiconductor substrate having a cell region and a core/peripheral region, a first gate stack including a first gate insulating film and a first gate electrode on the semiconductor substrate in the cell region, wherein the first gate insulating film includes a silicon oxide film and the first gate electrode includes a poly-silicon film doped with impurities, and a second gate stack including a second gate insulating film and a second gate electrode on the semiconductor substrate of the core/peripheral region, the second gate insulating film includes a high dielectric film having a higher dielectric constant than that of the silicon oxide film and the second gate electrode includes a metal film. | 03-18-2010 |
20110108962 | SEMICONDUCTOR DEVICE HAVING A DEVICE ISOLATION STRUCTURE - An example semiconductor device includes a trench formed in a semiconductor substrate to define an active region, a filling dielectric layer provided within the trench, an oxide layer provided between the filling dielectric layer and the trench, a nitride layer provided between the oxide layer and the filling dielectric layer, and a barrier layer provided between the oxide layer and the nitride layer. | 05-12-2011 |
20110198700 | SEMICONDUCTOR DEVICES WITH PERIPHERAL REGION INSERTION PATTERNS AND METHODS OF FABRICATING THE SAME - A semiconductor device includes a substrate including a memory cell region and a peripheral region and a field pattern including an insulating region disposed on a nitride liner in a trench in the substrate adjacent an active region. The field pattern and the active region extend in parallel through the cell and peripheral regions. The device also includes a transistor in the peripheral region including a source/drain region in the active region. The device further includes an insertion pattern including an elongate conductive region disposed in the substrate and extending along a boundary between the field pattern and the active region in the peripheral region. Fabrication methods are also described. | 08-18-2011 |
20110241099 | SEMICONDUCTOR DEVICE INCLUDING TRANSISTOR AND FUSE CIRCUIT AND SEMICONDUCTOR MODULE INCLUDING THE SAME - A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate, a first node impurity region, a second node impurity region, a third node impurity region, and an insulating layer. The first through third node impurity regions are disposed in the semiconductor substrate. Each of the first through third node impurity regions has a longitudinal length, a transverse length and a thickness respectively corresponding to first through third directions, which are perpendicular with respect to each other. The first node impurity region is parallel to the second and third node impurity regions, which are disposed in the substantially same line. The insulating layer is located between the first through third node impurity regions in the semiconductor substrate. | 10-06-2011 |
20120001271 | GATE ELECTRODE AND GATE CONTACT PLUG LAYOUTS FOR INTEGRATED CIRCUIT FIELD EFFECT TRANSISTORS - A four transistor layout can include an isolation region that defines an active region, the active region extending along first and second different directions. A common source region of the four transistors extends from a center of the active region along both the first and second directions to define four quadrants of the active region that are outside the common source region. Four drain regions are provided, a respective one of which is in a respective one of the four quadrants and spaced apart from the common source region. Finally, four gate electrodes are provided, a respective one of which is in a respective one of the four quadrants between the common source region and a respective one of the four drain regions. A respective gate electrode includes a vertex and first and second extending portions, the first extending portions extending from the vertex along the first direction and the second extending portions extending from the vertex along the second direction. | 01-05-2012 |
20120098072 | Semiconductor Devices Having Lightly Doped Channel Impurity Regions - Semiconductor devices are provided including a gate across an active region of a substrate; a source region and a drain region in the active region on either side of the gate and spaced apart from each other; a main channel impurity region in the active region between the source and drain regions and having a first channel impurity concentration; and a lightly doped channel impurity region in the active region adjacent to the drain region. The lightly doped channel impurity region has the same conductivity type as the main channel impurity region and a second channel impurity concentration, lower than the first channel impurity concentration. The lightly doped channel impurity region and the main channel impurity region contain a first element. The lightly doped channel impurity region also contains a second element, which is a different Group element from the first element. | 04-26-2012 |
20120142160 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING DEUTERIUM ANNEALING - A method of fabricating a semiconductor device is disclosed, the method generally including the steps of: forming a gate dielectric layer on a semiconductor substrate;forming a gate electrode on the gate dielectric layer;forming an etch stop layer on the gate electrode;forming a capacitor on the semiconductor substrate adjacent to the gate electrode;after forming the capacitor, forming a contact hole passing through the etch stop layer on the gate electrode;and, diffusing deuterium into the gate dielectric layer through the contact hole. | 06-07-2012 |
20120153404 | ANTI-FUSE DEVICE AND SEMICONDUCTOR DEVICE AND SYSTEM INCLUDING THE SAME - An anti-fuse device includes a gate electrode on a semiconductor substrate, a gate insulating layer between the semiconductor substrate and the gate electrode, junction regions in the semiconductor substrate adjacent the gate electrode, and at least one anti-breakdown material layer between the junction regions, the gate insulating layer being between the gate electrode and the anti-breakdown material layer. | 06-21-2012 |
20120193720 | SEMICONDUCTOR DEVICE - The semiconductor device includes a substrate including an isolation region and an active region, the active region being defined by the isolation region; and a gate line including a first region on the active region, the first region including an open portion, and the open portion exposing a part of the active region, and a second region connected to the first region, the second region intersecting a boundary between the active region and the isolation region, a width of the second region being narrower than a width of the first region. | 08-02-2012 |
20140117566 | SEMICONDUCTOR DEVICE HAVING LINE-TYPE TRENCH TO DEFINE ACTIVE REGION AND METHOD OF FORMING THE SAME - A semiconductor device includes a plurality of parallel-trenches that are parallel to each other, a plurality of intersect-trenches that are parallel to each other, a plurality of active regions that are confined by the parallel-trenches and the intersect-trenches, a plurality of lower conductive lines that cross the active regions, a plurality of upper conductive lines that are parallel to each other, that cross the lower conductive lines, and that cross over the active regions, and data storage elements connected to the active regions. Each of the parallel-trenches and the intersect-trenches is a straight line. The parallel-trenches cross the upper conductive lines and form a first acute angle with the upper conductive lines. The intersect-trenches cross the parallel-trenches and form a second acute angle with the parallel-trenches. | 05-01-2014 |