Patent application number | Description | Published |
20100255187 | Devices having a cavity structure and related methods - A structure having a cavity or enclosed space is fabricated by forming a recessed region in a surface of a substrate, and providing a first layer adjacent the recessed region. A liquid mixture including first and second components is supplied to the recessed region. The first component has a higher chemical affinity to the first layer than the second component such that the first component separates from the second component and adheres to an edge portion of the first layer. The substrate may then be heated to remove the second component from the recessed region through evaporation. As a result, the first component remains as a second layer adhering to the edge portion of the first layer and covering the recessed region, thereby defining a cavity or enclosed space with the recessed region. Unique structures including such cavities may be employed to realize a capacitor having a fluid, as opposed to solid, dielectric material, in order to increase the capacitance of the capacitor. Alternatively, such cavities may confine the flow of gases within narrow grooves of a substrate to realize a fuel cell having reduced size. | 10-07-2010 |
20110309854 | Probe Card for Simultaneously Testing Multiple Dies - In accordance with an embodiment, a probe card comprises a contact pad interface comprising front side contacts and back side contacts electrically coupled together. The front side contacts are arranged to simultaneously electrically couple respective bumps of a plurality of dies on a wafer, and the back side contacts are arranged to electrically couple respective contacts of a testing structure. | 12-22-2011 |
20120056328 | Die Edge Contacts for Semiconductor Devices - A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like. | 03-08-2012 |
20120133379 | MECHANISMS FOR RESISTIVITY MEASUREMENT OF BUMP STRUCTURES - The embodiments described above provide mechanisms for bump resistivity measurement. By using designated bumps on one or more corners of dies, the resistivity of bumps may be measured without damaging devices and without a customized probing card. In addition, bump resistivity may be collected across the entire wafer. The collected resistivity data may be used to monitor the stability and/or health of processes used to form bumps and their underlying layers. | 05-31-2012 |
20120217628 | METAL BUMPS FOR COOLING DEVICE CONNECTION - The mechanisms for forming metal bumps to connect to a cooling device (or a heat sink) described herein enable substrates with devices to dissipate heat generated more efficiently. In addition, the metal bumps allow customization of bump designs to meet the needs of different chips. Further, the usage of metal bumps between the semiconductor chip and cooling device enables advanced cooling by passing a cooling fluid between the bumps. | 08-30-2012 |
20130069233 | Reverse Damascene Process - The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure. | 03-21-2013 |
20130135784 | Electrostatic Chuck Robotic System - A workpiece transfer system has a plurality of joints having a bearing and a primary and secondary transformer coil, wherein power provided to the primary transformer coil and secondary transformer coil of each joint produces mutual inductance between the primary and secondary transformer coil of the respective joint. A first pair of arms are rotatably coupled to a blade by a first pair of the joints, wherein the primary transformer coil of each of the first pair of joints is operably coupled to the first pair of arms, and the secondary transformer coil of each of the first pair of joints is operably coupled to the blade and an electrode beneath a dielectric workpiece retaining surface of the blade. The electrode is contactlessly energized through the transformer coils of the joint and the blade can chuck and de-chuck a workpiece by reversing current directions and by voltage adjustment. | 05-30-2013 |
20130136873 | APPARATUS AND METHOD WITH DEPOSITION CHAMBER HAVING MULTIPLE TARGETS AND MAGNETS - A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics. | 05-30-2013 |
20130147046 | Integrated Technology for Partial Air Gap Low K Deposition - A semiconductor device includes a semiconductor body and a low K dielectric layer overlying the semiconductor body. A first portion of the low K dielectric layer comprises a dielectric material, and a second portion of the low K dielectric layer comprise an air gap, wherein the first portion and the second portion are laterally disposed with respect to one another. A method for forming a low K dielectric layer is also disclosed and includes forming a dielectric layer over a semiconductor body, forming a plurality of air gaps laterally disposed from one another in the dielectric layer, and forming a capping layer over the dielectric layer and air gaps. | 06-13-2013 |
20130149871 | CHEMICAL VAPOR DEPOSITION FILM PROFILE UNIFORMITY CONTROL - The present disclosure provides for methods and systems for controlling profile uniformity of a chemical vapor deposition (CVD) film. A method includes depositing a first layer on a substrate by CVD with a first shower head, the first layer having a first profile, and depositing a second layer over the first layer by CVD with a second shower head, the second layer having a second profile. The combined first layer and second layer have a third profile, and the first profile, the second profile, and the third profile are different from one another. | 06-13-2013 |
20130171336 | WAFER PROCESSING METHOD AND SYSTEM USING MULTI-ZONE CHUCK - In a wafer processing method and a wafer processing system, a first property on a back side of a wafer is measured. The back side of the wafer is supported on a multi-zone chuck having a plurality of zones with controllable clamping forces. The wafer is secured to the multi-zone chuck by controlling the clamping forces in the corresponding zones in accordance with measured values of the first property in the zones. | 07-04-2013 |
20130186338 | Shielding Design for Metal Gap Fill - The present disclosure is directed to a physical vapor deposition system configured to heat a semiconductor substrate or wafer. In some embodiments the disclosed physical vapor deposition system comprises at least one heat source having one or more lamp modules for heating of the substrate. The lamp modules may be separated from the substrate by a shielding device. In some embodiments, the shielding device comprises a one-piece device or a two piece device. The disclosed physical vapor deposition system can heat the semiconductor substrate, reflowing a metal film deposited thereon without the necessity for separate chambers, thereby decreasing process time, requiring less thermal budget, and decreasing substrate damage. | 07-25-2013 |
20130189851 | CVD Conformal Vacuum/Pumping Guiding Design - The present disclosure relates to a guiding element for guiding gas flow within a chamber. The guiding element includes a structure, one or more inlets, an outlet, and a transportation region. The one or more inlets are formed on a first side of the structure. The inlets have inlet sizes selected according to a removal rate and to mitigate gas flow variations within the chamber. The outlet is on a second side of the structure, opposite the first side of the structure. The outlet has an outlet size selected according to the removal rate. The transportation region is within the structure and couples or connects the inlets to the outlet. | 07-25-2013 |
20130201596 | Electrostatic Chuck with Multi-Zone Control - An electrostatic chuck for clamping a warped workpiece has a clamping surface comprising a dielectric layer. The dielectric layer has a field and one or more zones formed of differing dielectric materials. One or more electrodes are coupled to a power supply, and a controller controls a clamping voltage supplied to the one or more electrodes via the power supply. An electrostatic attraction force associated with each of the field and one or more zones of the dielectric layer of the electrostatic chuck is induced, wherein the electrostatic attraction force varies based on the dielectric material of each of the field and one or more zones. The electrostatic attraction force is greater in the one or more zones than in the field, therein attracting warped regions of the workpiece to the clamping surface and clamping the warped workpiece to the clamping surface across a surface of the warped workpiece. | 08-08-2013 |
20130213797 | Rotation Plus Vibration Magnet for Magnetron Sputtering Apparatus - In some embodiments, the present disclosure relates to a plasma processing system comprising a magnetron configured to provide a symmetric magnetic track through a combination of vibrational and rotational motion. The disclosed magnetron comprises a magnetic element configured to generate a magnetic field. The magnetic element is attached to an elastic element connected between the magnetic element and a rotational shaft configured to rotate magnetic element about a center of the sputtering target. The elastic element is configured to vary its length during rotation of the magnetic element to change the radial distance between the rotational shaft and the magnetic element. The resulting magnetic track enables concurrent motion of the magnetic element in both an angular direction and a radial direction. Such motion enables a symmetric magnetic track that provides good wafer uniformity and a short deposition time. | 08-22-2013 |
20130226327 | NOVEL CLOSED LOOP CONTROL FOR RELIABILITY - The present disclosure relates to semiconductor tool monitoring system having multiple sensors configured to concurrently and independently monitor processing conditions of a semiconductor manufacturing tool. In some embodiments, the disclosed tool monitoring system comprises a first sensor system configured to monitor one or more processing conditions of a semiconductor manufacturing tool and to generate a first monitoring response based thereupon. A redundant, second sensor system is configured to concurrently monitor the one or more processing conditions of the manufacturing tool and to generate a second monitoring response based thereupon. A comparison element is configured to compare the first and second monitoring responses, and if the responses deviate from one another (e.g., have a deviation greater than a threshold value) to generate a warning signal. By comparing the first and second monitoring responses, errors in the sensor systems can be detected in real time, thereby preventing yield loss. | 08-29-2013 |
20130239889 | VALVE PURGE ASSEMBLY FOR SEMICONDUCTOR MANUFACTURING TOOLS - A semiconductor manufacturing tool and method for operating the tool are provided. The semiconductor manufacturing tool includes a process chamber in which plasma operations or ion etching operations are carried out and a valve assembly for opening and closing a valve that provides for loading and unloading substrates into and out of, the semiconductor manufacturing tool. While a processing operation is being carried out in the chamber, a valve assembly purge operation also takes place. The valve assembly purge operation involves inert gases being directed to the valve assembly area to prevent the buildup of particles and contaminating films in the valve assembly. Because the valve assembly is maintained in a clean condition, particle contamination is reduced or eliminated. | 09-19-2013 |
20130260552 | Reverse Damascene Process - The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure. | 10-03-2013 |
20130267045 | SHOWER HEAD APPARATUS AND METHOD FOR CONTROLLIGN PLASMA OR GAS DISTRIBUTION - An apparatus comprises: a shower head having a supply plenum for supplying the gas to the chamber and a vacuum manifold fluidly coupled to the supply plenum; and at least one vacuum system fluidly coupled to the vacuum manifold of the shower head. | 10-10-2013 |
20130295297 | SEMICONDUCTOR FILM FORMATION APPARATUS AND PROCESS - An apparatus and method are disclosed for forming thin films on a semiconductor substrate. The apparatus in one embodiment includes a process chamber configured for supporting the substrate, a gas excitation power source, and first and second gas distribution showerheads fluidly coupled to a reactive process gas supply containing film precursors. The showerheads dispense the gas into two different zones above the substrate, which is excited to generate an inner plasma field and an outer plasma field over the wafer. The apparatus deposits a material on the substrate in a manner that promotes the formation of a film having a substantially uniform thickness across the substrate. In one embodiment, the substrate is a wafer. Various embodiments include first and second independently controllable power sources connected to the first and second showerheads to vary the power level and plasma intensity in each zone. | 11-07-2013 |
20130320235 | UV CURING SYSTEM FOR SEMICONDUCTORS - Embodiments of an ultraviolet (UV) curing system for treating a semiconductor substrate such as a wafer are disclosed. The curing system generally includes a processing chamber, a wafer support for holding a wafer in the chamber, a UV radiation source disposed above the chamber, and a UV transparent window interspersed between the radiation source and wafer support. In one embodiment, the wafer support is provided by a belt conveyor operable to transport wafers through the chamber during UV curing. In another embodiment, the UV radiation source is a movable lamp unit that travels across the top of the chamber for irradiating the wafer. In another embodiment, the UV transparent window includes a UV radiation modifier that reduces the intensity of UV radiation on portions of the wafer positioned below the modifier. Various embodiments enhance wafer curing uniformity by normalizing UV intensity levels on the wafer. | 12-05-2013 |
20130328198 | REVERSE DAMASCENE PROCESS - The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure. | 12-12-2013 |
20140202383 | WAFER PROCESSING SYSTEM USING MULTI-ZONE CHUCK - A wafer processing system includes at least one metrology chamber, a process chamber, and a controller. The at least one metrology chamber is configured to measure a thickness of a first layer on a back side of a wafer. The process chamber is configured to perform a treatment on a front side of the wafer. The front side is opposite the back side. The process chamber includes therein a multi-zone chuck. The multi-zone chuck is configured to support the back side of the wafer. The multi-zone chuck has a plurality of zones with controllable clamping forces for securing the wafer to the multi-zone chuck. The controller is coupled to the metrology chamber and the multi-zone chuck. The controller is configured to control the clamping forces in the corresponding zones in accordance with measured values of the thickness of the first layer in the corresponding zones. | 07-24-2014 |
20150016011 | Electrostatic Check with Multi-Zone Control - An electrostatic chuck for clamping a warped workpiece has a clamping surface comprising a dielectric layer. The dielectric layer has a field and one or more zones formed of differing dielectric materials. One or more electrodes are coupled to a power supply, and a controller controls a clamping voltage supplied to the one or more electrodes via the power supply. An electrostatic attraction force associated with each of the field and one or more zones of the dielectric layer of the electrostatic chuck is induced, wherein the electrostatic attraction force varies based on the dielectric material of each of the field and one or more zones. The electrostatic attraction force is greater in the one or more zones than in the field, therein attracting warped regions of the workpiece to the clamping surface and clamping the warped workpiece to the clamping surface across a surface of the warped workpiece. | 01-15-2015 |