Yijing
Yijing Fu, Redmond,, WA US
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20130201156 | OPTICAL TOUCH NAVIGATION - The present disclosure describes touch interfaces that feature optical touch navigation. A lighting device distributes a light over an optical element that, in turn, generates a light beam at an exit of the optical element by internally reflecting the light. A sensing device captures images in response to the light beam striking the sensing device. A processing device detects an object proximate to the optical element by comparing successive images captured by the sensing device. | 08-08-2013 |
Yijing Fu, Bellevue, WA US
Patent application number | Description | Published |
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20140027808 | LATERAL CARRIER INJECTION INFRARED LIGHT EMITTING DIODE STRUCTURE, METHOD AND APPLICATIONS - A Si-based light emitting diode structure and a method for fabricating the Si-based light emitting diode structure are each predicated upon a multilayer material layer that comprises alternating, interposed and laminated sub-layers of: (1) a group IV nanocrystal material; and (2) an erbium or neodymium doped dielectric material. The light emitting diode structure is preferably laterally actuated to provide both efficient photoluminescence and electroluminescence. The group IV nanocrystal material may comprise a silicon nanocrystal material and the doped dielectric material may comprise an erbium doped silicon oxide material. | 01-30-2014 |
Yijing Lin, Beijing CN
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20120319241 | OFFSET REDUCING RESISTOR CIRCUIT - The resistor segments may be placed in a spatial region of an integrated circuit. Junctions formed between the resistor segments and conductors may be placed at locations such that each junction has a paired counterpart of the same type that is spaced to form respective same junction type centroids (i.e., geometric centers). The different type centroids may be substantially coincident, meaning that the centroids substantially overlap. In this manner, junction voltages (or offset voltages) generated by one pair of junctions may cancel out the junction voltages generated by another pair of junctions in the resistor circuit. | 12-20-2012 |
20130181760 | METHOD AND APPARATUS FOR GENERATING ON-CHIP CLOCK WITH LOW POWER CONSUMPTION - A fully on-chip clock generator on an integrated circuit (“IC”) includes a frequency detector for receiving a reference current and providing a first voltage; an error integrator for receiving the first voltage from the frequency detector, comparing it with a reference voltage, and providing a control voltage; a voltage controlled oscillator (“VCO”) for receiving the control voltage from the error integrator, and providing an output clock; and a logic controller on the IC, coupled between the VCO and the frequency detector, and generating logic control signals for controlling the frequency detector. The fully on-chip clock generator requires no external crystal, but its power consumption is significantly lower than a relaxation oscillator that generates the same clock frequency. | 07-18-2013 |