Patent application number | Description | Published |
20080265251 | STRUCTURE AND METHOD FOR DETERMINING A DEFECT IN INTEGRATED CIRCUIT MANUFACTURING PROCESS - The present invention discloses a structure and method for determining a defect in integrated circuit manufacturing process, wherein the structure comprises a plurality of normal active areas formed in a plurality of first arrays and a plurality of defective active areas formed in a plurality of second arrays. The first arrays and second arrays are interlaced, and the defect is determined by monitoring a voltage contrast from a charged particle microscope image of the active areas. | 10-30-2008 |
20090242761 | METHOD AND APPARATUS FOR CHARGED PARTICLE BEAM INSPECTION - A method, apparatus and computer readable medium for charged particle beam inspection of a sample comprising at least one sampling region and at least one skip region is disclosed. The method, apparatus and computer readable medium comprise receiving an imaging recipe which at least comprises information of the area of the sampling and skip regions; calculating a default stage speed according to the imaging recipe; calculating an alternative stage speed at least according to the default stage speed, the sampling region area information, and the skip region area information; calculating at least one imaging scan compensation offset at least according to the alternative stage speed; and inspecting the sample at the alternative stage speed while adjusting the motion of the charged particle beam according to the imaging scan compensation offsets, such that the charged particle beam tightly follows the motion of the stage and images only the sampling regions on the sample. | 10-01-2009 |
20120043462 | METHOD AND APPARATUS FOR CHARGED PARTICLE BEAM INSPECTION - A method, apparatus and computer readable medium for charged particle beam inspection of a sample comprising at least one sampling region and at least one skip region is disclosed. The method, apparatus and computer readable medium comprise receiving an imaging recipe which at least comprises information of the area of the sampling and skip regions; calculating a default stage speed according to the imaging recipe; calculating an alternative stage speed at least according to the default stage speed, the sampling region area information, and the skip region area information; calculating at least one imaging scan compensation offset at least according to the alternative stage speed; and inspecting the sample at the alternative stage speed while adjusting the motion of the charged particle beam according to the imaging scan compensation offsets, such that the charged particle beam tightly follows the motion of the stage and images only the sampling regions on the sample. | 02-23-2012 |
20120083055 | STRUCTURE AND METHOD FOR DETERMINING A DEFECT IN INTEGRATED CIRCUIT MANUFACTURING PROCESS - The present invention discloses a structure and method for determining a defect in integrated circuit manufacturing process, wherein the structure comprises a plurality of normal active areas formed in a plurality of first arrays and a plurality of defective active areas formed in a plurality of second arrays. The first arrays and second arrays are interlaced, and the defect is determined by monitoring a voltage contrast from a charged particle microscope image of the active areas. | 04-05-2012 |
Patent application number | Description | Published |
20100177009 | ANGLE ADJUSTMENT APPARATUS OF DISH ANTENNA AND DISH ANTENNA USING THE SAME - An angle adjustment apparatus for a dish antenna comprises a base, a first rotating frame, a second rotating frame, and a second rotation angle adjustment mechanism. The first rotating frame is fixed to the base, and can relatively rotate around the base with a first rotating angle. The second rotating frame is fixed to the first rotating frame, and can relatively rotate around the first rotating frame with a second rotating angle. The second rotation angle adjustment mechanism comprises a first screw rod, a screw nut post, and a second screw rod. One end of the first screw rod is fixed to the first rotating frame, and the other end is equipped with first threads and engaged with the screw nut post. One end of the second screw rod pivots on the second rotating frame, and the other end is equipped with second threads and engaged with the screw nut post. The first threads and second threads have different screw directions, or have the same screw direction but with different thread pitches. | 07-15-2010 |
20100201599 | ADJUSTMENT METHOD FOR DISH ANTENNA - A dish antenna adjustment method is performed as follows. A dish antenna angle adjustment apparatus is provided; the dish antenna angle adjustment apparatus having a base member, a first rotation member and a second rotation member. The first rotation member is pivotally connected to the second rotation member, and rotates by a first rotation angle relative to the second rotation member. The second rotation member is pivotally connected to the base member, and rotates by a second rotation angle relative to the base member. A first rotating angle adjustment mechanism is connected to the angle adjustment apparatus of the dish antenna, e.g., the first rotating angle adjustment mechanism connects the first rotation member and the second rotation member. The first rotating angle adjustment mechanism adjusts the first rotation angle between the first and second rotation members. The first rotating angle adjustment mechanism is detached from the angle adjustment apparatus, and the detached first rotating angle adjustment mechanism can be used for adjustment of another dish antenna. | 08-12-2010 |
20100259462 | ANGLE ADJUSTMENT APPARATUS OF DISH ANTENNA AND DISH ANTENNA USING THE SAME - An angle adjustment apparatus for a dish antenna comprises a base, a first rotating frame, and a second rotating frame. The first rotating frame is fixed to the second rotating frame, and can rotate around the second rotating frame with a first rotating angle. The second rotating frame is fixed to the base, and can rotate around the base with a second rotating angle. The first rotating frame comprises at least one first arc-shaped slot, and the second rotating frame comprises at least one second arc-shaped slot corresponding to the first arc-shaped slot. A fastener passes through the first arc-shaped slot and the second arc-shaped slot so as to attach the first rotating frame and the second rotating frame. | 10-14-2010 |
20130269158 | POSITIONING POLE AND A POSITIONING SYSTEM AND A METHOD OF POSITIONING A POLE TO A COVERING - A positioning pole includes a pole body, and at least three protruding ribs. The three protruding ribs are disposed around a circumference of the pole body. An axis of one of the protruding ribs is parallel to an axis of the pole body. The pole body has a terminal surface. The protruding ribs have top surfaces. The top surfaces and the terminal surface are disposed on the same horizontal level. | 10-17-2013 |
Patent application number | Description | Published |
20110077414 | PHOSPHATE-CONTAINING NANOPARTICLE DELIVERY VEHICLE - A phosphate-containing nanoparticle delivery vehicle includes a nanoparticle, an active ingredient, and a phosphodiester moiety connecting the nanoparticle and the active ingredient and forms a prodrug. The nanoparticle delivery vehicle achieves the function of increasing hydrophilicity of the active ingredient and specificity against tumor cells. Advantages of the nanoparticle material include biocompatibility, magnetism and/or controllable drug release. | 03-31-2011 |
20120282327 | PHOSPHATE-CONTAINING NANOPARTICLE DELIVERY VEHICLE - A phosphate-containing nanoparticle delivery vehicle includes nanoparticle, an active ingredient, and a phosphodiester moiety connecting the nanoparticle and the active ingredient and forms a prodrug. The nanoparticle delivery vehicle achieves the function of increasing hydrophilicity of the active ingredient and specificity against tumor cells. Advantages of the nanoparticle material include biocompatibility, magnetism and/or controllable drug release. | 11-08-2012 |
20120289712 | PHOSPHATE-CONTAINING NANOPARTICLE DELIVERY VEHICLE - A phosphate-containing nanoparticle delivery vehicle includes a nanoparticle, an active ingredient, and a phosphodiester moiety connecting the nanoparticle and the active ingredient and forms a prodrug. The nanoparticle delivery vehicle achieves the function of increasing hydrophilicity of the active ingredient and specificity against tumor cells. Advantages of the nanoparticle material include biocompatibility, magnetism and/or controllable drug release. | 11-15-2012 |
Patent application number | Description | Published |
20080312867 | Scrolling Electronic Whiteboard - A scrolling electronic whiteboard is provided, including a thin-film antenna board, at least an electromagnetic signal transmitter, a main control board, and a scrolling mechanism cassette. The scrolling mechanism cassette is for providing the housing of the thin-film antenna board to scroll and extend by pulling. The thin-film antenna board can be entirely scrolled and housed inside the scrolling mechanism cassette. The electromagnetic signal transmitter includes a resonant circuit for transmitting an electromagnetic signal of specific frequency to determine the length of the thin-film antenna board being pulled outside of the scrolling mechanism cassette. The main control board is for receiving the antenna loop signals of thin-film antenna board, and the electromagnetic signals of each electromagnetic signal transmitters. Therefore, a large electronic whiteboard can vary its dimensional ratio by pulling out different length of the thin-film antenna board, which can also be entirely retracted into the scrolling mechanism cassette for easy storage and transportation. | 12-18-2008 |
20100108410 | Electromagnetic Manuscript Input Apparatus And Method Thereof - An electromagnetic manuscript input apparatus and a method thereof are provided for providing a manuscript input function. The electromagnetic manuscript input apparatus includes an electromagnetic pen and a digitizer. The electromagnetic pen includes a winding, a capacitor, and a circuit board. The electromagnetic pen is a pen shaped input apparatus capable of emitting electromagnetic waves, which can be either an active type having a power supply or a passive type having no power supply. The digitizer includes a plurality of antennas and windings orthogonally distributed for inducing the electromagnetic waves of the electromagnetic pen. According to the electromagnetic manuscript input method, a controller of the digitizer is used to perform a whole region scanning process to find out a position of a winding having a maximum induction potential, and further find out positions of two immediately adjacent windings. | 05-06-2010 |
Patent application number | Description | Published |
20100053616 | ALIGNMENT MARK AND METHOD OF GETTING POSITION REFERENCE FOR WAFER - An alignment mark on a wafer is described, including at least one dense pattern and at least one block-like pattern adjacent thereto and shown as at least one dark image and at least one bright image adjacent thereto. A method of getting a position reference for a wafer is also described. An above alignment mark is formed. The alignment mark, which is shown as at least one dark image and at least one bright image adjacent thereto that are formed by the at least one dense pattern and the at least one block-like pattern, is then detected. | 03-04-2010 |
20110191728 | INTEGRATED CIRCUIT HAVING LINE END CREATED THROUGH USE OF MASK THAT CONTROLS LINE END SHORTENING AND CORNER ROUNDING ARISING FROM PROXIMITY EFFECTS - An integrated circuit that includes a line end created through use of a mask that controls line end shortening and corner rounding arising from proximity effects is provided. The mask includes a main feature having opaque and transmissive areas arranged to reflect a patterned feature of the line end, at least one of an opaque edge or a transmissive edge located at each end of the main feature, wherein the opaque edge has a set of transmissive assist features arranged therein such that the set of transmissive assist features align alternately with the transmissive areas of the main feature, and the transmissive edge has a set of opaque assist features arranged therein such that the set of opaque assist features align alternately with the opaque areas of the main feature. | 08-04-2011 |
20130075660 | PHOSPHOR AND METHOD FOR PREPARING THE SAME - Disclosed is a phosphor and a method for preparing the same. The phosphor comprises a material having a general composition formula expressed by M | 03-28-2013 |
20140110632 | COMPOUND OF PHOSPHOR AND THE MANUFACTURING METHOD THEREOF - Provided is a metal oxonitridosilicate phosphor of a general formula M | 04-24-2014 |
20150028374 | LIGHT-EMITTING ELEMENT AND THE MANUFACTURING METHOD OF THE SAME - The present application discloses a light-emitting element comprising a semiconductor light-emitting stack emitting a first light which has a first color coordinate, a first wavelength conversion material on the semiconductor light-emitting stack converting the first light to emit a second light, and a second wavelength conversion material on the first wavelength conversion material converting the second light to emit a third light. The first light and the second light are mixed to be a fourth light having a second color coordinate. The third light and the fourth light are mixed to be a fifth light having a third color coordinate, and the second color coordinate locates at the top right of the first color coordinate and the third color coordinate locates at the top right of the second color coordinate. | 01-29-2015 |
Patent application number | Description | Published |
20100316378 | Laser Source Based On Fabry-Perot Laser Diodes And Seeding Method Using The Same - Disclosed is directed to a laser source based on Fabry-Perot laser diodes (FP-LDs) and seeding method using the same. The laser source comprises a plurality of FP-LDs, an optical filter, and at least a fiber mirror. The FP-LDs are aligned to their corresponding filter modes of the optical filter, and output their optical spectrums. The optical spectrums are filtered via the optical filter then reflected into the FP-LDs. Each of the FP-LDs further outputs its optical spectrum with a form of continuous wave (CW) of single longitudinal mode (SLM). The outputted CWs may be treated as injected laser light sources. They may also be applied to the transmission architecture in wavelength-division-multiplexed passive optical networks. | 12-16-2010 |
20120328295 | Optical Fiber Communication System and Methods for Optical Fiber Communication - An optical fiber communication system is provided, including a central office and an optical network unit. The central office generates a first downstream signal and a second downstream signal according to a radio frequency signal and a baseband signal, respectively. The optical network unit is coupled to the central office to receive the first downstream signal and the second downstream signal through a first fiber and a second fiber different from the first fiber, respectively, such that the optical network unit only modulates the second downstream signal to generate an upstream signal and then delivers the upstream signal to the central office through the first fiber, thereby decreasing signal Rayleigh backscatter noise. | 12-27-2012 |
20140133866 | DRIVING DEVICE, OPTICAL EMITTER, AND OPERATION METHOD THEREOF - A driving device adapted to at least one light emitting diode, includes a clock recovery unit, a modulation unit, and a bias tee unit. The clock recovery unit receives a first alternating current signal, and generates a square wave signal according to the first alternating current signal. The modulation unit is coupled to the clock recovery unit, for receiving the square wave signal and a signal source, and for generating a message signal by using the square wave signal and the signal source. The bias tee signal is coupled to the modulation unit, for receiving a second alternating current signal and the message signal, and for outputting a driving signal to at least one light emitting diode by using the second alternating current signal and the message signal, in order to make at least one light emitting diode generate an optical signal. | 05-15-2014 |
Patent application number | Description | Published |
20110266574 | LED PACKAGE - An LED package includes a substrate, an LED die, and an encapsulating layer. The LED die is arranged on the substrate. The encapsulating layer covers the LED die and at least a part of the substrate. The encapsulating layer includes a light dispersing element. A light scattering intensity of the light dispersing element is proportional to the light intensity of light generated by the LED die and illuminated at the encapsulating layer. A luminance at a center of the LED package is substantially identical to that at a circumference of the LED package. | 11-03-2011 |
20110291138 | LIGHT-EMITTING ELEMENT PACKAGE AND FABRICATION METHOD THEREOF - A light-emitting element package includes a package member for encapsulating a light-emitting element. A plurality of photonic crystal patterns is formed on the package member. A distribution density of the photonic crystal patterns corresponds to light distribution of the light-emitting element. Each photonic crystal pattern consists of a plurality of photonic crystals. | 12-01-2011 |
20110297981 | FLUORESCENT STRUCTURE AND METHOD FOR FORMING THE FLUORESCENT STRUCTURE AND LED PACKAGE USING THE SAME - A fluorescent structure for a light-emitting package includes a first fluorescent layer and a second fluorescent layer covering the first fluorescent layer. The first fluorescent layer includes first fluorescent strips, and defines first transparent regions between the first fluorescent strips. The second fluorescent layer includes second fluorescent strips, and defines second transparent regions between the second fluorescent strips. A method for forming the fluorescent structure and a light-emitting diode package using the fluorescent structure are also provided. | 12-08-2011 |
20120020089 | LIGHT EMITTING DIODE LIGHT BAR - An LED light bar includes an elongated circuit board, a first lighting module formed in the middle of the circuit board and two second light modules formed at two opposite ends of the circuit board. Each of first lighting module and the two second lighting module includes a plurality of LEDs arranged linearly on a surface of the circuit board. A density of the LEDs in the first lighting module is smaller than that in the second lighting modules. | 01-26-2012 |
20120074827 | LED LAMP STRUCTURE - An LED lamp structure includes a heat sink and a base. The heat sink includes a first receiving cavity, a second receiving cavity opposite to the first receiving cavity and a partition. A light board having LED modules is mounted on the partition. The partition defines two first threaded through holes therein. The base has two positioning protrusions engaging in two positioning grooves of the heat sink. Thus, second screw holes of two screw pillars of the base are aligned at the first screw holes of the partition of the heat sink. Screws are used to threadedly engage in the first screw holes, the second screw holes and third screw holes in the light board to thereby assemble the heat sink, the base and the light board together. | 03-29-2012 |
20120075858 | LED BULB - An exemplary LED bulb includes a holder, a housing, a heat spreader, a power module and an LED module. The housing connects to the holder. The heat spreader detachably engages with the housing. The power module detachably engages with the housing and is received in the housing. The LED module is arranged on the heat spreader. The LED module electrically connects to the holder via the power module. The LED module is physically separated from the power module. | 03-29-2012 |
20130242554 | TRAFFIC LIGHT ASSEMBLY - A traffic light assembly includes at least one light module, at least one lens located in front of the at least one light module, a housing enclosing the at lest one light module and the at least one lens therein, and a foldable cover located in front of the at least one lens and connected to the housing. A cleaning device is located on an outer surface of the foldable cover to clean snow and dust accumulated on the outer surface of the foldable cover. | 09-19-2013 |
20130285530 | LED BULB CAPABLE OF MATING WITH LIGHT BULB SOCKETS HAVIGN DIFFERENT CONFIGURATIONS - An LED bulb includes a bulb body and an adapter detachably connecting with the bulb body. The bulb body has two pins function as a negative electrode and a positive electrode. The two pins are for inserting into and electrically connecting with a bi-pin socket connector for light bulb, such as MR16 socket connector. The adapter includes a junction seat, a first connector, a second connector, and a bulb cap. Metallic threads are formed on the bulb cap. The first connector is received in the junction seat and electrically contacts the threads. The second connector extends through the junction seat and the bulb cap to make a bottom end thereof being exposed. The adapter is able to engage and electrically connect with an Edison screw socket connector, for example, E-10 socket connector. | 10-31-2013 |
20140051193 | LIGHT-EMITTING ELEMENT PACKAGE AND FABRICATION METHOD THEREOF - A fabrication method for a light-emitting element package, the method comprising: providing a high precision wafer level mold module, the high precision wafer level mold module comprising an upper mold and a bottom mold; mounting a substrate with a plurality of light-emitting elements between the upper mold and the bottom mold; filling package materials into the high precision wafer level mold module to obtain package members mounted on the light-emitting elements; and removing the high precision wafer level mold module. | 02-20-2014 |
Patent application number | Description | Published |
20080315308 | LOW ON-RESISTANCE LATERAL DOUBLE-DIFFUSED MOS DEVICE AND METHOD OF FABRICATING THE SAME - A lateral-double diffused MOS device is provided. The device includes: a first well having a first conductive type and a second well having a second conductive type disposed in a substrate and adjacent to each other; a drain and a source regions having the first conductive type disposed in the first and the second wells, respectively; a field oxide layer (FOX) disposed on the first well between the source and the drain regions; a gate conductive layer disposed over the second well between the source and the drain regions extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well below a portion of the gate conductive layer and the FOX connecting to the drain region. A channel region is defined in the second well between the doped region and the source region. | 12-25-2008 |
20090209075 | LATERALLY DOUBLE-DIFFUSED METAL OXIDE SEMICONDUCTOR TRANSISTOR AND METHOD FOR FABRICATING THE SAME - The present invention discloses a laterally double-diffused metal oxide semiconductor transistor (LDMOS) and a method for fabricating the same. The LDMOS includes a substrate, a first well, a drain, a second well and a source. The substrate includes a first conductive dopant. The first well includes a second conductive dopant and formed in a part of the substrate, and the drain is located in the first well. The second well includes the first conductive dopant and formed in another part of the substrate, and the source located in the second well. The source includes a lightly doped region and a heavily doped region extending downwardly from a top surface of the substrate. The depth of the lightly doped region is more than the depth of the heavily doped region. | 08-20-2009 |
20110204441 | LOW ON-RESISTANCE LATERAL DOUBLE-DIFFUSED MOS DEVICE - A lateral-double diffused MOS device is provided. The device includes: a first well having a first conductive type and a second well having a second conductive type disposed in a substrate and adjacent to each other; a drain and a source regions having the first conductive type disposed in the first and the second wells, respectively; a field oxide layer (FOX) disposed on the first well between the source and the drain regions; a gate conductive layer disposed over the second well between the source and the drain regions extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well below a portion of the gate conductive layer and the FOX connecting to the drain region. A channel region is defined in the second well between the doped region and the source region. | 08-25-2011 |
20120292740 | HIGH VOLTAGE RESISTANCE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A HIGH VOLTAGE RESISTANCE SEMICONDUCTOR DEVICE - A semiconductor device comprises a semiconductor substrate, a lateral semiconductor diode, a field insulation structure, and a polysilicon resistor. The diode is formed in a surface region of the semiconductor substrate, and includes a cathode electrode and an anode electrode. The field insulation structure is disposed between the cathode and anode electrodes. The polysilicon resistor is formed over the field insulation structure, and between the cathode and anode electrodes. The polysilicon resistor is electrically connected to the cathode electrode, and electrically insulated from the anode electrode. | 11-22-2012 |
20130277725 | SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor memory device includes a substrate, a well region in the substrate, a patterned first dielectric layer on the substrate extending over the well region, a patterned first gate structure on the patterned first dielectric layer, a patterned second dielectric layer on the patterned first gate structure, and a patterned second gate structure on the patterned second dielectric layer. The patterned first gate structure includes a first section extending in a first direction and a second section extending in a second direction orthogonal to the first section, the first section and the second section intersecting each other in a cross pattern. The patterned second gate structure includes at least one of a first section extending in the first direction over the first section of the patterned first gate structure or a second section extending in the second direction over the second section of the patterned first gate structure. | 10-24-2013 |
Patent application number | Description | Published |
20100080753 | SELF-STARTED PROCESS FOR HYDROGEN PRODUCTION - A self-started process for hydrogen production, which comprises following steps: providing a gas mixture having a methanol/oxygen molar ratio less than or equal to 0.6; and conducting the gas mixture to flow through a Cu/ZnO-based catalyst bed. The Cu/ZnO-based catalyst contains copper, zinc oxide, aluminum oxide, manganese oxide and/or cerium oxide. The Cu/ZnO-based catalyst can initiate the POM reaction; then, the gas mixture will rise to a temperature of over 120° C., and the POM reaction generates a HRG at a reaction temperature of less than or equal to 180° C. The HRG contains less than 4 vol. % CO, and the POM reaction generates 1.8 moles hydrogen or more per 1 mole methanol consumed. | 04-01-2010 |
20100092380 | PROCESS FOR INITIATION OF OXIDATIVE STEAM REFORMING OF METHANOL AT ROOM TEMPERATURE - A self-started OSRM (oxidative steam reforming of methanol) process at room temperature for hydrogen production is disclosed. In the process, an aqueous methanol and oxygen are pre-mixed. The mixture is then fed to a Cu/ZnO-based catalyst to initiate an OSRM process at room temperature. The temperature of the catalyst bed, with suitable thermal isolation, may be raised automatically by the exothermic OSRM to enhance the conversion of methanol. A hydrogen yield of 2.4 moles per mole methanol from the process may be obtained. | 04-15-2010 |
20100179056 | PROCESS FOR INITIATION OF OXIDATIVE STEAM REFORMING OF METHANOL AT ROOM TEMPERATURE - A self-started OSRM (oxidative steam reforming of methanol) process at room temperature for hydrogen production. In the process, an aqueous methanol and oxygen are pre-mixed. The mixture is then fed to a Cu/ZnO-based catalyst to initiate an OSRM process at room temperature. The temperature of the catalyst bed, with suitable thermal isolation, may be raised automatically by the exothermic OSRM to enhance the conversion of methanol. A hydrogen yield of 2.4 moles per mole methanol from the process may be obtained. | 07-15-2010 |
20110212019 | PROCESS FOR INITIATION OF OXIDATIVE STEAM REFORMING OF METHANOL AT EVAPORATION TEMPERATURE OF AQUEOUS METHANOL - A self-started OSRM (oxidative steam reforming of methanol) process at evaporation temperature of aqueous methanol for hydrogen production is disclosed. In the process, an aqueous methanol steam and oxygen are pre-mixed. The mixture is then fed to a Cu/ZnO-based catalyst to initiate an OSRM process at evaporation temperature of aqueous methanol. The temperature of the catalyst bed, with suitable thermal isolation, may be raised automatically by the exothermic OSRM to enhance the conversion of methanol. | 09-01-2011 |
20110311440 | PROCESS FOR HYDROGEN PRODUCTION - A process for hydrogen production at lower temperature by using Mn/ZnO, Cu/MnO, Cu/CeO | 12-22-2011 |
Patent application number | Description | Published |
20100259489 | TOUCH CONTROL DISPLAY APPARATUS AND POSITION INDICATOR THEREOF - A touch control display apparatus includes a touch control display and a position indicator. The housing of the display has a touch control displaying area and a receiving portion. The receiving portion has a first metal contact and a second metal contact. The first and the second metal contacts are electrically connected to a positive terminal and a negative terminal of an internal system power source of the display, respectively. The indicator is used for transmitting a position indicating signal to the display, such that the display could sense a position of the indicator located in the touch control displaying area accordingly. The housing of the indicator has a third metal contact and a fourth metal contact. The third and the fourth metal contacts are suitable for electrically connecting the first and the second metal contacts, respectively, such that the indicator could perform a charging operation. | 10-14-2010 |
20110227837 | ELECTROMAGNETIC TOUCH DISPLAYER - An electromagnetic touch displayer is provided. The electromagnetic touch displayer may work with an electromagnetic signal transmission apparatus. The electromagnetic touch displayer comprises a plurality of sense antennas. When the electromagnetic touch displayer enters into a sleep mode, a part of the sense antennas will keep in the work mode. If the user wants to wake the electromagnetic touch displayer up to make it into the work mode, he will make the electromagnetic signal transmission apparatus transmit an electromagnetic signal. Then, the electromagnetic touch displayer receives the electromagnetic signal via the sense antennas which are still working, and enters into the work mode according to the electromagnetic signal. | 09-22-2011 |
20120236522 | Method for forming an EMI shielding layer on an Electronic System - The present invention provides a method for forming a shielding layer on a sensor board. The sensor board includes an antenna array element. The sensor board is integrated into an electronic system. The method includes using a physical vapor deposition process to form the shielding layer on the sensor board to shield the sensor board from an electromagnetic signal generated by the electronic system, wherein the shielding layer and the antenna array element are respectively formed on two opposite surfaces of the sensor board. | 09-20-2012 |
Patent application number | Description | Published |
20100101639 | Optoelectronic device having a multi-layer solder and manufacturing method thereof - An optoelectronic device having a multi-layer solder is disclosed. It included a semiconductor stack, an ohmic layer and a multi-layer solder including a plurality of first type conductive material layers and a plurality of second type conductive material layers. The plurality of first type conductive material layers and the plurality of second type conductive material layers are interlaced each other and the first type conductive material layer is an alloy layer and the second type conductive material layer is a metal layer. | 04-29-2010 |
20110227120 | LIGHT-EMITTING DEVICE - A light-emitting device comprises a substrate, an epitaxial structure formed on the substrate including a first semiconductor layer, a second semiconductor layer, and a light-emitting layer formed between the first semiconductor layer and the second semiconductor layer. A trench is formed in the epitaxial structure to expose a part of side surface of the epitaxial structure and a part of surface of the first semiconductor layer, so that a first conductive structure is formed on the part of surface of the first semiconductor layer in the trench, and a second conductive structure is formed on the second semiconductor layer. The first conductive structure includes a first electrode and a first pad electrically contacted with each other. The second conductive structure includes a second electrode and a second pad electrically contacted with each other. Furthermore, the area of at least one of the first pad and the second pad is between 1.5×10 | 09-22-2011 |
20110316023 | Light-Emitting Device Having A Ramp - A light-emitting device includes a light-emitting stacked layer having an active layer, and a composite substrate located under the light-emitting stacked layer. The composite substrate includes a supportive substrate having a top surface and a bottom surface non-parallel to the active layer; a metal substrate located under the supportive substrate; and a reflective layer located between the supportive substrate and the metal substrate. | 12-29-2011 |
20120286317 | LIGHT-EMITTING ELEMENT AND THE MANUFACTURING METHOD THEREOF - A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion. | 11-15-2012 |
20130119429 | LIGHT-EMITTING ELEMENT AND THE MANUFACTURING METHOD THEREOF - A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion. | 05-16-2013 |
Patent application number | Description | Published |
20100044803 | SEALING STRUCTURE FOR HIGH-K METAL GATE AND METHOD OF MAKING - The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer. | 02-25-2010 |
20120225529 | SEALING STRUCTURE FOR HIGH-K METAL GATE AND METHOD OF MAKING - The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer. | 09-06-2012 |
Patent application number | Description | Published |
20110305269 | DEVICE AND METHOD FOR RECEIVER-EQUALIZER CALIBRATION - The disclosure is a device and a method for receiver-equalizer calibration, in which the device includes an adaptive filter, a Clock Data Recovery (CDR) unit, an adaptive control unit and a run length encoding unit. The adaptive filter receives a channel signal, calibrates the channel signal according to a filter control signal and compensates the channel signal to obtain a compensative signal. The CDR unit receives the compensative signal to generate a sampling clock signal, a data signal and a transition sampling signal. The run length encoding unit receives the data signal and run-length encodes the data signal to generate first code data and second code data. The adaptive control unit receives the first code data, the second code data, the data signal and the transition sampling signal, and performs weight calculation to adjust the filter control signal. | 12-15-2011 |
20110311010 | DEVICE AND METHOD FOR NRZ CDR CALIBRATION - The disclosure is a device and a method for Non Return to Zero (NRZ) Clock Data Recovery (CDR) calibration, which includes a CDR unit and a weight calculator unit. The CDR unit receives a compensative signal of an equalization filter to generate an error signal, a sampling clock signal, a transition sampling signal and a data signal. The weight calculator unit receives the error signal, the transition sampling signal and the data signal, and then uses a run length technique to generate weight data. The weight data controls a voltage control oscillator (VCO) which calibrates the phase and the frequency of the sampling clock signal. | 12-22-2011 |
Patent application number | Description | Published |
20090141201 | THREE-DIMENSION DISPLAY AND FABRICATING METHOD THEREOF - A three-dimension display suitable for a viewer wearing a pair of eyeglasses is disclosed. The eyeglasses have two circular polarized eyeglass lenses with different polarizations. The three-dimension display includes a flat display panel, a quarter-wave plate and a patterned half-wave plate. The flat display panel has a plurality of pixels arranged in an array, wherein the flat display panel is suitable to display a linear polarized image. The quarter-wave plate is disposed between the flat display panel and the eyeglasses. The patterned half-wave plate is disposed between the flat display panel and the eyeglasses, wherein the patterned half-wave plate corresponds to a part of the pixels. The present invention also provides a fabrication method of a three-dimension display. | 06-04-2009 |
20090168397 | Optical Film of a Display, Method for Producing the Same and Said Display - An optical film of a display and a method for producing the same are provided. The display includes a light source and an optical film. The light source provides the first light. The optical film includes at least one coating layer. The coating layer has a first surface and a second surface opposite to the first surface. The coating layer is adapted to absorb the first light from the first surface to excite a second light to emit through the second surface. The intensity of the second light is larger than that of the first light. | 07-02-2009 |
20110002037 | THREE-DIMENSION DISPLAY - A three-dimension display suitable for a viewer wearing a pair of eyeglasses is disclosed. The eyeglasses have two circular polarized eyeglass lenses with different polarizations. The three-dimension display includes a flat display panel, a quarter-wave plate and a patterned half-wave plate. The flat display panel has a plurality of pixels arranged in an array, wherein the flat display panel is suitable to display a linear polarized image. The quarter-wave plate is disposed between the flat display panel and the eyeglasses. The patterned half-wave plate is disposed between the flat display panel and the eyeglasses, wherein the patterned half-wave plate corresponds to a part of the pixels. The present invention also provides a fabrication method of a three-dimension display. | 01-06-2011 |
Patent application number | Description | Published |
20100211964 | SPINDLE MOTOR AND OPTICAL DISC DRIVE HAVING THE SAME - A spindle motor includes a base plate, a stator, and a rotor. The base plate has a plurality of air-guiding holes. The stator includes a bearing portion and a plurality of coil portions. The bearing portion is fixed on the base plate. The coil portions are connected to and surrounded the bearing portion, and are disposed above the air-guiding holes. The rotor is rotatably mounted to the bearing portion and disposed adjacent the coil portions. | 08-19-2010 |
20100306790 | OPTICAL DISC DRIVE - An optical disc drive including a chassis, a circuit board and a traverse is provided. The traverse includes a carrier, a pick-up head module, a spindle motor module and a flexible flat cable. The carrier has an opening. The pick-up head module is movably disposed in the opening. The spindle motor module disposed on the carrier is located at one side of the pick-up head module. The flexible flat cable disposed in the opening has two connection ends respectively connected to the pick-up head module and the circuit board. The pick-up head module located at a first position enables the flexible flat cable to have a bending portion protruding towards a direction opposite to the position of the spindle motor module. The pick-up head module located at a second position extends the bending portion. The first position is closer to the spindle motor module than the second position is. | 12-02-2010 |
20110041145 | Spindle motor for optical disc drive - The present invention provides a spindle motor for an optical disc drive. The spindle motor comprises a turntable unit and an anti-slipping element. The turntable unit has a disc mounting stand, which has a first outer diameter. The anti-slipping element is disposed on said turntable unit and has a first inner diameter, wherein the difference between the first outer diameter and the first inner diameter is less than or equal to 8 mm. | 02-17-2011 |
20140215501 | DISC CLAMPING STRUCTURE OF OPTICAL DISC DRIVE - A disc clamping structure is provided. A fixing base is disposed on a turntable. A plurality of ball seats are disposed around a periphery of the fixing base, and each of the ball seats has an aperture. The balls are received in the ball seats. The elastic members are disposed within the fixing base. The balls are upwardly moved, and the height of the center point of the ball is adjusted according to the thickness of the disc when the disc is clamped on the turntable. A portion of the ball is projected from the aperture of the ball seat before clamping the disc. | 07-31-2014 |
Patent application number | Description | Published |
20100053463 | MULTI-MEDIA SYSTEM WITH CEC RIGHT TRANSFERRING MECHANISM AND METHOD THEREOF - A HDMI standard multimedia system includes a source device, a plurality of TVs, and a CEC right arbiter. The CEC right arbiter transfers the right of CEC to an appropriate TV of the plurality of TVs according to each status of the plurality of TVs. | 03-04-2010 |
20110148804 | Multi-touch Command Detecting Method for Surface Capacitive Touch Panel - For overcoming a defect that a conventional surface capacitive touch panel is not capable of determining more than two touch points so that the surface capacitive touch panel is not capable of determining any multi-touch commands, a type of a multi-touch command is determined by detecting relative movements between touch points and corresponding intermediate points on the surface capacitive touch panel, where the relative movements may be indicated by relative distances or relative directions. Therefore, a bottleneck that the surface capacitive touch panel cannot be used for detecting a type of a multi-touch command may be overcome, and the surface capacitive touch panel may be widely applied for touch panels required to detect multi-touch commands. | 06-23-2011 |
20120194468 | METHOD FOR DETECTING A TOUCH POINT ON A TOUCH SENSING DEVICE AND DEVICE THEREOF - A touch sensing device includes four driving electrodes, four sensing circuits, a controller and a substrate. Each sensing circuit is coupled to one of the four driving electrodes, for sensing electrical charges of the corresponding sensing electrode. The four driving electrodes, disposed on the substrate, are electrically independent to each other. Each sensing circuit detects the electrical charges of the corresponding driving electrode, and generates a count according to the electrical charges of the corresponding driving electrode. The controller calculates a position of a touch point on the touch sensing device according to counts generated by the four sensing circuits. | 08-02-2012 |
Patent application number | Description | Published |
20090213656 | FLASH MEMORY HAVING INSULATING LINERS BETWEEN SOURCE/DRAIN LINES AND CHANNELS - A memory array comprises a semiconductor body having a plurality of trenches aligned generally in parallel. The trenches contain semiconductor material, such as doped amorphous silicon, and act as source/drain lines for the memory array. Insulating liners lie between the semiconductor material within the trenches and the semiconductor body. A plurality of word lines overlie the plurality of trenches and channel regions in the semiconductor body in an array of cross points. Charge trapping structures lie between the word lines and the channel regions at the cross points, providing an array of flash memory cells. The charge trapping structures comprise dielectric charge trapping structures adapted to be programmed and erased to store data. A method for manufacturing such devices includes patterning and forming the sources/drain lines with insulating liners prior to formation of the charge trapping structure over the channel regions. | 08-27-2009 |
20110255350 | METHOD OF OPERATING MEMORY CELL - A method of operating a memory cell is provided. The memory cell has first, second, third and fourth storage regions in a charge-storage layer between a substrate and a word line. The first and second storage regions are respectively adjacent to lower and upper portions at one side of the protruding part of the substrate, and the third and fourth storage regions are respectively adjacent to lower and upper portions at the other side of the same. The second and third storage regions are regarded as a top storage region. When the top storage region is programmed, a first positive voltage is applied to the word line, a second positive voltage is applied to a top bit line in a top portion of the protruding part, and a bottom voltage is applied to first and second bottom bit lines in the substrate beside the protruding part respectively. | 10-20-2011 |
20140021628 | METHOD FOR FORMING INTERLAYER CONNECTORS IN A THREE-DIMENSIONAL STACKED IC DEVICE - A method is used with an IC device including a stack of dielectric/conductive layers to form interlayer connectors extending from a surface of the device to the conductive layers. Contact openings are created through a dielectric layer to a first conductive layer. N etch masks, with 2 | 01-23-2014 |
Patent application number | Description | Published |
20110233678 | JUNCTION VARACTOR FOR ESD PROTECTION OF RF CIRCUITS - An ESD protection device includes a first well of a first semiconductor type disposed in a substrate of a second semiconductor type forming a first diode. A second well of the second semiconductor type is formed in the substrate to form a second diode with the first well. A first plurality of doped regions of the first semiconductor type are formed in an upper surface of the first well. A second plurality of doped regions of the second semiconductor type are formed in the upper surface of the first well forming a third diode with the first well. A plurality of STI regions are formed in the upper surface of the first well. Each STI region is disposed between a doped region of the first and second semiconductor types. The third diode provides a current bypass when an ESD voltage spike is received at one of the first or second plurality of doped regions. | 09-29-2011 |
20120126630 | SYSTEM AND METHOD FOR INDUCTIVE WIRELESS SIGNALING - A transformer includes first and second semiconductor substrates. The first semiconductor substrate includes a first circuit, a first coil providing a first impedance, and a first capacitor coupled in parallel with the first coil. The second semiconductor substrate includes a second circuit, a second coil providing a second impedance and inductively coupled with the first coil, and a second capacitor coupled in parallel with the second coil. | 05-24-2012 |
20120146747 | MILLIMETER-WAVE WIDEBAND FREQUENCY DOUBLER - A millimeter-wave wideband frequency doubler stage for use in a distributed frequency doubler includes: a differential input pair of transistors, each transistor having respective gate, drain and source terminals, wherein the source terminals are coupled together to a first power supply node and the drain terminals are coupled together at a first node to a second power supply node; first and second pairs of bandpass gate lines coupled to the gate terminals of the transistors; and a pair of bandpass drain lines coupled to the drain terminals of the transistors. | 06-14-2012 |
20120208457 | CAPACITIVE PROXIMITY COMMUNICATION USING TUNED-INDUCTOR - A multi-chip module includes a chip stack package including at least one pair of stacked dies, the dies having overlapping opposing faces, and at least one capacitive proximity communication (CPC) interconnect between the pair of stacked dies. The CPC interconnect includes a first capacitor plate at a first one of the overlapping opposing faces and a second capacitor plate at a second one of the overlapping opposing faces spaced from and aligned with the first capacitor plate. The CPC interconnect further includes an inductive element connected in series with the first capacitor plate and second capacitor plate, wherein the capacitor plates form part of a capacitor and the capacitor cooperates with the inductor element to form a LC circuit having a resonant frequency. | 08-16-2012 |
20120212865 | ESD BLOCK ISOLATION BY RF CHOKE - A circuit includes a first node configured to receive a radio frequency (“RF”) signal, a first electrostatic discharge (ESD) protection circuit coupled to a first voltage supply rail for an RF circuit and to a second node, and a second ESD protection circuit coupled to the second node and to a second voltage supply node for the RF circuit. An RF choke circuit is coupled to the second node and to a third node disposed between the first node and the RF circuit. | 08-23-2012 |
20120229318 | DEVICES AND BANDPASS FILTERS THEREIN HAVING AT LEAST THREE TRANSMISSION ZEROES - A bandpass filter comprises a first capacitor, a second capacitor, a third capacitor and at least two resonators. The first and second capacitors are coupled in parallel with each other, and each of the first and second capacitors includes an input. The third capacitor is coupled between the first capacitor and the second capacitor at their respective inputs. The at least two resonators are coupled in parallel with the first capacitor and the second capacitor and are positioned adjacent to each other at a distance such that the at least one component of the resonators are electromagnetically coupled together to provide three (3) transmission zeros. | 09-13-2012 |
Patent application number | Description | Published |
20090096386 | LIGHT-EMITTING SYSTEMS - A light-emitting system includes a first power input terminal and a second power input terminal and five rectifying devices coupled between the two power input terminals. The first and second power input terminals may receive an external power input. The first rectifying device is coupled between the first power input terminal and a first intermediate contact. The second rectifying device is coupled between the second power input terminal and the first intermediate contact. The third rectifying device is coupled between a second intermediate contact and the second power input terminal. The fourth rectifying device is coupled between the second intermediate contact and the first power input terminal. The fifth rectifying device is coupled between the first intermediate contact and the second intermediate contact. The fifth rectifying device is configured to allow a current flow from the first intermediate contact to the second intermediate contact and to emit light in response to the current flow. One or more of the first, second, third, and fourth rectifying devices may include one or more light-emitting diodes, one or more Schottky diode(s), or a combination of both types of diodes. | 04-16-2009 |
20090114931 | Light emitting module and method of forming the same - A method for forming a pixel of an LED light source is provided. The method includes following steps: forming a first layer on a substrate; forming a second layer and a first light-emitting active layer on the first layer; exposing a portion of an upper surface of the first layer; forming a third layer on the substrate; forming a fourth layer and a second light-emitting active layer on the third layer; exposing a portion of an upper surface of the third layer; and forming a first electrode on the exposed upper surface of the first layer, a second electrode on a portion of an upper surface of the second layer, a third electrode on the exposed upper surface of the third layer, and a fourth electrode a portion of an upper surface of the fourth layer. The first light-emitting active layer and the second light-emitting active layer emit different colors of light. | 05-07-2009 |
20090141489 | Microchip matrix light source module - A microchip matrix light source module includes at least two LEDs formed on a surface of a substrate. The light source further includes a light reflector formed on a surface upon which the LEDs are formed and interposed between the LEDs and configured to reflect and thereby redirect laterally emitted light from the two LEDs. The light reflector may include an inner body. The body may be covered, in part or in whole, with a light reflecting layer such as a metal layer. The body of the light reflector may include a layer corresponding to a layer in one of the two LEDs. | 06-04-2009 |
20110038156 | LIGHT-EMITTING SYSTEMS - A light-emitting system includes a first and second power input terminals; a first, second, third, and fourth light-emitting-diode groups each having at least one light-emitting diode; a first circuit path having at least one diode from each of the first and second light-emitting-diode groups, with the diodes coupled serially and emitting light during a positive power cycle; and a second circuit path having at least one diode from each of the third and fourth light-emitting-diode groups, with the diodes coupled serially and emitting light during a negative power cycle. The second light-emitting-diode group and the third light-emitting-diode group share at least one common diode, The first and second power input terminals, the first, second, third, and fourth light-emitting-diode groups, and the first and second circuit paths may belong to a single chip light-emitting system. | 02-17-2011 |
20110038157 | LIGHT-EMITTING SYSTEMS - A light-emitting system includes a first and second power input terminals for receiving an external power input to the light-emitting system; a first light-emitting-diode string comprising at least three light-emitting diodes placed sequentially in a first direction to allow a current flow through the at least three light-emitting diodes of the first light-emitting-diode string generally in the first direction; and a second light-emitting-diode string comprising at least three light-emitting diodes placed sequentially in a second direction to allow a current flow through the at least three light-emitting diodes of the second light-emitting-diode string generally in the second direction, The first and second light-emitting-diode strings may be serially coupled, and the first direction may be substantially vertical to the second direction. | 02-17-2011 |
20110186881 | AC_LED SYSTEM IN SINGLE CHIP WITH THREE METAL CONTACTS - A plurality of AC_LED units are coupled and disposed on a single chip to form an AC_LED system in single chip. Alternatively, an AC LED system in single chip with four metal contacts is also disclosed. | 08-04-2011 |
20110300656 | METHODS FOR FORMING A PIXEL OF A LIGHT-EMITTING DIODE LIGHT SOURCE AND A PLURALITY OF LIGHT-EMITTING DIODE PIXELS ARRANGED IN A TWO-DIMENSIONAL ARRAY - A method for forming a pixel of an LED light source is provided. The method includes: forming a first layer on a first substrate; forming a second layer and a first light-emitting active layer on the first layer; forming a first intermediate layer on the second layer; forming a third layer on a second substrate; forming a fourth layer and a second light-emitting active layer on the third layer; placing the third layer, the fourth layer, and the second light-emitting active layer on the first intermediate layer, wherein the first light-emitting active layer and the second light-emitting active layer emit different colors of light. A method for forming a plurality of light-emitting diode pixels arranged in a two-dimensional array is also provided. | 12-08-2011 |
20140111996 | LAMP APPARATUSES - A lamp apparatus include a lamp body, at least an alternating current light-emitting diode and a plug. The alternating current light-emitting diode is disposed on a lamp body. The plug is electrically connected to the alternating current light-emitting diode. In lamp apparatuses utilizing AC LED, heat generated thereby is almost concentrated on chips. Compared with conventional lamp apparatuses utilizing DC LEDs, heat generated thereby is distributed on chips and outer rectifier. In lamp apparatuses utilizing AC LEDs, heat generated thereby is almost concentrated on chips because AC LEDs operate directly with AC electric power, omitting a rectifier and preventing power loss during operation of power rectification. Therefore, the heat accumulated on the chips of the AC LEDs is enough to be used to evaporate essential oil. In another embodiment, the invention utilizes low-resistance pure water surrounding the AC LED to dissipate its heat. | 04-24-2014 |