Patent application number | Description | Published |
20100120258 | METHOD FOR FORMING MICRO-PATTERN IN SEMICONDUCTOR DEVICE - A method for forming a micro-pattern in a semiconductor device includes forming a hard mask layer and a sacrificial layer over an etch target layer, forming a plurality of openings having a hole shape in the sacrificial layer, forming spacers over inner sidewalls of the openings to form first hole patterns inside the openings, etching the sacrificial layer outside of the sidewalls of the openings using the spacers in a manner that the sacrificial layer in a first area remains partially and the sacrificial layer in a second area is removed to form second hole patterns, wherein the first area is smaller than the second area, and etching the hard mask layer using the remaining sacrificial layer and the spacers including the first and second hole patterns. | 05-13-2010 |
20100167548 | METHOD FOR FORMING FINE PATTERN USING QUADRUPLE PATTERNING IN SEMICONDUCTOR DEVICE - A method for forming a fine pattern in a semiconductor device using a quadruple patterning includes forming a first partition layer over a first material layer which is formed over a substrate, performing a photo etch process on the first partition layer to form a first partition pattern, performing an oxidation process to form a first spacer sacrificial layer over a surface of the first partition pattern, forming a second spacer sacrificial layer over the substrate structure, forming a second partition layer filling gaps between the first partition pattern, removing the second spacer sacrificial layer, performing an oxidation process to form a third spacer sacrificial layer over a surface of the second partition layer and define a second partition pattern, forming a third partition pattern filling gaps between the first partition pattern and the second partition pattern, and removing the first and third spacer sacrificial layers. | 07-01-2010 |
20100283096 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment. | 11-11-2010 |
20110027964 | DOPING METHOD FOR SEMICONDUCTOR DEVICE - A doping method for a semiconductor device includes forming a trench in a semiconductor substrate, forming a doped layer doped with a dopant over the undoped layer, and forming a doped region into which the dopant is diffused, wherein the doped region is a portion of the semiconductor substrate in contact with the doped layer. | 02-03-2011 |
20110159692 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating semiconductor device includes forming a nitride pattern and a hard mask pattern over a substrate, forming a trench by etching the substrate using the hard mask pattern as an etch barrier, forming an oxide layer filling the trench, performing a planarization process on the oxide layer until the nitride pattern is exposed, and removing the nitride pattern though a dry strip process using a plasma. | 06-30-2011 |
20120009787 | METHOD FOR FORMING MASKING LAYER BY USING ION IMPLANTATION AND SEMICONDUCTOR DEVICE FABRICATED BY USING THE SAME - A method for forming a masking layer of a semiconductor device includes forming a plurality of pillar structures separated by a trench, forming a gap-fill material partially filling the trench and exposing an upper sidewall of each pillar structure, forming a masking layer that covers the pillar structures and the gap-fill material, performing an ion implantation to the masking layer to form an implanted portion covering upper portion of the gap-fill material and one side of the upper sidewalls of each pillar structure and a non-implanted portion covering the other side of the upper sidewalls of each pillar structure, forming a sacrificial layer over the masking layer, exposing the non-implanted portion of the masking layer, and selectively removing the exposed non-implanted portion. | 01-12-2012 |
20120135605 | METHOD FOR FORMING SIDE-CONTACT REGION IN SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes forming a first trench by etching a substrate, forming a liner layer on a surface of the first trench, forming a sacrificial spacer pattern covering one sidewall of the first trench over the liner layer, forming a second trench by etching the substrate under the first trench using the sacrificial spacer pattern and the liner layer as etch barriers, forming a protection layer on a surface of the second trench, and forming a side contact region by selectively removing the protection layer formed on an upper portion of one sidewall of the second trench. | 05-31-2012 |
20130157461 | METHOD FOR FABRICATING SEMICONDUCTOR MEMORY DEVICE - A method for fabricating a semiconductor device includes forming an etch-target layer over a substrate having a first region and a second region, stacking first and second hard mask layers over the etch-target layer, forming spacer patterns over the second hard mask layer of the first area, etching the second hard mask layer using the spacer patterns as an etch barrier, forming a hard mask pattern over the first hard mask layer of the second region, etching the first hard mask layer using the second hard mask layer of the first region and the hard mask pattern of the second region as etch barriers, removing the hard mask pattern of the second region, and etching the etch-target layer using the first and second hard mask layers of the first region and the first hard mask layer of the second region as etch barriers. | 06-20-2013 |
20140370702 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment. | 12-18-2014 |