Patent application number | Description | Published |
20100142247 | MEMORY MODULES AND METHODS FOR MODIFYING MEMORY SUBSYSTEM PERFORMANCE - Methods and memory modules adapted for use in computer systems to generate different voltages for core supply (VDD) and input/output supply (VDDQ) inputs to memory components of the computer memory subsystem. The memory module includes a substrate with an edge connector, a memory component, and first and second voltage planes adapted to supply the core supply voltage and the input/output supply voltage to the memory component. The first voltage plane receives a system input voltage from the edge connector, and the second voltage plane is connected to the first voltage plane to receive a second voltage that is either higher or lower than the system input voltage. One of the first and second voltage planes is connected to the memory component to supply the core supply voltage thereto, and the other voltage plane supplies the input/output supply voltage to the memory component. | 06-10-2010 |
20100312953 | METHOD AND APPARATUS FOR REDUCING WRITE CYCLES IN NAND-BASED FLASH MEMORY DEVICES - A NAND-based flash memory device and a method of its operation that extends the life of the device by reducing the number of unnecessary write cycles to the device. The memory device includes blocks, pages contained by each of the blocks, and a page abstraction layer containing a look-up table for translating logical page numbers into physical page numbers. A certain number of the pages in at least one of the blocks is preferably reserved so as not to be used in default data storage mode but instead used to shuffle data within the at least one block using a dynamic page address scheme, whereby data are dynamically moved from one page to an empty page in the same block using dynamic page mapping. | 12-09-2010 |
20100325352 | HIERARCHICALLY STRUCTURED MASS STORAGE DEVICE AND METHOD - A hierarchically-structured computer mass storage system and method. The mass storage system includes a mass storage memory drive, control logic on the mass storage memory drive that includes a controller and one or more devices for executing a hierarchical storage management technique, a volatile memory cache configured to be accessed by the control logic, and first and second non-volatile storage arrays on the mass storage memory drive and comprising, respectively, first and second non-volatile memory devices. The first and second non-volatile memory devices have properties including access times and write endurance, and at least one of the access time and the write endurance of the first non-volatile memory devices is faster or higher, respectively, than the second non-volatile memory devices. Desired data storage localities on the storage arrays are determined through access patterns and selectively utilizing the properties of the memory devices to match the data storage requirements. | 12-23-2010 |
20110047322 | METHODS, SYSTEMS AND DEVICES FOR INCREASING DATA RETENTION ON SOLID-STATE MASS STORAGE DEVICES - Methods, systems and devices for increasing the reliability of solid state drives containing one or more NAND flash memory arrays. The methods, systems and devices take into account usage patterns that can be employed to initiate proactive scrubbing on demand, wherein the demand is automatically generated by a risk index that can be based on one or more of various factors that typically contribute to loss of data retention in NAND flash memory devices. | 02-24-2011 |
20110231730 | MASS STORAGE DEVICE AND METHOD FOR OFFLINE BACKGROUND SCRUBBING OF SOLID-STATE MEMORY DEVICES - A solid-state mass storage device and method for its operation that includes performing preemptive scrubbing of data during offline periods or disconnects from a host system to which the mass storage device is attached. The device includes a system interface adapted to connect the drive to a host system, at least one nonvolatile memory device, controller means through which data pass when being written to and read from the memory device, a volatile memory cache, a system logic device, and an integrated power source for powering the drive. The system logic device is configured to operate when the drive is not functionally connected to a host system, execute copy commands without accessing a host system, and prioritize preemptive scrubbing of addresses in the memory device on the basis of risk of data loss based on one or more parameters logged by the internal system logic device. | 09-22-2011 |
20150155396 | SOLAR ANTENNA ARRAY AND ITS FABRICATION - A solar antenna array may comprise an array of antennas that may capture and convert sunlight into electrical power. Methods for constructing the solar antenna array may use a stencil and self aligning semiconductor processing steps to minimize cost. Designs may be optimized for capturing a broad spectrum of visible light and non-polarized light. Testing and disconnecting defective antennas from the array may also be performed. | 06-04-2015 |
20150243817 | SOLAR ANTENNA ARRAY AND ITS FABRICATION AND USES - A solar antenna array may comprise an array of randomly placed carbon nanotube antennas that may capture and convert sunlight into electrical power. Methods for constructing the solar antenna array may use a mold and self aligning processing steps to minimize cost. Designs may be optimized for capturing a broad spectrum of non-polarized light. Alternatively, the array may generate light, and when connected in to an array of independently controllable sections may operate as either a reflective or light transmitting display. | 08-27-2015 |