Patent application number | Description | Published |
20100078204 | Printed circuit board including electronic component embedded therein and method of manufacturing the same - Disclosed herein is a printed circuit board including an electronic component embedded therein and a method of manufacturing the printed circuit board. The electronic component is disposed in a cavity of a resin layer including circuit layers formed on both sides thereof. The resin layer, the electronic component and the circuit layers are attached to each other via adhesive layers disposed therebetween. The printed circuit board is manufactured by a compression process, thus shortening a production time and simplifying a manufacturing process. | 04-01-2010 |
20110083891 | ELECTRONIC COMPONENT-EMBEDDED PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is an electronic component-embedded printed circuit board, including: a flexible film; an insulation layer formed on one side of the flexible film; an electronic component mounted on the one side of the flexible film in a face-down manner such that the electronic component is buried in the insulation layer; and a circuit layer including a connecting pattern which is formed on the one side of the flexible film and is connected with a connecting terminal of the electronic component by a connecting member. The electronic component-embedded printed circuit board is advantageous in that the position alignment between the connecting patterns and the connecting terminals is easy and the connection reliability therebetween is high because the connecting patterns formed on a flexible film are directly connected to the connecting terminals of an electronic component using connecting members, and in that the production cost thereof can be reduced because additional rewiring is not required. | 04-14-2011 |
20110083892 | ELECTRONIC COMPONENT-EMBEDDED PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed is an electronic component-embedded printed circuit board, which includes an insulating base, an insulating layer formed on one surface of the insulating base, an electronic component embedded in the insulating layer so that an active surface of the electronic component having a connection terminal faces the insulating base, a trench formed in the insulating base to expose the connection terminal, and a connection pattern formed and embedded in the trench, and in which the embedded connection pattern is finely formed by an imprinting process and is connected to the connection terminal of the electronic to component, thus obviating a need for an additional redistribution layer and reducing the manufacturing cost. A method of manufacturing such a printed circuit board is also provided. | 04-14-2011 |
20120161952 | BLACK BOX FOR VEHICLE AND ACCESS AUTHORIZATION METHOD THEREOF - There are provided a black box for a vehicle automatically transmitting an emergency rescue signal at the time of the occurrence of a traffic accident and allowing only authorized persons to access video data at the time of the occurrence of the traffic accident, and an access authorization method thereof. The black box includes: a sensor sensing vehicle impact; a controller performing a control to store video that is being recorded, transmit a rescue signal, permit authorized access to stored video data, when the amount of vehicle impact sensed by the sensor is equal to or greater than a preset reference value; a storing unit storing the recorded video according to the control of the controller; a communicating unit transmitting the rescue signal to a preset object according to the control of the controller; and an authorizing unit authorizing access to the stored video data from the outside. | 06-28-2012 |
Patent application number | Description | Published |
20150116965 | EMBEDDED BRIDGE STRUCTURE IN A SUBSTRATE - Some novel features pertain to a substrate that includes a first dielectric layer and a bridge structure. The bridge structure is embedded in the first dielectric layer. The bridge structure is configured to provide an electrical connection between a first die and a second die. The first and second dies are configured to be coupled to the substrate. The bridge structure includes a first set of interconnects and a second dielectric layer. The first set of interconnects is embedded in the first dielectric layer. In some implementations, the bridge structure further includes a second set of interconnects. In some implementations, the second dielectric layer is embedded in the first dielectric layer. The some implementations, the first dielectric layer includes the first set of interconnects of the bridge structure, a second set of interconnects in the bridge structure, and a set of pads in the bridge structure. | 04-30-2015 |
20150187731 | LOW COST CONNECTOR FOR HIGH SPEED, HIGH DENSITY SIGNAL DELIVERY - A high-speed, high-density Input/Output bridge couples dies on a substrate to each other using a flexible connector that is attached to the substrate using solder balls disposed in openings in the substrate. Thus, the bulky, male-to-female connectors and/or silicon bridges are eliminated while still permitting dies disposed on the substrate to be coupled together. | 07-02-2015 |
20150228556 | INTEGRATED DEVICE COMPRISING VIA WITH SIDE BARRIER LAYER TRAVERSING ENCAPSULATION LAYER - Some novel features pertain to an integrated device that includes an encapsulation layer, a via structure traversing the encapsulation layer, and a pad. The via structure includes a via that includes a first side, a second side, and a third side. The via structure also includes a barrier layer surrounding at least the first side and the third side of the via. The pad is directly coupled to the barrier layer of the via structure. In some implementations, the integrated device includes a first dielectric layer coupled to a first surface of the encapsulation layer. In some implementations, the integrated device includes a substrate coupled to a first surface of the encapsulation layer. In some implementations, the integrated device includes a first die coupled to the substrate, where the encapsulation layer encapsulates the first die. In some implementations, the via includes a portion configured to operate as a pad. | 08-13-2015 |
20150236681 | EMBEDDED MULTI-TERMINAL CAPACITOR - An embedded multi-terminal capacitor embedded in a substrate cavity includes at least one metal layer patterned into a plurality of power rails and a plurality of ground rails. The substrate includes an external power network. | 08-20-2015 |
20150255416 | INTEGRATED DEVICE COMPRISING HIGH DENSITY INTERCONNECTS AND REDISTRIBUTION LAYERS - Some novel features pertain to an integrated device (e.g., integrated package) that includes a base portion for the integrated device, a first die coupled to a first surface of the base portion, and an underfill between the first die and the base portion. The base portion includes a dielectric layer, and a set of redistribution metal layers. In some implementations, the integrated device further includes an encapsulation material that encapsulates the first die. In some implementations, the integrated device further includes a second die coupled to the first surface of the base portion. In some implementations, the integrated device further includes a set of interconnects on the base portion, the set of interconnects electrically coupling the first die and the second die. In some implementations, the first die includes a first set of interconnect pillars and the second die includes a second set of interconnect pillars. | 09-10-2015 |
20150257282 | SUBSTRATE WITH CONDUCTIVE VIAS - A substrate includes a plurality of vias that are lined with dielectric polymer having a substantially uniform thickness. This substantial uniform thickness provides a lumen within each dielectric-polymer-layer-lined via that is substantially centered within the via. Subsequent deposition of metal into the lumen for each dielectric-polymer-layer-lined via thus provides conductive vias having substantially centered metal conductors. | 09-10-2015 |
20150294791 | CERAMIC INTERPOSER CAPACITOR - A ceramic capacitor is provided that includes a first capacitor surface, a second opposing capacitor surface, and metal plates perpendicular to the first capacitor surface and second opposing capacitor surface. The metal plates extend from the first capacitor surface to the second opposing capacitor surface. The ceramic capacitor is capable of being interposed between a die and a substrate. A portion of the metal plates are capable of being coupled to conductive pads of the die on the first capacitor surface and to conductive pads of the substrate on the second capacitor surface. | 10-15-2015 |
20150294933 | PATTERN BETWEEN PATTERN FOR LOW PROFILE SUBSTRATE - An integrated circuit (IC) substrate that includes a second patterned metal layer formed in between a first patterned metal layer is disclosed. A dielectric layer formed on the first patterned metal layer separates the two metal layers. A non-conductive layer is formed on the dielectric layer and the second patterned metal layer. | 10-15-2015 |
20150325509 | SUBSTRATE BLOCK FOR PoP PACKAGE - A substrate block is provided that has an increased width. The substrate block comprises two substrate bars, and the substrate bars each comprise a substrate and a plurality of filled vias through the substrate. The substrate block may be used to manufacture package substrates, and these package substrate may be incorporated into a PoP structure. The package substrate includes a carrier having a plurality of vertical interconnections and a bar coupled to the vertical interconnections. | 11-12-2015 |
20150340425 | EMBEDDED PACKAGE SUBSTRATE CAPACITOR - A package substrate is provided that includes a core substrate and a capacitor embedded in the core substrate including a first side. The capacitor includes a first electrode and a second electrode disposed at opposite ends of the capacitor. The package also includes a first power supply metal plate extending laterally in the core substrate. The first power supply metal plate is disposed directly on the first electrode of the capacitor from the first side of the core substrate. A first via extending perpendicular to the first metal plate and connected to the first power supply metal plate from the first side of the core substrate. | 11-26-2015 |
20160035664 | SEMICONDUCTOR PACKAGE ON PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME - A package on package structure may be formed by fabricating or providing a bottom package having a substrate, at least one die on top of the substrate, and bonding pads on the top of the substrate. Next, a frame is formed on the bonding pads and connected to the bonding pads. Next, a package material is molded over the top of the substrate to encapsulate the frame, the die, and the pads or substantially encapsulates these components. Next, a portion of the molded package material is removed to expose at least a portion of the frame. The exposed frame portions are formed such that a desired fan in or fan out configuration is obtained. Next, a non-conductive layer is formed on the exposed frame. Last, a second package having a die or chip is connected to the exposed portion of the frame to form a package on package structure. | 02-04-2016 |
20160049378 | INTEGRATED DEVICE COMPRISING A HEAT-DISSIPATION LAYER PROVIDING AN ELECTRICAL PATH FOR A GROUND SIGNAL - Provided herein is an integrated device that includes a substrate, a die, a heat-dissipation layer located between the substrate and the die, and a first interconnect configured to couple the die to the heat-dissipation layer. The heat-dissipation layer may be configured to provide an electrical path for a ground signal. The first interconnect may be further configured to conduct heat from the die to the heat-dissipation layer. The integrated device may also include a second interconnect configured to couple the die to the substrate. The second interconnect may be further configured to conduct a power signal between the die and the substrate. The integrated device may also include a dielectric layer located between the heat-dissipation layer and the substrate, and a solder-resist layer located between the die and the heat-dissipation layer. | 02-18-2016 |
20160091532 | FLEXIBLE FILM ELECTRICAL-TEST SUBSTRATES WITH CONDUCTIVE COUPLING POST(S) FOR INTEGRATED CIRCUIT (IC) BUMP(S) ELECTRICAL TESTING, AND RELATED METHODS AND TESTING APPARATUSES - Flexible film electrical-test substrates with at least one conductive contact post for integrated circuit (IC) bump(s) electrical testing, and related methods and testing apparatuses are disclosed. The backside structure of an electrical-test substrate comprises a flexible dielectric film structure. One or more fine-pitched conductive coupling posts are formed on conductive pads disposed on a front side of the flexible dielectric film structure through a fabrication process. A first pitch of the conductive coupling post(s) in the flexible dielectric film structure is provided to be the same or substantially the same as a second pitch of one or more bumps in an IC, such as die or interposer (e.g., forty (40) micrometers (μm) or less). This allows the conductive coupling post(s) to be placed into mechanical contact with at least one bump of the IC, point-by-point, during an electrical test to electrically testing of the IC. | 03-31-2016 |
20160093571 | SEMICONDUCTOR PACKAGE INTERCONNECTIONS AND METHOD OF MAKING THE SAME - A semiconductor package according to some examples of the disclosure may include a base with a first redistribution layer on one side, first and second side by side die attached to the base on an opposite side from the first redistribution layer, an interposer attached to active sides of the first and second die to provide an interconnection between the first and second die, a plurality of die vias extending from the first and second die to a second redistribution layer on a surface of the package opposite the first redistribution layer, and a plurality of package vias extending through the package between the first and second redistribution layers. | 03-31-2016 |