Patent application number | Description | Published |
20090311280 | NOVEL TNF RECEPTOR REGULATORY DOMAIN - Herpesvirus entry mediator (HVEM) is a member of the tumor necrosis factor receptor superfamily (TNFRSF) and acts as a molecular switch that modulates T cell activation by propagating positive signals from the TNF related ligand, LIGHT (p30, TNFSF14), or inhibitory signals through the immunoglobulin superfamily member, B and T lymphocyte attenuator (BTLA). A novel binding site for BTLA is disclosed, located in cysteine-rich domain-1 of HVEM. BTLA binding site on HVEM overlaps with the binding site for the Herpes Simplex virus-1 envelope glycoprotein D (gD), but is distinct from where LIGHT binds, yet gD inhibits the binding of both ligands. A BTLA activating protein present in human cytomegalovirus is identified as UL144. UL144 binds BTLA, but not LIGHT, and inhibits T cell proliferation. | 12-17-2009 |
20100021466 | Antagonistic Human LIGHT-Specific Human Monoclonal Antibodies - Provided herein are antibodies, such as fully human antibodies that immunospecifically bind to an hLIGHT polypeptide. Also provided are isolated nucleic acids encoding antibodies, such as fully human antibodies, that immunospecifically bind to a hLIGHT polypeptide. Further provided are vectors and host cells comprising nucleic acids encoding antibodies, such as fully human antibodies, that immunospecifically bind to a hLIGHT polypeptide. Also provided are methods of making antibodies, such as fully human antibodies, that immunospecifically bind to a hLIGHT polypeptide. Also provided herein is a method of treating a hLIGHT-mediated disease in a subject comprising administering to the subject an antibody, such as a fully human antibody, that immunospecifically binds to a hLIGHT polypeptide. In preferred embodiments, that anti-hLIGHT antibodies provided herein will ameliorate, neutralize or otherwise inhibit hLIGHT biological activity in vivo (e.g., the hLIGHT-mediated production or secretion of CCL20, IL-8 or RANTES from a cell expressing a hLIGHT receptor). Also provided herein is a method for the detection of hLIGHT in a sample as well as a method for ameliorating, neutralizing or otherwise inhibiting hLIGHT activity, e.g., in a human subject suffering from a disorder in which hLIGHT activity is detrimental. | 01-28-2010 |
20100034815 | METHOD FOR RESTORING DENDRITIC CELL POPULATIONS - The present invention provides methods for restoring and increasing dendritic cell populations in a subject by modulation of the lymphotoxin-β receptor (LTβR) via LTβR agonists. The invention also provides methods for screening for agents capable of restoring or increasing dendritic cell populations. The invention further provides a method for the treatment of immunodeficiency by administration of an LTβR agonist. | 02-11-2010 |
20100104559 | US CIP-COMPOSITIONS AND METHODS FOR MODULATING RESPONSES MEDIATED OR ASSOCIATED WITH BTLA ACTIVITY - Herpesvirus entry mediator (HVEM) is a member of the tumor necrosis factor receptor superfamily (TNFRSF) and acts as a molecular switch that modulates T cell activation by propagating positive signals from the TNF related ligand, LIGHT (p30, TNFSF14), or inhibitory signals through the immunoglobulin superfamily member, B and T lymphocyte attenuator (BTLA). A novel binding site for BTLA is disclosed, located in cysteine-rich domain-1 of HVEM. BTLA binding site on HVEM overlaps with the binding site for the Herpes Simplex virus-1 envelope glycoprotein D (gD), but is distinct from where LIGHT binds, yet gD inhibits the binding of both ligands. A BTLA activating protein present in human cytomegalovirus is identified as UL144. UL144 binds BTLA, but not LIGHT, and inhibits T cell proliferation. | 04-29-2010 |
20100129389 | METHODS OF MODULATING HVEM, BTLA AND CD160 CIS COMPLEX RESPONSE OR SIGNALING ACTIVITY WITH SOLUBLE LIGHT POLYPEPTIDE SEQUENCES - The invention provides HVEM cis complexes which include, for example, HVEM/BTLA, HVEM/CD160 and HVEM/gD cis complexes. The invention provides ligands and agents that bind to HVEM cis complexes, such as antibodies. The invention further provides methods of use of the HVEM cis complexes, and the ligands and agents (e.g., LIGHT polypeptide sequence) that bind to the HVEM cis complexes. | 05-27-2010 |
20100136061 | LIGHT-MEDIATED ANTI-CELL PROLIFERATIVE COMPOSITIONS AND METHODS - The tumor-necrosis factor superfamily member LIGHT (p30; TNFSF-14) is a cytokine for inducing immune responses against tumors. A novel biochemical approach is used to decorate the surface of tumor cells with LIGHT. LIGHT decorated cells can be used to vaccinate and induce effective, sustained immunity against cells expressing neo or pathogen associated antigens. Variants of LIGHT are described that enhance binding to cellular receptors (e.g., LT beta receptor) and decrease regulation by inhibitors (e.g., Decoy Receptor 3) increasing ability to stimulate immunity. | 06-03-2010 |
20110123551 | HVEM/BTLA, HVEM/CD 160 AND HVEM/GD CIS COMPLEXES AND METHODS OF USE - The invention provides HVEM cis complexes which include, for example, HVEM/BTLA, HVEM/CD160 and HVEM/gD cis complexes. The invention provides ligands and agents that bind to HVEM cis complexes, such as antibodies. The invention further provides methods of use of the HVEM cis complexes, and the ligands and agents (e.g., antibodies) that bind to the HVEM cis complexes. | 05-26-2011 |
20120076798 | Antagonistic Human LIGHT-Specific Human Monoclonal Antibodies - Provided herein are antibodies that immunospecifically bind to an hLIGHT polypeptide; isolated nucleic acids encoding the antibodies; vectors and host cells comprising nucleic acids encoding the antibodies; methods of making the antibodies; and a method of treating a hLIGHT-mediated disease in a subject comprising administering to the subject the antibodies. In preferred embodiments, the anti-hLIGHT antibodies provided herein will ameliorate, neutralize or otherwise inhibit hLIGHT biological activity in vivo (e.g., the hLIGHT-mediated production or secretion of CCL20, IL-8 or RANTES from a cell expressing a hLIGHT receptor). Also provided herein is a method for the detection of hLIGHT in a sample as well as a method for ameliorating, neutralizing or otherwise inhibiting hLIGHT activity, e.g., in a human subject suffering from a disorder in which hLIGHT activity is detrimental. | 03-29-2012 |
20120141465 | VIRUS VACCINATION AND TREATMENT METHODS WITH OX40 AGONIST COMPOSITIONS - The invention relates to compositions and methods that employ OX40 (CD134), a TNFR superfamily protein, agonists. The invention includes among other things administering an OX40 agonist alone or in combination with a viral antigen, or live or attenuated virus, to treat a viral infection, or for vaccination or immunization. | 06-07-2012 |
20120251505 | HUMAN LYMPHOID TISSUE INDUCER (LTi) CELL COMPOSITIONS AND METHODS OF USE - The invention provides human lymphoid tissue inducer (LTi) cells, methods of producing human lymphoid tissue inducer (LTi) cells, and methods of using human lymphoid tissue inducer (LTi) cells. Such methods include treatment of a subject that would benefit from human lymphoid tissue inducer (LTi) cells, for example, an immunocompromised or immunosuppressed subject. | 10-04-2012 |
20130230536 | ANTAGONISTIC HUMAN LIGHT-SPECIFIC HUMAN MONOCLONAL ANTIBODIES - Provided herein are antibodies that immunospecifically bind to an hLIGHT polypeptide; isolated nucleic acids encoding the antibodies; vectors and host cells comprising nucleic acids encoding the antibodies; methods of making the antibodies; and a method of treating a hLIGHT-mediated disease in a subject comprising administering to the subject the antibodies. In preferred embodiments, the anti-hLIGHT antibodies provided herein will ameliorate, neutralize or otherwise inhibit hLIGHT biological activity in vivo (e.g., the hLIGHT-mediated production or secretion of CCL20, IL-8 or RANTES from a cell expressing a hLIGHT receptor). Also provided herein is a method for the detection of hLIGHT in a sample as well as a method for ameliorating, neutralizing or otherwise inhibiting hLIGHT activity, e.g., in a human subject suffering from a disorder in which hLIGHT activity is detrimental. | 09-05-2013 |
20140220051 | METHODS OF MODULATING HVEM, BTLA AND CD160 CIS COMPLEX RESPONSE OR SIGNALING ACTIVITY WITH SOLUBLE LIGHT POLYPEPTIDE SEQUENCES - The invention provides HVEM cis complexes which include, for example, HVEM/BTLA, HVEM/CD160 and HVEM/gD cis complexes. The invention provides ligands and agents that bind to HVEM cis complexes, such as antibodies. The invention further provides methods of use of the HVEM cis complexes, and the ligands and agents (e.g., LIGHT polypeptide sequence) that bind to the HVEM cis complexes. | 08-07-2014 |
20150337046 | ANTAGONISTIC HUMAN LIGHT-SPECIFIC HUMAN MONOCLONAL ANTIBODIES - Provided herein are antibodies that immunospecifically bind to an hLIGHT polypeptide; isolated nucleic acids encoding the antibodies; vectors and host cells comprising nucleic acids encoding the antibodies; methods of making the antibodies; and a method of treating a hLIGHT-mediated disease in a subject comprising administering to the subject the antibodies. In preferred embodiments, the anti-hLIGHT antibodies provided herein will ameliorate, neutralize or otherwise inhibit hLIGHT biological activity in vivo (e.g., the hLIGHT-mediated production or secretion of CCL20, IL-8 or RANTES from a cell expressing a hLIGHT receptor). Also provided herein is a method for the detection of hLIGHT in a sample as well as a method for ameliorating, neutralizing or otherwise inhibiting hLIGHT activity, e.g., in a human subject suffering from a disorder in which hLIGHT activity is detrimental. | 11-26-2015 |
Patent application number | Description | Published |
20090063887 | MEMORY MODULE WITH TERMINATION COMPONENT - A memory component having a first and second interface. The first interface is provided to sample address information in response to a first clock signal. The first interface includes inputs to sample at least two bits of the address information in succession during a clock cycle of the first clock signal. The second interface is provided to sample data in response to a second clock signal, having a frequency that is at least twice the frequency of the first clock signal. The second interface includes inputs to sample at least two bits of data in succession during a clock cycle of the second clock signal. | 03-05-2009 |
20090138646 | METHOD AND APPARATUS FOR SIGNALING BETWEEN DEVICES OF A MEMORY SYSTEM - A method and apparatus for signaling between devices of a memory system is provided. In accordance with an embodiment of the invention, one or more of several capabilities are implemented to provide heretofore unattainable levels of important system metrics, for example, high performance and/or low cost. These capabilities relate to timing adjustment capabilities, bit time adjustment capabilities, cycle time selection, use of differential and/or non-differential signaling for bus signals and/or clock signals, use of termination structures on a bus, including integrated termination structures, and active control circuitry to allow adjustment to different characteristic bus impedances and power-state control, including a calibration process to optimize the termination value, use of slew rate control circuitry and transfer characteristic control circuitry in the predriver and driver of transmitter blocks to allow adjustment to different characteristic bus impedances and to allow adjustment for other bus properties, including a calibration process to optimize the such circuitry, and/or provision of a memory component designed to prefetch (preaccess) words that are wider than the width of the data bus so that the memory access bandwidth approximately matches the transfer bandwidth, and memory component able to adjust the size of the prefetch (preaccess) word to accommodate connection to data buses of different width. | 05-28-2009 |
20090213670 | ASYNCHRONOUS, HIGH-BANDWIDTH MEMORY COMPONENT USING CALIBRATED TIMING ELEMENTS - Disclosed herein are embodiments of an asynchronous memory device that use internal delay elements to enable memory access pipelining. In one embodiment, the delay elements are responsive to an input load control signal, and are calibrated with reference to periodically received timing pulses. Different numbers of the delay elements are configured to produce different asynchronous delays and to strobe sequential pipeline elements of the memory device. | 08-27-2009 |
20100061047 | Upgradable Memory System with Reconfigurable Interconnect - Described are systems that employ configurable on-die termination elements that allow users to select from two or more termination topologies. One topology is programmable to support rail-to-rail or half-supply termination. Another topology selectively includes fixed or variable filter elements, thereby allowing the termination characteristics to be tuned for different levels of speed performance and power consumption. Termination voltages and impedances might also be adjusted. | 03-11-2010 |
20110055509 | CONTROL COMPONENT FOR CONTROLLING A DELAY INTERVAL WITHIN A MEMORY COMPONENT - Disclosed herein are embodiments of an asynchronous memory device that use internal delay elements to enable memory access pipelining. In one embodiment, the delay elements are responsive to an input load control signal, and are calibrated with reference to periodically received timing pulses. Different numbers of the delay elements are configured to produce different asynchronous delays and to strobe sequential pipeline elements of the memory device. | 03-03-2011 |
20110179205 | METHOD AND APPARATUS FOR SIMULTANEOUS BIDIRECTIONAL SIGNALING IN A BUS TOPOLOGY - A method and apparatus for providing bidirectional signaling in a bus topology is provided. The bus topology allows more than two electrical circuits or devices to be coupled together along one or more common electrical conductors. For each device on the bus, a transmit buffer is preferably provided for every other device on the bus with which it will communicate. One or more logic circuits, for example, a scheduler, is provided to coordinate exchange transactions between pairs of devices. Time delays are preferably provided between exchange transactions of different device pairs so as to prevent interference. Coherency checking is preferably implemented to avoid discrepancies introduced by information being held in a buffer pending an exchange transaction. | 07-21-2011 |
20120039138 | ASYNCHRONOUS PIPELINED MEMORY ACCESS - A plurality of control signals are asserted within an asynchronous integrated circuit memory device in response to each transition of a memory access initiation signal to effect pipelined memory access operations. | 02-16-2012 |
20120191943 | DYNAMIC PROTOCOL FOR COMMUNICATING COMMAND AND ADDRESS INFORMATION - A dynamic serialized command and address (CA) protocol with cycle-accurate matching between the PHY interface and the DFI interface is described. This CA protocol facilitates the use of a common memory-controller control logic with different CA bus configurations. With this CA protocol, CA packets for different memory operations have different formats. The size and the position of the CA packets vary relative to boundaries of DFI clock cycles, and the CA packets can extend beyond DFI clock cycle boundaries. In addition, there are at least two possible formats for a read or write memory operation. The appropriate format is selected based on the immediately preceding memory operation. | 07-26-2012 |
20120213020 | MEMORY CONTROLLER - A memory component having a first and second interface. The first interface is provided to sample address information in response to a first clock signal. The first interface includes inputs to sample at least two bits of the address information in succession during a clock cycle of the first clock signal. The second interface is provided to sample data in response to a second clock signal, having a frequency that is at least twice the frequency of the first clock signal. The second interface includes inputs to sample at least two bits of data in succession during a clock cycle of the second clock signal. | 08-23-2012 |
20120287725 | MEMORY CONTROLLER WITH SELECTIVE DATA TRANSMISSION DELAY - A DRAM controller component generates a timing signal and transmits, to a DRAM, (i) write data that requires a first time interval to propagate from the DRAM controller component to the DRAM and to be sampled by the DRAM on one or more edges of the timing signal, (ii) a clock signal that requires a second time interval to propagate from the DRAM controller component to the DRAM, and (iii) a write command, associated with the write data, to be sampled by the DRAM on one or more edges of the clock signal. The DRAM controller component includes series-coupled delay elements to generate respective incrementally delayed signals, and a multiplexer to select one of the delayed signals to time the transmission of the write data, such that transmission of the write data is delayed based on a difference between the first time interval and the second time interval. | 11-15-2012 |
20150103479 | LOAD REDUCED MEMORY MODULE - The embodiments described herein describe technologies for memory systems. One implementation of a memory system includes a motherboard substrate with multiple module sockets, at least one of which is populated with a memory module. A first set of data lines is disposed on the motherboard substrate and coupled to the module sockets. The first set of data lines includes a first subset of point-to-point data lines coupled between a memory controller and a first socket and a second subset of point-to-point data lines coupled between the memory controller and a second socket. A second set of data lines is disposed on the motherboard substrate and coupled between the first socket and the second socket. The first and second sets of data lines can make up a memory channel. | 04-16-2015 |
Patent application number | Description | Published |
20080286609 | LOW EMBODIED ENERGY WALLBOARDS AND METHODS OF MAKING SAME - Wallboards, as well as cement boards, are produced by methods which use significantly reduced Embodied Energy when compared with the energy used to fabricate gypsum wallboard. A novel binder, consisting in one embodiment of phosphoric acid and calcium silicate, and combined with various fillers, is used to provide a controlled exothermic reaction to create a gypsum-board-like core which can be wrapped in a selected material such as recycled paper and manufactured on a conveyor system to appear and handle like gypsum wallboard, but without the large amounts of energy required to make gypsum wallboard. The resulting product may be used in interior or exterior applications and may possess fire resistance, sound ratings and other important properties of gypsum wallboard. As energy costs increase, the novel wallboards of this invention can become less expensive to manufacture than traditional wallboard. The manufacturing process results in much lower greenhouse gas emissions than the processes used to make gypsum wallboard. | 11-20-2008 |
20090130452 | Low Embodied Energy Wallboards and Methods of Making Same - Wallboards, as well as other building materials, are produced by methods which use significantly reduced embodied energy, generating far less greenhouse gases when compared with the energy used to fabricate gypsum wallboard. A novel cementitious core, consisting in one embodiment of post-industrial waste such as slag and combined with pH modifiers, provides a controlled exothermic reaction to create a gypsum-wallboard-like core which can be wrapped in a selected material such as recycled paper and manufactured on a conveyor system to appear, weigh and handle similar to gypsum wallboard, but without the large amounts of energy required to make gypsum wallboard. The manufacturing process results in lower greenhouse gas emissions than the processes used to make gypsum wallboard. | 05-21-2009 |
20090288582 | Low Embodied Energy Concrete Mixture - A method for making a low embodied energy cementitious mixture by blending a variety of post-consumer wastes, post-industrial wastes, as well as renewable, organic and recyclable materials with Portland cement or a material having similar cementitious properties. The primary materials are recycled concrete, coal-fired fly ash waste, silica fume, post-industrial waste, organic or inorganic waste fibers. Glass, brick, ceramics, ground tires and other waste products can also be included. | 11-26-2009 |
20130145969 | Low Embodied Energy Wallboards and Methods of Making Same - Wallboards, as well as other building materials, are produced by methods which use significantly reduced embodied energy, generating far less greenhouse gases when compared with the energy used to fabricate gypsum wallboard. A novel cementitious core, consisting in one embodiment of post-industrial waste such as slag and combined with pH modifiers, provides a controlled exothermic reaction to create a gypsum-wallboard-like core which can be wrapped in a selected material such as recycled paper and manufactured on a conveyor system to appear, weigh and handle similar to gypsum wallboard, but without the large amounts of energy required to make gypsum wallboard. The manufacturing process results in lower greenhouse gas emissions than the processes used to make gypsum wallboard. | 06-13-2013 |