Patent application number | Description | Published |
20120183721 | DISPLAY APPARATUS AND PROCESS FOR PRODUCING THE SAME - Provided is a process for producing a display apparatus, which comprises (a) a step of forming a seal part made of e.g. a double-sided adhesive tape | 07-19-2012 |
20130011597 | DISPLAY APPARATUS AND PROCESS FOR PRODUCING THE SAME - Provided is a process for producing a display apparatus, which comprises (a) a step of forming a seal part made of e.g. a double-sided adhesive tape | 01-10-2013 |
20130020007 | METHOD OF MANUFACTURING VEHICLE WINDOWN PANE MEMBER - The present invention relates to a process for manufacturing a window material for vehicles, the window material including a curved glass plate, a curved resin plate provided at a side of a concave surface of the curved glass plate and curving along a shape of the curved glass plate, a resin layer sandwiched between the curved glass plate and the curved resin plate, and a sealing portion surrounding a periphery of the resin layer, the process including the specific steps. | 01-24-2013 |
20130029075 | TRANSPARENT PLATE HAVING ADHESIVE LAYER, DISPLAY DEVICE AND PROCESSES FOR THEIR PRODUCTION - To provide a transparent plate having an adhesive layer, wherein voids are less likely to remain at the interface between the adhesive layer and another plate; a display device, wherein formation of voids at the interface between the display panel and the adhesive layer and at the interface between the transparent plate and the adhesive layer, is sufficiently prevented; and processes for their production. A transparent plate having an adhesive layer, which comprises a protective plate (a transparent plate) and an adhesive layer formed on a surface of the protective plate, wherein the adhesive layer comprises a layer portion spreading over the surface of the protective plate and a seal portion enclosing the periphery of the layer portion; a display device having the transparent plate bonded; and processes for their production. | 01-31-2013 |
Patent application number | Description | Published |
20090173930 | MEMORY ELEMENT AND MEMORY DEVICE - A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is written or erased in accordance with a variation in electrical characteristics of the memory layer; and pulse applying means applying a voltage pulse or a current pulse selectively to the plurality of memory elements. The memory layer includes an ion source layer including an ionic-conduction material and at least one kind of metallic element, and the ion source layer further contains oxygen. | 07-09-2009 |
20100195370 | Nonvolatile semiconductor memory device and method for performing verify write operation on the same - Disclosed herein is a nonvolatile semiconductor memory device including a plurality of memory cells; and a driver circuit configured to perform a verify write operation in a cycle including selecting from an array of the plurality of memory cells a predetermined number of memory cells constituting a write cell unit, writing data collectively to the predetermined number of memory cells, and verifying the written data, the driver circuit further performing the verify write operation repeatedly until all memory cells within the write cell unit are found to have passed the verification. | 08-05-2010 |
20100259968 | STORAGE DEVICE AND INFORMATION RERECORDING METHOD - A storage device that improves ability of adjusting a resistance value level in recording and enables stable verification control is provided. VWL supplied from a second power source to a control terminal of a transistor is increased (increase portion: ΔVWL) for every rerecording by verification control by a WL adjustment circuit. In the case where a variable resistive element is able to record multiple values, ΔVWL is a value variable for every resistance value level of multiple value information. That is, ΔVWL is a value variable according to magnitude relation of a variation range of recording resistance of the variable resistive element due to a current. In the region where the variation range of the recording resistance is large (source-gate voltage VGS of the transistor is small), ΔVWL is small, while in the region where the variation range of the recording resistance is small (VGS is large), ΔVWL is large. | 10-14-2010 |
20110026298 | METHOD OF DRIVING STORAGE DEVICE - Provided is a method of driving a storage device capable of improving reliability of data write in the storage device including a variable resistance element. At the time of data write operation, a plurality of write pulses having shapes different from each other are applied between electrodes | 02-03-2011 |
20110149635 | STORAGE DEVICE AND INFORMATION RERECORDING METHOD - A storage device capable of decreasing the number of voltages necessitating control and decreasing peripheral circuit size is provided. A first pulse voltage (VBLR) is supplied from a first power source through a bit line BLR to an electrode of a variable resistive element. A second pulse voltage (VWL) for selecting a cell is supplied from a second power source through a word line WL to a control terminal of a transistor. A third pulse voltage (VBLT) is supplied from a third power source though a bit line BLT to a second input/output terminal of the transistor. At the time of rewriting information, the voltage value (VBLT) of the third power source is adjusted by an adjustment circuit. Thereby, a cell voltage and a cell current are changed (decreased or increased). | 06-23-2011 |
20110199812 | Nonvolatile semiconductor memory device - A nonvolatile semiconductor memory device includes: a memory element in which a rate of charge discharge between two electrodes of the memory element differs according to a logical value of stored information; cell wiring connected to one electrode of the memory element; a sense amplifier having a sense node connected to the cell wiring, the sense amplifier reading the logical value of the information by comparing a potential of the sense node with a reference potential; and a readout control circuit capable of switching between a dynamic sense operation performing readout by precharging the cell wiring and discharging or charging the cell wiring via the memory element and a static sense operation performing readout in a state of a current load being connected to the sense node. | 08-18-2011 |
20120069631 | MEMORY ELEMENT AND MEMORY DEVICE - A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is written or erased in accordance with a variation in electrical characteristics of the memory layer; and pulse applying means applying a voltage pulse or a current pulse selectively to the plurality of memory elements. The memory layer includes an ion source layer including an ionic-conduction material and at least one kind of metallic element, and the ion source layer further contains oxygen. | 03-22-2012 |
20120212994 | MEMORY APPARATUS - A memory apparatus includes: a plurality of memory cells which includes a first resistance change element; and a read-out circuit which determines the size of a resistance value of the first resistance change element by comparing the resistance state of a memory cell selected among the plurality of memory cells to the resistance state of a reference memory cell, wherein the reference memory cell includes a second resistance change element, a resistance value of the second resistance change element with respect to an applied voltage is smaller than that in a high resistance state of the first resistance change element, and the second resistance change element shows the same resistance change characteristic as the first resistance change element. | 08-23-2012 |
20120218809 | STORAGE APPARATUS AND OPERATION METHOD FOR OPERATING THE SAME - A storage apparatus includes: a plurality of storage elements configured to have the resistance state thereof changed in accordance with an applied voltage; and a drive portion configured to perform a resistance change operation and a read operation, the resistance change operation involving writing or erasing information to or from the storage elements by changing the resistance state thereof, the read operation involving reading the information from the storage elements; wherein the drive portion includes an amplifier configured to output a read signal upon execution of the read operation, a constant current load, and a control portion configured to perform the resistance change operation and a direct verify operation on the storage elements, the direct verify operation involving carrying out, subsequent to the resistance change operation, the read operation for verifying whether the writing or erasing of the information to or from the storage elements has been normally accomplished. | 08-30-2012 |
20140022833 | STORAGE APPARATUS AND OPERATION METHOD FOR OPERATING THE SAME - A storage apparatus includes: a plurality of storage elements configured to have the resistance state thereof changed in accordance with an applied voltage; and a drive portion configured to perform a resistance change operation and a read operation, the resistance change operation involving writing or erasing information to or from the storage elements by changing the resistance state thereof, the read operation involving reading the information from the storage elements; wherein the drive portion includes an amplifier configured to output a read signal upon execution of the read operation, a constant current load, and a control portion configured to perform the resistance change operation and a direct verify operation on the storage elements, the direct verify operation involving carrying out, subsequent to the resistance change operation, the read operation for verifying whether the writing or erasing of the information to or from the storage elements has been normally accomplished. | 01-23-2014 |
20140177316 | NON-VOLATILE MEMORY SYSTEM WITH RESET VERIFICATION MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state. | 06-26-2014 |
20140177317 | NON-VOLATILE MEMORY SYSTEM WITH POWER REDUCTION MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a non-volatile memory system including: providing a resistive storage element having a transformation layer; activating a write driver, coupled to the resistive storage element, for applying a bias voltage to the transformation layer; monitoring a resistance of the resistive storage element by a sense amplifier; and detecting a conductive thread, formed in the transformation layer, by the sense amplifier for reducing a level of the bias voltage. | 06-26-2014 |
20140268975 | INTEGRATED CIRCUIT SYSTEM WITH NON-VOLATILE MEMORY STRESS SUPPRESSION AND METHOD OF MANUFACTURE THEREOF - An integrated circuit system, and a method of manufacture thereof, including: an integrated circuit die; a non-volatile memory cell in the integrated circuit die and having a bit line for reading a data condition state of the non-volatile memory cell; and a voltage clamp in the integrated circuit die, the voltage clamp having a semiconductor switch connected to the bit line for reducing voltage excursions on the bit line. | 09-18-2014 |
20150294719 | NON-VOLATILE MEMORY SYSTEM WITH RESET VERIFICATION MECHANISM AND METHOD OF OPERATION THEREOF - A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state. | 10-15-2015 |
Patent application number | Description | Published |
20090312418 | ALKANEDIOL COMPOSITION, PROCESS FOR PRODUCING THE SAME, AND COSMETIC - A less malodorous alkanediol composition, a process for producing the alkanediol composition efficiently, and a cosmetic containing the alkanediol composition are provided. | 12-17-2009 |
20110301389 | ALKANEDIOL COMPOSITION, PROCESS FOR PRODUCING THE SAME, AND COSMETIC - A less malodorous alkanediol composition, a process for producing the alkanediol composition efficiently, and a cosmetic containing the alkanediol composition are provided. An alkanediol composition contains 0.005 parts by mass or less of ester compound per 100 parts by mass of alkanediol compound having four or more carbon atoms. An alkanediol composition contains 0.2 parts by mass or less of dioxane compound per 100 parts by mass of alkanediol compound having four or more carbon atoms. Furthermore, an ether-containing dihydric alcohol is preferably 0.3 parts by mass or less per 100 parts by mass of alkanediol compound. | 12-08-2011 |
20150299375 | URETHANE-TYPE POLYMERS AND USE THEREOF - The present invention is a urethane-type polymer obtained by a reaction of:
| 10-22-2015 |
20160120779 | GEL-LIKE COMPOSITION FOR COSMETIC PREPARATIONS - The present invention relates to a gel-like composition for a cosmetic preparation including 0.05 part by mass to 3 parts by mass of a compound represented by the following general formula (1) with respect to 100 parts by mass of water, which is not destroyed by a change in pH or by the addition of a salt into the gel, and gives a feeling of use equivalent to that of a gel produced using an alkali thickening type gelling agent. | 05-05-2016 |
Patent application number | Description | Published |
20140130046 | COMMUNICATION APPARATUS AND CONFIGURATION METHOD - An information processing unit of a communication apparatus includes a non-volatile memory and a volatile memory. A control unit of the communication apparatus loads the boot image from the non-volatile memory to the volatile memory upon activation of the communication apparatus, activates the virtual machine template in the loaded boot image on the volatile memory, deactivates the activated virtual machine template after reconfiguring the activated virtual machine template to minimum required configuration to execute a virtual machine. Upon receipt of a request for addition of communication service, the control unit creates a replicate virtual machine template by replicating the deactivated virtual machine template, activates the replicate virtual machine template, reconfigures the activated replicate virtual machine template to configuration according to the request for addition of communication service, and executes the reconfigured replicate virtual machine template as a virtual machine to provide the communication service. | 05-08-2014 |
20140204734 | NODE DEVICE, COMMUNICATION SYSTEM, AND METHOD FOR SWITCHING VIRTUAL SWITCH - When a failure occurs in a virtual machine (hereinafter called “VM”), degenerate operation not routed through the VM which is a failure target, and corresponding to a communication service on the VM is conducted to shorten a communication interrupt time. A communication path of a virtual switch in a multitenant environment where a virtual machine that operates a plurality of software provides a communication service for cloud computing such as a WAN high-speed technology is controlled. The control method, for example, comprises the steps of monitoring an operating status of the communication service of the virtual machine, and conducting a communication control by changing the communication path and a communication method of the virtual machine according to an application of the communication service if a failure occurs in the application of the communication service of one virtual machine. | 07-24-2014 |
20150149813 | FAILURE RECOVERY SYSTEM AND METHOD OF CREATING THE FAILURE RECOVERY SYSTEM - When detecting the configuration change or the operating state of a virtual machine of the main system, a VM management unit changes a value of a determination index of the virtual machine, and selects a virtual machine of the standby system/auxiliary system used for failure recovery of the virtual machine of the main system on the basis of a value of the determination index. A pattern generation unit provides the virtual machine of the standby system/auxiliary system selected by the VM management unit. | 05-28-2015 |