Patent application number | Description | Published |
20080280577 | RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION - This disclosure addresses providing gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components. The architecture for supporting both quadrature down-conversion and ASK/AM is described first, followed by the ASK/AM detector circuit details, then the AM-FM detector architecture, and finally the most general AM-FM/IQ demodulator system concept and the FSK/FM detector circuit details. | 11-13-2008 |
20130002347 | COUPLING SYSTEM FOR DATA RECEIVERS - A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier. | 01-03-2013 |
20130044837 | RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION - Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components. Disclosed herein are architecture for supporting both quadrature down-conversion and ASK/AM, ASK/AM detector circuit details, AM-FM detector architecture, and an AM-FM/IQ demodulator system and FSK/FM detector circuit details. | 02-21-2013 |
20130045701 | RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION - Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components. Disclosed herein are architecture for supporting both quadrature down-conversion and ASK/AM, ASK/AM detector circuit details, AM-FM detector architecture, and an AM-FM/IQ demodulator system and FSK/FM detector circuit details. | 02-21-2013 |
20130045702 | RECEIVER AND INTEGRATED AM-FM/IQ DEMODULATORS FOR GIGABIT-RATE DATA DETECTION - Provision of gigabit-rate data transmission over wireless radio links, using carrier frequencies in the millimeter-wave range (>30 GHz). More specifically, a circuit for detection of amplitude-shift keyed (ASK) or other amplitude modulations (AM) which can be easily incorporated into an integrated circuit receiver system is described, making the receiver capable of supporting both complex IQ modulation schemes and simpler, non-coherent on-off or multiple-level keying signals. Several novel radio architectures are also described which, with the addition of a frequency discriminator network, have the capability of handling frequency shift keyed (FSK) or other frequency modulations (FM), as well as AM and complex IQ modulation schemes. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components. Disclosed herein are architecture for supporting both quadrature down-conversion and ASK/AM, ASK/AM detector circuit details, AM-FM detector architecture, and an AM-FM/IQ demodulator system and FSK/FM detector circuit details. | 02-21-2013 |
20130215954 | ANALOG SIGNAL CURRENT INTEGRATORS WITH TUNABLE PEAKING FUNCTION - Analog signal current integrators are provided having tunable peaking functions. Analog signal current integrators with tunable peaking functions enable data rate dependent loss compensation for applications in high data rate receiver integrated circuits incorporating advanced equalization functions, such as decision-feedback equalizers. For instance, a current integrator circuit includes a current integrating amplifier circuit comprising an adjustable circuit element to tune a peaking response of the current integrator circuit, and a peaking control circuit to generate a control signal to adjust a value of the adjustable circuit element as a function of an operating condition of the current integrator circuit. The operating condition may be a specified data rate or a communication channel characteristic or both. The adjustable circuit element may be a degeneration capacitor or a bias current source. | 08-22-2013 |
20140133604 | COUPLING SYSTEM FOR DATA RECEIVERS - A data receiver, a method of operating a data receiver, and an integrated coupling system in a data receiver are disclosed. In one embodiment, the data receiver comprises an input terminal for receiving an input data signal, an input amplifier for amplifying selected components of the input data signal, and an input signal path for transmitting specified high-frequency components and a baseline component of the input data signal from the input terminal to the input amplifier. The data receiver further comprises a feed-forward resistive network connected to the input terminal and to the input amplifier. This feed forward resistive network is used to forward a low-frequency drift compensation signal from the input terminal to the input amplifier, using a passive resistive network, to compensate for low frequency variations in the input data signal, and to develop a desired bias voltage at the input amplifier. | 05-15-2014 |
20150215144 | APPARATUS AND METHOD FOR SIGNAL PHASE CONTROL IN AN INTEGRATED RADIO CIRCUIT - An apparatus and method to control signal phase in a radio device includes an analog phase rotator that accepts differential in-phase (I) and quadrature (Q) inputs, connected in two differential pairs. The analog phase rotator is driven by a local oscillator and is configured to control a phase of the local oscillator's output. A phase error determination module is configured to determine phase error information based on received I and Q (IQ) signal values. A phase correction module is configured to derive from the received IQ signal values a correction signal and apply the correction signal to the phase rotator in a path of the local oscillator. | 07-30-2015 |